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URL https://opencores.org/ocsvn/or1k/or1k/trunk

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 702 to Rev 703
    ↔ Reverse comparison
  •

Rev 702 → Rev 703

/trunk/gen_or1k_isa/sources/or32.c
369,6 → 369,9
return 0;
}
 
/* Simple cache for letter ranges */
static int range_cache[256] = {0};
 
/* Number of letters in the individual lettered operand. */
int
letter_range(char l)
376,6 → 379,9
CONST struct or32_opcode *pinsn;
char *enc;
int range = 0;
 
/* Is value cached? */
if (range = range_cache[(unsigned char)l]) return range;
for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
{
386,9 → 392,10
enc += 2;
else if (*enc == l)
range++;
return range;
return range_cache[(unsigned char)l] = range;
}
}
printf("\nABORT: letter_range(%c): Never used letter.\n", l);
exit(1);
}
768,19 → 775,19
while (!(*a & LEAF_FLAG))
{
unsigned int first = *a;
debug(9, "%i ", a - automata);
//debug(9, "%i ", a - automata);
a++;
i = (insn >> first) & *a;
a++;
if (!*(a + i))
{ /* Invalid instruction found? */
debug(9, "XXX\n", i);
//debug(9, "XXX\n", i);
return -1;
}
a = automata + *(a + i);
}
i = *a & ~LEAF_FLAG;
debug(9, "%i\n", i);
//debug(9, "%i\n", i);
/* Final check - do we have direct match?
(based on or32_opcodes this should be the only possibility,
but in case of invalid/missing instruction we must perform a check) */
797,7 → 804,7
sign bit position if sign extension is correct extension. Which extension
is proper is figured out from letter description. */
unsigned long
static unsigned long
extend_imm(unsigned long imm, char l)
{
unsigned long mask;
897,8 → 904,9
 
/* Print register. Used only by print_insn. */
 
static void
or32_print_register (param_ch, encoding, insn)
static char *
or32_print_register (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
905,13 → 913,16
{
int regnum = or32_extract(param_ch, encoding, insn);
sprintf (disassembled, "%sr%d", disassembled, regnum);
sprintf (dest, "r%d", regnum);
while (*dest) dest++;
return dest;
}
 
/* Print immediate. Used only by print_insn. */
 
static void
or32_print_immediate (param_ch, encoding, insn)
static char *
or32_print_immediate (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
923,12 → 934,14
if (letter_signed(param_ch))
{
if (imm < 0)
sprintf (disassembled, "%s%d", disassembled, imm);
sprintf (dest, "%d", imm);
else
sprintf (disassembled, "%s0x%x", disassembled, imm);
sprintf (dest, "0x%x", imm);
}
else
sprintf (disassembled, "%s%#x", disassembled, imm);
sprintf (dest, "%#x", imm);
while (*dest) dest++;
return dest;
}
 
/* Disassemble one instruction from insn to disassemble.
939,30 → 952,46
unsigned long insn;
{
int index;
index = insn_decode (insn);
return disassemble_index (insn, insn_decode (insn));
}
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
 
int
disassemble_index (insn, index)
unsigned long insn;
int index;
{
char *dest = disassembled;
if (index >= 0)
{
struct or32_opcode const *opcode = &or32_opcodes[index];
char *s;
 
sprintf(disassembled, "%s ", opcode->name);
strcpy (dest, opcode->name);
while (*dest) dest++;
*dest++ = ' ';
*dest = 0;
for (s = opcode->args; *s != '\0'; ++s)
{
switch (*s)
{
case '\0':
return 4;
return insn_len (insn);
case 'r':
or32_print_register(*++s, opcode->encoding, insn);
dest = or32_print_register(dest, *++s, opcode->encoding, insn);
break;
default:
if (strchr (opcode->encoding, *s))
or32_print_immediate (*s, opcode->encoding, insn);
else
sprintf(disassembled, "%s%c", disassembled, *s);
dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
else {
*dest++ = *s;
*dest = 0;
}
}
}
}
969,8 → 998,8
else
{
/* This used to be %8x for binutils. */
sprintf(disassembled, "%s.word 0x%08x", disassembled, insn);
sprintf(dest, ".word 0x%08x", insn);
while (*dest) dest++;
}
return insn_len (insn);
}
 
/trunk/gen_or1k_isa/sources/opcode/or32.c
369,6 → 369,9
return 0;
}
 
/* Simple cache for letter ranges */
static int range_cache[256] = {0};
 
/* Number of letters in the individual lettered operand. */
int
letter_range(char l)
376,6 → 379,9
CONST struct or32_opcode *pinsn;
char *enc;
int range = 0;
 
/* Is value cached? */
if (range = range_cache[(unsigned char)l]) return range;
for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
{
386,9 → 392,10
enc += 2;
else if (*enc == l)
range++;
return range;
return range_cache[(unsigned char)l] = range;
}
}
printf("\nABORT: letter_range(%c): Never used letter.\n", l);
exit(1);
}
768,19 → 775,19
while (!(*a & LEAF_FLAG))
{
unsigned int first = *a;
debug(9, "%i ", a - automata);
//debug(9, "%i ", a - automata);
a++;
i = (insn >> first) & *a;
a++;
if (!*(a + i))
{ /* Invalid instruction found? */
debug(9, "XXX\n", i);
//debug(9, "XXX\n", i);
return -1;
}
a = automata + *(a + i);
}
i = *a & ~LEAF_FLAG;
debug(9, "%i\n", i);
//debug(9, "%i\n", i);
/* Final check - do we have direct match?
(based on or32_opcodes this should be the only possibility,
but in case of invalid/missing instruction we must perform a check) */
797,7 → 804,7
sign bit position if sign extension is correct extension. Which extension
is proper is figured out from letter description. */
unsigned long
static unsigned long
extend_imm(unsigned long imm, char l)
{
unsigned long mask;
897,8 → 904,9
 
/* Print register. Used only by print_insn. */
 
static void
or32_print_register (param_ch, encoding, insn)
static char *
or32_print_register (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
905,13 → 913,16
{
int regnum = or32_extract(param_ch, encoding, insn);
sprintf (disassembled, "%sr%d", disassembled, regnum);
sprintf (dest, "r%d", regnum);
while (*dest) dest++;
return dest;
}
 
/* Print immediate. Used only by print_insn. */
 
static void
or32_print_immediate (param_ch, encoding, insn)
static char *
or32_print_immediate (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
923,12 → 934,14
if (letter_signed(param_ch))
{
if (imm < 0)
sprintf (disassembled, "%s%d", disassembled, imm);
sprintf (dest, "%d", imm);
else
sprintf (disassembled, "%s0x%x", disassembled, imm);
sprintf (dest, "0x%x", imm);
}
else
sprintf (disassembled, "%s%#x", disassembled, imm);
sprintf (dest, "%#x", imm);
while (*dest) dest++;
return dest;
}
 
/* Disassemble one instruction from insn to disassemble.
939,30 → 952,46
unsigned long insn;
{
int index;
index = insn_decode (insn);
return disassemble_index (insn, insn_decode (insn));
}
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
 
int
disassemble_index (insn, index)
unsigned long insn;
int index;
{
char *dest = disassembled;
if (index >= 0)
{
struct or32_opcode const *opcode = &or32_opcodes[index];
char *s;
 
sprintf(disassembled, "%s ", opcode->name);
strcpy (dest, opcode->name);
while (*dest) dest++;
*dest++ = ' ';
*dest = 0;
for (s = opcode->args; *s != '\0'; ++s)
{
switch (*s)
{
case '\0':
return 4;
return insn_len (insn);
case 'r':
or32_print_register(*++s, opcode->encoding, insn);
dest = or32_print_register(dest, *++s, opcode->encoding, insn);
break;
default:
if (strchr (opcode->encoding, *s))
or32_print_immediate (*s, opcode->encoding, insn);
else
sprintf(disassembled, "%s%c", disassembled, *s);
dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
else {
*dest++ = *s;
*dest = 0;
}
}
}
}
969,8 → 998,8
else
{
/* This used to be %8x for binutils. */
sprintf(disassembled, "%s.word 0x%08x", disassembled, insn);
sprintf(dest, ".word 0x%08x", insn);
while (*dest) dest++;
}
return insn_len (insn);
}
 
/trunk/insight/include/opcode/or32.h
189,5 → 189,9
Return the size of the instruction. */
int disassemble_insn (unsigned long insn);
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
int disassemble_index (unsigned long insn, int index);
 
#endif
 
/trunk/insight/opcodes/or32.c
369,6 → 369,9
return 0;
}
 
/* Simple cache for letter ranges */
static int range_cache[256] = {0};
 
/* Number of letters in the individual lettered operand. */
int
letter_range(char l)
376,6 → 379,9
CONST struct or32_opcode *pinsn;
char *enc;
int range = 0;
 
/* Is value cached? */
if (range = range_cache[(unsigned char)l]) return range;
for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
{
386,9 → 392,10
enc += 2;
else if (*enc == l)
range++;
return range;
return range_cache[(unsigned char)l] = range;
}
}
printf("\nABORT: letter_range(%c): Never used letter.\n", l);
exit(1);
}
768,19 → 775,19
while (!(*a & LEAF_FLAG))
{
unsigned int first = *a;
debug(9, "%i ", a - automata);
//debug(9, "%i ", a - automata);
a++;
i = (insn >> first) & *a;
a++;
if (!*(a + i))
{ /* Invalid instruction found? */
debug(9, "XXX\n", i);
//debug(9, "XXX\n", i);
return -1;
}
a = automata + *(a + i);
}
i = *a & ~LEAF_FLAG;
debug(9, "%i\n", i);
//debug(9, "%i\n", i);
/* Final check - do we have direct match?
(based on or32_opcodes this should be the only possibility,
but in case of invalid/missing instruction we must perform a check) */
797,7 → 804,7
sign bit position if sign extension is correct extension. Which extension
is proper is figured out from letter description. */
unsigned long
static unsigned long
extend_imm(unsigned long imm, char l)
{
unsigned long mask;
897,8 → 904,9
 
/* Print register. Used only by print_insn. */
 
static void
or32_print_register (param_ch, encoding, insn)
static char *
or32_print_register (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
905,13 → 913,16
{
int regnum = or32_extract(param_ch, encoding, insn);
sprintf (disassembled, "%sr%d", disassembled, regnum);
sprintf (dest, "r%d", regnum);
while (*dest) dest++;
return dest;
}
 
/* Print immediate. Used only by print_insn. */
 
static void
or32_print_immediate (param_ch, encoding, insn)
static char *
or32_print_immediate (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
923,12 → 934,14
if (letter_signed(param_ch))
{
if (imm < 0)
sprintf (disassembled, "%s%d", disassembled, imm);
sprintf (dest, "%d", imm);
else
sprintf (disassembled, "%s0x%x", disassembled, imm);
sprintf (dest, "0x%x", imm);
}
else
sprintf (disassembled, "%s%#x", disassembled, imm);
sprintf (dest, "%#x", imm);
while (*dest) dest++;
return dest;
}
 
/* Disassemble one instruction from insn to disassemble.
939,30 → 952,46
unsigned long insn;
{
int index;
index = insn_decode (insn);
return disassemble_index (insn, insn_decode (insn));
}
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
 
int
disassemble_index (insn, index)
unsigned long insn;
int index;
{
char *dest = disassembled;
if (index >= 0)
{
struct or32_opcode const *opcode = &or32_opcodes[index];
char *s;
 
sprintf(disassembled, "%s ", opcode->name);
strcpy (dest, opcode->name);
while (*dest) dest++;
*dest++ = ' ';
*dest = 0;
for (s = opcode->args; *s != '\0'; ++s)
{
switch (*s)
{
case '\0':
return 4;
return insn_len (insn);
case 'r':
or32_print_register(*++s, opcode->encoding, insn);
dest = or32_print_register(dest, *++s, opcode->encoding, insn);
break;
default:
if (strchr (opcode->encoding, *s))
or32_print_immediate (*s, opcode->encoding, insn);
else
sprintf(disassembled, "%s%c", disassembled, *s);
dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
else {
*dest++ = *s;
*dest = 0;
}
}
}
}
969,8 → 998,8
else
{
/* This used to be %8x for binutils. */
sprintf(disassembled, "%s.word 0x%08x", disassembled, insn);
sprintf(dest, ".word 0x%08x", insn);
while (*dest) dest++;
}
return insn_len (insn);
}
 
/trunk/or1ksim/cpu/or32/execute.c
593,7 → 593,7
fprintf (runtime.sim.fexe_log, "%.8lx ", i);
if (index >= 0) {
extern char *disassembled;
disassemble_insn (iqueue[0].insn);
disassemble_index (iqueue[0].insn, iqueue[0].insn_index);
fprintf (runtime.sim.fexe_log, "%s\n", disassembled);
} else
fprintf (runtime.sim.fexe_log, "<invalid>\n");
/trunk/or1ksim/cpu/or32/or32.c
369,6 → 369,9
return 0;
}
 
/* Simple cache for letter ranges */
static int range_cache[256] = {0};
 
/* Number of letters in the individual lettered operand. */
int
letter_range(char l)
376,6 → 379,9
CONST struct or32_opcode *pinsn;
char *enc;
int range = 0;
 
/* Is value cached? */
if (range = range_cache[(unsigned char)l]) return range;
for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
{
386,9 → 392,10
enc += 2;
else if (*enc == l)
range++;
return range;
return range_cache[(unsigned char)l] = range;
}
}
printf("\nABORT: letter_range(%c): Never used letter.\n", l);
exit(1);
}
768,19 → 775,19
while (!(*a & LEAF_FLAG))
{
unsigned int first = *a;
debug(9, "%i ", a - automata);
//debug(9, "%i ", a - automata);
a++;
i = (insn >> first) & *a;
a++;
if (!*(a + i))
{ /* Invalid instruction found? */
debug(9, "XXX\n", i);
//debug(9, "XXX\n", i);
return -1;
}
a = automata + *(a + i);
}
i = *a & ~LEAF_FLAG;
debug(9, "%i\n", i);
//debug(9, "%i\n", i);
/* Final check - do we have direct match?
(based on or32_opcodes this should be the only possibility,
but in case of invalid/missing instruction we must perform a check) */
797,7 → 804,7
sign bit position if sign extension is correct extension. Which extension
is proper is figured out from letter description. */
unsigned long
static unsigned long
extend_imm(unsigned long imm, char l)
{
unsigned long mask;
897,8 → 904,9
 
/* Print register. Used only by print_insn. */
 
static void
or32_print_register (param_ch, encoding, insn)
static char *
or32_print_register (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
905,13 → 913,16
{
int regnum = or32_extract(param_ch, encoding, insn);
sprintf (disassembled, "%sr%d", disassembled, regnum);
sprintf (dest, "r%d", regnum);
while (*dest) dest++;
return dest;
}
 
/* Print immediate. Used only by print_insn. */
 
static void
or32_print_immediate (param_ch, encoding, insn)
static char *
or32_print_immediate (dest, param_ch, encoding, insn)
char *dest;
char param_ch;
char *encoding;
unsigned long insn;
923,12 → 934,14
if (letter_signed(param_ch))
{
if (imm < 0)
sprintf (disassembled, "%s%d", disassembled, imm);
sprintf (dest, "%d", imm);
else
sprintf (disassembled, "%s0x%x", disassembled, imm);
sprintf (dest, "0x%x", imm);
}
else
sprintf (disassembled, "%s%#x", disassembled, imm);
sprintf (dest, "%#x", imm);
while (*dest) dest++;
return dest;
}
 
/* Disassemble one instruction from insn to disassemble.
939,30 → 952,46
unsigned long insn;
{
int index;
index = insn_decode (insn);
return disassemble_index (insn, insn_decode (insn));
}
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
 
int
disassemble_index (insn, index)
unsigned long insn;
int index;
{
char *dest = disassembled;
if (index >= 0)
{
struct or32_opcode const *opcode = &or32_opcodes[index];
char *s;
 
sprintf(disassembled, "%s ", opcode->name);
strcpy (dest, opcode->name);
while (*dest) dest++;
*dest++ = ' ';
*dest = 0;
for (s = opcode->args; *s != '\0'; ++s)
{
switch (*s)
{
case '\0':
return 4;
return insn_len (insn);
case 'r':
or32_print_register(*++s, opcode->encoding, insn);
dest = or32_print_register(dest, *++s, opcode->encoding, insn);
break;
default:
if (strchr (opcode->encoding, *s))
or32_print_immediate (*s, opcode->encoding, insn);
else
sprintf(disassembled, "%s%c", disassembled, *s);
dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
else {
*dest++ = *s;
*dest = 0;
}
}
}
}
969,8 → 998,8
else
{
/* This used to be %8x for binutils. */
sprintf(disassembled, "%s.word 0x%08x", disassembled, insn);
sprintf(dest, ".word 0x%08x", insn);
while (*dest) dest++;
}
return insn_len (insn);
}
 
/trunk/or1ksim/cpu/common/parse.c
147,12 → 147,14
}
 
#if IMM_STATS
int bcnt[33] = {0};
int bcnt[33][3] = {0};
int bsum[3] = {0};
unsigned long movhi = 0;
 
int bits (unsigned long val) {
int i = 1;
if (!val) return 0;
while (val != 0 && val != 0xffffffff) {i++;val >>= 1;}
while (val != 0 && (signed long)val != -1) {i++; val = (signed long)val >> 1;}
return i;
}
 
161,10 → 163,10
struct insn_op_struct *opd = op_start[insn_index];
unsigned long data = 0;
int dis = 0;
char *name;
const char *name;
if (!insn || insn_index < 0) return;
name = insn_name (insn_index);
if (strcmp (name, "l.movhi") == 0 || strcmp (name, "l.nop") == 0 || strcmp (name, "l.sys") == 0) return;
if (strcmp (name, "l.nop") == 0 || strcmp (name, "l.sys") == 0) return;
 
while (1)
{
193,8 → 195,21
{
if (!(opd->type & OPTYPE_REG) || dis) {
if (!dis) data = tmp;
//printf ("%08x %s\n", data, name);
bcnt[bits(data)]++;
if (strcmp (name, "l.movhi") == 0) {
movhi = data << 16;
} else {
data |= movhi;
//printf ("%08x %s\n", data, name);
if (!(or32_opcodes[insn_index].flags & OR32_IF_DELAY)) {
bcnt[bits(data)][0]++; bsum[0]++;
} else {
if (strcmp (name, "l.bf") == 0 || strcmp (name, "l.bnf") == 0) {
bcnt[bits(data)][1]++; bsum[1]++;
} else {
bcnt[bits(data)][2]++; bsum[2]++;
}
}
}
}
data = 0;
dis = 0;
488,9 → 503,11
 
#if IMM_STATS
{
int i = 0;
for (i = 0; i < 33; i++) printf ("%i:%i\t", i, bcnt[i]);
printf ("\n");
int i = 0, a = 0, b = 0, c = 0;
printf ("index:arith/branch/jump\n");
for (i = 0; i < 33; i++) printf ("%2i:\t%3.0f%% / %3.0f%%/ %3.0f%%\t%5i / %5i / %5i\n", i, 100.* (a += bcnt[i][0])/bsum[0],
100.* (b += bcnt[i][1])/bsum[1], 100.* (c += bcnt[i][2])/bsum[2], bcnt[i][0], bcnt[i][1], bcnt[i][2]);
printf ("\nsum %i %i %i\n", bsum[0], bsum[1], bsum[2]);
}
#endif
 
/trunk/or1ksim/cpu/or1k/except.c
59,7 → 59,7
pending.saved = pc - 4;
else
pending.saved = pc;
if (config.sim.verbose) printf("Exception 0x%x (%s) at 0x%x, EA: 0x%x, pc: 0x%x, pcnext: 0x%x\n",
if (config.sim.verbose) printf("Exception 0x%x (%s) at 0x%x, EA: 0x%x, ppc: 0x%x, npc: 0x%x\n",
except, EXCEPT_NAME(except), iqueue[0].insn_addr, ea, pc, pcnext);
}
}
/trunk/or1ksim/cpu/or1k/opcode/or32.h
189,5 → 189,9
Return the size of the instruction. */
int disassemble_insn (unsigned long insn);
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
int disassemble_index (unsigned long insn, int index);
 
#endif
 
/trunk/gdb-5.0/include/opcode/or32.h
189,5 → 189,9
Return the size of the instruction. */
int disassemble_insn (unsigned long insn);
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
int disassemble_index (unsigned long insn, int index);
 
#endif
 
/trunk/gdb-5.0/opcodes/or32.h
189,5 → 189,9
Return the size of the instruction. */
int disassemble_insn (unsigned long insn);
 
/* Disassemble one instruction from insn index.
Return the size of the instruction. */
int disassemble_index (unsigned long insn, int index);
 
#endif
 

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