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URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

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    from Rev 727 to Rev 728
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  •

Rev 727 → Rev 728

/trunk/or1ksim/cpu/common/Makefile.in
105,7 → 105,7
host_os = @host_os@
 
noinst_LIBRARIES = libcommon.a
libcommon_a_SOURCES = abstract.c parse.c stats.c trace.c labels.c
libcommon_a_SOURCES = abstract.c parse.c stats.c trace.c labels.c sched.c
mkinstalldirs = $(SHELL) $(top_srcdir)/mkinstalldirs
CONFIG_HEADER = ../../config.h
CONFIG_CLEAN_FILES =
117,7 → 117,8
LDFLAGS = @LDFLAGS@
LIBS = @LIBS@
libcommon_a_LIBADD =
libcommon_a_OBJECTS = abstract.o parse.o stats.o trace.o labels.o
libcommon_a_OBJECTS = abstract.o parse.o stats.o trace.o labels.o \
sched.o
COMPILE = $(CC) $(DEFS) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
CCLD = $(CC)
LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@
128,8 → 129,8
 
TAR = gtar
GZIP_ENV = --best
DEP_FILES = .deps/abstract.P .deps/labels.P .deps/parse.P .deps/stats.P \
.deps/trace.P
DEP_FILES = .deps/abstract.P .deps/labels.P .deps/parse.P .deps/sched.P \
.deps/stats.P .deps/trace.P
SOURCES = $(libcommon_a_SOURCES)
OBJECTS = $(libcommon_a_OBJECTS)
 
/trunk/or1ksim/cpu/common/Makefile.am
19,4 → 19,4
#
 
noinst_LIBRARIES = libcommon.a
libcommon_a_SOURCES = abstract.c parse.c stats.c trace.c labels.c
libcommon_a_SOURCES = abstract.c parse.c stats.c trace.c labels.c sched.c
/trunk/or1ksim/cpu/or1k/sprs.c
28,7 → 28,6
#include "sim-config.h"
 
extern int cont_run; /* defined in toplevel.c */
extern int tt_stopped; /* defined in tick.c */
extern int flag;
 
sprword sprs[MAX_SPRS];
40,37 → 39,21
inline void
mtspr(const int regno, const sprword value)
{
int ofs = regno % MAX_SPRS_PER_GRP;
extern unsigned long pc_phy;
extern unsigned long reg[32];
regno %= MAX_SPRS;
sprs[regno] = value;
/* MM: Register hooks. */
switch (regno) {
case 0xFFFD:
fo = fopen ("audiosim.pcm", "wb+");
if (!fo) printf("Cannot open audiosim.pcm\n");
printf("Audio opened.\n");
return;
case 0xFFFE:
if (!fo) printf("audiosim.pcm not opened\n");
fputc (value & 0xFF, fo);
if ((audio_cnt % 1024) == 0)
printf("%i\n", audio_cnt);
audio_cnt++;
return;
case 0xFFFF:
fclose(fo);
printf("Audio closed.\n");
cont_run = 0;
return;
case SPR_TTCR:
tt_stopped = 0;
spr_write_ttcr (value);
break;
case SPR_TTMR:
spr_write_ttmr (value);
break;
case SPR_SR:
if(value & SPR_SR_F)
flag = 1;
else
flag = 0;
/* Set internal flag also */
if(value & SPR_SR_F) flag = 1;
else flag = 0;
break;
case SPR_NPC:
{
94,49 → 77,33
pcnext = value + 4;
}
break;
case 0xFFFD:
fo = fopen ("audiosim.pcm", "wb+");
if (!fo) printf("Cannot open audiosim.pcm\n");
printf("Audio opened.\n");
break;
case 0xFFFE:
if (!fo) printf("audiosim.pcm not opened\n");
fputc (value & 0xFF, fo);
if ((audio_cnt % 1024) == 0)
printf("%i\n", audio_cnt);
audio_cnt++;
break;
case 0xFFFF:
fclose(fo);
printf("Audio closed.\n");
cont_run = 0;
break;
default:
/* Links to GPRS */
if(regno >= 0x0400 && regno < 0x0420)
if(regno >= 0x0400 && regno < 0x0420) {
extern unsigned long reg[32];
reg[regno - 0x0400] = value;
}
break;
}
if (regno < MAX_SPRS)
sprs[regno] = value;
else if (config.sim.verbose)
printf("WARNING: write out of SPR range %08X\n", regno);
}
 
#if 0
/* Get a specific SPR. */
inline sprword
mfspr_(const int regno)
{
extern unsigned long reg[32];
extern unsigned long pc;
extern unsigned long pcprev;
switch (regno) {
case SPR_SR:
/* Exceptions are always enabled */
return sprs[regno] | SPR_SR_EXR;
case SPR_NPC:
return pc;
case SPR_PPC:
return pcprev;
default:
/* Links to GPRS */
if(regno >= 0x0400 && regno < 0x0420)
return reg[regno - 0x0400];
else if (regno < MAX_SPRS)
return sprs[regno];
}
if (config.sim.verbose)
printf ("WARNING: read out of SPR range %08X\n", regno);
return 0;
}
#endif
 
/* Show status of important SPRs. */
void sprs_status()
{
/trunk/or1ksim/cpu/or1k/sprs.h
24,17 → 24,8
/* Prototypes */
inline void mtspr(const int regno, const sprword value);
static inline sprword mfspr_(const int regno);
#ifdef DEBUGMOD_OFF
extern sprword sprs[MAX_SPRS];
extern int cont_run; /* defined in toplevel.c */
#define mfspr(regno)\
((regno == SPR_SR && temp_disable_except > 0)?(sprs[regno] & ~SPR_SR_EXR)\
:((regno < MAX_SPRS)?(sprs[regno])\
:((printf("\nABORT: read out of SPR range %08X\n", regno),\
cont_run = 0))))
#else /* DEBUGMOD_OFF */
#define mfspr(regno) mfspr_(regno)
#endif /* DEBUGMOD_OFF */
 
static inline void setsprbit(const int regno, const int bitnum, const unsigned long bitvalue);
static inline int getsprbit(const int regno, const int bitnum);
41,6 → 32,7
void sprs_status();
 
#include "sim-config.h"
#include "tick.h"
 
/* Ugly, but fast */
/* Get a specific SPR. */
57,6 → 49,8
return pc;
case SPR_PPC:
return pcprev;
case SPR_TTCR:
return spr_read_ttcr();
default:
/* Links to GPRS */
if(regno >= 0x0400 && regno < 0x0420)
87,8 → 81,6
/* printf("oldvalue %x setsprbits(%x, %x, %x) shifted %x", regvalue, regno, mask, value, shifted); */
mtspr(regno, (regvalue & ~mask) | shifted);
return;
}
 
/* Get specific SPR bit(s) identified by mask. */
/trunk/or1ksim/tick/tick.h
17,7 → 17,14
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* Prototypes */
/* Reset the tick counter */
void tick_reset();
 
/* Drives clock to tick counter */
inline void tick_clock();
 
/* Starts the tick timer. This function is called by a write to ttcr spr register */
void spr_write_ttcr (unsigned long value);
void spr_write_ttmr (unsigned long value);
 
unsigned long spr_read_ttcr ();
/trunk/or1ksim/tick/tick.c
27,71 → 27,88
 
#include "except.h"
#include "tick.h"
#include "../cpu/or1k/spr_defs.h"
#include "spr_defs.h"
#include "pic.h"
#include "sprs.h"
#include "sim-config.h"
#include "sched.h"
 
/* For mode 10 only: timer stops until we write into TTCR. */
int tt_stopped = 0;
/* When did the timer start to count */
int cycles_start = 0;
 
/* TT Count Register */
unsigned long ttcr;
 
/* TT Mode Register */
unsigned long ttmr;
 
extern int cycles;
 
/* Reset. It initializes TTCR register. */
void tick_reset()
{
if (config.tick.enabled) {
if (config.sim.verbose)
printf("Resetting Tick Timer.\n");
mtspr(SPR_TTCR, 0);
mtspr(SPR_TTMR, 0);
tt_stopped = 0;
} else
tt_stopped = 1;
if (config.sim.verbose)
printf("Resetting Tick Timer.\n");
mtspr(SPR_TTCR, 0);
mtspr(SPR_TTMR, 0);
}
 
/* Simulation hook. Must be called every clock cycle to simulate tick
timer. It does internal functional tick timer simulation. */
inline void tick_clock()
/* Job handler for tick timer */
void tick_job (int param)
{
unsigned long ttcr;
unsigned long ttmr;
 
if (tt_stopped)
return;
ttcr = mfspr(SPR_TTCR);
ttmr = mfspr(SPR_TTMR);
if (!(ttmr & SPR_TTMR_M))
return;
if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
int mode = (ttmr & SPR_TTMR_M) >> 30; /* CZ 04/09/01 */
 
if (ttmr & SPR_TTMR_IE)
int mode = (ttmr & SPR_TTMR_M) >> 30;
/*debug (7, "tick_job%i, param %i\n", param, mode);*/
switch (mode) {
case 1:
sprs[SPR_TTCR] = ttcr = 0;
case 2:
if (ttmr & SPR_TTMR_IE) {
setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
if ((mfspr(SPR_SR) & SPR_SR_TEE) == SPR_SR_TEE)
except_handle(EXCEPT_TICK, mfspr(SPR_EEAR_BASE));
}
break;
}
}
 
/* Handle the modes properly.. CZ 04/09/01 */
switch(mode)
{
case 0: /* Timer is disabled */
tt_stopped = 1;
break;
case 1: /* Timer should auto restart */
ttcr = 0;
mtspr(SPR_TTCR,ttcr);
break;
case 2: /* Pause the timer */
tt_stopped = 1;
break;
case 3: /* Timer keeps running */
break;
}
/* Starts the tick timer. This function is called by a write to ttcr spr register */
void spr_write_ttcr (unsigned long value)
{
unsigned mode = (ttmr & SPR_TTMR_M) >> 30;
/*debug (7, "ttcr = %08x\n", value);*/
ttcr = value;
/* Remove previous if it exists */
SCHED_FIND_REMOVE(tick_job, 0);
if (mode == 1 || mode == 2) {
SCHED_ADD(tick_job, 0, cycles + (ttmr & SPR_TTMR_PERIOD) - ttcr);
cycles_start = cycles - ttcr;
}
}
 
if ((ttmr & SPR_TTMR_IP) && ((mfspr(SPR_SR) & SPR_SR_TEE) == SPR_SR_TEE))
except_handle(EXCEPT_TICK, mfspr(SPR_EEAR_BASE));
void spr_write_ttmr (unsigned long value)
{
/*debug (7, "ttmr = %08x\n", value);*/
ttmr = value;
/* Handle the modes properly. */
switch((ttmr & SPR_TTMR_M) >> 30) {
case 0: /* Timer is disabled */
break;
case 1: /* Timer should auto restart */
sprs[SPR_TTCR] = ttcr = 0;
cycles_start = cycles;
SCHED_FIND_REMOVE(tick_job, 0);
SCHED_ADD(tick_job, 0, cycles + (ttmr & SPR_TTMR_PERIOD) - ttcr);
break;
case 2: /* Stop the timer when match */
SCHED_FIND_REMOVE(tick_job, 0);
break;
case 3: /* Timer keeps running -- do nothing*/
break;
}
}
 
if (!tt_stopped)
ttcr++;
mtspr(SPR_TTCR, ttcr);
unsigned long spr_read_ttcr ()
{
/*debug (7, "ttcr ---- %08x\n", cycles - cycles_start);*/
return cycles - cycles_start;
}
/trunk/or1ksim/toplevel.c
30,6 → 30,7
#include <signal.h>
#include <stdarg.h>
#include <fcntl.h>
#include <limits.h>
 
#ifdef HAVE_LIBREADLINE
#include <readline/readline.h>
52,12 → 53,12
#include "gdbcomm.h"
#include "debug_unit.h"
#include "coff.h"
 
#include "sched.h"
#include "profiler.h"
#include "mprofiler.h"
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.78 $";
const char rcsrev[] = "$Revision: 1.79 $";
 
/* Continuos run versus single step tracing switch. */
int cont_run;
164,6 → 165,7
/* Resets all subunits */
void sim_reset ()
{
SCHED_INIT();
uart_reset();
dma_reset();
eth_reset();
368,11 → 370,22
exit(0);
}
 
/* Executes jobs in time queue */
static inline void do_scheduler ()
{
void (*func)(int);
int param;
 
/* Execute all jobs till now */
do {
func = SCHED_PEEK().func;
param = SCHED_PEEK().param;
SCHED_REMOVE();
func (param);
} while (cycles >= SCHED_PEEK().time);
}
 
/*###############################################
| MAIN
###############################################*/
/* Main function */
int main(argc, argv)
int argc;
char *argv[];
701,11 → 714,6
mem_cycles = 0;
if (!config.pm.enabled || !testsprbits(SPR_PMR, SPR_PMR_DME | SPR_PMR_SME)) {
if (cont_run > 0) cont_run--;
if (config.pm.enabled) {
if (!testsprbits(SPR_PMR, SPR_PMR_SME))
IFF (config.tick.enabled) tick_clock();
} else
IFF (config.tick.enabled) tick_clock();
pic_clock ();
if (cpu_clock ()) break;
if (config.dc.enabled) dc_clock();
726,6 → 734,7
if (testsprbits(SPR_DMR1, SPR_DMR1_ST)) set_stall_state (1);
 
cycles += mem_cycles;
if (cycles >= SCHED_PEEK().time) do_scheduler ();
if (!hush) dumpreg();
}
hush = 0;

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