URL
https://opencores.org/ocsvn/cfft/cfft/trunk
Subversion Repositories cfft
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 8 to Rev 9
- ↔ Reverse comparison
Rev 8 → Rev 9
/trunk/imp/cfft1024X12.vhd
48,6 → 48,16
-- Desccription : initial release |
-- |
--------------------------------------------------------------------------------------------------- |
-- |
-- Revisions : 0 |
-- Revision Number : 2 |
-- Version : 1.2.0 |
-- Date : Nov 19 2002 |
-- Modifier : ZHAO Ming |
-- Desccription : add output data position indication |
-- |
-- |
--------------------------------------------------------------------------------------------------- |
|
|
library IEEE; |
64,7 → 74,8
inputbusy : out STD_LOGIC; |
outdataen : out STD_LOGIC; |
Iout : out STD_LOGIC_VECTOR(13 downto 0); |
Qout : out STD_LOGIC_VECTOR(13 downto 0) |
Qout : out STD_LOGIC_VECTOR(13 downto 0); |
OutPosition : out STD_LOGIC_VECTOR( 9 downto 0 ) |
); |
end cfft1024X12; |
|
87,7 → 98,8
inputbusy : out STD_LOGIC; |
outdataen : out STD_LOGIC; |
Iout : out STD_LOGIC_VECTOR(WIDTH+1 downto 0); |
Qout : out STD_LOGIC_VECTOR(WIDTH+1 downto 0) |
Qout : out STD_LOGIC_VECTOR(WIDTH+1 downto 0); |
OutPosition : out STD_LOGIC_VECTOR( 2*STAGE-1 downto 0 ) |
); |
end component; |
|
109,7 → 121,9
inputbusy=>inputbusy, |
outdataen=>outdataen, |
Iout=>Iout, |
Qout=>Qout |
Qout=>Qout, |
OutPosition=>OutPosition |
|
); |
|
|
/trunk/src/cfft.vhd
61,6 → 61,16
-- |
-- |
--------------------------------------------------------------------------------------------------- |
-- |
-- Revisions : 0 |
-- Revision Number : 3 |
-- Version : 1.3.0 |
-- Date : Nov 19 2002 |
-- Modifier : ZHAO Ming |
-- Desccription : add output data position indication |
-- |
-- |
--------------------------------------------------------------------------------------------------- |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
82,7 → 92,8
inputbusy : out STD_LOGIC; |
outdataen : out STD_LOGIC; |
Iout : out STD_LOGIC_VECTOR(WIDTH+1 downto 0); |
Qout : out STD_LOGIC_VECTOR(WIDTH+1 downto 0) |
Qout : out STD_LOGIC_VECTOR(WIDTH+1 downto 0); |
OutPosition : out STD_LOGIC_VECTOR( 2*STAGE-1 downto 0 ) |
); |
end cfft; |
|
111,8 → 122,9
factorstart : out STD_LOGIC; |
cfft4start : out STD_LOGIC; |
outdataen : out std_logic; |
inputbusy : out std_logic |
); |
inputbusy : out std_logic; |
OutPosition : out STD_LOGIC_VECTOR( 2*STAGE-1 downto 0 ) |
); |
end component; |
|
component blockdram |
219,7 → 231,8
factorstart=>factorstart, |
cfft4start=>cfft4start, |
outdataen=>outdataen, |
inputbusy=>inputbusy |
inputbusy=>inputbusy, |
OutPosition=>OutPosition |
); |
|
Iram:blockdram |
/trunk/src/address.vhd
43,6 → 43,16
-- add rmask1,rmask2,wmask1,wmask2 signal |
-- |
--------------------------------------------------------------------------------------------------- |
-- |
-- Revisions : 0 |
-- Revision Number : 3 |
-- Version : 1.3.0 |
-- Date : Nov 19 2002 |
-- Modifier : ZHAO Ming |
-- Desccription : add output data position indication |
-- |
-- |
--------------------------------------------------------------------------------------------------- |
|
|
library IEEE; |
73,7 → 83,8
factorstart : out STD_LOGIC; |
cfft4start : out STD_LOGIC; |
outdataen : out std_logic; |
inputbusy : out std_logic |
inputbusy : out std_logic; |
OutPosition : out STD_LOGIC_VECTOR( 2*STAGE-1 downto 0 ) |
); |
end address; |
|
117,6 → 128,16
return result; |
end counter2addr; |
|
function outcounter2addr( |
counter : std_logic_vector |
) return std_logic_vector is |
variable result :std_logic_vector(counter'range); |
begin |
for n in 0 to STAGE-1 loop |
result( 2*n+1 downto 2*n ):=counter( counter'high-2*n downto counter'high-2*n-1 ); |
end loop; |
return result; |
end outcounter2addr; |
|
signal rstate,wstate,state:std_logic_vector( 3 downto 0 ); |
signal rmask1,rmask2,wmask1,wmask2:std_logic_vector( STAGE-1 downto 0 ); |
131,7 → 152,7
|
begin |
outdataen<=outcounter(STAGE*2); |
|
OutPosition<=outcounter2addr( outcounter( STAGE*2-1 downto 0 )); |
count:process( clk, rst ) |
begin |
if rst='1' then |