URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 81 to Rev 82
- ↔ Reverse comparison
Rev 81 → Rev 82
/trunk/or1ksim/cpu/or1k/except.c
28,9 → 28,11
extern int cont_run; |
extern struct iqueue_entry iqueue[20]; |
extern unsigned long pc; |
extern unsigned long pctemp; |
extern unsigned long pcnext; |
extern struct iqueue_entry iqueue[]; |
|
extern int delay_insn; |
|
/* Handle OR1K exceptions. */ |
void except_handle(int except, unsigned long ea) |
{ |
38,7 → 40,7
|
printf("Exception 0x%x (%s): ", except, EXCEPT_NAME(except)); |
printf("Iqueue[0].insn_addr: 0x%x Eff ADDR: 0x%x\n", iqueue[0].insn_addr, ea); |
printf(" pctemp: 0x%x pc: 0x%x\n", pctemp, pc); |
printf(" pc: 0x%x pcnext: 0x%x\n", pc, pcnext); |
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#if ONLY_VIRTUAL_MACHINE |
printf("WARNING: No exception processing while ONLY_VIRTUAL_MACHINE is defined.\n"); |
45,11 → 47,18
cont_run = 0; |
#else |
|
if ((pctemp != (pc + 4)) && (except != EXCEPT_ITLBMISS)) { /* Always execute delay slot insn */ |
if (delay_insn) { |
printf(" INFO: Exception during execution of delay slot insn.\n"); |
pc -= 4; |
} |
#if 0 |
if ((pcnext != (pc + 4)) && (except != EXCEPT_ITLBMISS)) { /* Always execute delay slot insn */ |
printf("XXXXXXXXXXXXXX\n"); |
fetch(); /* before starting with exception */ |
decode(&iqueue[0]); /* (itlbmiss is special case) */ |
execute(); |
} |
#endif |
|
if (!(mfspr(SPR_SR) & SPR_SR_EXR)) { |
printf("ABORT: Exception occured while exception detection was disabled.\n"); |
69,6 → 78,6
mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_SUPV); /* SUPV mode */ |
mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_EXR); /* Disable except. */ |
pc = (unsigned long)except; |
pctemp = (unsigned long)except; |
pcnext = (unsigned long)except; |
#endif |
} |