URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 816 to Rev 817
- ↔ Reverse comparison
Rev 816 → Rev 817
/trunk/orpmon/include/screen.h
12,10 → 12,10
#define CHARSX (RESX/CHAR_WIDTH) |
#define CHARSY (RESY/CHAR_HEIGHT) |
|
#define CRT_REG (CRT_BASE_ADD + 0) |
#define CRT_PALLETE (CRT_BASE_ADD + 0x400) |
#define CRT_BUFFER_REG (CRT_BASE_ADD + 4) |
#define PUT_PIXEL(x, y, color) (*(((unsigned char *)FB_BASE_ADD) + (y) * RESY + (x)) = (color)) |
#define CRT_REG (CRT_BASE_ADDR + 0) |
#define CRT_PALLETE (CRT_BASE_ADDR + 0x400) |
#define CRT_BUFFER_REG (CRT_BASE_ADDR + 4) |
#define PUT_PIXEL(x, y, color) (*(((unsigned char *)FB_BASE_ADDR) + (y) * RESY + (x)) = (color)) |
#define SET_PALLETE(i, r, g, b) (*(((unsigned long *)CRT_PALLETE) + (i) * 4) = ((r) << 4) | ((g) << 8) | ((b) << 12)) |
|
void put_char_xy (int x, int y, char c); |
/trunk/orpmon/include/eth.h
1,5 → 1,5
#define ETH_REG_BASE ETH_BASE |
#define ETH_BD_BASE ETH_BASE + 0x400 |
#define ETH_BD_BASE (ETH_BASE + 0x400) |
#define ETH_TOTAL_BD 128 |
#define ETH_MAXBUF_LEN 0x600 |
|
/trunk/orpmon/include/net.h
238,7 → 238,7
extern unsigned char NetServerEther[6]; /* Boot server enet address */ |
extern IPaddr_t NetOurIP; /* Our IP addr (0 = unknown) */ |
extern IPaddr_t NetServerIP; /* Server IP addr (0 = unknown) */ |
extern volatile unsigned char * NetTxPacket; /* THE transmit packet */ |
volatile unsigned char * NetTxPacket; /* THE transmit packet */ |
extern volatile unsigned char * NetRxPackets[PKTBUFSRX];/* Receive packets */ |
extern volatile unsigned char * NetRxPkt; /* Current receive packet */ |
extern int NetRxPktLen; /* Current rx packet length */ |
/trunk/orpmon/include/board.h
43,7 → 43,7
#else |
#define ETH_BASE 0xD0000000 |
#endif |
#define MC_BASE_ADD 0x60000000 |
#define MC_BASE_ADDR 0x60000000 |
|
#define ETH0_INT _int_main /* was: 0x00080000 */ /* Not correct */ |
|
54,6 → 54,8
#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */ |
#endif |
|
#define BOARD_DEF_IP 0x0a010185 |
|
#define ETH_MACADDR0 0x00 |
#define ETH_MACADDR1 0x09 |
#define ETH_MACADDR2 0x12 |
62,8 → 64,8
#define ETH_MACADDR5 0x00 |
|
#define CRT_ENABLED 1 |
#define CRT_BASE_ADD 0xc0000000 |
#define FB_BASE_ADD 0xa8000000 |
#define CRT_BASE_ADDR 0xc0000000 |
#define FB_BASE_ADDR 0xa8000000 |
|
/* Whether online help is available -- saves space */ |
#define HELP_ENABLED 1 |
/trunk/orpmon/reset.S
17,26 → 17,27
|
.global _lolev_ie |
.global _lolev_idis |
.global _align |
|
.section .stack, "aw", @nobits |
.space STACK_SIZE |
.section .stack, "aw", @nobits |
.space STACK_SIZE |
_stack: |
|
.if IN_FLASH |
.section .reset, "ax" |
.else |
.section .vectors, "ax" |
.section .vectors, "ax" |
.endif |
|
.org 0x100 |
_reset: |
.if IN_FLASH |
l.movhi r3,hi(MC_BASE_ADD) |
l.movhi r3,hi(MC_BASE_ADDR) |
l.ori r3,r3,MC_BA_MASK |
l.addi r5,r0,0x00 |
l.sw 0(r3),r5 |
.endif |
l.movhi r3,hi(_start) |
l.movhi r3,hi(_start) |
l.ori r3,r3,lo(_start) |
l.jr r3 |
l.nop |
44,8 → 45,13
.if IN_FLASH |
.section .vectors, "ax" |
.endif |
.org 0x800 |
.org 0x600 |
|
l.j _align |
l.nop |
|
.org 0x800 |
|
l.j _int_wrapper |
l.nop |
|
62,7 → 68,7
l.bnf 1b |
l.addi r3,r3,-1 |
.endif |
/* Copy form flash to sram */ |
/* Copy form flash to sram */ |
.if IN_FLASH |
l.movhi r3,hi(_src_beg) |
l.ori r3,r3,lo(_src_beg) |
80,7 → 86,7
l.addi r4,r4,4 |
l.addi r5,r5,-4 |
l.sfgtsi r5,0 |
l.bf 1b |
l.bf 1b |
l.nop |
2: |
l.movhi r4,hi(_dst_beg) |
102,19 → 108,19
.endif |
|
.if IC_ENABLE |
l.jal _ic_enable |
l.nop |
l.jal _ic_enable |
l.nop |
.endif |
|
.if DC_ENABLE |
l.jal _dc_enable |
l.nop |
l.jal _dc_enable |
l.nop |
.endif |
|
l.movhi r1,hi(_stack-4) |
l.addi r1,r1,lo(_stack-4) |
l.addi r2,r0,-3 |
l.and r1,r1,r2 |
l.addi r2,r0,-3 |
l.and r1,r1,r2 |
|
l.movhi r2,hi(_main) |
l.ori r2,r2,lo(_main) |
141,8 → 147,8
l.nop |
l.nop |
|
l.jr r9 |
l.nop |
l.jr r9 |
l.nop |
|
_dc_enable: |
|
159,17 → 165,17
l.addi r10,r0,(SPR_SR_DCE|SPR_SR_SM) |
l.mtspr r0,r10,SPR_SR |
|
l.jr r9 |
l.nop |
l.jr r9 |
l.nop |
|
.if IN_FLASH |
_init_mc: |
|
l.movhi r3,hi(MC_BASE_ADD) |
l.ori r3,r3,lo(MC_BASE_ADD) |
l.movhi r3,hi(MC_BASE_ADDR) |
l.ori r3,r3,lo(MC_BASE_ADDR) |
|
l.addi r4,r3,MC_CSC(0) |
l.movhi r5,hi(FLASH_BASE_ADD) |
l.movhi r5,hi(FLASH_BASE_ADDR) |
l.srai r5,r5,5 |
l.ori r5,r5,0x0025 |
l.sw 0(r4),r5 |
194,7 → 200,7
l.sw 0(r4),r5 |
|
l.addi r4,r3,MC_CSC(1) |
l.movhi r5,hi(SDRAM_BASE_ADD) |
l.movhi r5,hi(SDRAM_BASE_ADDR) |
l.srai r5,r5,5 |
l.ori r5,r5,0x0411 |
l.sw 0(r4),r5 |
285,13 → 291,220
l.rfe |
l.nop |
|
_align: |
l.addi r1,r1,-128 |
l.sw 0x08(r1),r2 |
l.sw 0x0c(r1),r3 |
l.sw 0x10(r1),r4 |
l.sw 0x14(r1),r5 |
l.sw 0x18(r1),r6 |
l.sw 0x1c(r1),r7 |
l.sw 0x20(r1),r8 |
l.sw 0x24(r1),r9 |
l.sw 0x28(r1),r10 |
l.sw 0x2c(r1),r11 |
l.sw 0x30(r1),r12 |
l.sw 0x34(r1),r13 |
l.sw 0x38(r1),r14 |
l.sw 0x3c(r1),r15 |
l.sw 0x40(r1),r16 |
l.sw 0x44(r1),r17 |
l.sw 0x48(r1),r18 |
l.sw 0x4c(r1),r19 |
l.sw 0x50(r1),r20 |
l.sw 0x54(r1),r21 |
l.sw 0x58(r1),r22 |
l.sw 0x5c(r1),r23 |
l.sw 0x60(r1),r24 |
l.sw 0x64(r1),r25 |
l.sw 0x68(r1),r26 |
l.sw 0x6c(r1),r27 |
l.sw 0x70(r1),r28 |
l.sw 0x74(r1),r29 |
l.sw 0x78(r1),r30 |
l.sw 0x7c(r1),r31 |
|
l.mfspr r2,r0,SPR_EEAR_BASE /* Load the efective addres */ |
l.mfspr r5,r0,SPR_EPCR_BASE /* Load the insn address */ |
|
l.lwz r3,0(r5) /* Load insn */ |
l.srli r4,r3,26 /* Shift left to get the insn opcode */ |
|
l.sfeqi r4,0x00 /* Check if the load/store insn is in delay slot */ |
l.bf jmp |
l.sfeqi r4,0x01 |
l.bf jmp |
l.sfeqi r4,0x03 |
l.bf jmp |
l.sfeqi r4,0x04 |
l.bf jmp |
l.sfeqi r4,0x11 |
l.bf jr |
l.sfeqi r4,0x12 |
l.bf jr |
l.nop |
l.j 1f |
l.addi r5,r5,4 /* Increment PC to get return insn address */ |
|
jmp: |
l.slli r4,r3,6 /* Get the signed extended jump length */ |
l.srai r4,r4,4 |
|
l.lwz r3,4(r5) /* Load the real load/store insn */ |
|
l.add r5,r5,r4 /* Calculate jump target address */ |
|
l.j 1f |
l.srli r4,r3,26 /* Shift left to get the insn opcode */ |
|
jr: |
l.slli r4,r3,9 /* Shift to get the reg nb */ |
l.andi r4,r4,0x7c |
|
l.lwz r3,4(r5) /* Load the real load/store insn */ |
|
l.add r4,r4,r1 /* Load the jump register value from the stack */ |
l.lwz r5,0(r4) |
|
l.srli r4,r3,26 /* Shift left to get the insn opcode */ |
|
|
1: l.mtspr r0,r5,SPR_EPCR_BASE |
|
l.sfeqi r4,0x26 |
l.bf lhs |
l.sfeqi r4,0x25 |
l.bf lhz |
l.sfeqi r4,0x22 |
l.bf lws |
l.sfeqi r4,0x21 |
l.bf lwz |
l.sfeqi r4,0x37 |
l.bf sh |
l.sfeqi r4,0x35 |
l.bf sw |
l.nop |
|
1: l.j 1b /* I don't know what to do */ |
l.nop |
|
lhs: l.lbs r5,0(r2) |
l.slli r5,r5,8 |
l.lbz r6,1(r2) |
l.or r5,r5,r6 |
l.srli r4,r3,19 |
l.andi r4,r4,0x7c |
l.add r4,r4,r1 |
l.j align_end |
l.sw 0(r4),r5 |
|
lhz: l.lbz r5,0(r2) |
l.slli r5,r5,8 |
l.lbz r6,1(r2) |
l.or r5,r5,r6 |
l.srli r4,r3,19 |
l.andi r4,r4,0x7c |
l.add r4,r4,r1 |
l.j align_end |
l.sw 0(r4),r5 |
|
lws: l.lbs r5,0(r2) |
l.slli r5,r5,24 |
l.lbz r6,1(r2) |
l.slli r6,r6,16 |
l.or r5,r5,r6 |
l.lbz r6,2(r2) |
l.slli r6,r6,8 |
l.or r5,r5,r6 |
l.lbz r6,3(r2) |
l.or r5,r5,r6 |
l.srli r4,r3,19 |
l.andi r4,r4,0x7c |
l.add r4,r4,r1 |
l.j align_end |
l.sw 0(r4),r5 |
|
lwz: l.lbz r5,0(r2) |
l.slli r5,r5,24 |
l.lbz r6,1(r2) |
l.slli r6,r6,16 |
l.or r5,r5,r6 |
l.lbz r6,2(r2) |
l.slli r6,r6,8 |
l.or r5,r5,r6 |
l.lbz r6,3(r2) |
l.or r5,r5,r6 |
l.srli r4,r3,19 |
l.andi r4,r4,0x7c |
l.add r4,r4,r1 |
l.j align_end |
l.sw 0(r4),r5 |
|
sh: |
l.srli r4,r3,9 |
l.andi r4,r4,0x7c |
l.add r4,r4,r1 |
l.lwz r5,0(r4) |
l.sb 1(r2),r5 |
l.slli r5,r5,8 |
l.j align_end |
l.sb 0(r2),r5 |
|
sw: |
l.srli r4,r3,9 |
l.andi r4,r4,0x7c |
l.add r4,r4,r1 |
l.lwz r5,0(r4) |
l.sb 3(r2),r5 |
l.slli r5,r5,8 |
l.sb 2(r2),r5 |
l.slli r5,r5,8 |
l.sb 1(r2),r5 |
l.slli r5,r5,8 |
l.j align_end |
l.sb 0(r2),r5 |
|
align_end: |
l.lwz r2,0x08(r1) |
l.lwz r3,0x0c(r1) |
l.lwz r4,0x10(r1) |
l.lwz r5,0x14(r1) |
l.lwz r6,0x18(r1) |
l.lwz r7,0x1c(r1) |
l.lwz r8,0x20(r1) |
l.lwz r9,0x24(r1) |
l.lwz r10,0x28(r1) |
l.lwz r11,0x2c(r1) |
l.lwz r12,0x30(r1) |
l.lwz r13,0x34(r1) |
l.lwz r14,0x38(r1) |
l.lwz r15,0x3c(r1) |
l.lwz r16,0x40(r1) |
l.lwz r17,0x44(r1) |
l.lwz r18,0x48(r1) |
l.lwz r19,0x4c(r1) |
l.lwz r20,0x50(r1) |
l.lwz r21,0x54(r1) |
l.lwz r22,0x58(r1) |
l.lwz r23,0x5c(r1) |
l.lwz r24,0x60(r1) |
l.lwz r25,0x64(r1) |
l.lwz r26,0x68(r1) |
l.lwz r27,0x6c(r1) |
l.lwz r28,0x70(r1) |
l.lwz r29,0x74(r1) |
l.lwz r30,0x78(r1) |
l.lwz r31,0x7c(r1) |
l.addi r1,r1,128 |
l.rfe |
|
.section .text |
_lolev_ie: |
l.mfspr r3,r0,SPR_SR |
l.ori r3,r3,SPR_SR_IEE |
l.mtspr r0,r3,SPR_SR |
l.movhi r3,hi(ETH0_INT) |
l.ori r3,r3,lo(ETH0_INT) |
l.movhi r3,hi(ETH0_INT) |
l.ori r3,r3,lo(ETH0_INT) |
l.mtspr r0,r3,SPR_PICMR |
|
l.jr r9 |
/trunk/orpmon/services/arp.c
77,6 → 77,8
ARP_t * arp; |
|
printf("ARP broadcast %d\n", ++ArpTry); |
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
printf(" NetTxPacket %.8lx\n", NetTxPacket); |
pkt = NetTxPacket; |
|
NetSetEther(pkt, NetBcastAddr, PROT_ARP); |
98,6 → 100,8
if((NetServerIP & NetOurSubnetMask) != (NetOurIP & NetOurSubnetMask)) { |
*(IPaddr_t *)(&arp->ar_data[16]) = NetOurGatewayIP; |
} else { |
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
printf(" &arp->ar_data[16] %.8lx NetServerIP %.8lx\n", &arp->ar_data[16], NetServerIP); |
*(IPaddr_t *)(&arp->ar_data[16]) = NetServerIP; |
} |
|
/trunk/orpmon/services/tftp.c
28,8 → 28,6
#define TFTP_ERROR 5 |
|
|
extern unsigned long load_addr; |
|
static int TftpServerPort; /* The UDP port at their end */ |
static int TftpOurPort; /* The UDP port at our end */ |
static int TftpTimeoutCount; |
43,7 → 41,7
|
#define DEFAULT_NAME_LEN (8 + 4 + 1) |
static char default_filename[DEFAULT_NAME_LEN] = "tftpboot.img"; |
static char *tftp_filename; |
char *tftp_filename; |
|
#ifdef CFG_DIRECT_FLASH_TFTP |
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; |
58,7 → 56,7
|
for (i=0; i<CFG_MAX_FLASH_BANKS; i++) { |
/* start address in flash? */ |
if (load_addr + offset >= flash_info[i].start[0]) { |
if (global.src_addr + offset >= flash_info[i].start[0]) { |
rc = 1; |
break; |
} |
65,7 → 63,7
} |
|
if (rc) { /* Flash is destination for this packet */ |
rc = flash_write ((unsigned char *)src, (unsigned long)(load_addr+offset), len); |
rc = flash_write ((unsigned char *)src, (unsigned long)(global.src_addr+offset), len); |
switch (rc) { |
case 0: /* OK */ |
break; |
90,7 → 88,7
} |
else |
#endif /* CFG_DIRECT_FLASH_TFTP */ |
(void)memcpy((void *)(load_addr + offset), src, len); |
(void)memcpy((void *)(global.src_addr + offset), src, len); |
|
if (NetBootFileXferSize < newsize) |
NetBootFileXferSize = newsize; |
274,15 → 272,6
); |
#endif /* DEBUG */ |
|
if (BootFile[0] == '\0') { |
tftp_filename = default_filename; |
|
printf ("*** Warning: no boot file name; using '%s'\n", |
tftp_filename); |
} else { |
tftp_filename = BootFile; |
} |
|
printf ("TFTP from server "); print_IPaddr (NetServerIP); |
printf ("; our IP address is "); print_IPaddr (NetOurIP); |
|
309,7 → 298,7
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putc ('\n'); |
|
printf ("Load address: 0x%lx\n", load_addr); |
printf ("Load address: 0x%lx\n", global.src_addr); |
|
printf ("Loading: *\b"); |
|
/trunk/orpmon/sim.cfg
642,16 → 642,17
section ethernet |
nethernets = 1 |
|
|
device 0 |
baseaddr = 0xD0000000 |
dma = 0 |
irq = 15 |
rtx_type = 1 |
tx_channel = 0 |
rx_channel = 1 |
rxfile = "/tmp/eth0.rx" |
txfile = "/tmp/eth0.tx" |
rxfile = "eth0.rx" |
txfile = "eth0.tx" |
sockif = "eth0" |
enddevice |
|
end |
|
/* GPIO SECTION |
/trunk/orpmon/common/screen.c
81,7 → 81,7
SET_PALLETE(COLOR_WHITE, 255, 255, 255); |
|
/* Set screen offset */ |
*((unsigned long *)CRT_BUFFER_REG) = FB_BASE_ADD; |
*((unsigned long *)CRT_BUFFER_REG) = FB_BASE_ADDR; |
|
/* Turn screen on */ |
*((unsigned long *)CRT_REG) = 0x00000001; |
/trunk/orpmon/common/common.c
5,6 → 5,8
|
#define MAX_COMMANDS 100 |
|
extern unsigned long src_addr; |
|
bd_t bd; |
|
int num_commands = 0; |
137,7 → 139,6
char *command_str; |
char *argv[20]; |
int argc = 0; |
int end = 0; |
|
/* Show prompt */ |
#ifdef XESS |
166,15 → 167,17
|
/* Get command from the string */ |
command_str = pstr; |
while (*pstr != '\0' && *pstr != ' ') pstr++; |
if (*pstr == '\0') end = 1; |
*pstr = '\0'; |
|
while (!end) { |
while (1) { |
/* Go to next argument */ |
while (*pstr == ' ' && *pstr != '\0') pstr++; |
if (*pstr) argv[argc++] = pstr; |
else end = 1; |
while (*pstr != ' ' && *pstr != '\0') pstr++; |
if (*pstr) { |
*pstr++ = '\0'; |
while (*pstr == ' ') pstr++; |
argv[argc++] = pstr; |
} |
else |
break; |
} |
|
{ |
217,8 → 220,9
{ |
/* Set defaults */ |
global.erase_method = 2; /* as needed */ |
global.src_addr = |
global.src_addr = src_addr; |
global.dst_addr = FLASH_BASE_ADDR; |
global.ip = BOARD_DEF_IP; |
|
/* Init modules */ |
module_cpu_init (); |
227,6 → 231,7
module_dhry_init (); |
module_camera_init (); |
module_load_init (); |
|
// tick_init(); |
} |
|
/trunk/orpmon/ram.ld
34,5 → 34,6
.stack : |
{ |
*(.stack) |
_src_addr = .; |
} > ram |
} |
/trunk/orpmon/drivers/eth.c
134,6 → 134,7
eth_bd *bd; |
unsigned long add; |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
if(tx_full) |
return (void *)0; |
|
157,6 → 158,7
{ |
eth_bd *bd; |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
bd = (eth_bd *)ETH_BD_BASE; |
|
bd[tx_last].addr = (unsigned long)buf; |
176,13 → 178,16
|
bd = (eth_bd *)ETH_BD_BASE + ETH_TXBD_NUM; |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
while(1) { |
|
int bad = 0; |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
if(bd[rx_next].status & ETH_RX_BD_EMPTY) |
return len; |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
if(bd[rx_next].status & ETH_RX_BD_OVERRUN) { |
printf("eth rx: ETH_RX_BD_OVERRUN\n"); |
bad = 1; |
212,11 → 217,14
bad = 1; |
} |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
if(!bad) { |
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
receive((void *)bd[rx_next].addr, bd[rx_next].len); |
len += bd[rx_next].len; |
} |
|
printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); |
bd[rx_next].status &= ~ETH_RX_BD_STATS; |
bd[rx_next].status |= ETH_RX_BD_EMPTY; |
|