URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 822 to Rev 823
- ↔ Reverse comparison
Rev 822 → Rev 823
/trunk/or1ksim/sim-config.h
222,6 → 222,7
char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */ |
int spr_log; /* Print out SPR states */ |
char spr_log_fn[STR_SIZE]; /* SPR state log filename */ |
char fstdout[STR_SIZE]; /* stdout filename */ |
long clkcycle_ps; /* Clock duration in ps */ |
long system_kfreq; /* System frequency in kHz*/ |
} sim; |
/trunk/or1ksim/sim-config.c
72,6 → 72,7
config.sim.mprofile_group = 2; |
strcpy (config.sim.prof_fn, "sim.profile"); |
strcpy (config.sim.mprof_fn, "sim.mprofile"); |
strcpy (config.sim.fstdout, "stdout.txt"); |
strcpy (runtime.sim.script_fn, "(default)"); |
config.sim.clkcycle_ps = 4000; /* 4000 for 4ns (250MHz) */ |
if (config.sim.clkcycle_ps) config.sim.system_kfreq = (long)((1000000000.0 / (double)config.sim.clkcycle_ps)); |
545,6 → 546,7
{6, "spr_log", "=%i", NULL, (void *)(&config.sim.spr_log), 0}, |
{6, "spr_log_fn", "=\"%s\"", NULL, (void *)(&config.sim.spr_log_fn[0]), 0}, |
{6, "clkcycle", "=%s ", sim_clkcycle, (void *)(&tempS[0]), 0}, |
{6, "stdout", "=\"%s\"", NULL, (void *)(&config.sim.fstdout[0]), 0}, |
|
{7, "enabled", "=%i", NULL, (void *)(&config.debug.enabled), 0}, |
{7, "gdb_enabled", "=%i", NULL, (void *)(&config.debug.gdb_enabled), 0}, |
/trunk/or1ksim/support/simprintf.c
67,7 → 67,7
simgetstr(stackaddr, regparam); |
|
debug(6, "simprintf: stackaddr: 0x%.8lx\n", stackaddr); |
if ((f = fopen("stdout.txt", "a+"))) { |
if ((f = fopen(config.sim.fstdout, "a+"))) { |
unsigned long arg; |
unsigned long argaddr; |
unsigned char regstr[5]; |