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URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 87 to Rev 88
    Reverse comparison

Rev 87 → Rev 88

/funbase_ip_library/trunk/TUT/ip.hwp.interface/led_pkt_codec_mk2/1.0/vhd/led_pkt_codec_mk2.vhd
6,11 → 6,11
-- Author : Lasse Lehtonen
-- Company :
-- Created : 2011-11-09
-- Last update: 2011-11-21
-- Last update: 2011-12-02
-- Platform :
-- Standard : VHDL'87
-------------------------------------------------------------------------------
-- Description:
-- Description: Inverts led output for evey data word received.
-------------------------------------------------------------------------------
-- Copyright (c) 2011
-------------------------------------------------------------------------------
54,10 → 54,13
cmd_in : in std_logic_vector(1 downto 0);
data_in : in std_logic_vector(31 downto 0);
stall_out : out std_logic;
 
cmd_out : out std_logic_vector(1 downto 0);
data_out : out std_logic_vector(31 downto 0);
stall_in : in std_logic;
led_out : out std_logic);
led_out : out std_logic
);
 
end led_pkt_codec_mk2;
 
70,9 → 73,12
 
data_out <= (others => '0');
cmd_out <= (others => '0');
stall_out <= '0';
stall_out <= '0'; -- This accepts all incoming data
led_out <= led_r;
 
--
-- Read input
--
main_p : process (clk, rst_n)
begin -- process main_p
if rst_n = '0' then -- asynchronous reset (active low)
84,9 → 90,9
if cmd_in = "00" then
-- no data coming in
elsif cmd_in = "01" then
-- address coming in
-- address coming in, don't care what it is
elsif cmd_in = "10" then
-- data coming in
 
led_r <= not led_r;
else
-- not defined
/funbase_ip_library/trunk/TUT/ip.hwp.interface/led_pkt_codec_mk2/1.0/ip_xact/led_pkt_codec_mk2.1.0.xml
0,0 → 1,374
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 14:56:35 02.12.2011-->
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<spirit:vendor>TUT</spirit:vendor>
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<spirit:name>led_pkt_codec_mk2</spirit:name>
<spirit:version>1.0</spirit:version>
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<spirit:name>clk</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="gpio_1bit.absDef" spirit:version="1.0"/>
<spirit:master/>
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<spirit:portMap>
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<spirit:name>gpio_out</spirit:name>
<spirit:vector>
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</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>led_out</spirit:name>
<spirit:vector>
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</spirit:vector>
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</spirit:busInterface>
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<spirit:mirroredMaster/>
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<spirit:portMaps>
<spirit:portMap>
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<spirit:name>STALL_IN</spirit:name>
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</spirit:vector>
</spirit:logicalPort>
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<spirit:portMap>
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<spirit:portMap>
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<spirit:name>CMD_IN</spirit:name>
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