OpenCores
URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 92 to Rev 93
    ↔ Reverse comparison
  •

Rev 92 → Rev 93

/v586/trunk/rtl/v8042_stub.v
0,0 → 1,17
module v8042(
input rst_n,
input clk,
input [2:0] io_address,
input io_read,
input io_write,
input [7:0] io_writedata,
output [7:0] io_readdata,
 
input ps2data,
output ps2clk
);
 
assign ps2clk = 0;
assign io_readdata = 8'h42;
 
endmodule
/v586/trunk/rtl/periph.v
1,6 → 1,12
 
module AWDP_DEC_023767(O0, bit_bang);
// Generated by ac_shell v5.17-s013 on Wed May 25 07:30:00 CET 2016.
 
// Restrictions concerning the use of Ambit BuildGates are covered in the
// license agreement. Distribution to third party EDA vendors is
// strictly prohibited.
 
module AWDP_DEC_023891(O0, bit_bang);
 
output [8:0] O0;
input [8:0] bit_bang;
 
10,27 → 16,27
notech_ha2 i_9(.A(n_54), .B(n_70), .Z(O0[8]));
notech_inv i_1(.A(bit_bang[0]), .Z(O0[0]));
notech_inv i_0(.A(bit_bang[8]), .Z(n_54));
notech_xor2 i_8842(.A(bit_bang[7]), .B(n_68), .Z(n_5497));
notech_inv i_8843(.A(n_5497), .Z(O0[7]));
notech_or2 i_8841(.A(bit_bang[7]), .B(n_68), .Z(n_70));
notech_xor2 i_27(.A(bit_bang[6]), .B(n_66), .Z(n_5524));
notech_inv i_28(.A(n_5524), .Z(O0[6]));
notech_xor2 i_8866(.A(bit_bang[7]), .B(n_68), .Z(n_5515));
notech_inv i_8867(.A(n_5515), .Z(O0[7]));
notech_or2 i_8865(.A(bit_bang[7]), .B(n_68), .Z(n_70));
notech_xor2 i_27(.A(bit_bang[6]), .B(n_66), .Z(n_5542));
notech_inv i_28(.A(n_5542), .Z(O0[6]));
notech_or2 i_26(.A(bit_bang[6]), .B(n_66), .Z(n_68));
notech_xor2 i_273989(.A(bit_bang[5]), .B(n_64), .Z(n_5551));
notech_inv i_283990(.A(n_5551), .Z(O0[5]));
notech_or2 i_263991(.A(bit_bang[5]), .B(n_64), .Z(n_66));
notech_xor2 i_273992(.A(bit_bang[4]), .B(n_62), .Z(n_5578));
notech_inv i_283993(.A(n_5578), .Z(O0[4]));
notech_or2 i_263994(.A(bit_bang[4]), .B(n_62), .Z(n_64));
notech_xor2 i_273995(.A(bit_bang[3]), .B(n_60), .Z(n_5605));
notech_inv i_283996(.A(n_5605), .Z(O0[3]));
notech_or2 i_263997(.A(bit_bang[3]), .B(n_60), .Z(n_62));
notech_xor2 i_273998(.A(bit_bang[2]), .B(n_58), .Z(n_5632));
notech_inv i_283999(.A(n_5632), .Z(O0[2]));
notech_or2 i_264000(.A(bit_bang[2]), .B(n_58), .Z(n_60));
notech_xor2 i_274001(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_5660));
notech_inv i_284002(.A(n_5660), .Z(O0[1]));
notech_or2 i_264003(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_58));
notech_xor2 i_274043(.A(bit_bang[5]), .B(n_64), .Z(n_5569));
notech_inv i_284044(.A(n_5569), .Z(O0[5]));
notech_or2 i_264045(.A(bit_bang[5]), .B(n_64), .Z(n_66));
notech_xor2 i_274046(.A(bit_bang[4]), .B(n_62), .Z(n_5596));
notech_inv i_284047(.A(n_5596), .Z(O0[4]));
notech_or2 i_264048(.A(bit_bang[4]), .B(n_62), .Z(n_64));
notech_xor2 i_274049(.A(bit_bang[3]), .B(n_60), .Z(n_5623));
notech_inv i_284050(.A(n_5623), .Z(O0[3]));
notech_or2 i_264051(.A(bit_bang[3]), .B(n_60), .Z(n_62));
notech_xor2 i_274052(.A(bit_bang[2]), .B(n_58), .Z(n_5650));
notech_inv i_284053(.A(n_5650), .Z(O0[2]));
notech_or2 i_264054(.A(bit_bang[2]), .B(n_58), .Z(n_60));
notech_xor2 i_274055(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_5678));
notech_inv i_284056(.A(n_5678), .Z(O0[1]));
notech_or2 i_264057(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_58));
endmodule
module uart_16750(CLK, RST, BAUDCE, CS, WR, RD, A, DIN, DOUT, DDIS, INT, OUT1N, OUT2N
, RCLK, BAUDOUTN, RTSN, DTRN, CTSN, DSRN, DCDN, RIN, SIN, SOUT
88,117 → 94,117
 
 
 
notech_inv i_1599(.A(n_8338), .Z(n_8467));
notech_inv i_1598(.A(n_8338), .Z(n_8466));
notech_inv i_1597(.A(n_8338), .Z(n_8465));
notech_inv i_1596(.A(n_8338), .Z(n_8464));
notech_inv i_1594(.A(n_8338), .Z(n_8462));
notech_inv i_1593(.A(n_8338), .Z(n_8461));
notech_inv i_1592(.A(n_8338), .Z(n_8460));
notech_inv i_1591(.A(n_8338), .Z(n_8459));
notech_inv i_1589(.A(n_8338), .Z(n_8457));
notech_inv i_1588(.A(n_8338), .Z(n_8456));
notech_inv i_1587(.A(n_8338), .Z(n_8455));
notech_inv i_1586(.A(n_8338), .Z(n_8454));
notech_inv i_1583(.A(n_8437), .Z(n_8451));
notech_inv i_1582(.A(n_8437), .Z(n_8450));
notech_inv i_1581(.A(n_8437), .Z(n_8449));
notech_inv i_1580(.A(n_8437), .Z(n_8448));
notech_inv i_1578(.A(n_8437), .Z(n_8446));
notech_inv i_1577(.A(n_8437), .Z(n_8445));
notech_inv i_1576(.A(n_8437), .Z(n_8444));
notech_inv i_1575(.A(n_8437), .Z(n_8443));
notech_inv i_1573(.A(n_8437), .Z(n_8441));
notech_inv i_1572(.A(n_8437), .Z(n_8440));
notech_inv i_1571(.A(n_8437), .Z(n_8439));
notech_inv i_1570(.A(n_8437), .Z(n_8438));
notech_inv i_1569(.A(n_8459), .Z(n_8437));
notech_inv i_1567(.A(n_8421), .Z(n_8435));
notech_inv i_1566(.A(n_8421), .Z(n_8434));
notech_inv i_1565(.A(n_8421), .Z(n_8433));
notech_inv i_1564(.A(n_8421), .Z(n_8432));
notech_inv i_1562(.A(n_8421), .Z(n_8430));
notech_inv i_1561(.A(n_8421), .Z(n_8429));
notech_inv i_1560(.A(n_8421), .Z(n_8428));
notech_inv i_1559(.A(n_8421), .Z(n_8427));
notech_inv i_1557(.A(n_8421), .Z(n_8425));
notech_inv i_1556(.A(n_8421), .Z(n_8424));
notech_inv i_1555(.A(n_8421), .Z(n_8423));
notech_inv i_1554(.A(n_8421), .Z(n_8422));
notech_inv i_1553(.A(n_8459), .Z(n_8421));
notech_inv i_1551(.A(n_8405), .Z(n_8419));
notech_inv i_1550(.A(n_8405), .Z(n_8418));
notech_inv i_1549(.A(n_8405), .Z(n_8417));
notech_inv i_1548(.A(n_8405), .Z(n_8416));
notech_inv i_1546(.A(n_8405), .Z(n_8414));
notech_inv i_1545(.A(n_8405), .Z(n_8413));
notech_inv i_1544(.A(n_8405), .Z(n_8412));
notech_inv i_1543(.A(n_8405), .Z(n_8411));
notech_inv i_1541(.A(n_8405), .Z(n_8409));
notech_inv i_1540(.A(n_8405), .Z(n_8408));
notech_inv i_1538(.A(n_8405), .Z(n_8406));
notech_inv i_1537(.A(n_8459), .Z(n_8405));
notech_inv i_1533(.A(n_8388), .Z(n_8401));
notech_inv i_1531(.A(n_8388), .Z(n_8399));
notech_inv i_1528(.A(n_8388), .Z(n_8396));
notech_inv i_1526(.A(n_8388), .Z(n_8394));
notech_inv i_1523(.A(n_8388), .Z(n_8391));
notech_inv i_1521(.A(n_8388), .Z(n_8389));
notech_inv i_1520(.A(n_8454), .Z(n_8388));
notech_inv i_1517(.A(n_8338), .Z(n_8385));
notech_inv i_1515(.A(n_8338), .Z(n_8383));
notech_inv i_1512(.A(n_8338), .Z(n_8380));
notech_inv i_1510(.A(n_8338), .Z(n_8378));
notech_inv i_1507(.A(n_8338), .Z(n_8375));
notech_inv i_1505(.A(n_8338), .Z(n_8373));
notech_inv i_1501(.A(n_8388), .Z(n_8369));
notech_inv i_1499(.A(n_8388), .Z(n_8367));
notech_inv i_1496(.A(n_8388), .Z(n_8364));
notech_inv i_1494(.A(n_8388), .Z(n_8362));
notech_inv i_1491(.A(n_8388), .Z(n_8359));
notech_inv i_1489(.A(n_8388), .Z(n_8357));
notech_inv i_1485(.A(n_8388), .Z(n_8353));
notech_inv i_1483(.A(n_8388), .Z(n_8351));
notech_inv i_1480(.A(n_8388), .Z(n_8348));
notech_inv i_1478(.A(n_8388), .Z(n_8346));
notech_inv i_1475(.A(n_8388), .Z(n_8343));
notech_inv i_1473(.A(n_8388), .Z(n_8341));
notech_inv i_1470(.A(CLK), .Z(n_8338));
notech_inv i_1468(.A(n_8273), .Z(n_8336));
notech_inv i_1466(.A(n_8273), .Z(n_8334));
notech_inv i_1463(.A(n_8273), .Z(n_8331));
notech_inv i_1461(.A(n_8273), .Z(n_8329));
notech_inv i_1458(.A(n_8273), .Z(n_8326));
notech_inv i_1456(.A(n_8273), .Z(n_8324));
notech_inv i_1452(.A(n_8273), .Z(n_8320));
notech_inv i_1450(.A(n_8273), .Z(n_8318));
notech_inv i_1447(.A(n_8273), .Z(n_8315));
notech_inv i_1445(.A(n_8273), .Z(n_8313));
notech_inv i_1442(.A(n_8273), .Z(n_8310));
notech_inv i_1440(.A(n_8273), .Z(n_8308));
notech_inv i_1436(.A(n_8273), .Z(n_8304));
notech_inv i_1434(.A(n_8273), .Z(n_8302));
notech_inv i_1431(.A(n_8273), .Z(n_8299));
notech_inv i_1429(.A(n_8273), .Z(n_8297));
notech_inv i_1426(.A(n_8273), .Z(n_8294));
notech_inv i_1424(.A(n_8273), .Z(n_8292));
notech_inv i_1420(.A(n_8275), .Z(n_8288));
notech_inv i_1418(.A(n_8275), .Z(n_8286));
notech_inv i_1415(.A(n_8275), .Z(n_8283));
notech_inv i_1413(.A(n_8275), .Z(n_8281));
notech_inv i_1410(.A(n_8275), .Z(n_8278));
notech_inv i_1408(.A(n_8275), .Z(n_8276));
notech_inv i_1407(.A(n_8274), .Z(n_8275));
notech_inv i_1406(.A(n_8273), .Z(n_8274));
notech_inv i_1405(.A(CLK), .Z(n_8273));
notech_inv i_1237(.A(\UART_IS_RI/n1 ), .Z(n_8089));
notech_reg \UART_IS_CTS/iD_reg[0] (.CP(n_8408), .D(1'b1), .CD(\UART_IS_CTS/n1
notech_inv i_1586(.A(n_8332), .Z(n_8461));
notech_inv i_1585(.A(n_8332), .Z(n_8460));
notech_inv i_1584(.A(n_8332), .Z(n_8459));
notech_inv i_1583(.A(n_8332), .Z(n_8458));
notech_inv i_1581(.A(n_8332), .Z(n_8456));
notech_inv i_1580(.A(n_8332), .Z(n_8455));
notech_inv i_1579(.A(n_8332), .Z(n_8454));
notech_inv i_1578(.A(n_8332), .Z(n_8453));
notech_inv i_1576(.A(n_8332), .Z(n_8451));
notech_inv i_1575(.A(n_8332), .Z(n_8450));
notech_inv i_1574(.A(n_8332), .Z(n_8449));
notech_inv i_1573(.A(n_8332), .Z(n_8448));
notech_inv i_1570(.A(n_8431), .Z(n_8445));
notech_inv i_1569(.A(n_8431), .Z(n_8444));
notech_inv i_1568(.A(n_8431), .Z(n_8443));
notech_inv i_1567(.A(n_8431), .Z(n_8442));
notech_inv i_1565(.A(n_8431), .Z(n_8440));
notech_inv i_1564(.A(n_8431), .Z(n_8439));
notech_inv i_1563(.A(n_8431), .Z(n_8438));
notech_inv i_1562(.A(n_8431), .Z(n_8437));
notech_inv i_1560(.A(n_8431), .Z(n_8435));
notech_inv i_1559(.A(n_8431), .Z(n_8434));
notech_inv i_1558(.A(n_8431), .Z(n_8433));
notech_inv i_1557(.A(n_8431), .Z(n_8432));
notech_inv i_1556(.A(n_8453), .Z(n_8431));
notech_inv i_1554(.A(n_8415), .Z(n_8429));
notech_inv i_1553(.A(n_8415), .Z(n_8428));
notech_inv i_1552(.A(n_8415), .Z(n_8427));
notech_inv i_1551(.A(n_8415), .Z(n_8426));
notech_inv i_1549(.A(n_8415), .Z(n_8424));
notech_inv i_1548(.A(n_8415), .Z(n_8423));
notech_inv i_1547(.A(n_8415), .Z(n_8422));
notech_inv i_1546(.A(n_8415), .Z(n_8421));
notech_inv i_1544(.A(n_8415), .Z(n_8419));
notech_inv i_1543(.A(n_8415), .Z(n_8418));
notech_inv i_1542(.A(n_8415), .Z(n_8417));
notech_inv i_1541(.A(n_8415), .Z(n_8416));
notech_inv i_1540(.A(n_8453), .Z(n_8415));
notech_inv i_1538(.A(n_8399), .Z(n_8413));
notech_inv i_1537(.A(n_8399), .Z(n_8412));
notech_inv i_1536(.A(n_8399), .Z(n_8411));
notech_inv i_1535(.A(n_8399), .Z(n_8410));
notech_inv i_1533(.A(n_8399), .Z(n_8408));
notech_inv i_1532(.A(n_8399), .Z(n_8407));
notech_inv i_1531(.A(n_8399), .Z(n_8406));
notech_inv i_1530(.A(n_8399), .Z(n_8405));
notech_inv i_1528(.A(n_8399), .Z(n_8403));
notech_inv i_1527(.A(n_8399), .Z(n_8402));
notech_inv i_1525(.A(n_8399), .Z(n_8400));
notech_inv i_1524(.A(n_8453), .Z(n_8399));
notech_inv i_1520(.A(n_8382), .Z(n_8395));
notech_inv i_1518(.A(n_8382), .Z(n_8393));
notech_inv i_1515(.A(n_8382), .Z(n_8390));
notech_inv i_1513(.A(n_8382), .Z(n_8388));
notech_inv i_1510(.A(n_8382), .Z(n_8385));
notech_inv i_1508(.A(n_8382), .Z(n_8383));
notech_inv i_1507(.A(n_8448), .Z(n_8382));
notech_inv i_1504(.A(n_8332), .Z(n_8379));
notech_inv i_1502(.A(n_8332), .Z(n_8377));
notech_inv i_1499(.A(n_8332), .Z(n_8374));
notech_inv i_1497(.A(n_8332), .Z(n_8372));
notech_inv i_1494(.A(n_8332), .Z(n_8369));
notech_inv i_1492(.A(n_8332), .Z(n_8367));
notech_inv i_1488(.A(n_8382), .Z(n_8363));
notech_inv i_1486(.A(n_8382), .Z(n_8361));
notech_inv i_1483(.A(n_8382), .Z(n_8358));
notech_inv i_1481(.A(n_8382), .Z(n_8356));
notech_inv i_1478(.A(n_8382), .Z(n_8353));
notech_inv i_1476(.A(n_8382), .Z(n_8351));
notech_inv i_1472(.A(n_8382), .Z(n_8347));
notech_inv i_1470(.A(n_8382), .Z(n_8345));
notech_inv i_1467(.A(n_8382), .Z(n_8342));
notech_inv i_1465(.A(n_8382), .Z(n_8340));
notech_inv i_1462(.A(n_8382), .Z(n_8337));
notech_inv i_1460(.A(n_8382), .Z(n_8335));
notech_inv i_1457(.A(CLK), .Z(n_8332));
notech_inv i_1455(.A(n_8267), .Z(n_8330));
notech_inv i_1453(.A(n_8267), .Z(n_8328));
notech_inv i_1450(.A(n_8267), .Z(n_8325));
notech_inv i_1448(.A(n_8267), .Z(n_8323));
notech_inv i_1445(.A(n_8267), .Z(n_8320));
notech_inv i_1443(.A(n_8267), .Z(n_8318));
notech_inv i_1439(.A(n_8267), .Z(n_8314));
notech_inv i_1437(.A(n_8267), .Z(n_8312));
notech_inv i_1434(.A(n_8267), .Z(n_8309));
notech_inv i_1432(.A(n_8267), .Z(n_8307));
notech_inv i_1429(.A(n_8267), .Z(n_8304));
notech_inv i_1427(.A(n_8267), .Z(n_8302));
notech_inv i_1423(.A(n_8267), .Z(n_8298));
notech_inv i_1421(.A(n_8267), .Z(n_8296));
notech_inv i_1418(.A(n_8267), .Z(n_8293));
notech_inv i_1416(.A(n_8267), .Z(n_8291));
notech_inv i_1413(.A(n_8267), .Z(n_8288));
notech_inv i_1411(.A(n_8267), .Z(n_8286));
notech_inv i_1407(.A(n_8269), .Z(n_8282));
notech_inv i_1405(.A(n_8269), .Z(n_8280));
notech_inv i_1402(.A(n_8269), .Z(n_8277));
notech_inv i_1400(.A(n_8269), .Z(n_8275));
notech_inv i_1397(.A(n_8269), .Z(n_8272));
notech_inv i_1395(.A(n_8269), .Z(n_8270));
notech_inv i_1394(.A(n_8268), .Z(n_8269));
notech_inv i_1393(.A(n_8267), .Z(n_8268));
notech_inv i_1392(.A(CLK), .Z(n_8267));
notech_inv i_1237(.A(\UART_IS_RI/n1 ), .Z(n_8096));
notech_reg \UART_IS_CTS/iD_reg[0] (.CP(n_8402), .D(1'b1), .CD(\UART_IS_CTS/n1
), .Q(\UART_IS_CTS/iD[0] ));
notech_reg \UART_IS_DSR/iD_reg[0] (.CP(n_8409), .D(1'b1), .CD(\UART_IS_DSR/n1
notech_reg \UART_IS_DSR/iD_reg[0] (.CP(n_8403), .D(1'b1), .CD(\UART_IS_DSR/n1
), .Q(\UART_IS_DSR/iD[0] ));
notech_reg \UART_IS_DCD/iD_reg[0] (.CP(n_8408), .D(1'b1), .CD(\UART_IS_DCD/n1
notech_reg \UART_IS_DCD/iD_reg[0] (.CP(n_8402), .D(1'b1), .CD(\UART_IS_DCD/n1
), .Q(\UART_IS_DCD/iD[0] ));
notech_reg \UART_IS_RI/iD_reg[0] (.CP(n_8408), .D(1'b1), .CD(\UART_IS_RI/n1
notech_reg \UART_IS_RI/iD_reg[0] (.CP(n_8402), .D(1'b1), .CD(\UART_IS_RI/n1
), .Q(\UART_IS_RI/iD[0] ));
notech_nand2 U843(.A(BAUDCE), .B(\UART_BG16/n35 ), .Z(\UART_BG16/n2 ));
notech_and2 U842(.A(\UART_RX/RX_MVF/n16 ), .B(\UART_RX/n43 ), .Z(\UART_RX/RX_MVF/n17
244,13 → 250,13
notech_fa2 \r108/U1_0 (.A(iFECounter[0]), .B(\U3/U1/Z_0 ), .CI(\r108/n1
), .CO(\r108/carry[1] ));
notech_inv \r108/U1 (.A(\U3/U1/Z_0 ), .Z(\r108/n1 ));
notech_reg \UART_RX/RX_IFSB/iCount_reg[0] (.CP(n_8341), .D(\UART_RX/RX_IFSB/n33
notech_reg \UART_RX/RX_IFSB/iCount_reg[0] (.CP(n_8335), .D(\UART_RX/RX_IFSB/n33
), .CD(\UART_IS_SIN/n1 ), .Q(\UART_RX/RX_IFSB/iCount[0] ));
notech_reg \UART_RX/RX_IFSB/iCount_reg[1] (.CP(n_8341), .D(\UART_RX/RX_IFSB/n31
notech_reg \UART_RX/RX_IFSB/iCount_reg[1] (.CP(n_8335), .D(\UART_RX/RX_IFSB/n31
), .CD(\UART_IS_DCD/n1 ), .Q(\UART_RX/RX_IFSB/iCount[1] ));
notech_reg \UART_RX/RX_IFSB/iCount_reg[2] (.CP(n_8341), .D(\UART_RX/RX_IFSB/n32
notech_reg \UART_RX/RX_IFSB/iCount_reg[2] (.CP(n_8335), .D(\UART_RX/RX_IFSB/n32
), .CD(\UART_IF_DSR/n8 ), .Q(\UART_RX/RX_IFSB/iCount[2] ));
notech_reg \UART_RX/RX_IFSB/Q_reg (.CP(n_8341), .D(\UART_RX/RX_IFSB/n30
notech_reg \UART_RX/RX_IFSB/Q_reg (.CP(n_8335), .D(\UART_RX/RX_IFSB/n30
), .CD(\UART_IF_DSR/n8 ), .Q(\UART_RX/iFStopBit ));
notech_inv \UART_RX/RX_IFSB/U4 (.A(\UART_RX/RX_IFSB/n1 ), .Z(\UART_RX/RX_IFSB/n33
));
295,15 → 301,15
));
notech_nor2 \UART_RX/RX_IFSB/U25 (.A(\UART_RX/RX_IFSB/iCount[0] ), .B(\UART_RX/RX_IFSB/iCount[1]
), .Z(\UART_RX/RX_IFSB/n18 ));
notech_reg \UART_RX/RX_MVF/iCounter_reg[0] (.CP(n_8341), .D(\UART_RX/RX_MVF/n26
notech_reg \UART_RX/RX_MVF/iCounter_reg[0] (.CP(n_8335), .D(\UART_RX/RX_MVF/n26
), .CD(\UART_IF_DSR/n8 ), .Q(\UART_RX/RX_MVF/iCounter[0] ));
notech_reg \UART_RX/RX_MVF/iCounter_reg[3] (.CP(n_8341), .D(\UART_RX/RX_MVF/n22
notech_reg \UART_RX/RX_MVF/iCounter_reg[3] (.CP(n_8335), .D(\UART_RX/RX_MVF/n22
), .CD(\UART_IS_SIN/n1 ), .Q(\UART_RX/RX_MVF/iCounter[3] ));
notech_reg \UART_RX/RX_MVF/iCounter_reg[2] (.CP(n_8341), .D(\UART_RX/RX_MVF/n23
notech_reg \UART_RX/RX_MVF/iCounter_reg[2] (.CP(n_8335), .D(\UART_RX/RX_MVF/n23
), .CD(\UART_IS_SIN/n1 ), .Q(\UART_RX/RX_MVF/iCounter[2] ));
notech_reg \UART_RX/RX_MVF/iCounter_reg[1] (.CP(n_8343), .D(\UART_RX/RX_MVF/n24
notech_reg \UART_RX/RX_MVF/iCounter_reg[1] (.CP(n_8337), .D(\UART_RX/RX_MVF/n24
), .CD(\UART_IF_CTS/n8 ), .Q(\UART_RX/RX_MVF/iCounter[1] ));
notech_reg \UART_RX/RX_MVF/iQ_reg (.CP(n_8343), .D(\UART_RX/RX_MVF/n21 )
notech_reg \UART_RX/RX_MVF/iQ_reg (.CP(n_8337), .D(\UART_RX/RX_MVF/n21 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_RX/iFSIN ));
notech_and3 \UART_RX/RX_MVF/U3 (.A(iSIN), .B(\UART_RX/RX_MVF/n16 ), .C(iRCLK
), .Z(\UART_RX/RX_MVF/n15 ));
348,15 → 354,15
));
notech_nor2 \UART_RX/RX_MVF/U26 (.A(\UART_RX/RX_MVF/iCounter[2] ), .B(\UART_RX/RX_MVF/iCounter[1]
), .Z(\UART_RX/RX_MVF/n18 ));
notech_reg \UART_RX/RX_BRC/iCounter_reg[0] (.CP(n_8343), .D(\UART_RX/RX_BRC/n30
notech_reg \UART_RX/RX_BRC/iCounter_reg[0] (.CP(n_8337), .D(\UART_RX/RX_BRC/n30
), .CD(\UART_IS_DCD/n1 ), .Q(\UART_RX/RX_BRC/Q[0] ));
notech_reg \UART_RX/RX_BRC/iCounter_reg[1] (.CP(n_8343), .D(\UART_RX/RX_BRC/n29
notech_reg \UART_RX/RX_BRC/iCounter_reg[1] (.CP(n_8337), .D(\UART_RX/RX_BRC/n29
), .CD(\UART_IS_RI/n1 ), .Q(\UART_RX/RX_BRC/Q[1] ));
notech_reg \UART_RX/RX_BRC/iCounter_reg[2] (.CP(n_8343), .D(\UART_RX/RX_BRC/n28
notech_reg \UART_RX/RX_BRC/iCounter_reg[2] (.CP(n_8337), .D(\UART_RX/RX_BRC/n28
), .CD(\UART_IF_CTS/n8 ), .Q(\UART_RX/RX_BRC/Q[2] ));
notech_reg \UART_RX/RX_BRC/iCounter_reg[3] (.CP(n_8343), .D(\UART_RX/RX_BRC/n27
notech_reg \UART_RX/RX_BRC/iCounter_reg[3] (.CP(n_8337), .D(\UART_RX/RX_BRC/n27
), .CD(\UART_IF_DSR/n8 ), .Q(\UART_RX/iBaudCount[3] ));
notech_reg \UART_RX/RX_BRC/iCounter_reg[4] (.CP(n_8343), .D(\UART_RX/RX_BRC/n26
notech_reg \UART_RX/RX_BRC/iCounter_reg[4] (.CP(n_8337), .D(\UART_RX/RX_BRC/n26
), .CD(\UART_IS_DSR/n1 ), .Q(\UART_RX/iBaudStep ));
notech_and2 \UART_RX/RX_BRC/U4 (.A(\UART_RX/RX_BRC/n1 ), .B(\UART_RX/n61
), .Z(\UART_RX/RX_BRC/n30 ));
383,41 → 389,41
));
notech_inv \UART_RX/RX_BRC/U33 (.A(\UART_RX/RX_BRC/Q[2] ), .Z(\UART_RX/RX_BRC/n12
));
notech_reg \UART_RX/CState_reg[0] (.CP(n_8343), .D(\UART_RX/NState [0]),
notech_reg \UART_RX/CState_reg[0] (.CP(n_8337), .D(\UART_RX/NState [0]),
.CD(\UART_IF_CTS/n8 ), .Q(\UART_RX/CState[0] ));
notech_reg \UART_RX/CState_reg[1] (.CP(n_8343), .D(\UART_RX/NState [1]),
notech_reg \UART_RX/CState_reg[1] (.CP(n_8337), .D(\UART_RX/NState [1]),
.CD(\UART_IS_DSR/n1 ), .Q(\UART_RX/CState[1] ));
notech_reg \UART_RX/iBaudStepD_reg (.CP(n_8343), .D(\UART_RX/iBaudStep )
notech_reg \UART_RX/iBaudStepD_reg (.CP(n_8337), .D(\UART_RX/iBaudStep )
, .CD(\UART_IS_DCD/n1 ), .Q(\UART_RX/iBaudStepD ));
notech_reg \UART_RX/iDataCount_reg[3] (.CP(n_8343), .D(\UART_RX/n117 ),
notech_reg \UART_RX/iDataCount_reg[3] (.CP(n_8337), .D(\UART_RX/n117 ),
.CD(\UART_IF_DSR/n8 ), .Q(\UART_RX/iDataCount[3] ));
notech_reg \UART_RX/iDataCount_reg[0] (.CP(n_8336), .D(\UART_RX/n116 ),
notech_reg \UART_RX/iDataCount_reg[0] (.CP(n_8330), .D(\UART_RX/n116 ),
.CD(\UART_IS_SIN/n1 ), .Q(\UART_RX/iDataCount[0] ));
notech_reg \UART_RX/iDataCount_reg[1] (.CP(n_8336), .D(\UART_RX/n115 ),
notech_reg \UART_RX/iDataCount_reg[1] (.CP(n_8330), .D(\UART_RX/n115 ),
.CD(\UART_IS_DSR/n1 ), .Q(\UART_RX/iDataCount[1] ));
notech_reg \UART_RX/iDataCount_reg[2] (.CP(n_8336), .D(\UART_RX/n114 ),
notech_reg \UART_RX/iDataCount_reg[2] (.CP(n_8330), .D(\UART_RX/n114 ),
.CD(\UART_IS_DCD/n1 ), .Q(\UART_RX/iDataCount[2] ));
notech_reg \UART_RX/CState_reg[2] (.CP(n_8336), .D(\UART_RX/NState [2]),
notech_reg \UART_RX/CState_reg[2] (.CP(n_8330), .D(\UART_RX/NState [2]),
.CD(\UART_IS_RI/n1 ), .Q(\UART_RX/CState[2] ));
notech_reg \UART_RX/iDOUT_reg[0] (.CP(n_8336), .D(\UART_RX/n113 ), .CD(\UART_IF_CTS/n8
notech_reg \UART_RX/iDOUT_reg[0] (.CP(n_8330), .D(\UART_RX/n113 ), .CD(\UART_IF_CTS/n8
), .Q(iRXData[0]));
notech_reg \UART_RX/iDOUT_reg[1] (.CP(n_8336), .D(\UART_RX/n112 ), .CD(\UART_IS_RI/n1
notech_reg \UART_RX/iDOUT_reg[1] (.CP(n_8330), .D(\UART_RX/n112 ), .CD(\UART_IS_RI/n1
), .Q(iRXData[1]));
notech_reg \UART_RX/iDOUT_reg[2] (.CP(n_8336), .D(\UART_RX/n111 ), .CD(\UART_IS_DCD/n1
notech_reg \UART_RX/iDOUT_reg[2] (.CP(n_8330), .D(\UART_RX/n111 ), .CD(\UART_IS_DCD/n1
), .Q(iRXData[2]));
notech_reg \UART_RX/iDOUT_reg[3] (.CP(n_8336), .D(\UART_RX/n110 ), .CD(\UART_IS_DSR/n1
notech_reg \UART_RX/iDOUT_reg[3] (.CP(n_8330), .D(\UART_RX/n110 ), .CD(\UART_IS_DSR/n1
), .Q(iRXData[3]));
notech_reg \UART_RX/iDOUT_reg[4] (.CP(n_8336), .D(\UART_RX/n109 ), .CD(\UART_IS_CTS/n1
notech_reg \UART_RX/iDOUT_reg[4] (.CP(n_8330), .D(\UART_RX/n109 ), .CD(\UART_IS_CTS/n1
), .Q(iRXData[4]));
notech_reg \UART_RX/iDOUT_reg[5] (.CP(n_8336), .D(\UART_RX/n108 ), .CD(\UART_IS_SIN/n1
notech_reg \UART_RX/iDOUT_reg[5] (.CP(n_8330), .D(\UART_RX/n108 ), .CD(\UART_IS_SIN/n1
), .Q(iRXData[5]));
notech_reg \UART_RX/iDOUT_reg[6] (.CP(n_8336), .D(\UART_RX/n107 ), .CD(\UART_IS_RI/n1
notech_reg \UART_RX/iDOUT_reg[6] (.CP(n_8330), .D(\UART_RX/n107 ), .CD(\UART_IS_RI/n1
), .Q(iRXData[6]));
notech_reg \UART_RX/iDOUT_reg[7] (.CP(n_8336), .D(\UART_RX/n106 ), .CD(\UART_IF_CTS/n8
notech_reg \UART_RX/iDOUT_reg[7] (.CP(n_8330), .D(\UART_RX/n106 ), .CD(\UART_IF_CTS/n8
), .Q(iRXData[7]));
notech_reg \UART_RX/iParityReceived_reg (.CP(n_8341), .D(\UART_RX/n105 )
notech_reg \UART_RX/iParityReceived_reg (.CP(n_8335), .D(\UART_RX/n105 )
, .CD(\UART_IF_CTS/n8 ), .Q(\UART_RX/iParityReceived ));
notech_reg \UART_RX/PE_reg (.CP(n_8341), .D(\UART_RX/N106 ), .CD(\UART_IF_DSR/n8
notech_reg \UART_RX/PE_reg (.CP(n_8335), .D(\UART_RX/N106 ), .CD(\UART_IF_DSR/n8
), .Q(iRXPE));
notech_mux2 \UART_RX/U4 (.S(\UART_RX/iDataCount[3] ), .A(\UART_RX/n1 ),
.B(\UART_RX/n2 ), .Z(\UART_RX/n117 ));
613,19 → 619,19
notech_xor2 \UART_RX/U109 (.A(iRXData[3]), .B(\UART_RX/n78 ), .Z(\UART_RX/n82
));
notech_inv \UART_RX/U110 (.A(iRXData[2]), .Z(\UART_RX/n78 ));
notech_reg \UART_TX/CState_reg[0] (.CP(n_8341), .D(\UART_TX/n92 ), .CD(\UART_IS_CTS/n1
notech_reg \UART_TX/CState_reg[0] (.CP(n_8335), .D(\UART_TX/n92 ), .CD(\UART_IS_CTS/n1
), .Q(\UART_TX/CState[0] ));
notech_reg \UART_TX/CState_reg[1] (.CP(n_8341), .D(\UART_TX/n90 ), .CD(\UART_IS_DSR/n1
notech_reg \UART_TX/CState_reg[1] (.CP(n_8335), .D(\UART_TX/n90 ), .CD(\UART_IS_DSR/n1
), .Q(\UART_TX/CState[1] ));
notech_reg \UART_TX/CState_reg[2] (.CP(n_8341), .D(\UART_TX/n89 ), .CD(\UART_IF_DSR/n8
notech_reg \UART_TX/CState_reg[2] (.CP(n_8335), .D(\UART_TX/n89 ), .CD(\UART_IF_DSR/n8
), .Q(\UART_TX/CState[2] ));
notech_reg \UART_TX/CState_reg[3] (.CP(n_8341), .D(\UART_TX/n88 ), .CD(\UART_IS_DCD/n1
notech_reg \UART_TX/CState_reg[3] (.CP(n_8335), .D(\UART_TX/n88 ), .CD(\UART_IS_DCD/n1
), .Q(\UART_TX/CState[3] ));
notech_reg \UART_TX/iTx2_reg (.CP(n_8336), .D(\UART_TX/n87 ), .CD(\UART_IF_CTS/n8
notech_reg \UART_TX/iTx2_reg (.CP(n_8330), .D(\UART_TX/n87 ), .CD(\UART_IF_CTS/n8
), .Q(\UART_TX/iTx2 ));
notech_reg \UART_TX/iLast_reg (.CP(n_8336), .D(\UART_TX/n93 ), .CD(\UART_IS_CTS/n1
notech_reg \UART_TX/iLast_reg (.CP(n_8330), .D(\UART_TX/n93 ), .CD(\UART_IS_CTS/n1
), .Q(\UART_TX/iLast ));
notech_reg \UART_TX/iFinished_reg (.CP(n_8336), .D(\UART_TX/N127 ), .CD(\UART_IS_RI/n1
notech_reg \UART_TX/iFinished_reg (.CP(n_8330), .D(\UART_TX/N127 ), .CD(\UART_IS_RI/n1
), .Q(iTXFinished));
notech_nand2 \UART_TX/U4 (.A(\UART_TX/n1 ), .B(\UART_TX/n2 ), .Z(\UART_TX/n92
));
814,1477 → 820,1477
), .Z(\UART_RXFF/N25 ), .CO(\UART_RXFF/add_73/carry [2]));
notech_xor2 \UART_RXFF/add_73/U1 (.A(\UART_RXFF/add_73/carry [6]), .B(\UART_RXFF/iWRAddr[6]
), .Z(\UART_RXFF/N30 ));
notech_reg \UART_RXFF/iRDAddr_reg[0] (.CP(n_8341), .D(\UART_RXFF/n2408 )
notech_reg \UART_RXFF/iRDAddr_reg[0] (.CP(n_8335), .D(\UART_RXFF/n2408 )
, .CD(\UART_IS_RI/n1 ), .Q(\UART_RXFF/N12 ));
notech_reg_set \UART_RXFF/iEMPTY_reg (.CP(n_8341), .D(\UART_RXFF/N56 ),
notech_reg_set \UART_RXFF/iEMPTY_reg (.CP(n_8335), .D(\UART_RXFF/N56 ),
.SD(\UART_IS_DCD/n1 ), .Q(iRXFIFOEmpty));
notech_reg \UART_RXFF/iRDAddr_reg[6] (.CP(n_8341), .D(\UART_RXFF/n2400 )
notech_reg \UART_RXFF/iRDAddr_reg[6] (.CP(n_8335), .D(\UART_RXFF/n2400 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_RXFF/iRDAddr[6] ));
notech_reg \UART_RXFF/iRDAddr_reg[1] (.CP(n_8348), .D(\UART_RXFF/n2399 )
notech_reg \UART_RXFF/iRDAddr_reg[1] (.CP(n_8342), .D(\UART_RXFF/n2399 )
, .CD(\UART_IS_DSR/n1 ), .Q(\UART_RXFF/N13 ));
notech_reg \UART_RXFF/iRDAddr_reg[2] (.CP(n_8348), .D(\UART_RXFF/n2398 )
notech_reg \UART_RXFF/iRDAddr_reg[2] (.CP(n_8342), .D(\UART_RXFF/n2398 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_RXFF/N14 ));
notech_reg \UART_RXFF/iRDAddr_reg[3] (.CP(n_8348), .D(\UART_RXFF/n2397 )
notech_reg \UART_RXFF/iRDAddr_reg[3] (.CP(n_8342), .D(\UART_RXFF/n2397 )
, .CD(\UART_IS_SIN/n1 ), .Q(\UART_RXFF/N15 ));
notech_reg \UART_RXFF/iRDAddr_reg[4] (.CP(n_8348), .D(\UART_RXFF/n2396 )
notech_reg \UART_RXFF/iRDAddr_reg[4] (.CP(n_8342), .D(\UART_RXFF/n2396 )
, .CD(\UART_IS_DCD/n1 ), .Q(\UART_RXFF/N16 ));
notech_reg \UART_RXFF/iRDAddr_reg[5] (.CP(n_8348), .D(\UART_RXFF/n2395 )
notech_reg \UART_RXFF/iRDAddr_reg[5] (.CP(n_8342), .D(\UART_RXFF/n2395 )
, .CD(\UART_IS_DSR/n1 ), .Q(\UART_RXFF/N17 ));
notech_reg \UART_RXFF/iWRAddr_reg[6] (.CP(n_8346), .D(\UART_RXFF/n2407 )
notech_reg \UART_RXFF/iWRAddr_reg[6] (.CP(n_8340), .D(\UART_RXFF/n2407 )
, .CD(\UART_IF_CTS/n8 ), .Q(\UART_RXFF/iWRAddr[6] ));
notech_reg \UART_RXFF/iWRAddr_reg[0] (.CP(n_8346), .D(\UART_RXFF/n2406 )
notech_reg \UART_RXFF/iWRAddr_reg[0] (.CP(n_8340), .D(\UART_RXFF/n2406 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_RXFF/iWRAddr[0] ));
notech_reg \UART_RXFF/iWRAddr_reg[1] (.CP(n_8346), .D(\UART_RXFF/n2405 )
notech_reg \UART_RXFF/iWRAddr_reg[1] (.CP(n_8340), .D(\UART_RXFF/n2405 )
, .CD(\UART_IS_RI/n1 ), .Q(\UART_RXFF/iWRAddr[1] ));
notech_reg \UART_RXFF/iWRAddr_reg[2] (.CP(n_8346), .D(\UART_RXFF/n2404 )
notech_reg \UART_RXFF/iWRAddr_reg[2] (.CP(n_8340), .D(\UART_RXFF/n2404 )
, .CD(\UART_IS_SIN/n1 ), .Q(\UART_RXFF/iWRAddr[2] ));
notech_reg \UART_RXFF/iWRAddr_reg[3] (.CP(n_8346), .D(\UART_RXFF/n2403 )
notech_reg \UART_RXFF/iWRAddr_reg[3] (.CP(n_8340), .D(\UART_RXFF/n2403 )
, .CD(\UART_IS_DCD/n1 ), .Q(\UART_RXFF/iWRAddr[3] ));
notech_reg \UART_RXFF/iWRAddr_reg[4] (.CP(n_8346), .D(\UART_RXFF/n2402 )
notech_reg \UART_RXFF/iWRAddr_reg[4] (.CP(n_8340), .D(\UART_RXFF/n2402 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_RXFF/iWRAddr[4] ));
notech_reg \UART_RXFF/iWRAddr_reg[5] (.CP(n_8348), .D(\UART_RXFF/n2401 )
notech_reg \UART_RXFF/iWRAddr_reg[5] (.CP(n_8342), .D(\UART_RXFF/n2401 )
, .CD(\UART_IS_DSR/n1 ), .Q(\UART_RXFF/iWRAddr[5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][10] (.CP(n_8348), .D(\UART_RXFF/n2394
notech_reg \UART_RXFF/iFIFOMem_reg[63][10] (.CP(n_8342), .D(\UART_RXFF/n2394
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][9] (.CP(n_8348), .D(\UART_RXFF/n2393
notech_reg \UART_RXFF/iFIFOMem_reg[63][9] (.CP(n_8342), .D(\UART_RXFF/n2393
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][8] (.CP(n_8348), .D(\UART_RXFF/n2392
notech_reg \UART_RXFF/iFIFOMem_reg[63][8] (.CP(n_8342), .D(\UART_RXFF/n2392
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][7] (.CP(n_8348), .D(\UART_RXFF/n2391
notech_reg \UART_RXFF/iFIFOMem_reg[63][7] (.CP(n_8342), .D(\UART_RXFF/n2391
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][6] (.CP(n_8348), .D(\UART_RXFF/n2390
notech_reg \UART_RXFF/iFIFOMem_reg[63][6] (.CP(n_8342), .D(\UART_RXFF/n2390
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][5] (.CP(n_8348), .D(\UART_RXFF/n2389
notech_reg \UART_RXFF/iFIFOMem_reg[63][5] (.CP(n_8342), .D(\UART_RXFF/n2389
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][4] (.CP(n_8348), .D(\UART_RXFF/n2388
notech_reg \UART_RXFF/iFIFOMem_reg[63][4] (.CP(n_8342), .D(\UART_RXFF/n2388
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][3] (.CP(n_8348), .D(\UART_RXFF/n2387
notech_reg \UART_RXFF/iFIFOMem_reg[63][3] (.CP(n_8342), .D(\UART_RXFF/n2387
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][2] (.CP(n_8348), .D(\UART_RXFF/n2386
notech_reg \UART_RXFF/iFIFOMem_reg[63][2] (.CP(n_8342), .D(\UART_RXFF/n2386
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][1] (.CP(n_8348), .D(\UART_RXFF/n2385
notech_reg \UART_RXFF/iFIFOMem_reg[63][1] (.CP(n_8342), .D(\UART_RXFF/n2385
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[63][0] (.CP(n_8348), .D(\UART_RXFF/n2384
notech_reg \UART_RXFF/iFIFOMem_reg[63][0] (.CP(n_8342), .D(\UART_RXFF/n2384
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[63][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][10] (.CP(n_8343), .D(\UART_RXFF/n2383
notech_reg \UART_RXFF/iFIFOMem_reg[62][10] (.CP(n_8337), .D(\UART_RXFF/n2383
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][9] (.CP(n_8343), .D(\UART_RXFF/n2382
notech_reg \UART_RXFF/iFIFOMem_reg[62][9] (.CP(n_8337), .D(\UART_RXFF/n2382
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][8] (.CP(n_8343), .D(\UART_RXFF/n2381
notech_reg \UART_RXFF/iFIFOMem_reg[62][8] (.CP(n_8337), .D(\UART_RXFF/n2381
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][7] (.CP(n_8346), .D(\UART_RXFF/n2380
notech_reg \UART_RXFF/iFIFOMem_reg[62][7] (.CP(n_8340), .D(\UART_RXFF/n2380
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][6] (.CP(n_8346), .D(\UART_RXFF/n2379
notech_reg \UART_RXFF/iFIFOMem_reg[62][6] (.CP(n_8340), .D(\UART_RXFF/n2379
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][5] (.CP(n_8343), .D(\UART_RXFF/n2378
notech_reg \UART_RXFF/iFIFOMem_reg[62][5] (.CP(n_8337), .D(\UART_RXFF/n2378
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][4] (.CP(n_8343), .D(\UART_RXFF/n2377
notech_reg \UART_RXFF/iFIFOMem_reg[62][4] (.CP(n_8337), .D(\UART_RXFF/n2377
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][3] (.CP(n_8343), .D(\UART_RXFF/n2376
notech_reg \UART_RXFF/iFIFOMem_reg[62][3] (.CP(n_8337), .D(\UART_RXFF/n2376
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][2] (.CP(n_8343), .D(\UART_RXFF/n2375
notech_reg \UART_RXFF/iFIFOMem_reg[62][2] (.CP(n_8337), .D(\UART_RXFF/n2375
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][1] (.CP(n_8343), .D(\UART_RXFF/n2374
notech_reg \UART_RXFF/iFIFOMem_reg[62][1] (.CP(n_8337), .D(\UART_RXFF/n2374
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[62][0] (.CP(n_8343), .D(\UART_RXFF/n2373
notech_reg \UART_RXFF/iFIFOMem_reg[62][0] (.CP(n_8337), .D(\UART_RXFF/n2373
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[62][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][10] (.CP(n_8346), .D(\UART_RXFF/n2372
notech_reg \UART_RXFF/iFIFOMem_reg[61][10] (.CP(n_8340), .D(\UART_RXFF/n2372
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][9] (.CP(n_8346), .D(\UART_RXFF/n2371
notech_reg \UART_RXFF/iFIFOMem_reg[61][9] (.CP(n_8340), .D(\UART_RXFF/n2371
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][8] (.CP(n_8346), .D(\UART_RXFF/n2370
notech_reg \UART_RXFF/iFIFOMem_reg[61][8] (.CP(n_8340), .D(\UART_RXFF/n2370
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][7] (.CP(n_8346), .D(\UART_RXFF/n2369
notech_reg \UART_RXFF/iFIFOMem_reg[61][7] (.CP(n_8340), .D(\UART_RXFF/n2369
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][6] (.CP(n_8346), .D(\UART_RXFF/n2368
notech_reg \UART_RXFF/iFIFOMem_reg[61][6] (.CP(n_8340), .D(\UART_RXFF/n2368
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][5] (.CP(n_8346), .D(\UART_RXFF/n2367
notech_reg \UART_RXFF/iFIFOMem_reg[61][5] (.CP(n_8340), .D(\UART_RXFF/n2367
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][4] (.CP(n_8346), .D(\UART_RXFF/n2366
notech_reg \UART_RXFF/iFIFOMem_reg[61][4] (.CP(n_8340), .D(\UART_RXFF/n2366
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][3] (.CP(n_8346), .D(\UART_RXFF/n2365
notech_reg \UART_RXFF/iFIFOMem_reg[61][3] (.CP(n_8340), .D(\UART_RXFF/n2365
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][2] (.CP(n_8346), .D(\UART_RXFF/n2364
notech_reg \UART_RXFF/iFIFOMem_reg[61][2] (.CP(n_8340), .D(\UART_RXFF/n2364
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][1] (.CP(n_8346), .D(\UART_RXFF/n2363
notech_reg \UART_RXFF/iFIFOMem_reg[61][1] (.CP(n_8340), .D(\UART_RXFF/n2363
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[61][0] (.CP(n_8346), .D(\UART_RXFF/n2362
notech_reg \UART_RXFF/iFIFOMem_reg[61][0] (.CP(n_8340), .D(\UART_RXFF/n2362
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[61][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][10] (.CP(n_8346), .D(\UART_RXFF/n2361
notech_reg \UART_RXFF/iFIFOMem_reg[60][10] (.CP(n_8340), .D(\UART_RXFF/n2361
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][9] (.CP(n_8336), .D(\UART_RXFF/n2360
notech_reg \UART_RXFF/iFIFOMem_reg[60][9] (.CP(n_8330), .D(\UART_RXFF/n2360
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][8] (.CP(n_8329), .D(\UART_RXFF/n2359
notech_reg \UART_RXFF/iFIFOMem_reg[60][8] (.CP(n_8323), .D(\UART_RXFF/n2359
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][7] (.CP(n_8329), .D(\UART_RXFF/n2358
notech_reg \UART_RXFF/iFIFOMem_reg[60][7] (.CP(n_8323), .D(\UART_RXFF/n2358
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][6] (.CP(n_8329), .D(\UART_RXFF/n2357
notech_reg \UART_RXFF/iFIFOMem_reg[60][6] (.CP(n_8323), .D(\UART_RXFF/n2357
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][5] (.CP(n_8329), .D(\UART_RXFF/n2356
notech_reg \UART_RXFF/iFIFOMem_reg[60][5] (.CP(n_8323), .D(\UART_RXFF/n2356
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][4] (.CP(n_8329), .D(\UART_RXFF/n2355
notech_reg \UART_RXFF/iFIFOMem_reg[60][4] (.CP(n_8323), .D(\UART_RXFF/n2355
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][3] (.CP(n_8329), .D(\UART_RXFF/n2354
notech_reg \UART_RXFF/iFIFOMem_reg[60][3] (.CP(n_8323), .D(\UART_RXFF/n2354
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][2] (.CP(n_8326), .D(\UART_RXFF/n2353
notech_reg \UART_RXFF/iFIFOMem_reg[60][2] (.CP(n_8320), .D(\UART_RXFF/n2353
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][1] (.CP(n_8326), .D(\UART_RXFF/n2352
notech_reg \UART_RXFF/iFIFOMem_reg[60][1] (.CP(n_8320), .D(\UART_RXFF/n2352
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[60][0] (.CP(n_8326), .D(\UART_RXFF/n2351
notech_reg \UART_RXFF/iFIFOMem_reg[60][0] (.CP(n_8320), .D(\UART_RXFF/n2351
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[60][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][10] (.CP(n_8326), .D(\UART_RXFF/n2350
notech_reg \UART_RXFF/iFIFOMem_reg[59][10] (.CP(n_8320), .D(\UART_RXFF/n2350
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][9] (.CP(n_8326), .D(\UART_RXFF/n2349
notech_reg \UART_RXFF/iFIFOMem_reg[59][9] (.CP(n_8320), .D(\UART_RXFF/n2349
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][8] (.CP(n_8329), .D(\UART_RXFF/n2348
notech_reg \UART_RXFF/iFIFOMem_reg[59][8] (.CP(n_8323), .D(\UART_RXFF/n2348
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][7] (.CP(n_8329), .D(\UART_RXFF/n2347
notech_reg \UART_RXFF/iFIFOMem_reg[59][7] (.CP(n_8323), .D(\UART_RXFF/n2347
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][6] (.CP(n_8329), .D(\UART_RXFF/n2346
notech_reg \UART_RXFF/iFIFOMem_reg[59][6] (.CP(n_8323), .D(\UART_RXFF/n2346
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][5] (.CP(n_8329), .D(\UART_RXFF/n2345
notech_reg \UART_RXFF/iFIFOMem_reg[59][5] (.CP(n_8323), .D(\UART_RXFF/n2345
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][4] (.CP(n_8329), .D(\UART_RXFF/n2344
notech_reg \UART_RXFF/iFIFOMem_reg[59][4] (.CP(n_8323), .D(\UART_RXFF/n2344
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][3] (.CP(n_8329), .D(\UART_RXFF/n2343
notech_reg \UART_RXFF/iFIFOMem_reg[59][3] (.CP(n_8323), .D(\UART_RXFF/n2343
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][2] (.CP(n_8329), .D(\UART_RXFF/n2342
notech_reg \UART_RXFF/iFIFOMem_reg[59][2] (.CP(n_8323), .D(\UART_RXFF/n2342
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][1] (.CP(n_8329), .D(\UART_RXFF/n2341
notech_reg \UART_RXFF/iFIFOMem_reg[59][1] (.CP(n_8323), .D(\UART_RXFF/n2341
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[59][0] (.CP(n_8329), .D(\UART_RXFF/n2340
notech_reg \UART_RXFF/iFIFOMem_reg[59][0] (.CP(n_8323), .D(\UART_RXFF/n2340
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[59][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][10] (.CP(n_8329), .D(\UART_RXFF/n2339
notech_reg \UART_RXFF/iFIFOMem_reg[58][10] (.CP(n_8323), .D(\UART_RXFF/n2339
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][9] (.CP(n_8329), .D(\UART_RXFF/n2338
notech_reg \UART_RXFF/iFIFOMem_reg[58][9] (.CP(n_8323), .D(\UART_RXFF/n2338
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][8] (.CP(n_8329), .D(\UART_RXFF/n2337
notech_reg \UART_RXFF/iFIFOMem_reg[58][8] (.CP(n_8323), .D(\UART_RXFF/n2337
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][7] (.CP(n_8324), .D(\UART_RXFF/n2336
notech_reg \UART_RXFF/iFIFOMem_reg[58][7] (.CP(n_8318), .D(\UART_RXFF/n2336
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][6] (.CP(n_8324), .D(\UART_RXFF/n2335
notech_reg \UART_RXFF/iFIFOMem_reg[58][6] (.CP(n_8318), .D(\UART_RXFF/n2335
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][5] (.CP(n_8326), .D(\UART_RXFF/n2334
notech_reg \UART_RXFF/iFIFOMem_reg[58][5] (.CP(n_8320), .D(\UART_RXFF/n2334
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][4] (.CP(n_8326), .D(\UART_RXFF/n2333
notech_reg \UART_RXFF/iFIFOMem_reg[58][4] (.CP(n_8320), .D(\UART_RXFF/n2333
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][3] (.CP(n_8326), .D(\UART_RXFF/n2332
notech_reg \UART_RXFF/iFIFOMem_reg[58][3] (.CP(n_8320), .D(\UART_RXFF/n2332
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][2] (.CP(n_8324), .D(\UART_RXFF/n2331
notech_reg \UART_RXFF/iFIFOMem_reg[58][2] (.CP(n_8318), .D(\UART_RXFF/n2331
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][1] (.CP(n_8324), .D(\UART_RXFF/n2330
notech_reg \UART_RXFF/iFIFOMem_reg[58][1] (.CP(n_8318), .D(\UART_RXFF/n2330
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[58][0] (.CP(n_8324), .D(\UART_RXFF/n2329
notech_reg \UART_RXFF/iFIFOMem_reg[58][0] (.CP(n_8318), .D(\UART_RXFF/n2329
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[58][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][10] (.CP(n_8324), .D(\UART_RXFF/n2328
notech_reg \UART_RXFF/iFIFOMem_reg[57][10] (.CP(n_8318), .D(\UART_RXFF/n2328
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][9] (.CP(n_8324), .D(\UART_RXFF/n2327
notech_reg \UART_RXFF/iFIFOMem_reg[57][9] (.CP(n_8318), .D(\UART_RXFF/n2327
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][8] (.CP(n_8324), .D(\UART_RXFF/n2326
notech_reg \UART_RXFF/iFIFOMem_reg[57][8] (.CP(n_8318), .D(\UART_RXFF/n2326
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][7] (.CP(n_8326), .D(\UART_RXFF/n2325
notech_reg \UART_RXFF/iFIFOMem_reg[57][7] (.CP(n_8320), .D(\UART_RXFF/n2325
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][6] (.CP(n_8326), .D(\UART_RXFF/n2324
notech_reg \UART_RXFF/iFIFOMem_reg[57][6] (.CP(n_8320), .D(\UART_RXFF/n2324
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][5] (.CP(n_8326), .D(\UART_RXFF/n2323
notech_reg \UART_RXFF/iFIFOMem_reg[57][5] (.CP(n_8320), .D(\UART_RXFF/n2323
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][4] (.CP(n_8326), .D(\UART_RXFF/n2322
notech_reg \UART_RXFF/iFIFOMem_reg[57][4] (.CP(n_8320), .D(\UART_RXFF/n2322
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][3] (.CP(n_8326), .D(\UART_RXFF/n2321
notech_reg \UART_RXFF/iFIFOMem_reg[57][3] (.CP(n_8320), .D(\UART_RXFF/n2321
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][2] (.CP(n_8326), .D(\UART_RXFF/n2320
notech_reg \UART_RXFF/iFIFOMem_reg[57][2] (.CP(n_8320), .D(\UART_RXFF/n2320
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][1] (.CP(n_8326), .D(\UART_RXFF/n2319
notech_reg \UART_RXFF/iFIFOMem_reg[57][1] (.CP(n_8320), .D(\UART_RXFF/n2319
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[57][0] (.CP(n_8326), .D(\UART_RXFF/n2318
notech_reg \UART_RXFF/iFIFOMem_reg[57][0] (.CP(n_8320), .D(\UART_RXFF/n2318
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[57][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][10] (.CP(n_8326), .D(\UART_RXFF/n2317
notech_reg \UART_RXFF/iFIFOMem_reg[56][10] (.CP(n_8320), .D(\UART_RXFF/n2317
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][9] (.CP(n_8326), .D(\UART_RXFF/n2316
notech_reg \UART_RXFF/iFIFOMem_reg[56][9] (.CP(n_8320), .D(\UART_RXFF/n2316
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][8] (.CP(n_8326), .D(\UART_RXFF/n2315
notech_reg \UART_RXFF/iFIFOMem_reg[56][8] (.CP(n_8320), .D(\UART_RXFF/n2315
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][7] (.CP(n_8326), .D(\UART_RXFF/n2314
notech_reg \UART_RXFF/iFIFOMem_reg[56][7] (.CP(n_8320), .D(\UART_RXFF/n2314
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][6] (.CP(n_8334), .D(\UART_RXFF/n2313
notech_reg \UART_RXFF/iFIFOMem_reg[56][6] (.CP(n_8328), .D(\UART_RXFF/n2313
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][5] (.CP(n_8334), .D(\UART_RXFF/n2312
notech_reg \UART_RXFF/iFIFOMem_reg[56][5] (.CP(n_8328), .D(\UART_RXFF/n2312
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][4] (.CP(n_8334), .D(\UART_RXFF/n2311
notech_reg \UART_RXFF/iFIFOMem_reg[56][4] (.CP(n_8328), .D(\UART_RXFF/n2311
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][3] (.CP(n_8334), .D(\UART_RXFF/n2310
notech_reg \UART_RXFF/iFIFOMem_reg[56][3] (.CP(n_8328), .D(\UART_RXFF/n2310
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][2] (.CP(n_8334), .D(\UART_RXFF/n2309
notech_reg \UART_RXFF/iFIFOMem_reg[56][2] (.CP(n_8328), .D(\UART_RXFF/n2309
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][1] (.CP(n_8334), .D(\UART_RXFF/n2308
notech_reg \UART_RXFF/iFIFOMem_reg[56][1] (.CP(n_8328), .D(\UART_RXFF/n2308
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[56][0] (.CP(n_8334), .D(\UART_RXFF/n2307
notech_reg \UART_RXFF/iFIFOMem_reg[56][0] (.CP(n_8328), .D(\UART_RXFF/n2307
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[56][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][10] (.CP(n_8334), .D(\UART_RXFF/n2306
notech_reg \UART_RXFF/iFIFOMem_reg[55][10] (.CP(n_8328), .D(\UART_RXFF/n2306
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][9] (.CP(n_8334), .D(\UART_RXFF/n2305
notech_reg \UART_RXFF/iFIFOMem_reg[55][9] (.CP(n_8328), .D(\UART_RXFF/n2305
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][8] (.CP(n_8334), .D(\UART_RXFF/n2304
notech_reg \UART_RXFF/iFIFOMem_reg[55][8] (.CP(n_8328), .D(\UART_RXFF/n2304
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][7] (.CP(n_8334), .D(\UART_RXFF/n2303
notech_reg \UART_RXFF/iFIFOMem_reg[55][7] (.CP(n_8328), .D(\UART_RXFF/n2303
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][6] (.CP(n_8334), .D(\UART_RXFF/n2302
notech_reg \UART_RXFF/iFIFOMem_reg[55][6] (.CP(n_8328), .D(\UART_RXFF/n2302
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][5] (.CP(n_8336), .D(\UART_RXFF/n2301
notech_reg \UART_RXFF/iFIFOMem_reg[55][5] (.CP(n_8330), .D(\UART_RXFF/n2301
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][4] (.CP(n_8334), .D(\UART_RXFF/n2300
notech_reg \UART_RXFF/iFIFOMem_reg[55][4] (.CP(n_8328), .D(\UART_RXFF/n2300
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][3] (.CP(n_8336), .D(\UART_RXFF/n2299
notech_reg \UART_RXFF/iFIFOMem_reg[55][3] (.CP(n_8330), .D(\UART_RXFF/n2299
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][2] (.CP(n_8336), .D(\UART_RXFF/n2298
notech_reg \UART_RXFF/iFIFOMem_reg[55][2] (.CP(n_8330), .D(\UART_RXFF/n2298
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][1] (.CP(n_8336), .D(\UART_RXFF/n2297
notech_reg \UART_RXFF/iFIFOMem_reg[55][1] (.CP(n_8330), .D(\UART_RXFF/n2297
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[55][0] (.CP(n_8334), .D(\UART_RXFF/n2296
notech_reg \UART_RXFF/iFIFOMem_reg[55][0] (.CP(n_8328), .D(\UART_RXFF/n2296
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[55][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][10] (.CP(n_8334), .D(\UART_RXFF/n2295
notech_reg \UART_RXFF/iFIFOMem_reg[54][10] (.CP(n_8328), .D(\UART_RXFF/n2295
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][9] (.CP(n_8334), .D(\UART_RXFF/n2294
notech_reg \UART_RXFF/iFIFOMem_reg[54][9] (.CP(n_8328), .D(\UART_RXFF/n2294
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][8] (.CP(n_8334), .D(\UART_RXFF/n2293
notech_reg \UART_RXFF/iFIFOMem_reg[54][8] (.CP(n_8328), .D(\UART_RXFF/n2293
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][7] (.CP(n_8334), .D(\UART_RXFF/n2292
notech_reg \UART_RXFF/iFIFOMem_reg[54][7] (.CP(n_8328), .D(\UART_RXFF/n2292
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][6] (.CP(n_8334), .D(\UART_RXFF/n2291
notech_reg \UART_RXFF/iFIFOMem_reg[54][6] (.CP(n_8328), .D(\UART_RXFF/n2291
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][5] (.CP(n_8331), .D(\UART_RXFF/n2290
notech_reg \UART_RXFF/iFIFOMem_reg[54][5] (.CP(n_8325), .D(\UART_RXFF/n2290
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][4] (.CP(n_8331), .D(\UART_RXFF/n2289
notech_reg \UART_RXFF/iFIFOMem_reg[54][4] (.CP(n_8325), .D(\UART_RXFF/n2289
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][3] (.CP(n_8331), .D(\UART_RXFF/n2288
notech_reg \UART_RXFF/iFIFOMem_reg[54][3] (.CP(n_8325), .D(\UART_RXFF/n2288
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][2] (.CP(n_8331), .D(\UART_RXFF/n2287
notech_reg \UART_RXFF/iFIFOMem_reg[54][2] (.CP(n_8325), .D(\UART_RXFF/n2287
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][1] (.CP(n_8331), .D(\UART_RXFF/n2286
notech_reg \UART_RXFF/iFIFOMem_reg[54][1] (.CP(n_8325), .D(\UART_RXFF/n2286
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[54][0] (.CP(n_8331), .D(\UART_RXFF/n2285
notech_reg \UART_RXFF/iFIFOMem_reg[54][0] (.CP(n_8325), .D(\UART_RXFF/n2285
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[54][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][10] (.CP(n_8329), .D(\UART_RXFF/n2284
notech_reg \UART_RXFF/iFIFOMem_reg[53][10] (.CP(n_8323), .D(\UART_RXFF/n2284
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][9] (.CP(n_8329), .D(\UART_RXFF/n2283
notech_reg \UART_RXFF/iFIFOMem_reg[53][9] (.CP(n_8323), .D(\UART_RXFF/n2283
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][8] (.CP(n_8331), .D(\UART_RXFF/n2282
notech_reg \UART_RXFF/iFIFOMem_reg[53][8] (.CP(n_8325), .D(\UART_RXFF/n2282
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][7] (.CP(n_8331), .D(\UART_RXFF/n2281
notech_reg \UART_RXFF/iFIFOMem_reg[53][7] (.CP(n_8325), .D(\UART_RXFF/n2281
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][6] (.CP(n_8331), .D(\UART_RXFF/n2280
notech_reg \UART_RXFF/iFIFOMem_reg[53][6] (.CP(n_8325), .D(\UART_RXFF/n2280
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][5] (.CP(n_8331), .D(\UART_RXFF/n2279
notech_reg \UART_RXFF/iFIFOMem_reg[53][5] (.CP(n_8325), .D(\UART_RXFF/n2279
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][4] (.CP(n_8331), .D(\UART_RXFF/n2278
notech_reg \UART_RXFF/iFIFOMem_reg[53][4] (.CP(n_8325), .D(\UART_RXFF/n2278
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][3] (.CP(n_8331), .D(\UART_RXFF/n2277
notech_reg \UART_RXFF/iFIFOMem_reg[53][3] (.CP(n_8325), .D(\UART_RXFF/n2277
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][2] (.CP(n_8331), .D(\UART_RXFF/n2276
notech_reg \UART_RXFF/iFIFOMem_reg[53][2] (.CP(n_8325), .D(\UART_RXFF/n2276
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][1] (.CP(n_8334), .D(\UART_RXFF/n2275
notech_reg \UART_RXFF/iFIFOMem_reg[53][1] (.CP(n_8328), .D(\UART_RXFF/n2275
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[53][0] (.CP(n_8331), .D(\UART_RXFF/n2274
notech_reg \UART_RXFF/iFIFOMem_reg[53][0] (.CP(n_8325), .D(\UART_RXFF/n2274
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[53][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][10] (.CP(n_8331), .D(\UART_RXFF/n2273
notech_reg \UART_RXFF/iFIFOMem_reg[52][10] (.CP(n_8325), .D(\UART_RXFF/n2273
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][9] (.CP(n_8331), .D(\UART_RXFF/n2272
notech_reg \UART_RXFF/iFIFOMem_reg[52][9] (.CP(n_8325), .D(\UART_RXFF/n2272
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][8] (.CP(n_8331), .D(\UART_RXFF/n2271
notech_reg \UART_RXFF/iFIFOMem_reg[52][8] (.CP(n_8325), .D(\UART_RXFF/n2271
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][7] (.CP(n_8331), .D(\UART_RXFF/n2270
notech_reg \UART_RXFF/iFIFOMem_reg[52][7] (.CP(n_8325), .D(\UART_RXFF/n2270
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][6] (.CP(n_8331), .D(\UART_RXFF/n2269
notech_reg \UART_RXFF/iFIFOMem_reg[52][6] (.CP(n_8325), .D(\UART_RXFF/n2269
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][5] (.CP(n_8331), .D(\UART_RXFF/n2268
notech_reg \UART_RXFF/iFIFOMem_reg[52][5] (.CP(n_8325), .D(\UART_RXFF/n2268
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][4] (.CP(n_8348), .D(\UART_RXFF/n2267
notech_reg \UART_RXFF/iFIFOMem_reg[52][4] (.CP(n_8342), .D(\UART_RXFF/n2267
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][3] (.CP(n_8367), .D(\UART_RXFF/n2266
notech_reg \UART_RXFF/iFIFOMem_reg[52][3] (.CP(n_8361), .D(\UART_RXFF/n2266
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][2] (.CP(n_8367), .D(\UART_RXFF/n2265
notech_reg \UART_RXFF/iFIFOMem_reg[52][2] (.CP(n_8361), .D(\UART_RXFF/n2265
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][1] (.CP(n_8367), .D(\UART_RXFF/n2264
notech_reg \UART_RXFF/iFIFOMem_reg[52][1] (.CP(n_8361), .D(\UART_RXFF/n2264
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[52][0] (.CP(n_8367), .D(\UART_RXFF/n2263
notech_reg \UART_RXFF/iFIFOMem_reg[52][0] (.CP(n_8361), .D(\UART_RXFF/n2263
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[52][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][10] (.CP(n_8367), .D(\UART_RXFF/n2262
notech_reg \UART_RXFF/iFIFOMem_reg[51][10] (.CP(n_8361), .D(\UART_RXFF/n2262
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][9] (.CP(n_8364), .D(\UART_RXFF/n2261
notech_reg \UART_RXFF/iFIFOMem_reg[51][9] (.CP(n_8358), .D(\UART_RXFF/n2261
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][8] (.CP(n_8364), .D(\UART_RXFF/n2260
notech_reg \UART_RXFF/iFIFOMem_reg[51][8] (.CP(n_8358), .D(\UART_RXFF/n2260
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][7] (.CP(n_8364), .D(\UART_RXFF/n2259
notech_reg \UART_RXFF/iFIFOMem_reg[51][7] (.CP(n_8358), .D(\UART_RXFF/n2259
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][6] (.CP(n_8364), .D(\UART_RXFF/n2258
notech_reg \UART_RXFF/iFIFOMem_reg[51][6] (.CP(n_8358), .D(\UART_RXFF/n2258
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][5] (.CP(n_8364), .D(\UART_RXFF/n2257
notech_reg \UART_RXFF/iFIFOMem_reg[51][5] (.CP(n_8358), .D(\UART_RXFF/n2257
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][4] (.CP(n_8364), .D(\UART_RXFF/n2256
notech_reg \UART_RXFF/iFIFOMem_reg[51][4] (.CP(n_8358), .D(\UART_RXFF/n2256
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][3] (.CP(n_8367), .D(\UART_RXFF/n2255
notech_reg \UART_RXFF/iFIFOMem_reg[51][3] (.CP(n_8361), .D(\UART_RXFF/n2255
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][2] (.CP(n_8367), .D(\UART_RXFF/n2254
notech_reg \UART_RXFF/iFIFOMem_reg[51][2] (.CP(n_8361), .D(\UART_RXFF/n2254
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][1] (.CP(n_8367), .D(\UART_RXFF/n2253
notech_reg \UART_RXFF/iFIFOMem_reg[51][1] (.CP(n_8361), .D(\UART_RXFF/n2253
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[51][0] (.CP(n_8367), .D(\UART_RXFF/n2252
notech_reg \UART_RXFF/iFIFOMem_reg[51][0] (.CP(n_8361), .D(\UART_RXFF/n2252
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[51][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][10] (.CP(n_8367), .D(\UART_RXFF/n2251
notech_reg \UART_RXFF/iFIFOMem_reg[50][10] (.CP(n_8361), .D(\UART_RXFF/n2251
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][9] (.CP(n_8367), .D(\UART_RXFF/n2250
notech_reg \UART_RXFF/iFIFOMem_reg[50][9] (.CP(n_8361), .D(\UART_RXFF/n2250
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][8] (.CP(n_8367), .D(\UART_RXFF/n2249
notech_reg \UART_RXFF/iFIFOMem_reg[50][8] (.CP(n_8361), .D(\UART_RXFF/n2249
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][7] (.CP(n_8367), .D(\UART_RXFF/n2248
notech_reg \UART_RXFF/iFIFOMem_reg[50][7] (.CP(n_8361), .D(\UART_RXFF/n2248
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][6] (.CP(n_8367), .D(\UART_RXFF/n2247
notech_reg \UART_RXFF/iFIFOMem_reg[50][6] (.CP(n_8361), .D(\UART_RXFF/n2247
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][5] (.CP(n_8367), .D(\UART_RXFF/n2246
notech_reg \UART_RXFF/iFIFOMem_reg[50][5] (.CP(n_8361), .D(\UART_RXFF/n2246
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][4] (.CP(n_8367), .D(\UART_RXFF/n2245
notech_reg \UART_RXFF/iFIFOMem_reg[50][4] (.CP(n_8361), .D(\UART_RXFF/n2245
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][3] (.CP(n_8367), .D(\UART_RXFF/n2244
notech_reg \UART_RXFF/iFIFOMem_reg[50][3] (.CP(n_8361), .D(\UART_RXFF/n2244
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][2] (.CP(n_8362), .D(\UART_RXFF/n2243
notech_reg \UART_RXFF/iFIFOMem_reg[50][2] (.CP(n_8356), .D(\UART_RXFF/n2243
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][1] (.CP(n_8362), .D(\UART_RXFF/n2242
notech_reg \UART_RXFF/iFIFOMem_reg[50][1] (.CP(n_8356), .D(\UART_RXFF/n2242
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[50][0] (.CP(n_8362), .D(\UART_RXFF/n2241
notech_reg \UART_RXFF/iFIFOMem_reg[50][0] (.CP(n_8356), .D(\UART_RXFF/n2241
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[50][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][10] (.CP(n_8364), .D(\UART_RXFF/n2240
notech_reg \UART_RXFF/iFIFOMem_reg[49][10] (.CP(n_8358), .D(\UART_RXFF/n2240
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][9] (.CP(n_8364), .D(\UART_RXFF/n2239
notech_reg \UART_RXFF/iFIFOMem_reg[49][9] (.CP(n_8358), .D(\UART_RXFF/n2239
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][8] (.CP(n_8362), .D(\UART_RXFF/n2238
notech_reg \UART_RXFF/iFIFOMem_reg[49][8] (.CP(n_8356), .D(\UART_RXFF/n2238
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][7] (.CP(n_8362), .D(\UART_RXFF/n2237
notech_reg \UART_RXFF/iFIFOMem_reg[49][7] (.CP(n_8356), .D(\UART_RXFF/n2237
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][6] (.CP(n_8362), .D(\UART_RXFF/n2236
notech_reg \UART_RXFF/iFIFOMem_reg[49][6] (.CP(n_8356), .D(\UART_RXFF/n2236
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][5] (.CP(n_8362), .D(\UART_RXFF/n2235
notech_reg \UART_RXFF/iFIFOMem_reg[49][5] (.CP(n_8356), .D(\UART_RXFF/n2235
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][4] (.CP(n_8362), .D(\UART_RXFF/n2234
notech_reg \UART_RXFF/iFIFOMem_reg[49][4] (.CP(n_8356), .D(\UART_RXFF/n2234
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][3] (.CP(n_8362), .D(\UART_RXFF/n2233
notech_reg \UART_RXFF/iFIFOMem_reg[49][3] (.CP(n_8356), .D(\UART_RXFF/n2233
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][2] (.CP(n_8364), .D(\UART_RXFF/n2232
notech_reg \UART_RXFF/iFIFOMem_reg[49][2] (.CP(n_8358), .D(\UART_RXFF/n2232
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][1] (.CP(n_8364), .D(\UART_RXFF/n2231
notech_reg \UART_RXFF/iFIFOMem_reg[49][1] (.CP(n_8358), .D(\UART_RXFF/n2231
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[49][0] (.CP(n_8364), .D(\UART_RXFF/n2230
notech_reg \UART_RXFF/iFIFOMem_reg[49][0] (.CP(n_8358), .D(\UART_RXFF/n2230
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[49][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][10] (.CP(n_8364), .D(\UART_RXFF/n2229
notech_reg \UART_RXFF/iFIFOMem_reg[48][10] (.CP(n_8358), .D(\UART_RXFF/n2229
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][9] (.CP(n_8364), .D(\UART_RXFF/n2228
notech_reg \UART_RXFF/iFIFOMem_reg[48][9] (.CP(n_8358), .D(\UART_RXFF/n2228
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][8] (.CP(n_8364), .D(\UART_RXFF/n2227
notech_reg \UART_RXFF/iFIFOMem_reg[48][8] (.CP(n_8358), .D(\UART_RXFF/n2227
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][7] (.CP(n_8364), .D(\UART_RXFF/n2226
notech_reg \UART_RXFF/iFIFOMem_reg[48][7] (.CP(n_8358), .D(\UART_RXFF/n2226
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][6] (.CP(n_8364), .D(\UART_RXFF/n2225
notech_reg \UART_RXFF/iFIFOMem_reg[48][6] (.CP(n_8358), .D(\UART_RXFF/n2225
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][5] (.CP(n_8364), .D(\UART_RXFF/n2224
notech_reg \UART_RXFF/iFIFOMem_reg[48][5] (.CP(n_8358), .D(\UART_RXFF/n2224
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][4] (.CP(n_8364), .D(\UART_RXFF/n2223
notech_reg \UART_RXFF/iFIFOMem_reg[48][4] (.CP(n_8358), .D(\UART_RXFF/n2223
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][3] (.CP(n_8364), .D(\UART_RXFF/n2222
notech_reg \UART_RXFF/iFIFOMem_reg[48][3] (.CP(n_8358), .D(\UART_RXFF/n2222
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][2] (.CP(n_8364), .D(\UART_RXFF/n2221
notech_reg \UART_RXFF/iFIFOMem_reg[48][2] (.CP(n_8358), .D(\UART_RXFF/n2221
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][1] (.CP(n_8373), .D(\UART_RXFF/n2220
notech_reg \UART_RXFF/iFIFOMem_reg[48][1] (.CP(n_8367), .D(\UART_RXFF/n2220
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[48][0] (.CP(n_8373), .D(\UART_RXFF/n2219
notech_reg \UART_RXFF/iFIFOMem_reg[48][0] (.CP(n_8367), .D(\UART_RXFF/n2219
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[48][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][10] (.CP(n_8373), .D(\UART_RXFF/n2218
notech_reg \UART_RXFF/iFIFOMem_reg[47][10] (.CP(n_8367), .D(\UART_RXFF/n2218
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][9] (.CP(n_8373), .D(\UART_RXFF/n2217
notech_reg \UART_RXFF/iFIFOMem_reg[47][9] (.CP(n_8367), .D(\UART_RXFF/n2217
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][8] (.CP(n_8373), .D(\UART_RXFF/n2216
notech_reg \UART_RXFF/iFIFOMem_reg[47][8] (.CP(n_8367), .D(\UART_RXFF/n2216
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][7] (.CP(n_8373), .D(\UART_RXFF/n2215
notech_reg \UART_RXFF/iFIFOMem_reg[47][7] (.CP(n_8367), .D(\UART_RXFF/n2215
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][6] (.CP(n_8373), .D(\UART_RXFF/n2214
notech_reg \UART_RXFF/iFIFOMem_reg[47][6] (.CP(n_8367), .D(\UART_RXFF/n2214
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][5] (.CP(n_8373), .D(\UART_RXFF/n2213
notech_reg \UART_RXFF/iFIFOMem_reg[47][5] (.CP(n_8367), .D(\UART_RXFF/n2213
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][4] (.CP(n_8373), .D(\UART_RXFF/n2212
notech_reg \UART_RXFF/iFIFOMem_reg[47][4] (.CP(n_8367), .D(\UART_RXFF/n2212
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][3] (.CP(n_8373), .D(\UART_RXFF/n2211
notech_reg \UART_RXFF/iFIFOMem_reg[47][3] (.CP(n_8367), .D(\UART_RXFF/n2211
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][2] (.CP(n_8373), .D(\UART_RXFF/n2210
notech_reg \UART_RXFF/iFIFOMem_reg[47][2] (.CP(n_8367), .D(\UART_RXFF/n2210
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][1] (.CP(n_8373), .D(\UART_RXFF/n2209
notech_reg \UART_RXFF/iFIFOMem_reg[47][1] (.CP(n_8367), .D(\UART_RXFF/n2209
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[47][0] (.CP(n_8373), .D(\UART_RXFF/n2208
notech_reg \UART_RXFF/iFIFOMem_reg[47][0] (.CP(n_8367), .D(\UART_RXFF/n2208
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[47][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][10] (.CP(n_8373), .D(\UART_RXFF/n2207
notech_reg \UART_RXFF/iFIFOMem_reg[46][10] (.CP(n_8367), .D(\UART_RXFF/n2207
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][9] (.CP(n_8375), .D(\UART_RXFF/n2206
notech_reg \UART_RXFF/iFIFOMem_reg[46][9] (.CP(n_8369), .D(\UART_RXFF/n2206
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][8] (.CP(n_8375), .D(\UART_RXFF/n2205
notech_reg \UART_RXFF/iFIFOMem_reg[46][8] (.CP(n_8369), .D(\UART_RXFF/n2205
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][7] (.CP(n_8375), .D(\UART_RXFF/n2204
notech_reg \UART_RXFF/iFIFOMem_reg[46][7] (.CP(n_8369), .D(\UART_RXFF/n2204
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][6] (.CP(n_8373), .D(\UART_RXFF/n2203
notech_reg \UART_RXFF/iFIFOMem_reg[46][6] (.CP(n_8367), .D(\UART_RXFF/n2203
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][5] (.CP(n_8373), .D(\UART_RXFF/n2202
notech_reg \UART_RXFF/iFIFOMem_reg[46][5] (.CP(n_8367), .D(\UART_RXFF/n2202
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][4] (.CP(n_8373), .D(\UART_RXFF/n2201
notech_reg \UART_RXFF/iFIFOMem_reg[46][4] (.CP(n_8367), .D(\UART_RXFF/n2201
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][3] (.CP(n_8373), .D(\UART_RXFF/n2200
notech_reg \UART_RXFF/iFIFOMem_reg[46][3] (.CP(n_8367), .D(\UART_RXFF/n2200
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][2] (.CP(n_8373), .D(\UART_RXFF/n2199
notech_reg \UART_RXFF/iFIFOMem_reg[46][2] (.CP(n_8367), .D(\UART_RXFF/n2199
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][1] (.CP(n_8373), .D(\UART_RXFF/n2198
notech_reg \UART_RXFF/iFIFOMem_reg[46][1] (.CP(n_8367), .D(\UART_RXFF/n2198
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[46][0] (.CP(n_8369), .D(\UART_RXFF/n2197
notech_reg \UART_RXFF/iFIFOMem_reg[46][0] (.CP(n_8363), .D(\UART_RXFF/n2197
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[46][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][10] (.CP(n_8369), .D(\UART_RXFF/n2196
notech_reg \UART_RXFF/iFIFOMem_reg[45][10] (.CP(n_8363), .D(\UART_RXFF/n2196
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][9] (.CP(n_8369), .D(\UART_RXFF/n2195
notech_reg \UART_RXFF/iFIFOMem_reg[45][9] (.CP(n_8363), .D(\UART_RXFF/n2195
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][8] (.CP(n_8369), .D(\UART_RXFF/n2194
notech_reg \UART_RXFF/iFIFOMem_reg[45][8] (.CP(n_8363), .D(\UART_RXFF/n2194
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][7] (.CP(n_8369), .D(\UART_RXFF/n2193
notech_reg \UART_RXFF/iFIFOMem_reg[45][7] (.CP(n_8363), .D(\UART_RXFF/n2193
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][6] (.CP(n_8369), .D(\UART_RXFF/n2192
notech_reg \UART_RXFF/iFIFOMem_reg[45][6] (.CP(n_8363), .D(\UART_RXFF/n2192
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][5] (.CP(n_8367), .D(\UART_RXFF/n2191
notech_reg \UART_RXFF/iFIFOMem_reg[45][5] (.CP(n_8361), .D(\UART_RXFF/n2191
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][4] (.CP(n_8367), .D(\UART_RXFF/n2190
notech_reg \UART_RXFF/iFIFOMem_reg[45][4] (.CP(n_8361), .D(\UART_RXFF/n2190
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][3] (.CP(n_8367), .D(\UART_RXFF/n2189
notech_reg \UART_RXFF/iFIFOMem_reg[45][3] (.CP(n_8361), .D(\UART_RXFF/n2189
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][2] (.CP(n_8369), .D(\UART_RXFF/n2188
notech_reg \UART_RXFF/iFIFOMem_reg[45][2] (.CP(n_8363), .D(\UART_RXFF/n2188
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][1] (.CP(n_8369), .D(\UART_RXFF/n2187
notech_reg \UART_RXFF/iFIFOMem_reg[45][1] (.CP(n_8363), .D(\UART_RXFF/n2187
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[45][0] (.CP(n_8369), .D(\UART_RXFF/n2186
notech_reg \UART_RXFF/iFIFOMem_reg[45][0] (.CP(n_8363), .D(\UART_RXFF/n2186
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[45][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][10] (.CP(n_8369), .D(\UART_RXFF/n2185
notech_reg \UART_RXFF/iFIFOMem_reg[44][10] (.CP(n_8363), .D(\UART_RXFF/n2185
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][9] (.CP(n_8369), .D(\UART_RXFF/n2184
notech_reg \UART_RXFF/iFIFOMem_reg[44][9] (.CP(n_8363), .D(\UART_RXFF/n2184
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][8] (.CP(n_8369), .D(\UART_RXFF/n2183
notech_reg \UART_RXFF/iFIFOMem_reg[44][8] (.CP(n_8363), .D(\UART_RXFF/n2183
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][7] (.CP(n_8369), .D(\UART_RXFF/n2182
notech_reg \UART_RXFF/iFIFOMem_reg[44][7] (.CP(n_8363), .D(\UART_RXFF/n2182
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][6] (.CP(n_8369), .D(\UART_RXFF/n2181
notech_reg \UART_RXFF/iFIFOMem_reg[44][6] (.CP(n_8363), .D(\UART_RXFF/n2181
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][5] (.CP(n_8369), .D(\UART_RXFF/n2180
notech_reg \UART_RXFF/iFIFOMem_reg[44][5] (.CP(n_8363), .D(\UART_RXFF/n2180
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][4] (.CP(n_8369), .D(\UART_RXFF/n2179
notech_reg \UART_RXFF/iFIFOMem_reg[44][4] (.CP(n_8363), .D(\UART_RXFF/n2179
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][3] (.CP(n_8369), .D(\UART_RXFF/n2178
notech_reg \UART_RXFF/iFIFOMem_reg[44][3] (.CP(n_8363), .D(\UART_RXFF/n2178
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][2] (.CP(n_8369), .D(\UART_RXFF/n2177
notech_reg \UART_RXFF/iFIFOMem_reg[44][2] (.CP(n_8363), .D(\UART_RXFF/n2177
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][1] (.CP(n_8369), .D(\UART_RXFF/n2176
notech_reg \UART_RXFF/iFIFOMem_reg[44][1] (.CP(n_8363), .D(\UART_RXFF/n2176
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[44][0] (.CP(n_8369), .D(\UART_RXFF/n2175
notech_reg \UART_RXFF/iFIFOMem_reg[44][0] (.CP(n_8363), .D(\UART_RXFF/n2175
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[44][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][10] (.CP(n_8362), .D(\UART_RXFF/n2174
notech_reg \UART_RXFF/iFIFOMem_reg[43][10] (.CP(n_8356), .D(\UART_RXFF/n2174
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][9] (.CP(n_8353), .D(\UART_RXFF/n2173
notech_reg \UART_RXFF/iFIFOMem_reg[43][9] (.CP(n_8347), .D(\UART_RXFF/n2173
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][8] (.CP(n_8353), .D(\UART_RXFF/n2172
notech_reg \UART_RXFF/iFIFOMem_reg[43][8] (.CP(n_8347), .D(\UART_RXFF/n2172
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][7] (.CP(n_8353), .D(\UART_RXFF/n2171
notech_reg \UART_RXFF/iFIFOMem_reg[43][7] (.CP(n_8347), .D(\UART_RXFF/n2171
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][6] (.CP(n_8353), .D(\UART_RXFF/n2170
notech_reg \UART_RXFF/iFIFOMem_reg[43][6] (.CP(n_8347), .D(\UART_RXFF/n2170
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][5] (.CP(n_8353), .D(\UART_RXFF/n2169
notech_reg \UART_RXFF/iFIFOMem_reg[43][5] (.CP(n_8347), .D(\UART_RXFF/n2169
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][4] (.CP(n_8353), .D(\UART_RXFF/n2168
notech_reg \UART_RXFF/iFIFOMem_reg[43][4] (.CP(n_8347), .D(\UART_RXFF/n2168
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][3] (.CP(n_8353), .D(\UART_RXFF/n2167
notech_reg \UART_RXFF/iFIFOMem_reg[43][3] (.CP(n_8347), .D(\UART_RXFF/n2167
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][2] (.CP(n_8353), .D(\UART_RXFF/n2166
notech_reg \UART_RXFF/iFIFOMem_reg[43][2] (.CP(n_8347), .D(\UART_RXFF/n2166
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][1] (.CP(n_8353), .D(\UART_RXFF/n2165
notech_reg \UART_RXFF/iFIFOMem_reg[43][1] (.CP(n_8347), .D(\UART_RXFF/n2165
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[43][0] (.CP(n_8353), .D(\UART_RXFF/n2164
notech_reg \UART_RXFF/iFIFOMem_reg[43][0] (.CP(n_8347), .D(\UART_RXFF/n2164
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[43][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][10] (.CP(n_8353), .D(\UART_RXFF/n2163
notech_reg \UART_RXFF/iFIFOMem_reg[42][10] (.CP(n_8347), .D(\UART_RXFF/n2163
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][9] (.CP(n_8353), .D(\UART_RXFF/n2162
notech_reg \UART_RXFF/iFIFOMem_reg[42][9] (.CP(n_8347), .D(\UART_RXFF/n2162
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][8] (.CP(n_8357), .D(\UART_RXFF/n2161
notech_reg \UART_RXFF/iFIFOMem_reg[42][8] (.CP(n_8351), .D(\UART_RXFF/n2161
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][7] (.CP(n_8353), .D(\UART_RXFF/n2160
notech_reg \UART_RXFF/iFIFOMem_reg[42][7] (.CP(n_8347), .D(\UART_RXFF/n2160
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][6] (.CP(n_8357), .D(\UART_RXFF/n2159
notech_reg \UART_RXFF/iFIFOMem_reg[42][6] (.CP(n_8351), .D(\UART_RXFF/n2159
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][5] (.CP(n_8357), .D(\UART_RXFF/n2158
notech_reg \UART_RXFF/iFIFOMem_reg[42][5] (.CP(n_8351), .D(\UART_RXFF/n2158
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][4] (.CP(n_8357), .D(\UART_RXFF/n2157
notech_reg \UART_RXFF/iFIFOMem_reg[42][4] (.CP(n_8351), .D(\UART_RXFF/n2157
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][3] (.CP(n_8353), .D(\UART_RXFF/n2156
notech_reg \UART_RXFF/iFIFOMem_reg[42][3] (.CP(n_8347), .D(\UART_RXFF/n2156
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][2] (.CP(n_8353), .D(\UART_RXFF/n2155
notech_reg \UART_RXFF/iFIFOMem_reg[42][2] (.CP(n_8347), .D(\UART_RXFF/n2155
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][1] (.CP(n_8353), .D(\UART_RXFF/n2154
notech_reg \UART_RXFF/iFIFOMem_reg[42][1] (.CP(n_8347), .D(\UART_RXFF/n2154
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[42][0] (.CP(n_8353), .D(\UART_RXFF/n2153
notech_reg \UART_RXFF/iFIFOMem_reg[42][0] (.CP(n_8347), .D(\UART_RXFF/n2153
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[42][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][10] (.CP(n_8353), .D(\UART_RXFF/n2152
notech_reg \UART_RXFF/iFIFOMem_reg[41][10] (.CP(n_8347), .D(\UART_RXFF/n2152
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][9] (.CP(n_8353), .D(\UART_RXFF/n2151
notech_reg \UART_RXFF/iFIFOMem_reg[41][9] (.CP(n_8347), .D(\UART_RXFF/n2151
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][8] (.CP(n_8351), .D(\UART_RXFF/n2150
notech_reg \UART_RXFF/iFIFOMem_reg[41][8] (.CP(n_8345), .D(\UART_RXFF/n2150
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][7] (.CP(n_8351), .D(\UART_RXFF/n2149
notech_reg \UART_RXFF/iFIFOMem_reg[41][7] (.CP(n_8345), .D(\UART_RXFF/n2149
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][6] (.CP(n_8351), .D(\UART_RXFF/n2148
notech_reg \UART_RXFF/iFIFOMem_reg[41][6] (.CP(n_8345), .D(\UART_RXFF/n2148
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][5] (.CP(n_8351), .D(\UART_RXFF/n2147
notech_reg \UART_RXFF/iFIFOMem_reg[41][5] (.CP(n_8345), .D(\UART_RXFF/n2147
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][4] (.CP(n_8351), .D(\UART_RXFF/n2146
notech_reg \UART_RXFF/iFIFOMem_reg[41][4] (.CP(n_8345), .D(\UART_RXFF/n2146
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][3] (.CP(n_8351), .D(\UART_RXFF/n2145
notech_reg \UART_RXFF/iFIFOMem_reg[41][3] (.CP(n_8345), .D(\UART_RXFF/n2145
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][2] (.CP(n_8348), .D(\UART_RXFF/n2144
notech_reg \UART_RXFF/iFIFOMem_reg[41][2] (.CP(n_8342), .D(\UART_RXFF/n2144
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][1] (.CP(n_8348), .D(\UART_RXFF/n2143
notech_reg \UART_RXFF/iFIFOMem_reg[41][1] (.CP(n_8342), .D(\UART_RXFF/n2143
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[41][0] (.CP(n_8351), .D(\UART_RXFF/n2142
notech_reg \UART_RXFF/iFIFOMem_reg[41][0] (.CP(n_8345), .D(\UART_RXFF/n2142
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[41][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][10] (.CP(n_8351), .D(\UART_RXFF/n2141
notech_reg \UART_RXFF/iFIFOMem_reg[40][10] (.CP(n_8345), .D(\UART_RXFF/n2141
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][9] (.CP(n_8351), .D(\UART_RXFF/n2140
notech_reg \UART_RXFF/iFIFOMem_reg[40][9] (.CP(n_8345), .D(\UART_RXFF/n2140
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][8] (.CP(n_8351), .D(\UART_RXFF/n2139
notech_reg \UART_RXFF/iFIFOMem_reg[40][8] (.CP(n_8345), .D(\UART_RXFF/n2139
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][7] (.CP(n_8351), .D(\UART_RXFF/n2138
notech_reg \UART_RXFF/iFIFOMem_reg[40][7] (.CP(n_8345), .D(\UART_RXFF/n2138
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][6] (.CP(n_8351), .D(\UART_RXFF/n2137
notech_reg \UART_RXFF/iFIFOMem_reg[40][6] (.CP(n_8345), .D(\UART_RXFF/n2137
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][5] (.CP(n_8351), .D(\UART_RXFF/n2136
notech_reg \UART_RXFF/iFIFOMem_reg[40][5] (.CP(n_8345), .D(\UART_RXFF/n2136
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][4] (.CP(n_8353), .D(\UART_RXFF/n2135
notech_reg \UART_RXFF/iFIFOMem_reg[40][4] (.CP(n_8347), .D(\UART_RXFF/n2135
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][3] (.CP(n_8351), .D(\UART_RXFF/n2134
notech_reg \UART_RXFF/iFIFOMem_reg[40][3] (.CP(n_8345), .D(\UART_RXFF/n2134
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][2] (.CP(n_8351), .D(\UART_RXFF/n2133
notech_reg \UART_RXFF/iFIFOMem_reg[40][2] (.CP(n_8345), .D(\UART_RXFF/n2133
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][1] (.CP(n_8351), .D(\UART_RXFF/n2132
notech_reg \UART_RXFF/iFIFOMem_reg[40][1] (.CP(n_8345), .D(\UART_RXFF/n2132
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[40][0] (.CP(n_8351), .D(\UART_RXFF/n2131
notech_reg \UART_RXFF/iFIFOMem_reg[40][0] (.CP(n_8345), .D(\UART_RXFF/n2131
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[40][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][10] (.CP(n_8351), .D(\UART_RXFF/n2130
notech_reg \UART_RXFF/iFIFOMem_reg[39][10] (.CP(n_8345), .D(\UART_RXFF/n2130
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][9] (.CP(n_8351), .D(\UART_RXFF/n2129
notech_reg \UART_RXFF/iFIFOMem_reg[39][9] (.CP(n_8345), .D(\UART_RXFF/n2129
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][8] (.CP(n_8351), .D(\UART_RXFF/n2128
notech_reg \UART_RXFF/iFIFOMem_reg[39][8] (.CP(n_8345), .D(\UART_RXFF/n2128
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][7] (.CP(n_8359), .D(\UART_RXFF/n2127
notech_reg \UART_RXFF/iFIFOMem_reg[39][7] (.CP(n_8353), .D(\UART_RXFF/n2127
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][6] (.CP(n_8359), .D(\UART_RXFF/n2126
notech_reg \UART_RXFF/iFIFOMem_reg[39][6] (.CP(n_8353), .D(\UART_RXFF/n2126
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][5] (.CP(n_8359), .D(\UART_RXFF/n2125
notech_reg \UART_RXFF/iFIFOMem_reg[39][5] (.CP(n_8353), .D(\UART_RXFF/n2125
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][4] (.CP(n_8359), .D(\UART_RXFF/n2124
notech_reg \UART_RXFF/iFIFOMem_reg[39][4] (.CP(n_8353), .D(\UART_RXFF/n2124
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][3] (.CP(n_8359), .D(\UART_RXFF/n2123
notech_reg \UART_RXFF/iFIFOMem_reg[39][3] (.CP(n_8353), .D(\UART_RXFF/n2123
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][2] (.CP(n_8359), .D(\UART_RXFF/n2122
notech_reg \UART_RXFF/iFIFOMem_reg[39][2] (.CP(n_8353), .D(\UART_RXFF/n2122
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][1] (.CP(n_8359), .D(\UART_RXFF/n2121
notech_reg \UART_RXFF/iFIFOMem_reg[39][1] (.CP(n_8353), .D(\UART_RXFF/n2121
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[39][0] (.CP(n_8359), .D(\UART_RXFF/n2120
notech_reg \UART_RXFF/iFIFOMem_reg[39][0] (.CP(n_8353), .D(\UART_RXFF/n2120
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[39][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][10] (.CP(n_8359), .D(\UART_RXFF/n2119
notech_reg \UART_RXFF/iFIFOMem_reg[38][10] (.CP(n_8353), .D(\UART_RXFF/n2119
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][9] (.CP(n_8359), .D(\UART_RXFF/n2118
notech_reg \UART_RXFF/iFIFOMem_reg[38][9] (.CP(n_8353), .D(\UART_RXFF/n2118
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][8] (.CP(n_8359), .D(\UART_RXFF/n2117
notech_reg \UART_RXFF/iFIFOMem_reg[38][8] (.CP(n_8353), .D(\UART_RXFF/n2117
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][7] (.CP(n_8359), .D(\UART_RXFF/n2116
notech_reg \UART_RXFF/iFIFOMem_reg[38][7] (.CP(n_8353), .D(\UART_RXFF/n2116
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][6] (.CP(n_8362), .D(\UART_RXFF/n2115
notech_reg \UART_RXFF/iFIFOMem_reg[38][6] (.CP(n_8356), .D(\UART_RXFF/n2115
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][5] (.CP(n_8362), .D(\UART_RXFF/n2114
notech_reg \UART_RXFF/iFIFOMem_reg[38][5] (.CP(n_8356), .D(\UART_RXFF/n2114
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][4] (.CP(n_8362), .D(\UART_RXFF/n2113
notech_reg \UART_RXFF/iFIFOMem_reg[38][4] (.CP(n_8356), .D(\UART_RXFF/n2113
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][3] (.CP(n_8362), .D(\UART_RXFF/n2112
notech_reg \UART_RXFF/iFIFOMem_reg[38][3] (.CP(n_8356), .D(\UART_RXFF/n2112
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][2] (.CP(n_8362), .D(\UART_RXFF/n2111
notech_reg \UART_RXFF/iFIFOMem_reg[38][2] (.CP(n_8356), .D(\UART_RXFF/n2111
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][1] (.CP(n_8362), .D(\UART_RXFF/n2110
notech_reg \UART_RXFF/iFIFOMem_reg[38][1] (.CP(n_8356), .D(\UART_RXFF/n2110
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[38][0] (.CP(n_8362), .D(\UART_RXFF/n2109
notech_reg \UART_RXFF/iFIFOMem_reg[38][0] (.CP(n_8356), .D(\UART_RXFF/n2109
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[38][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][10] (.CP(n_8359), .D(\UART_RXFF/n2108
notech_reg \UART_RXFF/iFIFOMem_reg[37][10] (.CP(n_8353), .D(\UART_RXFF/n2108
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][9] (.CP(n_8362), .D(\UART_RXFF/n2107
notech_reg \UART_RXFF/iFIFOMem_reg[37][9] (.CP(n_8356), .D(\UART_RXFF/n2107
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][8] (.CP(n_8362), .D(\UART_RXFF/n2106
notech_reg \UART_RXFF/iFIFOMem_reg[37][8] (.CP(n_8356), .D(\UART_RXFF/n2106
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][7] (.CP(n_8362), .D(\UART_RXFF/n2105
notech_reg \UART_RXFF/iFIFOMem_reg[37][7] (.CP(n_8356), .D(\UART_RXFF/n2105
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][6] (.CP(n_8357), .D(\UART_RXFF/n2104
notech_reg \UART_RXFF/iFIFOMem_reg[37][6] (.CP(n_8351), .D(\UART_RXFF/n2104
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][5] (.CP(n_8357), .D(\UART_RXFF/n2103
notech_reg \UART_RXFF/iFIFOMem_reg[37][5] (.CP(n_8351), .D(\UART_RXFF/n2103
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][4] (.CP(n_8357), .D(\UART_RXFF/n2102
notech_reg \UART_RXFF/iFIFOMem_reg[37][4] (.CP(n_8351), .D(\UART_RXFF/n2102
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][3] (.CP(n_8357), .D(\UART_RXFF/n2101
notech_reg \UART_RXFF/iFIFOMem_reg[37][3] (.CP(n_8351), .D(\UART_RXFF/n2101
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][2] (.CP(n_8357), .D(\UART_RXFF/n2100
notech_reg \UART_RXFF/iFIFOMem_reg[37][2] (.CP(n_8351), .D(\UART_RXFF/n2100
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][1] (.CP(n_8357), .D(\UART_RXFF/n2099
notech_reg \UART_RXFF/iFIFOMem_reg[37][1] (.CP(n_8351), .D(\UART_RXFF/n2099
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[37][0] (.CP(n_8357), .D(\UART_RXFF/n2098
notech_reg \UART_RXFF/iFIFOMem_reg[37][0] (.CP(n_8351), .D(\UART_RXFF/n2098
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[37][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][10] (.CP(n_8357), .D(\UART_RXFF/n2097
notech_reg \UART_RXFF/iFIFOMem_reg[36][10] (.CP(n_8351), .D(\UART_RXFF/n2097
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][9] (.CP(n_8357), .D(\UART_RXFF/n2096
notech_reg \UART_RXFF/iFIFOMem_reg[36][9] (.CP(n_8351), .D(\UART_RXFF/n2096
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][8] (.CP(n_8357), .D(\UART_RXFF/n2095
notech_reg \UART_RXFF/iFIFOMem_reg[36][8] (.CP(n_8351), .D(\UART_RXFF/n2095
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][7] (.CP(n_8357), .D(\UART_RXFF/n2094
notech_reg \UART_RXFF/iFIFOMem_reg[36][7] (.CP(n_8351), .D(\UART_RXFF/n2094
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][6] (.CP(n_8357), .D(\UART_RXFF/n2093
notech_reg \UART_RXFF/iFIFOMem_reg[36][6] (.CP(n_8351), .D(\UART_RXFF/n2093
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][5] (.CP(n_8359), .D(\UART_RXFF/n2092
notech_reg \UART_RXFF/iFIFOMem_reg[36][5] (.CP(n_8353), .D(\UART_RXFF/n2092
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][4] (.CP(n_8359), .D(\UART_RXFF/n2091
notech_reg \UART_RXFF/iFIFOMem_reg[36][4] (.CP(n_8353), .D(\UART_RXFF/n2091
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][3] (.CP(n_8359), .D(\UART_RXFF/n2090
notech_reg \UART_RXFF/iFIFOMem_reg[36][3] (.CP(n_8353), .D(\UART_RXFF/n2090
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][2] (.CP(n_8359), .D(\UART_RXFF/n2089
notech_reg \UART_RXFF/iFIFOMem_reg[36][2] (.CP(n_8353), .D(\UART_RXFF/n2089
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][1] (.CP(n_8359), .D(\UART_RXFF/n2088
notech_reg \UART_RXFF/iFIFOMem_reg[36][1] (.CP(n_8353), .D(\UART_RXFF/n2088
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[36][0] (.CP(n_8359), .D(\UART_RXFF/n2087
notech_reg \UART_RXFF/iFIFOMem_reg[36][0] (.CP(n_8353), .D(\UART_RXFF/n2087
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[36][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][10] (.CP(n_8357), .D(\UART_RXFF/n2086
notech_reg \UART_RXFF/iFIFOMem_reg[35][10] (.CP(n_8351), .D(\UART_RXFF/n2086
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][9] (.CP(n_8357), .D(\UART_RXFF/n2085
notech_reg \UART_RXFF/iFIFOMem_reg[35][9] (.CP(n_8351), .D(\UART_RXFF/n2085
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][8] (.CP(n_8357), .D(\UART_RXFF/n2084
notech_reg \UART_RXFF/iFIFOMem_reg[35][8] (.CP(n_8351), .D(\UART_RXFF/n2084
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][7] (.CP(n_8359), .D(\UART_RXFF/n2083
notech_reg \UART_RXFF/iFIFOMem_reg[35][7] (.CP(n_8353), .D(\UART_RXFF/n2083
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][6] (.CP(n_8357), .D(\UART_RXFF/n2082
notech_reg \UART_RXFF/iFIFOMem_reg[35][6] (.CP(n_8351), .D(\UART_RXFF/n2082
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][5] (.CP(n_8324), .D(\UART_RXFF/n2081
notech_reg \UART_RXFF/iFIFOMem_reg[35][5] (.CP(n_8318), .D(\UART_RXFF/n2081
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][4] (.CP(n_8292), .D(\UART_RXFF/n2080
notech_reg \UART_RXFF/iFIFOMem_reg[35][4] (.CP(n_8286), .D(\UART_RXFF/n2080
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][3] (.CP(n_8292), .D(\UART_RXFF/n2079
notech_reg \UART_RXFF/iFIFOMem_reg[35][3] (.CP(n_8286), .D(\UART_RXFF/n2079
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][2] (.CP(n_8292), .D(\UART_RXFF/n2078
notech_reg \UART_RXFF/iFIFOMem_reg[35][2] (.CP(n_8286), .D(\UART_RXFF/n2078
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][1] (.CP(n_8292), .D(\UART_RXFF/n2077
notech_reg \UART_RXFF/iFIFOMem_reg[35][1] (.CP(n_8286), .D(\UART_RXFF/n2077
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[35][0] (.CP(n_8292), .D(\UART_RXFF/n2076
notech_reg \UART_RXFF/iFIFOMem_reg[35][0] (.CP(n_8286), .D(\UART_RXFF/n2076
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[35][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][10] (.CP(n_8292), .D(\UART_RXFF/n2075
notech_reg \UART_RXFF/iFIFOMem_reg[34][10] (.CP(n_8286), .D(\UART_RXFF/n2075
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][9] (.CP(n_8288), .D(\UART_RXFF/n2074
notech_reg \UART_RXFF/iFIFOMem_reg[34][9] (.CP(n_8282), .D(\UART_RXFF/n2074
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][8] (.CP(n_8288), .D(\UART_RXFF/n2073
notech_reg \UART_RXFF/iFIFOMem_reg[34][8] (.CP(n_8282), .D(\UART_RXFF/n2073
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][7] (.CP(n_8288), .D(\UART_RXFF/n2072
notech_reg \UART_RXFF/iFIFOMem_reg[34][7] (.CP(n_8282), .D(\UART_RXFF/n2072
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][6] (.CP(n_8292), .D(\UART_RXFF/n2071
notech_reg \UART_RXFF/iFIFOMem_reg[34][6] (.CP(n_8286), .D(\UART_RXFF/n2071
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][5] (.CP(n_8288), .D(\UART_RXFF/n2070
notech_reg \UART_RXFF/iFIFOMem_reg[34][5] (.CP(n_8282), .D(\UART_RXFF/n2070
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][4] (.CP(n_8292), .D(\UART_RXFF/n2069
notech_reg \UART_RXFF/iFIFOMem_reg[34][4] (.CP(n_8286), .D(\UART_RXFF/n2069
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][3] (.CP(n_8292), .D(\UART_RXFF/n2068
notech_reg \UART_RXFF/iFIFOMem_reg[34][3] (.CP(n_8286), .D(\UART_RXFF/n2068
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][2] (.CP(n_8292), .D(\UART_RXFF/n2067
notech_reg \UART_RXFF/iFIFOMem_reg[34][2] (.CP(n_8286), .D(\UART_RXFF/n2067
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][1] (.CP(n_8292), .D(\UART_RXFF/n2066
notech_reg \UART_RXFF/iFIFOMem_reg[34][1] (.CP(n_8286), .D(\UART_RXFF/n2066
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[34][0] (.CP(n_8292), .D(\UART_RXFF/n2065
notech_reg \UART_RXFF/iFIFOMem_reg[34][0] (.CP(n_8286), .D(\UART_RXFF/n2065
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[34][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][10] (.CP(n_8292), .D(\UART_RXFF/n2064
notech_reg \UART_RXFF/iFIFOMem_reg[33][10] (.CP(n_8286), .D(\UART_RXFF/n2064
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][9] (.CP(n_8292), .D(\UART_RXFF/n2063
notech_reg \UART_RXFF/iFIFOMem_reg[33][9] (.CP(n_8286), .D(\UART_RXFF/n2063
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][8] (.CP(n_8292), .D(\UART_RXFF/n2062
notech_reg \UART_RXFF/iFIFOMem_reg[33][8] (.CP(n_8286), .D(\UART_RXFF/n2062
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][7] (.CP(n_8292), .D(\UART_RXFF/n2061
notech_reg \UART_RXFF/iFIFOMem_reg[33][7] (.CP(n_8286), .D(\UART_RXFF/n2061
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][6] (.CP(n_8292), .D(\UART_RXFF/n2060
notech_reg \UART_RXFF/iFIFOMem_reg[33][6] (.CP(n_8286), .D(\UART_RXFF/n2060
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][5] (.CP(n_8292), .D(\UART_RXFF/n2059
notech_reg \UART_RXFF/iFIFOMem_reg[33][5] (.CP(n_8286), .D(\UART_RXFF/n2059
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][4] (.CP(n_8292), .D(\UART_RXFF/n2058
notech_reg \UART_RXFF/iFIFOMem_reg[33][4] (.CP(n_8286), .D(\UART_RXFF/n2058
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][3] (.CP(n_8288), .D(\UART_RXFF/n2057
notech_reg \UART_RXFF/iFIFOMem_reg[33][3] (.CP(n_8282), .D(\UART_RXFF/n2057
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][2] (.CP(n_8286), .D(\UART_RXFF/n2056
notech_reg \UART_RXFF/iFIFOMem_reg[33][2] (.CP(n_8280), .D(\UART_RXFF/n2056
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][1] (.CP(n_8288), .D(\UART_RXFF/n2055
notech_reg \UART_RXFF/iFIFOMem_reg[33][1] (.CP(n_8282), .D(\UART_RXFF/n2055
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[33][0] (.CP(n_8288), .D(\UART_RXFF/n2054
notech_reg \UART_RXFF/iFIFOMem_reg[33][0] (.CP(n_8282), .D(\UART_RXFF/n2054
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[33][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][10] (.CP(n_8288), .D(\UART_RXFF/n2053
notech_reg \UART_RXFF/iFIFOMem_reg[32][10] (.CP(n_8282), .D(\UART_RXFF/n2053
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][9] (.CP(n_8286), .D(\UART_RXFF/n2052
notech_reg \UART_RXFF/iFIFOMem_reg[32][9] (.CP(n_8280), .D(\UART_RXFF/n2052
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][8] (.CP(n_8286), .D(\UART_RXFF/n2051
notech_reg \UART_RXFF/iFIFOMem_reg[32][8] (.CP(n_8280), .D(\UART_RXFF/n2051
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][7] (.CP(n_8286), .D(\UART_RXFF/n2050
notech_reg \UART_RXFF/iFIFOMem_reg[32][7] (.CP(n_8280), .D(\UART_RXFF/n2050
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][6] (.CP(n_8286), .D(\UART_RXFF/n2049
notech_reg \UART_RXFF/iFIFOMem_reg[32][6] (.CP(n_8280), .D(\UART_RXFF/n2049
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][5] (.CP(n_8286), .D(\UART_RXFF/n2048
notech_reg \UART_RXFF/iFIFOMem_reg[32][5] (.CP(n_8280), .D(\UART_RXFF/n2048
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][4] (.CP(n_8286), .D(\UART_RXFF/n2047
notech_reg \UART_RXFF/iFIFOMem_reg[32][4] (.CP(n_8280), .D(\UART_RXFF/n2047
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][3] (.CP(n_8288), .D(\UART_RXFF/n2046
notech_reg \UART_RXFF/iFIFOMem_reg[32][3] (.CP(n_8282), .D(\UART_RXFF/n2046
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][2] (.CP(n_8288), .D(\UART_RXFF/n2045
notech_reg \UART_RXFF/iFIFOMem_reg[32][2] (.CP(n_8282), .D(\UART_RXFF/n2045
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][1] (.CP(n_8288), .D(\UART_RXFF/n2044
notech_reg \UART_RXFF/iFIFOMem_reg[32][1] (.CP(n_8282), .D(\UART_RXFF/n2044
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[32][0] (.CP(n_8288), .D(\UART_RXFF/n2043
notech_reg \UART_RXFF/iFIFOMem_reg[32][0] (.CP(n_8282), .D(\UART_RXFF/n2043
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[32][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][10] (.CP(n_8288), .D(\UART_RXFF/n2042
notech_reg \UART_RXFF/iFIFOMem_reg[31][10] (.CP(n_8282), .D(\UART_RXFF/n2042
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][9] (.CP(n_8288), .D(\UART_RXFF/n2041
notech_reg \UART_RXFF/iFIFOMem_reg[31][9] (.CP(n_8282), .D(\UART_RXFF/n2041
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][8] (.CP(n_8288), .D(\UART_RXFF/n2040
notech_reg \UART_RXFF/iFIFOMem_reg[31][8] (.CP(n_8282), .D(\UART_RXFF/n2040
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][7] (.CP(n_8288), .D(\UART_RXFF/n2039
notech_reg \UART_RXFF/iFIFOMem_reg[31][7] (.CP(n_8282), .D(\UART_RXFF/n2039
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][6] (.CP(n_8288), .D(\UART_RXFF/n2038
notech_reg \UART_RXFF/iFIFOMem_reg[31][6] (.CP(n_8282), .D(\UART_RXFF/n2038
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][5] (.CP(n_8288), .D(\UART_RXFF/n2037
notech_reg \UART_RXFF/iFIFOMem_reg[31][5] (.CP(n_8282), .D(\UART_RXFF/n2037
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][4] (.CP(n_8288), .D(\UART_RXFF/n2036
notech_reg \UART_RXFF/iFIFOMem_reg[31][4] (.CP(n_8282), .D(\UART_RXFF/n2036
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][3] (.CP(n_8288), .D(\UART_RXFF/n2035
notech_reg \UART_RXFF/iFIFOMem_reg[31][3] (.CP(n_8282), .D(\UART_RXFF/n2035
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][2] (.CP(n_8297), .D(\UART_RXFF/n2034
notech_reg \UART_RXFF/iFIFOMem_reg[31][2] (.CP(n_8291), .D(\UART_RXFF/n2034
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][1] (.CP(n_8297), .D(\UART_RXFF/n2033
notech_reg \UART_RXFF/iFIFOMem_reg[31][1] (.CP(n_8291), .D(\UART_RXFF/n2033
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[31][0] (.CP(n_8297), .D(\UART_RXFF/n2032
notech_reg \UART_RXFF/iFIFOMem_reg[31][0] (.CP(n_8291), .D(\UART_RXFF/n2032
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[31][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][10] (.CP(n_8297), .D(\UART_RXFF/n2031
notech_reg \UART_RXFF/iFIFOMem_reg[30][10] (.CP(n_8291), .D(\UART_RXFF/n2031
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][9] (.CP(n_8297), .D(\UART_RXFF/n2030
notech_reg \UART_RXFF/iFIFOMem_reg[30][9] (.CP(n_8291), .D(\UART_RXFF/n2030
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][8] (.CP(n_8297), .D(\UART_RXFF/n2029
notech_reg \UART_RXFF/iFIFOMem_reg[30][8] (.CP(n_8291), .D(\UART_RXFF/n2029
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][7] (.CP(n_8297), .D(\UART_RXFF/n2028
notech_reg \UART_RXFF/iFIFOMem_reg[30][7] (.CP(n_8291), .D(\UART_RXFF/n2028
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][6] (.CP(n_8297), .D(\UART_RXFF/n2027
notech_reg \UART_RXFF/iFIFOMem_reg[30][6] (.CP(n_8291), .D(\UART_RXFF/n2027
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][5] (.CP(n_8297), .D(\UART_RXFF/n2026
notech_reg \UART_RXFF/iFIFOMem_reg[30][5] (.CP(n_8291), .D(\UART_RXFF/n2026
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][4] (.CP(n_8297), .D(\UART_RXFF/n2025
notech_reg \UART_RXFF/iFIFOMem_reg[30][4] (.CP(n_8291), .D(\UART_RXFF/n2025
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][3] (.CP(n_8297), .D(\UART_RXFF/n2024
notech_reg \UART_RXFF/iFIFOMem_reg[30][3] (.CP(n_8291), .D(\UART_RXFF/n2024
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][2] (.CP(n_8297), .D(\UART_RXFF/n2023
notech_reg \UART_RXFF/iFIFOMem_reg[30][2] (.CP(n_8291), .D(\UART_RXFF/n2023
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][1] (.CP(n_8299), .D(\UART_RXFF/n2022
notech_reg \UART_RXFF/iFIFOMem_reg[30][1] (.CP(n_8293), .D(\UART_RXFF/n2022
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[30][0] (.CP(n_8299), .D(\UART_RXFF/n2021
notech_reg \UART_RXFF/iFIFOMem_reg[30][0] (.CP(n_8293), .D(\UART_RXFF/n2021
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[30][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][10] (.CP(n_8299), .D(\UART_RXFF/n2020
notech_reg \UART_RXFF/iFIFOMem_reg[29][10] (.CP(n_8293), .D(\UART_RXFF/n2020
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][9] (.CP(n_8299), .D(\UART_RXFF/n2019
notech_reg \UART_RXFF/iFIFOMem_reg[29][9] (.CP(n_8293), .D(\UART_RXFF/n2019
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][8] (.CP(n_8299), .D(\UART_RXFF/n2018
notech_reg \UART_RXFF/iFIFOMem_reg[29][8] (.CP(n_8293), .D(\UART_RXFF/n2018
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][7] (.CP(n_8297), .D(\UART_RXFF/n2017
notech_reg \UART_RXFF/iFIFOMem_reg[29][7] (.CP(n_8291), .D(\UART_RXFF/n2017
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][6] (.CP(n_8297), .D(\UART_RXFF/n2016
notech_reg \UART_RXFF/iFIFOMem_reg[29][6] (.CP(n_8291), .D(\UART_RXFF/n2016
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][5] (.CP(n_8297), .D(\UART_RXFF/n2015
notech_reg \UART_RXFF/iFIFOMem_reg[29][5] (.CP(n_8291), .D(\UART_RXFF/n2015
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][4] (.CP(n_8297), .D(\UART_RXFF/n2014
notech_reg \UART_RXFF/iFIFOMem_reg[29][4] (.CP(n_8291), .D(\UART_RXFF/n2014
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][3] (.CP(n_8297), .D(\UART_RXFF/n2013
notech_reg \UART_RXFF/iFIFOMem_reg[29][3] (.CP(n_8291), .D(\UART_RXFF/n2013
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][2] (.CP(n_8297), .D(\UART_RXFF/n2012
notech_reg \UART_RXFF/iFIFOMem_reg[29][2] (.CP(n_8291), .D(\UART_RXFF/n2012
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][1] (.CP(n_8294), .D(\UART_RXFF/n2011
notech_reg \UART_RXFF/iFIFOMem_reg[29][1] (.CP(n_8288), .D(\UART_RXFF/n2011
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[29][0] (.CP(n_8294), .D(\UART_RXFF/n2010
notech_reg \UART_RXFF/iFIFOMem_reg[29][0] (.CP(n_8288), .D(\UART_RXFF/n2010
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[29][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][10] (.CP(n_8294), .D(\UART_RXFF/n2009
notech_reg \UART_RXFF/iFIFOMem_reg[28][10] (.CP(n_8288), .D(\UART_RXFF/n2009
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][9] (.CP(n_8294), .D(\UART_RXFF/n2008
notech_reg \UART_RXFF/iFIFOMem_reg[28][9] (.CP(n_8288), .D(\UART_RXFF/n2008
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][8] (.CP(n_8294), .D(\UART_RXFF/n2007
notech_reg \UART_RXFF/iFIFOMem_reg[28][8] (.CP(n_8288), .D(\UART_RXFF/n2007
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][7] (.CP(n_8294), .D(\UART_RXFF/n2006
notech_reg \UART_RXFF/iFIFOMem_reg[28][7] (.CP(n_8288), .D(\UART_RXFF/n2006
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][6] (.CP(n_8294), .D(\UART_RXFF/n2005
notech_reg \UART_RXFF/iFIFOMem_reg[28][6] (.CP(n_8288), .D(\UART_RXFF/n2005
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][5] (.CP(n_8292), .D(\UART_RXFF/n2004
notech_reg \UART_RXFF/iFIFOMem_reg[28][5] (.CP(n_8286), .D(\UART_RXFF/n2004
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][4] (.CP(n_8294), .D(\UART_RXFF/n2003
notech_reg \UART_RXFF/iFIFOMem_reg[28][4] (.CP(n_8288), .D(\UART_RXFF/n2003
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][3] (.CP(n_8294), .D(\UART_RXFF/n2002
notech_reg \UART_RXFF/iFIFOMem_reg[28][3] (.CP(n_8288), .D(\UART_RXFF/n2002
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][2] (.CP(n_8294), .D(\UART_RXFF/n2001
notech_reg \UART_RXFF/iFIFOMem_reg[28][2] (.CP(n_8288), .D(\UART_RXFF/n2001
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][1] (.CP(n_8294), .D(\UART_RXFF/n2000
notech_reg \UART_RXFF/iFIFOMem_reg[28][1] (.CP(n_8288), .D(\UART_RXFF/n2000
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[28][0] (.CP(n_8294), .D(\UART_RXFF/n1999
notech_reg \UART_RXFF/iFIFOMem_reg[28][0] (.CP(n_8288), .D(\UART_RXFF/n1999
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[28][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][10] (.CP(n_8294), .D(\UART_RXFF/n1998
notech_reg \UART_RXFF/iFIFOMem_reg[27][10] (.CP(n_8288), .D(\UART_RXFF/n1998
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][9] (.CP(n_8294), .D(\UART_RXFF/n1997
notech_reg \UART_RXFF/iFIFOMem_reg[27][9] (.CP(n_8288), .D(\UART_RXFF/n1997
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][8] (.CP(n_8297), .D(\UART_RXFF/n1996
notech_reg \UART_RXFF/iFIFOMem_reg[27][8] (.CP(n_8291), .D(\UART_RXFF/n1996
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][7] (.CP(n_8297), .D(\UART_RXFF/n1995
notech_reg \UART_RXFF/iFIFOMem_reg[27][7] (.CP(n_8291), .D(\UART_RXFF/n1995
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][6] (.CP(n_8294), .D(\UART_RXFF/n1994
notech_reg \UART_RXFF/iFIFOMem_reg[27][6] (.CP(n_8288), .D(\UART_RXFF/n1994
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][5] (.CP(n_8294), .D(\UART_RXFF/n1993
notech_reg \UART_RXFF/iFIFOMem_reg[27][5] (.CP(n_8288), .D(\UART_RXFF/n1993
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][4] (.CP(n_8294), .D(\UART_RXFF/n1992
notech_reg \UART_RXFF/iFIFOMem_reg[27][4] (.CP(n_8288), .D(\UART_RXFF/n1992
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][3] (.CP(n_8294), .D(\UART_RXFF/n1991
notech_reg \UART_RXFF/iFIFOMem_reg[27][3] (.CP(n_8288), .D(\UART_RXFF/n1991
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][2] (.CP(n_8294), .D(\UART_RXFF/n1990
notech_reg \UART_RXFF/iFIFOMem_reg[27][2] (.CP(n_8288), .D(\UART_RXFF/n1990
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][1] (.CP(n_8294), .D(\UART_RXFF/n1989
notech_reg \UART_RXFF/iFIFOMem_reg[27][1] (.CP(n_8288), .D(\UART_RXFF/n1989
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[27][0] (.CP(n_8286), .D(\UART_RXFF/n1988
notech_reg \UART_RXFF/iFIFOMem_reg[27][0] (.CP(n_8280), .D(\UART_RXFF/n1988
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[27][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][10] (.CP(n_8278), .D(\UART_RXFF/n1987
notech_reg \UART_RXFF/iFIFOMem_reg[26][10] (.CP(n_8272), .D(\UART_RXFF/n1987
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][9] (.CP(n_8278), .D(\UART_RXFF/n1986
notech_reg \UART_RXFF/iFIFOMem_reg[26][9] (.CP(n_8272), .D(\UART_RXFF/n1986
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][8] (.CP(n_8278), .D(\UART_RXFF/n1985
notech_reg \UART_RXFF/iFIFOMem_reg[26][8] (.CP(n_8272), .D(\UART_RXFF/n1985
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][7] (.CP(n_8278), .D(\UART_RXFF/n1984
notech_reg \UART_RXFF/iFIFOMem_reg[26][7] (.CP(n_8272), .D(\UART_RXFF/n1984
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][6] (.CP(n_8278), .D(\UART_RXFF/n1983
notech_reg \UART_RXFF/iFIFOMem_reg[26][6] (.CP(n_8272), .D(\UART_RXFF/n1983
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][5] (.CP(n_8278), .D(\UART_RXFF/n1982
notech_reg \UART_RXFF/iFIFOMem_reg[26][5] (.CP(n_8272), .D(\UART_RXFF/n1982
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][4] (.CP(n_8278), .D(\UART_RXFF/n1981
notech_reg \UART_RXFF/iFIFOMem_reg[26][4] (.CP(n_8272), .D(\UART_RXFF/n1981
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][3] (.CP(n_8278), .D(\UART_RXFF/n1980
notech_reg \UART_RXFF/iFIFOMem_reg[26][3] (.CP(n_8272), .D(\UART_RXFF/n1980
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][2] (.CP(n_8278), .D(\UART_RXFF/n1979
notech_reg \UART_RXFF/iFIFOMem_reg[26][2] (.CP(n_8272), .D(\UART_RXFF/n1979
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][1] (.CP(n_8278), .D(\UART_RXFF/n1978
notech_reg \UART_RXFF/iFIFOMem_reg[26][1] (.CP(n_8272), .D(\UART_RXFF/n1978
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[26][0] (.CP(n_8278), .D(\UART_RXFF/n1977
notech_reg \UART_RXFF/iFIFOMem_reg[26][0] (.CP(n_8272), .D(\UART_RXFF/n1977
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[26][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][10] (.CP(n_8278), .D(\UART_RXFF/n1976
notech_reg \UART_RXFF/iFIFOMem_reg[25][10] (.CP(n_8272), .D(\UART_RXFF/n1976
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][9] (.CP(n_8281), .D(\UART_RXFF/n1975
notech_reg \UART_RXFF/iFIFOMem_reg[25][9] (.CP(n_8275), .D(\UART_RXFF/n1975
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][8] (.CP(n_8281), .D(\UART_RXFF/n1974
notech_reg \UART_RXFF/iFIFOMem_reg[25][8] (.CP(n_8275), .D(\UART_RXFF/n1974
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][7] (.CP(n_8281), .D(\UART_RXFF/n1973
notech_reg \UART_RXFF/iFIFOMem_reg[25][7] (.CP(n_8275), .D(\UART_RXFF/n1973
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][6] (.CP(n_8281), .D(\UART_RXFF/n1972
notech_reg \UART_RXFF/iFIFOMem_reg[25][6] (.CP(n_8275), .D(\UART_RXFF/n1972
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][5] (.CP(n_8281), .D(\UART_RXFF/n1971
notech_reg \UART_RXFF/iFIFOMem_reg[25][5] (.CP(n_8275), .D(\UART_RXFF/n1971
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][4] (.CP(n_8281), .D(\UART_RXFF/n1970
notech_reg \UART_RXFF/iFIFOMem_reg[25][4] (.CP(n_8275), .D(\UART_RXFF/n1970
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][3] (.CP(n_8278), .D(\UART_RXFF/n1969
notech_reg \UART_RXFF/iFIFOMem_reg[25][3] (.CP(n_8272), .D(\UART_RXFF/n1969
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][2] (.CP(n_8278), .D(\UART_RXFF/n1968
notech_reg \UART_RXFF/iFIFOMem_reg[25][2] (.CP(n_8272), .D(\UART_RXFF/n1968
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][1] (.CP(n_8278), .D(\UART_RXFF/n1967
notech_reg \UART_RXFF/iFIFOMem_reg[25][1] (.CP(n_8272), .D(\UART_RXFF/n1967
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[25][0] (.CP(n_8278), .D(\UART_RXFF/n1966
notech_reg \UART_RXFF/iFIFOMem_reg[25][0] (.CP(n_8272), .D(\UART_RXFF/n1966
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[25][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][10] (.CP(n_8278), .D(\UART_RXFF/n1965
notech_reg \UART_RXFF/iFIFOMem_reg[24][10] (.CP(n_8272), .D(\UART_RXFF/n1965
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][9] (.CP(n_8276), .D(\UART_RXFF/n1964
notech_reg \UART_RXFF/iFIFOMem_reg[24][9] (.CP(n_8270), .D(\UART_RXFF/n1964
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][8] (.CP(n_8276), .D(\UART_RXFF/n1963
notech_reg \UART_RXFF/iFIFOMem_reg[24][8] (.CP(n_8270), .D(\UART_RXFF/n1963
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][7] (.CP(n_8276), .D(\UART_RXFF/n1962
notech_reg \UART_RXFF/iFIFOMem_reg[24][7] (.CP(n_8270), .D(\UART_RXFF/n1962
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][6] (.CP(n_8276), .D(\UART_RXFF/n1961
notech_reg \UART_RXFF/iFIFOMem_reg[24][6] (.CP(n_8270), .D(\UART_RXFF/n1961
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][5] (.CP(n_8276), .D(\UART_RXFF/n1960
notech_reg \UART_RXFF/iFIFOMem_reg[24][5] (.CP(n_8270), .D(\UART_RXFF/n1960
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][4] (.CP(n_8276), .D(\UART_RXFF/n1959
notech_reg \UART_RXFF/iFIFOMem_reg[24][4] (.CP(n_8270), .D(\UART_RXFF/n1959
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][3] (.CP(n_8276), .D(\UART_RXFF/n1958
notech_reg \UART_RXFF/iFIFOMem_reg[24][3] (.CP(n_8270), .D(\UART_RXFF/n1958
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][2] (.CP(n_8276), .D(\UART_RXFF/n1957
notech_reg \UART_RXFF/iFIFOMem_reg[24][2] (.CP(n_8270), .D(\UART_RXFF/n1957
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][1] (.CP(n_8276), .D(\UART_RXFF/n1956
notech_reg \UART_RXFF/iFIFOMem_reg[24][1] (.CP(n_8270), .D(\UART_RXFF/n1956
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[24][0] (.CP(n_8276), .D(\UART_RXFF/n1955
notech_reg \UART_RXFF/iFIFOMem_reg[24][0] (.CP(n_8270), .D(\UART_RXFF/n1955
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[24][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][10] (.CP(n_8276), .D(\UART_RXFF/n1954
notech_reg \UART_RXFF/iFIFOMem_reg[23][10] (.CP(n_8270), .D(\UART_RXFF/n1954
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][9] (.CP(n_8276), .D(\UART_RXFF/n1953
notech_reg \UART_RXFF/iFIFOMem_reg[23][9] (.CP(n_8270), .D(\UART_RXFF/n1953
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][8] (.CP(n_8276), .D(\UART_RXFF/n1952
notech_reg \UART_RXFF/iFIFOMem_reg[23][8] (.CP(n_8270), .D(\UART_RXFF/n1952
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][7] (.CP(n_8276), .D(\UART_RXFF/n1951
notech_reg \UART_RXFF/iFIFOMem_reg[23][7] (.CP(n_8270), .D(\UART_RXFF/n1951
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][6] (.CP(n_8278), .D(\UART_RXFF/n1950
notech_reg \UART_RXFF/iFIFOMem_reg[23][6] (.CP(n_8272), .D(\UART_RXFF/n1950
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][5] (.CP(n_8278), .D(\UART_RXFF/n1949
notech_reg \UART_RXFF/iFIFOMem_reg[23][5] (.CP(n_8272), .D(\UART_RXFF/n1949
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][4] (.CP(n_8278), .D(\UART_RXFF/n1948
notech_reg \UART_RXFF/iFIFOMem_reg[23][4] (.CP(n_8272), .D(\UART_RXFF/n1948
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][3] (.CP(n_8276), .D(\UART_RXFF/n1947
notech_reg \UART_RXFF/iFIFOMem_reg[23][3] (.CP(n_8270), .D(\UART_RXFF/n1947
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][2] (.CP(n_8276), .D(\UART_RXFF/n1946
notech_reg \UART_RXFF/iFIFOMem_reg[23][2] (.CP(n_8270), .D(\UART_RXFF/n1946
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][1] (.CP(n_8276), .D(\UART_RXFF/n1945
notech_reg \UART_RXFF/iFIFOMem_reg[23][1] (.CP(n_8270), .D(\UART_RXFF/n1945
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[23][0] (.CP(n_8276), .D(\UART_RXFF/n1944
notech_reg \UART_RXFF/iFIFOMem_reg[23][0] (.CP(n_8270), .D(\UART_RXFF/n1944
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[23][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][10] (.CP(n_8276), .D(\UART_RXFF/n1943
notech_reg \UART_RXFF/iFIFOMem_reg[22][10] (.CP(n_8270), .D(\UART_RXFF/n1943
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][9] (.CP(n_8276), .D(\UART_RXFF/n1942
notech_reg \UART_RXFF/iFIFOMem_reg[22][9] (.CP(n_8270), .D(\UART_RXFF/n1942
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][8] (.CP(n_8283), .D(\UART_RXFF/n1941
notech_reg \UART_RXFF/iFIFOMem_reg[22][8] (.CP(n_8277), .D(\UART_RXFF/n1941
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][7] (.CP(n_8283), .D(\UART_RXFF/n1940
notech_reg \UART_RXFF/iFIFOMem_reg[22][7] (.CP(n_8277), .D(\UART_RXFF/n1940
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][6] (.CP(n_8283), .D(\UART_RXFF/n1939
notech_reg \UART_RXFF/iFIFOMem_reg[22][6] (.CP(n_8277), .D(\UART_RXFF/n1939
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][5] (.CP(n_8283), .D(\UART_RXFF/n1938
notech_reg \UART_RXFF/iFIFOMem_reg[22][5] (.CP(n_8277), .D(\UART_RXFF/n1938
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][4] (.CP(n_8283), .D(\UART_RXFF/n1937
notech_reg \UART_RXFF/iFIFOMem_reg[22][4] (.CP(n_8277), .D(\UART_RXFF/n1937
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][3] (.CP(n_8283), .D(\UART_RXFF/n1936
notech_reg \UART_RXFF/iFIFOMem_reg[22][3] (.CP(n_8277), .D(\UART_RXFF/n1936
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][2] (.CP(n_8283), .D(\UART_RXFF/n1935
notech_reg \UART_RXFF/iFIFOMem_reg[22][2] (.CP(n_8277), .D(\UART_RXFF/n1935
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][1] (.CP(n_8283), .D(\UART_RXFF/n1934
notech_reg \UART_RXFF/iFIFOMem_reg[22][1] (.CP(n_8277), .D(\UART_RXFF/n1934
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[22][0] (.CP(n_8283), .D(\UART_RXFF/n1933
notech_reg \UART_RXFF/iFIFOMem_reg[22][0] (.CP(n_8277), .D(\UART_RXFF/n1933
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[22][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][10] (.CP(n_8283), .D(\UART_RXFF/n1932
notech_reg \UART_RXFF/iFIFOMem_reg[21][10] (.CP(n_8277), .D(\UART_RXFF/n1932
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][9] (.CP(n_8283), .D(\UART_RXFF/n1931
notech_reg \UART_RXFF/iFIFOMem_reg[21][9] (.CP(n_8277), .D(\UART_RXFF/n1931
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][8] (.CP(n_8286), .D(\UART_RXFF/n1930
notech_reg \UART_RXFF/iFIFOMem_reg[21][8] (.CP(n_8280), .D(\UART_RXFF/n1930
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][7] (.CP(n_8286), .D(\UART_RXFF/n1929
notech_reg \UART_RXFF/iFIFOMem_reg[21][7] (.CP(n_8280), .D(\UART_RXFF/n1929
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][6] (.CP(n_8286), .D(\UART_RXFF/n1928
notech_reg \UART_RXFF/iFIFOMem_reg[21][6] (.CP(n_8280), .D(\UART_RXFF/n1928
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][5] (.CP(n_8286), .D(\UART_RXFF/n1927
notech_reg \UART_RXFF/iFIFOMem_reg[21][5] (.CP(n_8280), .D(\UART_RXFF/n1927
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][4] (.CP(n_8286), .D(\UART_RXFF/n1926
notech_reg \UART_RXFF/iFIFOMem_reg[21][4] (.CP(n_8280), .D(\UART_RXFF/n1926
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][3] (.CP(n_8286), .D(\UART_RXFF/n1925
notech_reg \UART_RXFF/iFIFOMem_reg[21][3] (.CP(n_8280), .D(\UART_RXFF/n1925
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][2] (.CP(n_8286), .D(\UART_RXFF/n1924
notech_reg \UART_RXFF/iFIFOMem_reg[21][2] (.CP(n_8280), .D(\UART_RXFF/n1924
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][1] (.CP(n_8286), .D(\UART_RXFF/n1923
notech_reg \UART_RXFF/iFIFOMem_reg[21][1] (.CP(n_8280), .D(\UART_RXFF/n1923
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[21][0] (.CP(n_8286), .D(\UART_RXFF/n1922
notech_reg \UART_RXFF/iFIFOMem_reg[21][0] (.CP(n_8280), .D(\UART_RXFF/n1922
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[21][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][10] (.CP(n_8286), .D(\UART_RXFF/n1921
notech_reg \UART_RXFF/iFIFOMem_reg[20][10] (.CP(n_8280), .D(\UART_RXFF/n1921
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][9] (.CP(n_8286), .D(\UART_RXFF/n1920
notech_reg \UART_RXFF/iFIFOMem_reg[20][9] (.CP(n_8280), .D(\UART_RXFF/n1920
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][8] (.CP(n_8286), .D(\UART_RXFF/n1919
notech_reg \UART_RXFF/iFIFOMem_reg[20][8] (.CP(n_8280), .D(\UART_RXFF/n1919
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][7] (.CP(n_8281), .D(\UART_RXFF/n1918
notech_reg \UART_RXFF/iFIFOMem_reg[20][7] (.CP(n_8275), .D(\UART_RXFF/n1918
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][6] (.CP(n_8281), .D(\UART_RXFF/n1917
notech_reg \UART_RXFF/iFIFOMem_reg[20][6] (.CP(n_8275), .D(\UART_RXFF/n1917
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][5] (.CP(n_8281), .D(\UART_RXFF/n1916
notech_reg \UART_RXFF/iFIFOMem_reg[20][5] (.CP(n_8275), .D(\UART_RXFF/n1916
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][4] (.CP(n_8281), .D(\UART_RXFF/n1915
notech_reg \UART_RXFF/iFIFOMem_reg[20][4] (.CP(n_8275), .D(\UART_RXFF/n1915
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][3] (.CP(n_8281), .D(\UART_RXFF/n1914
notech_reg \UART_RXFF/iFIFOMem_reg[20][3] (.CP(n_8275), .D(\UART_RXFF/n1914
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][2] (.CP(n_8281), .D(\UART_RXFF/n1913
notech_reg \UART_RXFF/iFIFOMem_reg[20][2] (.CP(n_8275), .D(\UART_RXFF/n1913
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][1] (.CP(n_8281), .D(\UART_RXFF/n1912
notech_reg \UART_RXFF/iFIFOMem_reg[20][1] (.CP(n_8275), .D(\UART_RXFF/n1912
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[20][0] (.CP(n_8281), .D(\UART_RXFF/n1911
notech_reg \UART_RXFF/iFIFOMem_reg[20][0] (.CP(n_8275), .D(\UART_RXFF/n1911
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[20][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][10] (.CP(n_8281), .D(\UART_RXFF/n1910
notech_reg \UART_RXFF/iFIFOMem_reg[19][10] (.CP(n_8275), .D(\UART_RXFF/n1910
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][9] (.CP(n_8281), .D(\UART_RXFF/n1909
notech_reg \UART_RXFF/iFIFOMem_reg[19][9] (.CP(n_8275), .D(\UART_RXFF/n1909
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][8] (.CP(n_8281), .D(\UART_RXFF/n1908
notech_reg \UART_RXFF/iFIFOMem_reg[19][8] (.CP(n_8275), .D(\UART_RXFF/n1908
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][7] (.CP(n_8281), .D(\UART_RXFF/n1907
notech_reg \UART_RXFF/iFIFOMem_reg[19][7] (.CP(n_8275), .D(\UART_RXFF/n1907
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][6] (.CP(n_8283), .D(\UART_RXFF/n1906
notech_reg \UART_RXFF/iFIFOMem_reg[19][6] (.CP(n_8277), .D(\UART_RXFF/n1906
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][5] (.CP(n_8283), .D(\UART_RXFF/n1905
notech_reg \UART_RXFF/iFIFOMem_reg[19][5] (.CP(n_8277), .D(\UART_RXFF/n1905
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][4] (.CP(n_8283), .D(\UART_RXFF/n1904
notech_reg \UART_RXFF/iFIFOMem_reg[19][4] (.CP(n_8277), .D(\UART_RXFF/n1904
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][3] (.CP(n_8283), .D(\UART_RXFF/n1903
notech_reg \UART_RXFF/iFIFOMem_reg[19][3] (.CP(n_8277), .D(\UART_RXFF/n1903
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][2] (.CP(n_8283), .D(\UART_RXFF/n1902
notech_reg \UART_RXFF/iFIFOMem_reg[19][2] (.CP(n_8277), .D(\UART_RXFF/n1902
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][1] (.CP(n_8283), .D(\UART_RXFF/n1901
notech_reg \UART_RXFF/iFIFOMem_reg[19][1] (.CP(n_8277), .D(\UART_RXFF/n1901
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[19][0] (.CP(n_8281), .D(\UART_RXFF/n1900
notech_reg \UART_RXFF/iFIFOMem_reg[19][0] (.CP(n_8275), .D(\UART_RXFF/n1900
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[19][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][10] (.CP(n_8281), .D(\UART_RXFF/n1899
notech_reg \UART_RXFF/iFIFOMem_reg[18][10] (.CP(n_8275), .D(\UART_RXFF/n1899
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][9] (.CP(n_8283), .D(\UART_RXFF/n1898
notech_reg \UART_RXFF/iFIFOMem_reg[18][9] (.CP(n_8277), .D(\UART_RXFF/n1898
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][8] (.CP(n_8283), .D(\UART_RXFF/n1897
notech_reg \UART_RXFF/iFIFOMem_reg[18][8] (.CP(n_8277), .D(\UART_RXFF/n1897
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][7] (.CP(n_8283), .D(\UART_RXFF/n1896
notech_reg \UART_RXFF/iFIFOMem_reg[18][7] (.CP(n_8277), .D(\UART_RXFF/n1896
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][6] (.CP(n_8299), .D(\UART_RXFF/n1895
notech_reg \UART_RXFF/iFIFOMem_reg[18][6] (.CP(n_8293), .D(\UART_RXFF/n1895
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][5] (.CP(n_8315), .D(\UART_RXFF/n1894
notech_reg \UART_RXFF/iFIFOMem_reg[18][5] (.CP(n_8309), .D(\UART_RXFF/n1894
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][4] (.CP(n_8315), .D(\UART_RXFF/n1893
notech_reg \UART_RXFF/iFIFOMem_reg[18][4] (.CP(n_8309), .D(\UART_RXFF/n1893
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][3] (.CP(n_8315), .D(\UART_RXFF/n1892
notech_reg \UART_RXFF/iFIFOMem_reg[18][3] (.CP(n_8309), .D(\UART_RXFF/n1892
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][2] (.CP(n_8315), .D(\UART_RXFF/n1891
notech_reg \UART_RXFF/iFIFOMem_reg[18][2] (.CP(n_8309), .D(\UART_RXFF/n1891
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][1] (.CP(n_8315), .D(\UART_RXFF/n1890
notech_reg \UART_RXFF/iFIFOMem_reg[18][1] (.CP(n_8309), .D(\UART_RXFF/n1890
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[18][0] (.CP(n_8315), .D(\UART_RXFF/n1889
notech_reg \UART_RXFF/iFIFOMem_reg[18][0] (.CP(n_8309), .D(\UART_RXFF/n1889
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[18][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][10] (.CP(n_8315), .D(\UART_RXFF/n1888
notech_reg \UART_RXFF/iFIFOMem_reg[17][10] (.CP(n_8309), .D(\UART_RXFF/n1888
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][9] (.CP(n_8315), .D(\UART_RXFF/n1887
notech_reg \UART_RXFF/iFIFOMem_reg[17][9] (.CP(n_8309), .D(\UART_RXFF/n1887
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][8] (.CP(n_8315), .D(\UART_RXFF/n1886
notech_reg \UART_RXFF/iFIFOMem_reg[17][8] (.CP(n_8309), .D(\UART_RXFF/n1886
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][7] (.CP(n_8315), .D(\UART_RXFF/n1885
notech_reg \UART_RXFF/iFIFOMem_reg[17][7] (.CP(n_8309), .D(\UART_RXFF/n1885
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][6] (.CP(n_8315), .D(\UART_RXFF/n1884
notech_reg \UART_RXFF/iFIFOMem_reg[17][6] (.CP(n_8309), .D(\UART_RXFF/n1884
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][5] (.CP(n_8315), .D(\UART_RXFF/n1883
notech_reg \UART_RXFF/iFIFOMem_reg[17][5] (.CP(n_8309), .D(\UART_RXFF/n1883
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][4] (.CP(n_8318), .D(\UART_RXFF/n1882
notech_reg \UART_RXFF/iFIFOMem_reg[17][4] (.CP(n_8312), .D(\UART_RXFF/n1882
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][3] (.CP(n_8318), .D(\UART_RXFF/n1881
notech_reg \UART_RXFF/iFIFOMem_reg[17][3] (.CP(n_8312), .D(\UART_RXFF/n1881
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][2] (.CP(n_8318), .D(\UART_RXFF/n1880
notech_reg \UART_RXFF/iFIFOMem_reg[17][2] (.CP(n_8312), .D(\UART_RXFF/n1880
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][1] (.CP(n_8318), .D(\UART_RXFF/n1879
notech_reg \UART_RXFF/iFIFOMem_reg[17][1] (.CP(n_8312), .D(\UART_RXFF/n1879
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[17][0] (.CP(n_8318), .D(\UART_RXFF/n1878
notech_reg \UART_RXFF/iFIFOMem_reg[17][0] (.CP(n_8312), .D(\UART_RXFF/n1878
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[17][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][10] (.CP(n_8315), .D(\UART_RXFF/n1877
notech_reg \UART_RXFF/iFIFOMem_reg[16][10] (.CP(n_8309), .D(\UART_RXFF/n1877
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][9] (.CP(n_8315), .D(\UART_RXFF/n1876
notech_reg \UART_RXFF/iFIFOMem_reg[16][9] (.CP(n_8309), .D(\UART_RXFF/n1876
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][8] (.CP(n_8315), .D(\UART_RXFF/n1875
notech_reg \UART_RXFF/iFIFOMem_reg[16][8] (.CP(n_8309), .D(\UART_RXFF/n1875
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][7] (.CP(n_8315), .D(\UART_RXFF/n1874
notech_reg \UART_RXFF/iFIFOMem_reg[16][7] (.CP(n_8309), .D(\UART_RXFF/n1874
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][6] (.CP(n_8315), .D(\UART_RXFF/n1873
notech_reg \UART_RXFF/iFIFOMem_reg[16][6] (.CP(n_8309), .D(\UART_RXFF/n1873
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][5] (.CP(n_8315), .D(\UART_RXFF/n1872
notech_reg \UART_RXFF/iFIFOMem_reg[16][5] (.CP(n_8309), .D(\UART_RXFF/n1872
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][4] (.CP(n_8313), .D(\UART_RXFF/n1871
notech_reg \UART_RXFF/iFIFOMem_reg[16][4] (.CP(n_8307), .D(\UART_RXFF/n1871
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][3] (.CP(n_8313), .D(\UART_RXFF/n1870
notech_reg \UART_RXFF/iFIFOMem_reg[16][3] (.CP(n_8307), .D(\UART_RXFF/n1870
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][2] (.CP(n_8313), .D(\UART_RXFF/n1869
notech_reg \UART_RXFF/iFIFOMem_reg[16][2] (.CP(n_8307), .D(\UART_RXFF/n1869
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][1] (.CP(n_8313), .D(\UART_RXFF/n1868
notech_reg \UART_RXFF/iFIFOMem_reg[16][1] (.CP(n_8307), .D(\UART_RXFF/n1868
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[16][0] (.CP(n_8313), .D(\UART_RXFF/n1867
notech_reg \UART_RXFF/iFIFOMem_reg[16][0] (.CP(n_8307), .D(\UART_RXFF/n1867
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[16][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][10] (.CP(n_8313), .D(\UART_RXFF/n1866
notech_reg \UART_RXFF/iFIFOMem_reg[15][10] (.CP(n_8307), .D(\UART_RXFF/n1866
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][9] (.CP(n_8313), .D(\UART_RXFF/n1865
notech_reg \UART_RXFF/iFIFOMem_reg[15][9] (.CP(n_8307), .D(\UART_RXFF/n1865
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][8] (.CP(n_8310), .D(\UART_RXFF/n1864
notech_reg \UART_RXFF/iFIFOMem_reg[15][8] (.CP(n_8304), .D(\UART_RXFF/n1864
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][7] (.CP(n_8313), .D(\UART_RXFF/n1863
notech_reg \UART_RXFF/iFIFOMem_reg[15][7] (.CP(n_8307), .D(\UART_RXFF/n1863
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][6] (.CP(n_8313), .D(\UART_RXFF/n1862
notech_reg \UART_RXFF/iFIFOMem_reg[15][6] (.CP(n_8307), .D(\UART_RXFF/n1862
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][5] (.CP(n_8313), .D(\UART_RXFF/n1861
notech_reg \UART_RXFF/iFIFOMem_reg[15][5] (.CP(n_8307), .D(\UART_RXFF/n1861
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][4] (.CP(n_8313), .D(\UART_RXFF/n1860
notech_reg \UART_RXFF/iFIFOMem_reg[15][4] (.CP(n_8307), .D(\UART_RXFF/n1860
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][3] (.CP(n_8313), .D(\UART_RXFF/n1859
notech_reg \UART_RXFF/iFIFOMem_reg[15][3] (.CP(n_8307), .D(\UART_RXFF/n1859
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][2] (.CP(n_8313), .D(\UART_RXFF/n1858
notech_reg \UART_RXFF/iFIFOMem_reg[15][2] (.CP(n_8307), .D(\UART_RXFF/n1858
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][1] (.CP(n_8313), .D(\UART_RXFF/n1857
notech_reg \UART_RXFF/iFIFOMem_reg[15][1] (.CP(n_8307), .D(\UART_RXFF/n1857
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[15][0] (.CP(n_8315), .D(\UART_RXFF/n1856
notech_reg \UART_RXFF/iFIFOMem_reg[15][0] (.CP(n_8309), .D(\UART_RXFF/n1856
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[15][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][10] (.CP(n_8315), .D(\UART_RXFF/n1855
notech_reg \UART_RXFF/iFIFOMem_reg[14][10] (.CP(n_8309), .D(\UART_RXFF/n1855
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][9] (.CP(n_8313), .D(\UART_RXFF/n1854
notech_reg \UART_RXFF/iFIFOMem_reg[14][9] (.CP(n_8307), .D(\UART_RXFF/n1854
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][8] (.CP(n_8313), .D(\UART_RXFF/n1853
notech_reg \UART_RXFF/iFIFOMem_reg[14][8] (.CP(n_8307), .D(\UART_RXFF/n1853
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][7] (.CP(n_8313), .D(\UART_RXFF/n1852
notech_reg \UART_RXFF/iFIFOMem_reg[14][7] (.CP(n_8307), .D(\UART_RXFF/n1852
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][6] (.CP(n_8313), .D(\UART_RXFF/n1851
notech_reg \UART_RXFF/iFIFOMem_reg[14][6] (.CP(n_8307), .D(\UART_RXFF/n1851
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][5] (.CP(n_8313), .D(\UART_RXFF/n1850
notech_reg \UART_RXFF/iFIFOMem_reg[14][5] (.CP(n_8307), .D(\UART_RXFF/n1850
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][4] (.CP(n_8313), .D(\UART_RXFF/n1849
notech_reg \UART_RXFF/iFIFOMem_reg[14][4] (.CP(n_8307), .D(\UART_RXFF/n1849
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][3] (.CP(n_8320), .D(\UART_RXFF/n1848
notech_reg \UART_RXFF/iFIFOMem_reg[14][3] (.CP(n_8314), .D(\UART_RXFF/n1848
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][2] (.CP(n_8320), .D(\UART_RXFF/n1847
notech_reg \UART_RXFF/iFIFOMem_reg[14][2] (.CP(n_8314), .D(\UART_RXFF/n1847
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][1] (.CP(n_8320), .D(\UART_RXFF/n1846
notech_reg \UART_RXFF/iFIFOMem_reg[14][1] (.CP(n_8314), .D(\UART_RXFF/n1846
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[14][0] (.CP(n_8320), .D(\UART_RXFF/n1845
notech_reg \UART_RXFF/iFIFOMem_reg[14][0] (.CP(n_8314), .D(\UART_RXFF/n1845
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[14][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][10] (.CP(n_8320), .D(\UART_RXFF/n1844
notech_reg \UART_RXFF/iFIFOMem_reg[13][10] (.CP(n_8314), .D(\UART_RXFF/n1844
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][9] (.CP(n_8320), .D(\UART_RXFF/n1843
notech_reg \UART_RXFF/iFIFOMem_reg[13][9] (.CP(n_8314), .D(\UART_RXFF/n1843
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][8] (.CP(n_8320), .D(\UART_RXFF/n1842
notech_reg \UART_RXFF/iFIFOMem_reg[13][8] (.CP(n_8314), .D(\UART_RXFF/n1842
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][7] (.CP(n_8320), .D(\UART_RXFF/n1841
notech_reg \UART_RXFF/iFIFOMem_reg[13][7] (.CP(n_8314), .D(\UART_RXFF/n1841
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][6] (.CP(n_8320), .D(\UART_RXFF/n1840
notech_reg \UART_RXFF/iFIFOMem_reg[13][6] (.CP(n_8314), .D(\UART_RXFF/n1840
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][5] (.CP(n_8320), .D(\UART_RXFF/n1839
notech_reg \UART_RXFF/iFIFOMem_reg[13][5] (.CP(n_8314), .D(\UART_RXFF/n1839
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][4] (.CP(n_8320), .D(\UART_RXFF/n1838
notech_reg \UART_RXFF/iFIFOMem_reg[13][4] (.CP(n_8314), .D(\UART_RXFF/n1838
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][3] (.CP(n_8320), .D(\UART_RXFF/n1837
notech_reg \UART_RXFF/iFIFOMem_reg[13][3] (.CP(n_8314), .D(\UART_RXFF/n1837
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][2] (.CP(n_8324), .D(\UART_RXFF/n1836
notech_reg \UART_RXFF/iFIFOMem_reg[13][2] (.CP(n_8318), .D(\UART_RXFF/n1836
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][1] (.CP(n_8324), .D(\UART_RXFF/n1835
notech_reg \UART_RXFF/iFIFOMem_reg[13][1] (.CP(n_8318), .D(\UART_RXFF/n1835
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[13][0] (.CP(n_8324), .D(\UART_RXFF/n1834
notech_reg \UART_RXFF/iFIFOMem_reg[13][0] (.CP(n_8318), .D(\UART_RXFF/n1834
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[13][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][10] (.CP(n_8324), .D(\UART_RXFF/n1833
notech_reg \UART_RXFF/iFIFOMem_reg[12][10] (.CP(n_8318), .D(\UART_RXFF/n1833
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][9] (.CP(n_8324), .D(\UART_RXFF/n1832
notech_reg \UART_RXFF/iFIFOMem_reg[12][9] (.CP(n_8318), .D(\UART_RXFF/n1832
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][8] (.CP(n_8324), .D(\UART_RXFF/n1831
notech_reg \UART_RXFF/iFIFOMem_reg[12][8] (.CP(n_8318), .D(\UART_RXFF/n1831
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][7] (.CP(n_8324), .D(\UART_RXFF/n1830
notech_reg \UART_RXFF/iFIFOMem_reg[12][7] (.CP(n_8318), .D(\UART_RXFF/n1830
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][6] (.CP(n_8324), .D(\UART_RXFF/n1829
notech_reg \UART_RXFF/iFIFOMem_reg[12][6] (.CP(n_8318), .D(\UART_RXFF/n1829
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][5] (.CP(n_8324), .D(\UART_RXFF/n1828
notech_reg \UART_RXFF/iFIFOMem_reg[12][5] (.CP(n_8318), .D(\UART_RXFF/n1828
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][4] (.CP(n_8324), .D(\UART_RXFF/n1827
notech_reg \UART_RXFF/iFIFOMem_reg[12][4] (.CP(n_8318), .D(\UART_RXFF/n1827
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][3] (.CP(n_8324), .D(\UART_RXFF/n1826
notech_reg \UART_RXFF/iFIFOMem_reg[12][3] (.CP(n_8318), .D(\UART_RXFF/n1826
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][2] (.CP(n_8318), .D(\UART_RXFF/n1825
notech_reg \UART_RXFF/iFIFOMem_reg[12][2] (.CP(n_8312), .D(\UART_RXFF/n1825
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][1] (.CP(n_8318), .D(\UART_RXFF/n1824
notech_reg \UART_RXFF/iFIFOMem_reg[12][1] (.CP(n_8312), .D(\UART_RXFF/n1824
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[12][0] (.CP(n_8318), .D(\UART_RXFF/n1823
notech_reg \UART_RXFF/iFIFOMem_reg[12][0] (.CP(n_8312), .D(\UART_RXFF/n1823
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[12][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][10] (.CP(n_8318), .D(\UART_RXFF/n1822
notech_reg \UART_RXFF/iFIFOMem_reg[11][10] (.CP(n_8312), .D(\UART_RXFF/n1822
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][9] (.CP(n_8318), .D(\UART_RXFF/n1821
notech_reg \UART_RXFF/iFIFOMem_reg[11][9] (.CP(n_8312), .D(\UART_RXFF/n1821
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][8] (.CP(n_8318), .D(\UART_RXFF/n1820
notech_reg \UART_RXFF/iFIFOMem_reg[11][8] (.CP(n_8312), .D(\UART_RXFF/n1820
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][7] (.CP(n_8318), .D(\UART_RXFF/n1819
notech_reg \UART_RXFF/iFIFOMem_reg[11][7] (.CP(n_8312), .D(\UART_RXFF/n1819
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][6] (.CP(n_8318), .D(\UART_RXFF/n1818
notech_reg \UART_RXFF/iFIFOMem_reg[11][6] (.CP(n_8312), .D(\UART_RXFF/n1818
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][5] (.CP(n_8318), .D(\UART_RXFF/n1817
notech_reg \UART_RXFF/iFIFOMem_reg[11][5] (.CP(n_8312), .D(\UART_RXFF/n1817
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][4] (.CP(n_8318), .D(\UART_RXFF/n1816
notech_reg \UART_RXFF/iFIFOMem_reg[11][4] (.CP(n_8312), .D(\UART_RXFF/n1816
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][3] (.CP(n_8318), .D(\UART_RXFF/n1815
notech_reg \UART_RXFF/iFIFOMem_reg[11][3] (.CP(n_8312), .D(\UART_RXFF/n1815
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][2] (.CP(n_8318), .D(\UART_RXFF/n1814
notech_reg \UART_RXFF/iFIFOMem_reg[11][2] (.CP(n_8312), .D(\UART_RXFF/n1814
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][1] (.CP(n_8320), .D(\UART_RXFF/n1813
notech_reg \UART_RXFF/iFIFOMem_reg[11][1] (.CP(n_8314), .D(\UART_RXFF/n1813
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[11][0] (.CP(n_8320), .D(\UART_RXFF/n1812
notech_reg \UART_RXFF/iFIFOMem_reg[11][0] (.CP(n_8314), .D(\UART_RXFF/n1812
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[11][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][10] (.CP(n_8320), .D(\UART_RXFF/n1811
notech_reg \UART_RXFF/iFIFOMem_reg[10][10] (.CP(n_8314), .D(\UART_RXFF/n1811
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][9] (.CP(n_8320), .D(\UART_RXFF/n1810
notech_reg \UART_RXFF/iFIFOMem_reg[10][9] (.CP(n_8314), .D(\UART_RXFF/n1810
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][8] (.CP(n_8320), .D(\UART_RXFF/n1809
notech_reg \UART_RXFF/iFIFOMem_reg[10][8] (.CP(n_8314), .D(\UART_RXFF/n1809
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][7] (.CP(n_8320), .D(\UART_RXFF/n1808
notech_reg \UART_RXFF/iFIFOMem_reg[10][7] (.CP(n_8314), .D(\UART_RXFF/n1808
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][6] (.CP(n_8318), .D(\UART_RXFF/n1807
notech_reg \UART_RXFF/iFIFOMem_reg[10][6] (.CP(n_8312), .D(\UART_RXFF/n1807
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][5] (.CP(n_8318), .D(\UART_RXFF/n1806
notech_reg \UART_RXFF/iFIFOMem_reg[10][5] (.CP(n_8312), .D(\UART_RXFF/n1806
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][4] (.CP(n_8318), .D(\UART_RXFF/n1805
notech_reg \UART_RXFF/iFIFOMem_reg[10][4] (.CP(n_8312), .D(\UART_RXFF/n1805
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][3] (.CP(n_8320), .D(\UART_RXFF/n1804
notech_reg \UART_RXFF/iFIFOMem_reg[10][3] (.CP(n_8314), .D(\UART_RXFF/n1804
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][2] (.CP(n_8320), .D(\UART_RXFF/n1803
notech_reg \UART_RXFF/iFIFOMem_reg[10][2] (.CP(n_8314), .D(\UART_RXFF/n1803
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][1] (.CP(n_8310), .D(\UART_RXFF/n1802
notech_reg \UART_RXFF/iFIFOMem_reg[10][1] (.CP(n_8304), .D(\UART_RXFF/n1802
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[10][0] (.CP(n_8302), .D(\UART_RXFF/n1801
notech_reg \UART_RXFF/iFIFOMem_reg[10][0] (.CP(n_8296), .D(\UART_RXFF/n1801
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[10][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][10] (.CP(n_8302), .D(\UART_RXFF/n1800
notech_reg \UART_RXFF/iFIFOMem_reg[9][10] (.CP(n_8296), .D(\UART_RXFF/n1800
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][9] (.CP(n_8302), .D(\UART_RXFF/n1799
notech_reg \UART_RXFF/iFIFOMem_reg[9][9] (.CP(n_8296), .D(\UART_RXFF/n1799
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][8] (.CP(n_8302), .D(\UART_RXFF/n1798
notech_reg \UART_RXFF/iFIFOMem_reg[9][8] (.CP(n_8296), .D(\UART_RXFF/n1798
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][7] (.CP(n_8302), .D(\UART_RXFF/n1797
notech_reg \UART_RXFF/iFIFOMem_reg[9][7] (.CP(n_8296), .D(\UART_RXFF/n1797
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][6] (.CP(n_8302), .D(\UART_RXFF/n1796
notech_reg \UART_RXFF/iFIFOMem_reg[9][6] (.CP(n_8296), .D(\UART_RXFF/n1796
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][5] (.CP(n_8302), .D(\UART_RXFF/n1795
notech_reg \UART_RXFF/iFIFOMem_reg[9][5] (.CP(n_8296), .D(\UART_RXFF/n1795
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][4] (.CP(n_8302), .D(\UART_RXFF/n1794
notech_reg \UART_RXFF/iFIFOMem_reg[9][4] (.CP(n_8296), .D(\UART_RXFF/n1794
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][3] (.CP(n_8302), .D(\UART_RXFF/n1793
notech_reg \UART_RXFF/iFIFOMem_reg[9][3] (.CP(n_8296), .D(\UART_RXFF/n1793
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][2] (.CP(n_8302), .D(\UART_RXFF/n1792
notech_reg \UART_RXFF/iFIFOMem_reg[9][2] (.CP(n_8296), .D(\UART_RXFF/n1792
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][1] (.CP(n_8302), .D(\UART_RXFF/n1791
notech_reg \UART_RXFF/iFIFOMem_reg[9][1] (.CP(n_8296), .D(\UART_RXFF/n1791
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[9][0] (.CP(n_8304), .D(\UART_RXFF/n1790
notech_reg \UART_RXFF/iFIFOMem_reg[9][0] (.CP(n_8298), .D(\UART_RXFF/n1790
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[9][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][10] (.CP(n_8304), .D(\UART_RXFF/n1789
notech_reg \UART_RXFF/iFIFOMem_reg[8][10] (.CP(n_8298), .D(\UART_RXFF/n1789
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][9] (.CP(n_8304), .D(\UART_RXFF/n1788
notech_reg \UART_RXFF/iFIFOMem_reg[8][9] (.CP(n_8298), .D(\UART_RXFF/n1788
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][8] (.CP(n_8304), .D(\UART_RXFF/n1787
notech_reg \UART_RXFF/iFIFOMem_reg[8][8] (.CP(n_8298), .D(\UART_RXFF/n1787
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][7] (.CP(n_8304), .D(\UART_RXFF/n1786
notech_reg \UART_RXFF/iFIFOMem_reg[8][7] (.CP(n_8298), .D(\UART_RXFF/n1786
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][6] (.CP(n_8304), .D(\UART_RXFF/n1785
notech_reg \UART_RXFF/iFIFOMem_reg[8][6] (.CP(n_8298), .D(\UART_RXFF/n1785
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][5] (.CP(n_8304), .D(\UART_RXFF/n1784
notech_reg \UART_RXFF/iFIFOMem_reg[8][5] (.CP(n_8298), .D(\UART_RXFF/n1784
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][4] (.CP(n_8304), .D(\UART_RXFF/n1783
notech_reg \UART_RXFF/iFIFOMem_reg[8][4] (.CP(n_8298), .D(\UART_RXFF/n1783
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][3] (.CP(n_8304), .D(\UART_RXFF/n1782
notech_reg \UART_RXFF/iFIFOMem_reg[8][3] (.CP(n_8298), .D(\UART_RXFF/n1782
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][2] (.CP(n_8304), .D(\UART_RXFF/n1781
notech_reg \UART_RXFF/iFIFOMem_reg[8][2] (.CP(n_8298), .D(\UART_RXFF/n1781
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][1] (.CP(n_8304), .D(\UART_RXFF/n1780
notech_reg \UART_RXFF/iFIFOMem_reg[8][1] (.CP(n_8298), .D(\UART_RXFF/n1780
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[8][0] (.CP(n_8304), .D(\UART_RXFF/n1779
notech_reg \UART_RXFF/iFIFOMem_reg[8][0] (.CP(n_8298), .D(\UART_RXFF/n1779
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[8][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][10] (.CP(n_8299), .D(\UART_RXFF/n1778
notech_reg \UART_RXFF/iFIFOMem_reg[7][10] (.CP(n_8293), .D(\UART_RXFF/n1778
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][9] (.CP(n_8299), .D(\UART_RXFF/n1777
notech_reg \UART_RXFF/iFIFOMem_reg[7][9] (.CP(n_8293), .D(\UART_RXFF/n1777
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][8] (.CP(n_8299), .D(\UART_RXFF/n1776
notech_reg \UART_RXFF/iFIFOMem_reg[7][8] (.CP(n_8293), .D(\UART_RXFF/n1776
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][7] (.CP(n_8299), .D(\UART_RXFF/n1775
notech_reg \UART_RXFF/iFIFOMem_reg[7][7] (.CP(n_8293), .D(\UART_RXFF/n1775
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][6] (.CP(n_8299), .D(\UART_RXFF/n1774
notech_reg \UART_RXFF/iFIFOMem_reg[7][6] (.CP(n_8293), .D(\UART_RXFF/n1774
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][5] (.CP(n_8299), .D(\UART_RXFF/n1773
notech_reg \UART_RXFF/iFIFOMem_reg[7][5] (.CP(n_8293), .D(\UART_RXFF/n1773
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][4] (.CP(n_8299), .D(\UART_RXFF/n1772
notech_reg \UART_RXFF/iFIFOMem_reg[7][4] (.CP(n_8293), .D(\UART_RXFF/n1772
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][3] (.CP(n_8299), .D(\UART_RXFF/n1771
notech_reg \UART_RXFF/iFIFOMem_reg[7][3] (.CP(n_8293), .D(\UART_RXFF/n1771
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][2] (.CP(n_8299), .D(\UART_RXFF/n1770
notech_reg \UART_RXFF/iFIFOMem_reg[7][2] (.CP(n_8293), .D(\UART_RXFF/n1770
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][1] (.CP(n_8299), .D(\UART_RXFF/n1769
notech_reg \UART_RXFF/iFIFOMem_reg[7][1] (.CP(n_8293), .D(\UART_RXFF/n1769
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[7][0] (.CP(n_8299), .D(\UART_RXFF/n1768
notech_reg \UART_RXFF/iFIFOMem_reg[7][0] (.CP(n_8293), .D(\UART_RXFF/n1768
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[7][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][10] (.CP(n_8299), .D(\UART_RXFF/n1767
notech_reg \UART_RXFF/iFIFOMem_reg[6][10] (.CP(n_8293), .D(\UART_RXFF/n1767
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][9] (.CP(n_8302), .D(\UART_RXFF/n1766
notech_reg \UART_RXFF/iFIFOMem_reg[6][9] (.CP(n_8296), .D(\UART_RXFF/n1766
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][8] (.CP(n_8302), .D(\UART_RXFF/n1765
notech_reg \UART_RXFF/iFIFOMem_reg[6][8] (.CP(n_8296), .D(\UART_RXFF/n1765
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][7] (.CP(n_8302), .D(\UART_RXFF/n1764
notech_reg \UART_RXFF/iFIFOMem_reg[6][7] (.CP(n_8296), .D(\UART_RXFF/n1764
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][6] (.CP(n_8302), .D(\UART_RXFF/n1763
notech_reg \UART_RXFF/iFIFOMem_reg[6][6] (.CP(n_8296), .D(\UART_RXFF/n1763
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][5] (.CP(n_8302), .D(\UART_RXFF/n1762
notech_reg \UART_RXFF/iFIFOMem_reg[6][5] (.CP(n_8296), .D(\UART_RXFF/n1762
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][4] (.CP(n_8302), .D(\UART_RXFF/n1761
notech_reg \UART_RXFF/iFIFOMem_reg[6][4] (.CP(n_8296), .D(\UART_RXFF/n1761
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][3] (.CP(n_8299), .D(\UART_RXFF/n1760
notech_reg \UART_RXFF/iFIFOMem_reg[6][3] (.CP(n_8293), .D(\UART_RXFF/n1760
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][2] (.CP(n_8299), .D(\UART_RXFF/n1759
notech_reg \UART_RXFF/iFIFOMem_reg[6][2] (.CP(n_8293), .D(\UART_RXFF/n1759
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][1] (.CP(n_8302), .D(\UART_RXFF/n1758
notech_reg \UART_RXFF/iFIFOMem_reg[6][1] (.CP(n_8296), .D(\UART_RXFF/n1758
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[6][0] (.CP(n_8302), .D(\UART_RXFF/n1757
notech_reg \UART_RXFF/iFIFOMem_reg[6][0] (.CP(n_8296), .D(\UART_RXFF/n1757
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[6][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][10] (.CP(n_8302), .D(\UART_RXFF/n1756
notech_reg \UART_RXFF/iFIFOMem_reg[5][10] (.CP(n_8296), .D(\UART_RXFF/n1756
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][9] (.CP(n_8310), .D(\UART_RXFF/n1755
notech_reg \UART_RXFF/iFIFOMem_reg[5][9] (.CP(n_8304), .D(\UART_RXFF/n1755
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][8] (.CP(n_8310), .D(\UART_RXFF/n1754
notech_reg \UART_RXFF/iFIFOMem_reg[5][8] (.CP(n_8304), .D(\UART_RXFF/n1754
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][7] (.CP(n_8310), .D(\UART_RXFF/n1753
notech_reg \UART_RXFF/iFIFOMem_reg[5][7] (.CP(n_8304), .D(\UART_RXFF/n1753
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][6] (.CP(n_8310), .D(\UART_RXFF/n1752
notech_reg \UART_RXFF/iFIFOMem_reg[5][6] (.CP(n_8304), .D(\UART_RXFF/n1752
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][5] (.CP(n_8310), .D(\UART_RXFF/n1751
notech_reg \UART_RXFF/iFIFOMem_reg[5][5] (.CP(n_8304), .D(\UART_RXFF/n1751
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][4] (.CP(n_8310), .D(\UART_RXFF/n1750
notech_reg \UART_RXFF/iFIFOMem_reg[5][4] (.CP(n_8304), .D(\UART_RXFF/n1750
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][3] (.CP(n_8308), .D(\UART_RXFF/n1749
notech_reg \UART_RXFF/iFIFOMem_reg[5][3] (.CP(n_8302), .D(\UART_RXFF/n1749
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][2] (.CP(n_8308), .D(\UART_RXFF/n1748
notech_reg \UART_RXFF/iFIFOMem_reg[5][2] (.CP(n_8302), .D(\UART_RXFF/n1748
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][1] (.CP(n_8308), .D(\UART_RXFF/n1747
notech_reg \UART_RXFF/iFIFOMem_reg[5][1] (.CP(n_8302), .D(\UART_RXFF/n1747
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[5][0] (.CP(n_8308), .D(\UART_RXFF/n1746
notech_reg \UART_RXFF/iFIFOMem_reg[5][0] (.CP(n_8302), .D(\UART_RXFF/n1746
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[5][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][10] (.CP(n_8308), .D(\UART_RXFF/n1745
notech_reg \UART_RXFF/iFIFOMem_reg[4][10] (.CP(n_8302), .D(\UART_RXFF/n1745
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][9] (.CP(n_8310), .D(\UART_RXFF/n1744
notech_reg \UART_RXFF/iFIFOMem_reg[4][9] (.CP(n_8304), .D(\UART_RXFF/n1744
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][8] (.CP(n_8310), .D(\UART_RXFF/n1743
notech_reg \UART_RXFF/iFIFOMem_reg[4][8] (.CP(n_8304), .D(\UART_RXFF/n1743
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][7] (.CP(n_8310), .D(\UART_RXFF/n1742
notech_reg \UART_RXFF/iFIFOMem_reg[4][7] (.CP(n_8304), .D(\UART_RXFF/n1742
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][6] (.CP(n_8310), .D(\UART_RXFF/n1741
notech_reg \UART_RXFF/iFIFOMem_reg[4][6] (.CP(n_8304), .D(\UART_RXFF/n1741
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][5] (.CP(n_8310), .D(\UART_RXFF/n1740
notech_reg \UART_RXFF/iFIFOMem_reg[4][5] (.CP(n_8304), .D(\UART_RXFF/n1740
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][4] (.CP(n_8310), .D(\UART_RXFF/n1739
notech_reg \UART_RXFF/iFIFOMem_reg[4][4] (.CP(n_8304), .D(\UART_RXFF/n1739
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][3] (.CP(n_8310), .D(\UART_RXFF/n1738
notech_reg \UART_RXFF/iFIFOMem_reg[4][3] (.CP(n_8304), .D(\UART_RXFF/n1738
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][2] (.CP(n_8310), .D(\UART_RXFF/n1737
notech_reg \UART_RXFF/iFIFOMem_reg[4][2] (.CP(n_8304), .D(\UART_RXFF/n1737
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][1] (.CP(n_8310), .D(\UART_RXFF/n1736
notech_reg \UART_RXFF/iFIFOMem_reg[4][1] (.CP(n_8304), .D(\UART_RXFF/n1736
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[4][0] (.CP(n_8310), .D(\UART_RXFF/n1735
notech_reg \UART_RXFF/iFIFOMem_reg[4][0] (.CP(n_8304), .D(\UART_RXFF/n1735
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[4][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][10] (.CP(n_8310), .D(\UART_RXFF/n1734
notech_reg \UART_RXFF/iFIFOMem_reg[3][10] (.CP(n_8304), .D(\UART_RXFF/n1734
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][9] (.CP(n_8310), .D(\UART_RXFF/n1733
notech_reg \UART_RXFF/iFIFOMem_reg[3][9] (.CP(n_8304), .D(\UART_RXFF/n1733
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][8] (.CP(n_8304), .D(\UART_RXFF/n1732
notech_reg \UART_RXFF/iFIFOMem_reg[3][8] (.CP(n_8298), .D(\UART_RXFF/n1732
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][7] (.CP(n_8304), .D(\UART_RXFF/n1731
notech_reg \UART_RXFF/iFIFOMem_reg[3][7] (.CP(n_8298), .D(\UART_RXFF/n1731
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][6] (.CP(n_8308), .D(\UART_RXFF/n1730
notech_reg \UART_RXFF/iFIFOMem_reg[3][6] (.CP(n_8302), .D(\UART_RXFF/n1730
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][5] (.CP(n_8308), .D(\UART_RXFF/n1729
notech_reg \UART_RXFF/iFIFOMem_reg[3][5] (.CP(n_8302), .D(\UART_RXFF/n1729
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][4] (.CP(n_8308), .D(\UART_RXFF/n1728
notech_reg \UART_RXFF/iFIFOMem_reg[3][4] (.CP(n_8302), .D(\UART_RXFF/n1728
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][3] (.CP(n_8304), .D(\UART_RXFF/n1727
notech_reg \UART_RXFF/iFIFOMem_reg[3][3] (.CP(n_8298), .D(\UART_RXFF/n1727
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][2] (.CP(n_8304), .D(\UART_RXFF/n1726
notech_reg \UART_RXFF/iFIFOMem_reg[3][2] (.CP(n_8298), .D(\UART_RXFF/n1726
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][1] (.CP(n_8304), .D(\UART_RXFF/n1725
notech_reg \UART_RXFF/iFIFOMem_reg[3][1] (.CP(n_8298), .D(\UART_RXFF/n1725
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[3][0] (.CP(n_8304), .D(\UART_RXFF/n1724
notech_reg \UART_RXFF/iFIFOMem_reg[3][0] (.CP(n_8298), .D(\UART_RXFF/n1724
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[3][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][10] (.CP(n_8304), .D(\UART_RXFF/n1723
notech_reg \UART_RXFF/iFIFOMem_reg[2][10] (.CP(n_8298), .D(\UART_RXFF/n1723
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][9] (.CP(n_8304), .D(\UART_RXFF/n1722
notech_reg \UART_RXFF/iFIFOMem_reg[2][9] (.CP(n_8298), .D(\UART_RXFF/n1722
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][8] (.CP(n_8308), .D(\UART_RXFF/n1721
notech_reg \UART_RXFF/iFIFOMem_reg[2][8] (.CP(n_8302), .D(\UART_RXFF/n1721
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][7] (.CP(n_8308), .D(\UART_RXFF/n1720
notech_reg \UART_RXFF/iFIFOMem_reg[2][7] (.CP(n_8302), .D(\UART_RXFF/n1720
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][6] (.CP(n_8308), .D(\UART_RXFF/n1719
notech_reg \UART_RXFF/iFIFOMem_reg[2][6] (.CP(n_8302), .D(\UART_RXFF/n1719
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][5] (.CP(n_8308), .D(\UART_RXFF/n1718
notech_reg \UART_RXFF/iFIFOMem_reg[2][5] (.CP(n_8302), .D(\UART_RXFF/n1718
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][4] (.CP(n_8308), .D(\UART_RXFF/n1717
notech_reg \UART_RXFF/iFIFOMem_reg[2][4] (.CP(n_8302), .D(\UART_RXFF/n1717
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][3] (.CP(n_8308), .D(\UART_RXFF/n1716
notech_reg \UART_RXFF/iFIFOMem_reg[2][3] (.CP(n_8302), .D(\UART_RXFF/n1716
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][2] (.CP(n_8308), .D(\UART_RXFF/n1715
notech_reg \UART_RXFF/iFIFOMem_reg[2][2] (.CP(n_8302), .D(\UART_RXFF/n1715
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][1] (.CP(n_8308), .D(\UART_RXFF/n1714
notech_reg \UART_RXFF/iFIFOMem_reg[2][1] (.CP(n_8302), .D(\UART_RXFF/n1714
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[2][0] (.CP(n_8308), .D(\UART_RXFF/n1713
notech_reg \UART_RXFF/iFIFOMem_reg[2][0] (.CP(n_8302), .D(\UART_RXFF/n1713
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[2][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][10] (.CP(n_8308), .D(\UART_RXFF/n1712
notech_reg \UART_RXFF/iFIFOMem_reg[1][10] (.CP(n_8302), .D(\UART_RXFF/n1712
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][9] (.CP(n_8308), .D(\UART_RXFF/n1711
notech_reg \UART_RXFF/iFIFOMem_reg[1][9] (.CP(n_8302), .D(\UART_RXFF/n1711
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][8] (.CP(n_8308), .D(\UART_RXFF/n1710
notech_reg \UART_RXFF/iFIFOMem_reg[1][8] (.CP(n_8302), .D(\UART_RXFF/n1710
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][7] (.CP(n_8439), .D(\UART_RXFF/n1709
notech_reg \UART_RXFF/iFIFOMem_reg[1][7] (.CP(n_8433), .D(\UART_RXFF/n1709
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][6] (.CP(n_8439), .D(\UART_RXFF/n1708
notech_reg \UART_RXFF/iFIFOMem_reg[1][6] (.CP(n_8433), .D(\UART_RXFF/n1708
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][5] (.CP(n_8439), .D(\UART_RXFF/n1707
notech_reg \UART_RXFF/iFIFOMem_reg[1][5] (.CP(n_8433), .D(\UART_RXFF/n1707
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][4] (.CP(n_8439), .D(\UART_RXFF/n1706
notech_reg \UART_RXFF/iFIFOMem_reg[1][4] (.CP(n_8433), .D(\UART_RXFF/n1706
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][3] (.CP(n_8439), .D(\UART_RXFF/n1705
notech_reg \UART_RXFF/iFIFOMem_reg[1][3] (.CP(n_8433), .D(\UART_RXFF/n1705
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][2] (.CP(n_8439), .D(\UART_RXFF/n1704
notech_reg \UART_RXFF/iFIFOMem_reg[1][2] (.CP(n_8433), .D(\UART_RXFF/n1704
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][1] (.CP(n_8438), .D(\UART_RXFF/n1703
notech_reg \UART_RXFF/iFIFOMem_reg[1][1] (.CP(n_8432), .D(\UART_RXFF/n1703
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[1][0] (.CP(n_8438), .D(\UART_RXFF/n1702
notech_reg \UART_RXFF/iFIFOMem_reg[1][0] (.CP(n_8432), .D(\UART_RXFF/n1702
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[1][0] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][10] (.CP(n_8439), .D(\UART_RXFF/n1701
notech_reg \UART_RXFF/iFIFOMem_reg[0][10] (.CP(n_8433), .D(\UART_RXFF/n1701
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][10] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][9] (.CP(n_8439), .D(\UART_RXFF/n1700
notech_reg \UART_RXFF/iFIFOMem_reg[0][9] (.CP(n_8433), .D(\UART_RXFF/n1700
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][9] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][8] (.CP(n_8439), .D(\UART_RXFF/n1699
notech_reg \UART_RXFF/iFIFOMem_reg[0][8] (.CP(n_8433), .D(\UART_RXFF/n1699
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][8] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][7] (.CP(n_8439), .D(\UART_RXFF/n1698
notech_reg \UART_RXFF/iFIFOMem_reg[0][7] (.CP(n_8433), .D(\UART_RXFF/n1698
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][7] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][6] (.CP(n_8440), .D(\UART_RXFF/n1697
notech_reg \UART_RXFF/iFIFOMem_reg[0][6] (.CP(n_8434), .D(\UART_RXFF/n1697
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][6] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][5] (.CP(n_8440), .D(\UART_RXFF/n1696
notech_reg \UART_RXFF/iFIFOMem_reg[0][5] (.CP(n_8434), .D(\UART_RXFF/n1696
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][5] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][4] (.CP(n_8440), .D(\UART_RXFF/n1695
notech_reg \UART_RXFF/iFIFOMem_reg[0][4] (.CP(n_8434), .D(\UART_RXFF/n1695
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][4] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][3] (.CP(n_8440), .D(\UART_RXFF/n1694
notech_reg \UART_RXFF/iFIFOMem_reg[0][3] (.CP(n_8434), .D(\UART_RXFF/n1694
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][3] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][2] (.CP(n_8440), .D(\UART_RXFF/n1693
notech_reg \UART_RXFF/iFIFOMem_reg[0][2] (.CP(n_8434), .D(\UART_RXFF/n1693
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][2] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][1] (.CP(n_8440), .D(\UART_RXFF/n1692
notech_reg \UART_RXFF/iFIFOMem_reg[0][1] (.CP(n_8434), .D(\UART_RXFF/n1692
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][1] ));
notech_reg \UART_RXFF/iFIFOMem_reg[0][0] (.CP(n_8440), .D(\UART_RXFF/n1691
notech_reg \UART_RXFF/iFIFOMem_reg[0][0] (.CP(n_8434), .D(\UART_RXFF/n1691
), .CD(1'b1), .Q(\UART_RXFF/iFIFOMem[0][0] ));
notech_reg \UART_RXFF/Q_reg[10] (.CP(n_8439), .D(\UART_RXFF/n979 ), .CD(
notech_reg \UART_RXFF/Q_reg[10] (.CP(n_8433), .D(\UART_RXFF/n979 ), .CD(
1'b1), .Q(iRXFIFOQ[10]));
notech_reg \UART_RXFF/Q_reg[9] (.CP(n_8440), .D(\UART_RXFF/n977 ), .CD(
notech_reg \UART_RXFF/Q_reg[9] (.CP(n_8434), .D(\UART_RXFF/n977 ), .CD(
1'b1), .Q(iRXFIFOQ[9]));
notech_reg \UART_RXFF/Q_reg[8] (.CP(n_8440), .D(\UART_RXFF/n975 ), .CD(
notech_reg \UART_RXFF/Q_reg[8] (.CP(n_8434), .D(\UART_RXFF/n975 ), .CD(
1'b1), .Q(iRXFIFOQ[8]));
notech_reg \UART_RXFF/Q_reg[7] (.CP(n_8440), .D(\UART_RXFF/n973 ), .CD(
notech_reg \UART_RXFF/Q_reg[7] (.CP(n_8434), .D(\UART_RXFF/n973 ), .CD(
1'b1), .Q(iRXFIFOQ[7]));
notech_reg \UART_RXFF/Q_reg[6] (.CP(n_8435), .D(\UART_RXFF/n971 ), .CD(
notech_reg \UART_RXFF/Q_reg[6] (.CP(n_8429), .D(\UART_RXFF/n971 ), .CD(
1'b1), .Q(iRXFIFOQ[6]));
notech_reg \UART_RXFF/Q_reg[5] (.CP(n_8435), .D(\UART_RXFF/n969 ), .CD(
notech_reg \UART_RXFF/Q_reg[5] (.CP(n_8429), .D(\UART_RXFF/n969 ), .CD(
1'b1), .Q(iRXFIFOQ[5]));
notech_reg \UART_RXFF/Q_reg[4] (.CP(n_8435), .D(\UART_RXFF/n967 ), .CD(
notech_reg \UART_RXFF/Q_reg[4] (.CP(n_8429), .D(\UART_RXFF/n967 ), .CD(
1'b1), .Q(iRXFIFOQ[4]));
notech_reg \UART_RXFF/Q_reg[3] (.CP(n_8435), .D(\UART_RXFF/n965 ), .CD(
notech_reg \UART_RXFF/Q_reg[3] (.CP(n_8429), .D(\UART_RXFF/n965 ), .CD(
1'b1), .Q(iRXFIFOQ[3]));
notech_reg \UART_RXFF/Q_reg[2] (.CP(n_8435), .D(\UART_RXFF/n963 ), .CD(
notech_reg \UART_RXFF/Q_reg[2] (.CP(n_8429), .D(\UART_RXFF/n963 ), .CD(
1'b1), .Q(iRXFIFOQ[2]));
notech_reg \UART_RXFF/Q_reg[1] (.CP(n_8435), .D(\UART_RXFF/n961 ), .CD(
notech_reg \UART_RXFF/Q_reg[1] (.CP(n_8429), .D(\UART_RXFF/n961 ), .CD(
1'b1), .Q(iRXFIFOQ[1]));
notech_reg \UART_RXFF/Q_reg[0] (.CP(n_8434), .D(\UART_RXFF/n959 ), .CD(
notech_reg \UART_RXFF/Q_reg[0] (.CP(n_8428), .D(\UART_RXFF/n959 ), .CD(
1'b1), .Q(iRXFIFOQ[0]));
notech_reg \UART_RXFF/iUSAGE_reg[0] (.CP(n_8434), .D(\UART_RXFF/n1690 ),
notech_reg \UART_RXFF/iUSAGE_reg[0] (.CP(n_8428), .D(\UART_RXFF/n1690 ),
.CD(\UART_IS_RI/n1 ), .Q(\UART_RXFF/USAGE[0] ));
notech_reg \UART_RXFF/iUSAGE_reg[5] (.CP(n_8434), .D(\UART_RXFF/n1685 ),
notech_reg \UART_RXFF/iUSAGE_reg[5] (.CP(n_8428), .D(\UART_RXFF/n1685 ),
.CD(\UART_IS_CTS/n1 ), .Q(iRXFIFOUsage[5]));
notech_reg \UART_RXFF/iUSAGE_reg[1] (.CP(n_8435), .D(\UART_RXFF/n1689 ),
notech_reg \UART_RXFF/iUSAGE_reg[1] (.CP(n_8429), .D(\UART_RXFF/n1689 ),
.CD(\UART_IS_SIN/n1 ), .Q(iRXFIFOUsage[1]));
notech_reg \UART_RXFF/iUSAGE_reg[2] (.CP(n_8435), .D(\UART_RXFF/n1688 ),
notech_reg \UART_RXFF/iUSAGE_reg[2] (.CP(n_8429), .D(\UART_RXFF/n1688 ),
.CD(\UART_IF_CTS/n8 ), .Q(iRXFIFOUsage[2]));
notech_reg \UART_RXFF/iUSAGE_reg[3] (.CP(n_8435), .D(\UART_RXFF/n1687 ),
notech_reg \UART_RXFF/iUSAGE_reg[3] (.CP(n_8429), .D(\UART_RXFF/n1687 ),
.CD(\UART_IF_CTS/n8 ), .Q(iRXFIFOUsage[3]));
notech_reg \UART_RXFF/iUSAGE_reg[4] (.CP(n_8438), .D(\UART_RXFF/n1686 ),
notech_reg \UART_RXFF/iUSAGE_reg[4] (.CP(n_8432), .D(\UART_RXFF/n1686 ),
.CD(\UART_IF_DSR/n8 ), .Q(iRXFIFOUsage[4]));
notech_inv \UART_RXFF/U3 (.A(iRXFIFOD[0]), .Z(\UART_RXFF/n1 ));
notech_inv \UART_RXFF/U4 (.A(\UART_RXFF/n1 ), .Z(\UART_RXFF/n2 ));
3222,27 → 3228,27
notech_mux4 \UART_RXFF/U302 (.S0(\UART_RXFF/N17 ), .S1(\UART_RXFF/N16 ),
.A(\UART_RXFF/n289 ), .B(\UART_RXFF/n279 ), .C(\UART_RXFF/n284
), .D(\UART_RXFF/n274 ), .Z(\UART_RXFF/N123 ));
notech_mux2 \UART_RXFF/U303 (.S(n_8089), .A(\UART_RXFF/N123 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U303 (.S(n_8096), .A(\UART_RXFF/N123 ), .B(iRXFIFOQ
[10]), .Z(\UART_RXFF/n979 ));
notech_mux2 \UART_RXFF/U304 (.S(n_8089), .A(\UART_RXFF/N124 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U304 (.S(n_8096), .A(\UART_RXFF/N124 ), .B(iRXFIFOQ
[9]), .Z(\UART_RXFF/n977 ));
notech_mux2 \UART_RXFF/U305 (.S(n_8089), .A(\UART_RXFF/N125 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U305 (.S(n_8096), .A(\UART_RXFF/N125 ), .B(iRXFIFOQ
[8]), .Z(\UART_RXFF/n975 ));
notech_mux2 \UART_RXFF/U306 (.S(n_8089), .A(\UART_RXFF/N126 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U306 (.S(n_8096), .A(\UART_RXFF/N126 ), .B(iRXFIFOQ
[7]), .Z(\UART_RXFF/n973 ));
notech_mux2 \UART_RXFF/U307 (.S(n_8089), .A(\UART_RXFF/N127 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U307 (.S(n_8096), .A(\UART_RXFF/N127 ), .B(iRXFIFOQ
[6]), .Z(\UART_RXFF/n971 ));
notech_mux2 \UART_RXFF/U308 (.S(n_8089), .A(\UART_RXFF/N128 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U308 (.S(n_8096), .A(\UART_RXFF/N128 ), .B(iRXFIFOQ
[5]), .Z(\UART_RXFF/n969 ));
notech_mux2 \UART_RXFF/U309 (.S(n_8089), .A(\UART_RXFF/N129 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U309 (.S(n_8096), .A(\UART_RXFF/N129 ), .B(iRXFIFOQ
[4]), .Z(\UART_RXFF/n967 ));
notech_mux2 \UART_RXFF/U310 (.S(n_8089), .A(\UART_RXFF/N130 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U310 (.S(n_8096), .A(\UART_RXFF/N130 ), .B(iRXFIFOQ
[3]), .Z(\UART_RXFF/n965 ));
notech_mux2 \UART_RXFF/U311 (.S(n_8089), .A(\UART_RXFF/N131 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U311 (.S(n_8096), .A(\UART_RXFF/N131 ), .B(iRXFIFOQ
[2]), .Z(\UART_RXFF/n963 ));
notech_mux2 \UART_RXFF/U312 (.S(n_8089), .A(\UART_RXFF/N132 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U312 (.S(n_8096), .A(\UART_RXFF/N132 ), .B(iRXFIFOQ
[1]), .Z(\UART_RXFF/n961 ));
notech_mux2 \UART_RXFF/U313 (.S(n_8089), .A(\UART_RXFF/N133 ), .B(iRXFIFOQ
notech_mux2 \UART_RXFF/U313 (.S(n_8096), .A(\UART_RXFF/N133 ), .B(iRXFIFOQ
[0]), .Z(\UART_RXFF/n959 ));
notech_inv \UART_RXFF/U314 (.A(\UART_RXFF/n290 ), .Z(\UART_RXFF/n2408 )
);
4091,7 → 4097,7
notech_ao3 \UART_RXFF/U737 (.A(\UART_RXFF/n302 ), .B(\UART_RXFF/n337 ),
.C(\UART_RXFF/iWRAddr[4] ), .Z(\UART_RXFF/n357 ));
notech_ao3 \UART_RXFF/U738 (.A(\UART_RXFF/iWRAddr[5] ), .B(\UART_RXFF/n365
), .C(n_8089), .Z(\UART_RXFF/n337 ));
), .C(n_8096), .Z(\UART_RXFF/n337 ));
notech_mux2 \UART_RXFF/U739 (.S(\UART_RXFF/n366 ), .A(\UART_RXFF/iFIFOMem[31][10]
), .B(\UART_RXFF/n42 ), .Z(\UART_RXFF/n2042 ));
notech_mux2 \UART_RXFF/U740 (.S(\UART_RXFF/n366 ), .A(\UART_RXFF/iFIFOMem[31][9]
5039,1085 → 5045,1085
), .Z(\UART_TXFF/N25 ), .CO(\UART_TXFF/add_73/carry [2]));
notech_xor2 \UART_TXFF/add_73/U1 (.A(\UART_TXFF/add_73/carry [6]), .B(\UART_TXFF/iWRAddr[6]
), .Z(\UART_TXFF/N30 ));
notech_reg \UART_TXFF/iRDAddr_reg[0] (.CP(n_8438), .D(\UART_TXFF/n1817 )
notech_reg \UART_TXFF/iRDAddr_reg[0] (.CP(n_8432), .D(\UART_TXFF/n1817 )
, .CD(\UART_IS_DCD/n1 ), .Q(\UART_TXFF/N12 ));
notech_reg_set \UART_TXFF/iEMPTY_reg (.CP(n_8341), .D(\UART_TXFF/N56 ),
notech_reg_set \UART_TXFF/iEMPTY_reg (.CP(n_8335), .D(\UART_TXFF/N56 ),
.SD(\UART_IS_SIN/n1 ), .Q(iTXFIFOEmpty));
notech_reg \UART_TXFF/iRDAddr_reg[6] (.CP(n_8438), .D(\UART_TXFF/n1809 )
notech_reg \UART_TXFF/iRDAddr_reg[6] (.CP(n_8432), .D(\UART_TXFF/n1809 )
, .CD(\UART_IS_RI/n1 ), .Q(\UART_TXFF/iRDAddr[6] ));
notech_reg \UART_TXFF/iRDAddr_reg[1] (.CP(n_8438), .D(\UART_TXFF/n1808 )
notech_reg \UART_TXFF/iRDAddr_reg[1] (.CP(n_8432), .D(\UART_TXFF/n1808 )
, .CD(\UART_IS_DCD/n1 ), .Q(\UART_TXFF/N13 ));
notech_reg \UART_TXFF/iRDAddr_reg[2] (.CP(n_8438), .D(\UART_TXFF/n1807 )
notech_reg \UART_TXFF/iRDAddr_reg[2] (.CP(n_8432), .D(\UART_TXFF/n1807 )
, .CD(\UART_IS_RI/n1 ), .Q(\UART_TXFF/N14 ));
notech_reg \UART_TXFF/iRDAddr_reg[3] (.CP(n_8438), .D(\UART_TXFF/n1806 )
notech_reg \UART_TXFF/iRDAddr_reg[3] (.CP(n_8432), .D(\UART_TXFF/n1806 )
, .CD(\UART_IF_DSR/n8 ), .Q(\UART_TXFF/N15 ));
notech_reg \UART_TXFF/iRDAddr_reg[4] (.CP(n_8435), .D(\UART_TXFF/n1805 )
notech_reg \UART_TXFF/iRDAddr_reg[4] (.CP(n_8429), .D(\UART_TXFF/n1805 )
, .CD(\UART_IF_DSR/n8 ), .Q(\UART_TXFF/N16 ));
notech_reg \UART_TXFF/iRDAddr_reg[5] (.CP(n_8435), .D(\UART_TXFF/n1804 )
notech_reg \UART_TXFF/iRDAddr_reg[5] (.CP(n_8429), .D(\UART_TXFF/n1804 )
, .CD(\UART_IF_CTS/n8 ), .Q(\UART_TXFF/N17 ));
notech_reg \UART_TXFF/iWRAddr_reg[6] (.CP(n_8438), .D(\UART_TXFF/n1816 )
notech_reg \UART_TXFF/iWRAddr_reg[6] (.CP(n_8432), .D(\UART_TXFF/n1816 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_TXFF/iWRAddr[6] ));
notech_reg \UART_TXFF/iWRAddr_reg[0] (.CP(n_8438), .D(\UART_TXFF/n1815 )
notech_reg \UART_TXFF/iWRAddr_reg[0] (.CP(n_8432), .D(\UART_TXFF/n1815 )
, .CD(\UART_IS_SIN/n1 ), .Q(\UART_TXFF/iWRAddr[0] ));
notech_reg \UART_TXFF/iWRAddr_reg[1] (.CP(n_8438), .D(\UART_TXFF/n1814 )
notech_reg \UART_TXFF/iWRAddr_reg[1] (.CP(n_8432), .D(\UART_TXFF/n1814 )
, .CD(\UART_IS_SIN/n1 ), .Q(\UART_TXFF/iWRAddr[1] ));
notech_reg \UART_TXFF/iWRAddr_reg[2] (.CP(n_8444), .D(\UART_TXFF/n1813 )
notech_reg \UART_TXFF/iWRAddr_reg[2] (.CP(n_8438), .D(\UART_TXFF/n1813 )
, .CD(\UART_IS_RI/n1 ), .Q(\UART_TXFF/iWRAddr[2] ));
notech_reg \UART_TXFF/iWRAddr_reg[3] (.CP(n_8444), .D(\UART_TXFF/n1812 )
notech_reg \UART_TXFF/iWRAddr_reg[3] (.CP(n_8438), .D(\UART_TXFF/n1812 )
, .CD(\UART_IS_DCD/n1 ), .Q(\UART_TXFF/iWRAddr[3] ));
notech_reg \UART_TXFF/iWRAddr_reg[4] (.CP(n_8444), .D(\UART_TXFF/n1811 )
notech_reg \UART_TXFF/iWRAddr_reg[4] (.CP(n_8438), .D(\UART_TXFF/n1811 )
, .CD(\UART_IS_DSR/n1 ), .Q(\UART_TXFF/iWRAddr[4] ));
notech_reg \UART_TXFF/iWRAddr_reg[5] (.CP(n_8444), .D(\UART_TXFF/n1810 )
notech_reg \UART_TXFF/iWRAddr_reg[5] (.CP(n_8438), .D(\UART_TXFF/n1810 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_TXFF/iWRAddr[5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][7] (.CP(n_8444), .D(\UART_TXFF/n1803
notech_reg \UART_TXFF/iFIFOMem_reg[63][7] (.CP(n_8438), .D(\UART_TXFF/n1803
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][6] (.CP(n_8444), .D(\UART_TXFF/n1802
notech_reg \UART_TXFF/iFIFOMem_reg[63][6] (.CP(n_8438), .D(\UART_TXFF/n1802
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][5] (.CP(n_8444), .D(\UART_TXFF/n1801
notech_reg \UART_TXFF/iFIFOMem_reg[63][5] (.CP(n_8438), .D(\UART_TXFF/n1801
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][4] (.CP(n_8444), .D(\UART_TXFF/n1800
notech_reg \UART_TXFF/iFIFOMem_reg[63][4] (.CP(n_8438), .D(\UART_TXFF/n1800
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][3] (.CP(n_8444), .D(\UART_TXFF/n1799
notech_reg \UART_TXFF/iFIFOMem_reg[63][3] (.CP(n_8438), .D(\UART_TXFF/n1799
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][2] (.CP(n_8444), .D(\UART_TXFF/n1798
notech_reg \UART_TXFF/iFIFOMem_reg[63][2] (.CP(n_8438), .D(\UART_TXFF/n1798
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][1] (.CP(n_8444), .D(\UART_TXFF/n1797
notech_reg \UART_TXFF/iFIFOMem_reg[63][1] (.CP(n_8438), .D(\UART_TXFF/n1797
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[63][0] (.CP(n_8445), .D(\UART_TXFF/n1796
notech_reg \UART_TXFF/iFIFOMem_reg[63][0] (.CP(n_8439), .D(\UART_TXFF/n1796
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[63][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][7] (.CP(n_8445), .D(\UART_TXFF/n1795
notech_reg \UART_TXFF/iFIFOMem_reg[62][7] (.CP(n_8439), .D(\UART_TXFF/n1795
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][6] (.CP(n_8445), .D(\UART_TXFF/n1794
notech_reg \UART_TXFF/iFIFOMem_reg[62][6] (.CP(n_8439), .D(\UART_TXFF/n1794
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][5] (.CP(n_8445), .D(\UART_TXFF/n1793
notech_reg \UART_TXFF/iFIFOMem_reg[62][5] (.CP(n_8439), .D(\UART_TXFF/n1793
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][4] (.CP(n_8446), .D(\UART_TXFF/n1792
notech_reg \UART_TXFF/iFIFOMem_reg[62][4] (.CP(n_8440), .D(\UART_TXFF/n1792
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][3] (.CP(n_8445), .D(\UART_TXFF/n1791
notech_reg \UART_TXFF/iFIFOMem_reg[62][3] (.CP(n_8439), .D(\UART_TXFF/n1791
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][2] (.CP(n_8445), .D(\UART_TXFF/n1790
notech_reg \UART_TXFF/iFIFOMem_reg[62][2] (.CP(n_8439), .D(\UART_TXFF/n1790
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][1] (.CP(n_8445), .D(\UART_TXFF/n1789
notech_reg \UART_TXFF/iFIFOMem_reg[62][1] (.CP(n_8439), .D(\UART_TXFF/n1789
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[62][0] (.CP(n_8445), .D(\UART_TXFF/n1788
notech_reg \UART_TXFF/iFIFOMem_reg[62][0] (.CP(n_8439), .D(\UART_TXFF/n1788
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[62][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][7] (.CP(n_8445), .D(\UART_TXFF/n1787
notech_reg \UART_TXFF/iFIFOMem_reg[61][7] (.CP(n_8439), .D(\UART_TXFF/n1787
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][6] (.CP(n_8445), .D(\UART_TXFF/n1786
notech_reg \UART_TXFF/iFIFOMem_reg[61][6] (.CP(n_8439), .D(\UART_TXFF/n1786
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][5] (.CP(n_8445), .D(\UART_TXFF/n1785
notech_reg \UART_TXFF/iFIFOMem_reg[61][5] (.CP(n_8439), .D(\UART_TXFF/n1785
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][4] (.CP(n_8441), .D(\UART_TXFF/n1784
notech_reg \UART_TXFF/iFIFOMem_reg[61][4] (.CP(n_8435), .D(\UART_TXFF/n1784
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][3] (.CP(n_8441), .D(\UART_TXFF/n1783
notech_reg \UART_TXFF/iFIFOMem_reg[61][3] (.CP(n_8435), .D(\UART_TXFF/n1783
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][2] (.CP(n_8441), .D(\UART_TXFF/n1782
notech_reg \UART_TXFF/iFIFOMem_reg[61][2] (.CP(n_8435), .D(\UART_TXFF/n1782
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][1] (.CP(n_8441), .D(\UART_TXFF/n1781
notech_reg \UART_TXFF/iFIFOMem_reg[61][1] (.CP(n_8435), .D(\UART_TXFF/n1781
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[61][0] (.CP(n_8441), .D(\UART_TXFF/n1780
notech_reg \UART_TXFF/iFIFOMem_reg[61][0] (.CP(n_8435), .D(\UART_TXFF/n1780
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[61][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][7] (.CP(n_8441), .D(\UART_TXFF/n1779
notech_reg \UART_TXFF/iFIFOMem_reg[60][7] (.CP(n_8435), .D(\UART_TXFF/n1779
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][6] (.CP(n_8441), .D(\UART_TXFF/n1778
notech_reg \UART_TXFF/iFIFOMem_reg[60][6] (.CP(n_8435), .D(\UART_TXFF/n1778
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][5] (.CP(n_8440), .D(\UART_TXFF/n1777
notech_reg \UART_TXFF/iFIFOMem_reg[60][5] (.CP(n_8434), .D(\UART_TXFF/n1777
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][4] (.CP(n_8441), .D(\UART_TXFF/n1776
notech_reg \UART_TXFF/iFIFOMem_reg[60][4] (.CP(n_8435), .D(\UART_TXFF/n1776
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][3] (.CP(n_8441), .D(\UART_TXFF/n1775
notech_reg \UART_TXFF/iFIFOMem_reg[60][3] (.CP(n_8435), .D(\UART_TXFF/n1775
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][2] (.CP(n_8441), .D(\UART_TXFF/n1774
notech_reg \UART_TXFF/iFIFOMem_reg[60][2] (.CP(n_8435), .D(\UART_TXFF/n1774
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][1] (.CP(n_8441), .D(\UART_TXFF/n1773
notech_reg \UART_TXFF/iFIFOMem_reg[60][1] (.CP(n_8435), .D(\UART_TXFF/n1773
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[60][0] (.CP(n_8443), .D(\UART_TXFF/n1772
notech_reg \UART_TXFF/iFIFOMem_reg[60][0] (.CP(n_8437), .D(\UART_TXFF/n1772
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[60][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][7] (.CP(n_8443), .D(\UART_TXFF/n1771
notech_reg \UART_TXFF/iFIFOMem_reg[59][7] (.CP(n_8437), .D(\UART_TXFF/n1771
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][6] (.CP(n_8443), .D(\UART_TXFF/n1770
notech_reg \UART_TXFF/iFIFOMem_reg[59][6] (.CP(n_8437), .D(\UART_TXFF/n1770
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][5] (.CP(n_8443), .D(\UART_TXFF/n1769
notech_reg \UART_TXFF/iFIFOMem_reg[59][5] (.CP(n_8437), .D(\UART_TXFF/n1769
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][4] (.CP(n_8443), .D(\UART_TXFF/n1768
notech_reg \UART_TXFF/iFIFOMem_reg[59][4] (.CP(n_8437), .D(\UART_TXFF/n1768
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][3] (.CP(n_8443), .D(\UART_TXFF/n1767
notech_reg \UART_TXFF/iFIFOMem_reg[59][3] (.CP(n_8437), .D(\UART_TXFF/n1767
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][2] (.CP(n_8443), .D(\UART_TXFF/n1766
notech_reg \UART_TXFF/iFIFOMem_reg[59][2] (.CP(n_8437), .D(\UART_TXFF/n1766
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][1] (.CP(n_8443), .D(\UART_TXFF/n1765
notech_reg \UART_TXFF/iFIFOMem_reg[59][1] (.CP(n_8437), .D(\UART_TXFF/n1765
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[59][0] (.CP(n_8443), .D(\UART_TXFF/n1764
notech_reg \UART_TXFF/iFIFOMem_reg[59][0] (.CP(n_8437), .D(\UART_TXFF/n1764
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[59][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][7] (.CP(n_8443), .D(\UART_TXFF/n1763
notech_reg \UART_TXFF/iFIFOMem_reg[58][7] (.CP(n_8437), .D(\UART_TXFF/n1763
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][6] (.CP(n_8443), .D(\UART_TXFF/n1762
notech_reg \UART_TXFF/iFIFOMem_reg[58][6] (.CP(n_8437), .D(\UART_TXFF/n1762
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][5] (.CP(n_8434), .D(\UART_TXFF/n1761
notech_reg \UART_TXFF/iFIFOMem_reg[58][5] (.CP(n_8428), .D(\UART_TXFF/n1761
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][4] (.CP(n_8428), .D(\UART_TXFF/n1760
notech_reg \UART_TXFF/iFIFOMem_reg[58][4] (.CP(n_8422), .D(\UART_TXFF/n1760
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][3] (.CP(n_8427), .D(\UART_TXFF/n1759
notech_reg \UART_TXFF/iFIFOMem_reg[58][3] (.CP(n_8421), .D(\UART_TXFF/n1759
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][2] (.CP(n_8428), .D(\UART_TXFF/n1758
notech_reg \UART_TXFF/iFIFOMem_reg[58][2] (.CP(n_8422), .D(\UART_TXFF/n1758
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][1] (.CP(n_8428), .D(\UART_TXFF/n1757
notech_reg \UART_TXFF/iFIFOMem_reg[58][1] (.CP(n_8422), .D(\UART_TXFF/n1757
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[58][0] (.CP(n_8428), .D(\UART_TXFF/n1756
notech_reg \UART_TXFF/iFIFOMem_reg[58][0] (.CP(n_8422), .D(\UART_TXFF/n1756
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[58][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][7] (.CP(n_8427), .D(\UART_TXFF/n1755
notech_reg \UART_TXFF/iFIFOMem_reg[57][7] (.CP(n_8421), .D(\UART_TXFF/n1755
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][6] (.CP(n_8427), .D(\UART_TXFF/n1754
notech_reg \UART_TXFF/iFIFOMem_reg[57][6] (.CP(n_8421), .D(\UART_TXFF/n1754
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][5] (.CP(n_8427), .D(\UART_TXFF/n1753
notech_reg \UART_TXFF/iFIFOMem_reg[57][5] (.CP(n_8421), .D(\UART_TXFF/n1753
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][4] (.CP(n_8427), .D(\UART_TXFF/n1752
notech_reg \UART_TXFF/iFIFOMem_reg[57][4] (.CP(n_8421), .D(\UART_TXFF/n1752
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][3] (.CP(n_8427), .D(\UART_TXFF/n1751
notech_reg \UART_TXFF/iFIFOMem_reg[57][3] (.CP(n_8421), .D(\UART_TXFF/n1751
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][2] (.CP(n_8427), .D(\UART_TXFF/n1750
notech_reg \UART_TXFF/iFIFOMem_reg[57][2] (.CP(n_8421), .D(\UART_TXFF/n1750
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][1] (.CP(n_8428), .D(\UART_TXFF/n1749
notech_reg \UART_TXFF/iFIFOMem_reg[57][1] (.CP(n_8422), .D(\UART_TXFF/n1749
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[57][0] (.CP(n_8429), .D(\UART_TXFF/n1748
notech_reg \UART_TXFF/iFIFOMem_reg[57][0] (.CP(n_8423), .D(\UART_TXFF/n1748
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[57][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][7] (.CP(n_8429), .D(\UART_TXFF/n1747
notech_reg \UART_TXFF/iFIFOMem_reg[56][7] (.CP(n_8423), .D(\UART_TXFF/n1747
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][6] (.CP(n_8429), .D(\UART_TXFF/n1746
notech_reg \UART_TXFF/iFIFOMem_reg[56][6] (.CP(n_8423), .D(\UART_TXFF/n1746
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][5] (.CP(n_8429), .D(\UART_TXFF/n1745
notech_reg \UART_TXFF/iFIFOMem_reg[56][5] (.CP(n_8423), .D(\UART_TXFF/n1745
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][4] (.CP(n_8429), .D(\UART_TXFF/n1744
notech_reg \UART_TXFF/iFIFOMem_reg[56][4] (.CP(n_8423), .D(\UART_TXFF/n1744
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][3] (.CP(n_8428), .D(\UART_TXFF/n1743
notech_reg \UART_TXFF/iFIFOMem_reg[56][3] (.CP(n_8422), .D(\UART_TXFF/n1743
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][2] (.CP(n_8428), .D(\UART_TXFF/n1742
notech_reg \UART_TXFF/iFIFOMem_reg[56][2] (.CP(n_8422), .D(\UART_TXFF/n1742
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][1] (.CP(n_8428), .D(\UART_TXFF/n1741
notech_reg \UART_TXFF/iFIFOMem_reg[56][1] (.CP(n_8422), .D(\UART_TXFF/n1741
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[56][0] (.CP(n_8428), .D(\UART_TXFF/n1740
notech_reg \UART_TXFF/iFIFOMem_reg[56][0] (.CP(n_8422), .D(\UART_TXFF/n1740
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[56][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][7] (.CP(n_8428), .D(\UART_TXFF/n1739
notech_reg \UART_TXFF/iFIFOMem_reg[55][7] (.CP(n_8422), .D(\UART_TXFF/n1739
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][6] (.CP(n_8428), .D(\UART_TXFF/n1738
notech_reg \UART_TXFF/iFIFOMem_reg[55][6] (.CP(n_8422), .D(\UART_TXFF/n1738
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][5] (.CP(n_8424), .D(\UART_TXFF/n1737
notech_reg \UART_TXFF/iFIFOMem_reg[55][5] (.CP(n_8418), .D(\UART_TXFF/n1737
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][4] (.CP(n_8424), .D(\UART_TXFF/n1736
notech_reg \UART_TXFF/iFIFOMem_reg[55][4] (.CP(n_8418), .D(\UART_TXFF/n1736
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][3] (.CP(n_8425), .D(\UART_TXFF/n1735
notech_reg \UART_TXFF/iFIFOMem_reg[55][3] (.CP(n_8419), .D(\UART_TXFF/n1735
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][2] (.CP(n_8425), .D(\UART_TXFF/n1734
notech_reg \UART_TXFF/iFIFOMem_reg[55][2] (.CP(n_8419), .D(\UART_TXFF/n1734
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][1] (.CP(n_8425), .D(\UART_TXFF/n1733
notech_reg \UART_TXFF/iFIFOMem_reg[55][1] (.CP(n_8419), .D(\UART_TXFF/n1733
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[55][0] (.CP(n_8424), .D(\UART_TXFF/n1732
notech_reg \UART_TXFF/iFIFOMem_reg[55][0] (.CP(n_8418), .D(\UART_TXFF/n1732
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[55][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][7] (.CP(n_8424), .D(\UART_TXFF/n1731
notech_reg \UART_TXFF/iFIFOMem_reg[54][7] (.CP(n_8418), .D(\UART_TXFF/n1731
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][6] (.CP(n_8424), .D(\UART_TXFF/n1730
notech_reg \UART_TXFF/iFIFOMem_reg[54][6] (.CP(n_8418), .D(\UART_TXFF/n1730
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][5] (.CP(n_8424), .D(\UART_TXFF/n1729
notech_reg \UART_TXFF/iFIFOMem_reg[54][5] (.CP(n_8418), .D(\UART_TXFF/n1729
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][4] (.CP(n_8424), .D(\UART_TXFF/n1728
notech_reg \UART_TXFF/iFIFOMem_reg[54][4] (.CP(n_8418), .D(\UART_TXFF/n1728
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][3] (.CP(n_8424), .D(\UART_TXFF/n1727
notech_reg \UART_TXFF/iFIFOMem_reg[54][3] (.CP(n_8418), .D(\UART_TXFF/n1727
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][2] (.CP(n_8425), .D(\UART_TXFF/n1726
notech_reg \UART_TXFF/iFIFOMem_reg[54][2] (.CP(n_8419), .D(\UART_TXFF/n1726
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][1] (.CP(n_8427), .D(\UART_TXFF/n1725
notech_reg \UART_TXFF/iFIFOMem_reg[54][1] (.CP(n_8421), .D(\UART_TXFF/n1725
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[54][0] (.CP(n_8425), .D(\UART_TXFF/n1724
notech_reg \UART_TXFF/iFIFOMem_reg[54][0] (.CP(n_8419), .D(\UART_TXFF/n1724
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[54][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][7] (.CP(n_8427), .D(\UART_TXFF/n1723
notech_reg \UART_TXFF/iFIFOMem_reg[53][7] (.CP(n_8421), .D(\UART_TXFF/n1723
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][6] (.CP(n_8427), .D(\UART_TXFF/n1722
notech_reg \UART_TXFF/iFIFOMem_reg[53][6] (.CP(n_8421), .D(\UART_TXFF/n1722
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][5] (.CP(n_8427), .D(\UART_TXFF/n1721
notech_reg \UART_TXFF/iFIFOMem_reg[53][5] (.CP(n_8421), .D(\UART_TXFF/n1721
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][4] (.CP(n_8425), .D(\UART_TXFF/n1720
notech_reg \UART_TXFF/iFIFOMem_reg[53][4] (.CP(n_8419), .D(\UART_TXFF/n1720
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][3] (.CP(n_8425), .D(\UART_TXFF/n1719
notech_reg \UART_TXFF/iFIFOMem_reg[53][3] (.CP(n_8419), .D(\UART_TXFF/n1719
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][2] (.CP(n_8425), .D(\UART_TXFF/n1718
notech_reg \UART_TXFF/iFIFOMem_reg[53][2] (.CP(n_8419), .D(\UART_TXFF/n1718
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][1] (.CP(n_8425), .D(\UART_TXFF/n1717
notech_reg \UART_TXFF/iFIFOMem_reg[53][1] (.CP(n_8419), .D(\UART_TXFF/n1717
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[53][0] (.CP(n_8425), .D(\UART_TXFF/n1716
notech_reg \UART_TXFF/iFIFOMem_reg[53][0] (.CP(n_8419), .D(\UART_TXFF/n1716
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[53][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][7] (.CP(n_8425), .D(\UART_TXFF/n1715
notech_reg \UART_TXFF/iFIFOMem_reg[52][7] (.CP(n_8419), .D(\UART_TXFF/n1715
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][6] (.CP(n_8433), .D(\UART_TXFF/n1714
notech_reg \UART_TXFF/iFIFOMem_reg[52][6] (.CP(n_8427), .D(\UART_TXFF/n1714
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][5] (.CP(n_8433), .D(\UART_TXFF/n1713
notech_reg \UART_TXFF/iFIFOMem_reg[52][5] (.CP(n_8427), .D(\UART_TXFF/n1713
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][4] (.CP(n_8433), .D(\UART_TXFF/n1712
notech_reg \UART_TXFF/iFIFOMem_reg[52][4] (.CP(n_8427), .D(\UART_TXFF/n1712
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][3] (.CP(n_8433), .D(\UART_TXFF/n1711
notech_reg \UART_TXFF/iFIFOMem_reg[52][3] (.CP(n_8427), .D(\UART_TXFF/n1711
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][2] (.CP(n_8433), .D(\UART_TXFF/n1710
notech_reg \UART_TXFF/iFIFOMem_reg[52][2] (.CP(n_8427), .D(\UART_TXFF/n1710
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][1] (.CP(n_8433), .D(\UART_TXFF/n1709
notech_reg \UART_TXFF/iFIFOMem_reg[52][1] (.CP(n_8427), .D(\UART_TXFF/n1709
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[52][0] (.CP(n_8432), .D(\UART_TXFF/n1708
notech_reg \UART_TXFF/iFIFOMem_reg[52][0] (.CP(n_8426), .D(\UART_TXFF/n1708
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[52][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][7] (.CP(n_8432), .D(\UART_TXFF/n1707
notech_reg \UART_TXFF/iFIFOMem_reg[51][7] (.CP(n_8426), .D(\UART_TXFF/n1707
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][6] (.CP(n_8432), .D(\UART_TXFF/n1706
notech_reg \UART_TXFF/iFIFOMem_reg[51][6] (.CP(n_8426), .D(\UART_TXFF/n1706
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][5] (.CP(n_8432), .D(\UART_TXFF/n1705
notech_reg \UART_TXFF/iFIFOMem_reg[51][5] (.CP(n_8426), .D(\UART_TXFF/n1705
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][4] (.CP(n_8432), .D(\UART_TXFF/n1704
notech_reg \UART_TXFF/iFIFOMem_reg[51][4] (.CP(n_8426), .D(\UART_TXFF/n1704
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][3] (.CP(n_8433), .D(\UART_TXFF/n1703
notech_reg \UART_TXFF/iFIFOMem_reg[51][3] (.CP(n_8427), .D(\UART_TXFF/n1703
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][2] (.CP(n_8434), .D(\UART_TXFF/n1702
notech_reg \UART_TXFF/iFIFOMem_reg[51][2] (.CP(n_8428), .D(\UART_TXFF/n1702
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][1] (.CP(n_8434), .D(\UART_TXFF/n1701
notech_reg \UART_TXFF/iFIFOMem_reg[51][1] (.CP(n_8428), .D(\UART_TXFF/n1701
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[51][0] (.CP(n_8434), .D(\UART_TXFF/n1700
notech_reg \UART_TXFF/iFIFOMem_reg[51][0] (.CP(n_8428), .D(\UART_TXFF/n1700
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[51][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][7] (.CP(n_8434), .D(\UART_TXFF/n1699
notech_reg \UART_TXFF/iFIFOMem_reg[50][7] (.CP(n_8428), .D(\UART_TXFF/n1699
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][6] (.CP(n_8434), .D(\UART_TXFF/n1698
notech_reg \UART_TXFF/iFIFOMem_reg[50][6] (.CP(n_8428), .D(\UART_TXFF/n1698
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][5] (.CP(n_8434), .D(\UART_TXFF/n1697
notech_reg \UART_TXFF/iFIFOMem_reg[50][5] (.CP(n_8428), .D(\UART_TXFF/n1697
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][4] (.CP(n_8433), .D(\UART_TXFF/n1696
notech_reg \UART_TXFF/iFIFOMem_reg[50][4] (.CP(n_8427), .D(\UART_TXFF/n1696
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][3] (.CP(n_8433), .D(\UART_TXFF/n1695
notech_reg \UART_TXFF/iFIFOMem_reg[50][3] (.CP(n_8427), .D(\UART_TXFF/n1695
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][2] (.CP(n_8433), .D(\UART_TXFF/n1694
notech_reg \UART_TXFF/iFIFOMem_reg[50][2] (.CP(n_8427), .D(\UART_TXFF/n1694
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][1] (.CP(n_8434), .D(\UART_TXFF/n1693
notech_reg \UART_TXFF/iFIFOMem_reg[50][1] (.CP(n_8428), .D(\UART_TXFF/n1693
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[50][0] (.CP(n_8433), .D(\UART_TXFF/n1692
notech_reg \UART_TXFF/iFIFOMem_reg[50][0] (.CP(n_8427), .D(\UART_TXFF/n1692
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[50][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][7] (.CP(n_8430), .D(\UART_TXFF/n1691
notech_reg \UART_TXFF/iFIFOMem_reg[49][7] (.CP(n_8424), .D(\UART_TXFF/n1691
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][6] (.CP(n_8430), .D(\UART_TXFF/n1690
notech_reg \UART_TXFF/iFIFOMem_reg[49][6] (.CP(n_8424), .D(\UART_TXFF/n1690
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][5] (.CP(n_8430), .D(\UART_TXFF/n1689
notech_reg \UART_TXFF/iFIFOMem_reg[49][5] (.CP(n_8424), .D(\UART_TXFF/n1689
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][4] (.CP(n_8430), .D(\UART_TXFF/n1688
notech_reg \UART_TXFF/iFIFOMem_reg[49][4] (.CP(n_8424), .D(\UART_TXFF/n1688
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][3] (.CP(n_8430), .D(\UART_TXFF/n1687
notech_reg \UART_TXFF/iFIFOMem_reg[49][3] (.CP(n_8424), .D(\UART_TXFF/n1687
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][2] (.CP(n_8429), .D(\UART_TXFF/n1686
notech_reg \UART_TXFF/iFIFOMem_reg[49][2] (.CP(n_8423), .D(\UART_TXFF/n1686
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][1] (.CP(n_8429), .D(\UART_TXFF/n1685
notech_reg \UART_TXFF/iFIFOMem_reg[49][1] (.CP(n_8423), .D(\UART_TXFF/n1685
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[49][0] (.CP(n_8429), .D(\UART_TXFF/n1684
notech_reg \UART_TXFF/iFIFOMem_reg[49][0] (.CP(n_8423), .D(\UART_TXFF/n1684
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[49][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][7] (.CP(n_8429), .D(\UART_TXFF/n1683
notech_reg \UART_TXFF/iFIFOMem_reg[48][7] (.CP(n_8423), .D(\UART_TXFF/n1683
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][6] (.CP(n_8429), .D(\UART_TXFF/n1682
notech_reg \UART_TXFF/iFIFOMem_reg[48][6] (.CP(n_8423), .D(\UART_TXFF/n1682
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][5] (.CP(n_8429), .D(\UART_TXFF/n1681
notech_reg \UART_TXFF/iFIFOMem_reg[48][5] (.CP(n_8423), .D(\UART_TXFF/n1681
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][4] (.CP(n_8430), .D(\UART_TXFF/n1680
notech_reg \UART_TXFF/iFIFOMem_reg[48][4] (.CP(n_8424), .D(\UART_TXFF/n1680
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][3] (.CP(n_8432), .D(\UART_TXFF/n1679
notech_reg \UART_TXFF/iFIFOMem_reg[48][3] (.CP(n_8426), .D(\UART_TXFF/n1679
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][2] (.CP(n_8432), .D(\UART_TXFF/n1678
notech_reg \UART_TXFF/iFIFOMem_reg[48][2] (.CP(n_8426), .D(\UART_TXFF/n1678
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][1] (.CP(n_8432), .D(\UART_TXFF/n1677
notech_reg \UART_TXFF/iFIFOMem_reg[48][1] (.CP(n_8426), .D(\UART_TXFF/n1677
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[48][0] (.CP(n_8432), .D(\UART_TXFF/n1676
notech_reg \UART_TXFF/iFIFOMem_reg[48][0] (.CP(n_8426), .D(\UART_TXFF/n1676
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[48][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][7] (.CP(n_8432), .D(\UART_TXFF/n1675
notech_reg \UART_TXFF/iFIFOMem_reg[47][7] (.CP(n_8426), .D(\UART_TXFF/n1675
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][6] (.CP(n_8432), .D(\UART_TXFF/n1674
notech_reg \UART_TXFF/iFIFOMem_reg[47][6] (.CP(n_8426), .D(\UART_TXFF/n1674
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][5] (.CP(n_8430), .D(\UART_TXFF/n1673
notech_reg \UART_TXFF/iFIFOMem_reg[47][5] (.CP(n_8424), .D(\UART_TXFF/n1673
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][4] (.CP(n_8430), .D(\UART_TXFF/n1672
notech_reg \UART_TXFF/iFIFOMem_reg[47][4] (.CP(n_8424), .D(\UART_TXFF/n1672
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][3] (.CP(n_8430), .D(\UART_TXFF/n1671
notech_reg \UART_TXFF/iFIFOMem_reg[47][3] (.CP(n_8424), .D(\UART_TXFF/n1671
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][2] (.CP(n_8430), .D(\UART_TXFF/n1670
notech_reg \UART_TXFF/iFIFOMem_reg[47][2] (.CP(n_8424), .D(\UART_TXFF/n1670
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][1] (.CP(n_8430), .D(\UART_TXFF/n1669
notech_reg \UART_TXFF/iFIFOMem_reg[47][1] (.CP(n_8424), .D(\UART_TXFF/n1669
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[47][0] (.CP(n_8446), .D(\UART_TXFF/n1668
notech_reg \UART_TXFF/iFIFOMem_reg[47][0] (.CP(n_8440), .D(\UART_TXFF/n1668
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[47][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][7] (.CP(n_8461), .D(\UART_TXFF/n1667
notech_reg \UART_TXFF/iFIFOMem_reg[46][7] (.CP(n_8455), .D(\UART_TXFF/n1667
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][6] (.CP(n_8461), .D(\UART_TXFF/n1666
notech_reg \UART_TXFF/iFIFOMem_reg[46][6] (.CP(n_8455), .D(\UART_TXFF/n1666
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][5] (.CP(n_8461), .D(\UART_TXFF/n1665
notech_reg \UART_TXFF/iFIFOMem_reg[46][5] (.CP(n_8455), .D(\UART_TXFF/n1665
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][4] (.CP(n_8461), .D(\UART_TXFF/n1664
notech_reg \UART_TXFF/iFIFOMem_reg[46][4] (.CP(n_8455), .D(\UART_TXFF/n1664
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][3] (.CP(n_8461), .D(\UART_TXFF/n1663
notech_reg \UART_TXFF/iFIFOMem_reg[46][3] (.CP(n_8455), .D(\UART_TXFF/n1663
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][2] (.CP(n_8461), .D(\UART_TXFF/n1662
notech_reg \UART_TXFF/iFIFOMem_reg[46][2] (.CP(n_8455), .D(\UART_TXFF/n1662
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][1] (.CP(n_8460), .D(\UART_TXFF/n1661
notech_reg \UART_TXFF/iFIFOMem_reg[46][1] (.CP(n_8454), .D(\UART_TXFF/n1661
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[46][0] (.CP(n_8460), .D(\UART_TXFF/n1660
notech_reg \UART_TXFF/iFIFOMem_reg[46][0] (.CP(n_8454), .D(\UART_TXFF/n1660
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[46][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][7] (.CP(n_8460), .D(\UART_TXFF/n1659
notech_reg \UART_TXFF/iFIFOMem_reg[45][7] (.CP(n_8454), .D(\UART_TXFF/n1659
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][6] (.CP(n_8461), .D(\UART_TXFF/n1658
notech_reg \UART_TXFF/iFIFOMem_reg[45][6] (.CP(n_8455), .D(\UART_TXFF/n1658
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][5] (.CP(n_8461), .D(\UART_TXFF/n1657
notech_reg \UART_TXFF/iFIFOMem_reg[45][5] (.CP(n_8455), .D(\UART_TXFF/n1657
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][4] (.CP(n_8461), .D(\UART_TXFF/n1656
notech_reg \UART_TXFF/iFIFOMem_reg[45][4] (.CP(n_8455), .D(\UART_TXFF/n1656
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][3] (.CP(n_8462), .D(\UART_TXFF/n1655
notech_reg \UART_TXFF/iFIFOMem_reg[45][3] (.CP(n_8456), .D(\UART_TXFF/n1655
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][2] (.CP(n_8462), .D(\UART_TXFF/n1654
notech_reg \UART_TXFF/iFIFOMem_reg[45][2] (.CP(n_8456), .D(\UART_TXFF/n1654
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][1] (.CP(n_8462), .D(\UART_TXFF/n1653
notech_reg \UART_TXFF/iFIFOMem_reg[45][1] (.CP(n_8456), .D(\UART_TXFF/n1653
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[45][0] (.CP(n_8462), .D(\UART_TXFF/n1652
notech_reg \UART_TXFF/iFIFOMem_reg[45][0] (.CP(n_8456), .D(\UART_TXFF/n1652
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[45][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][7] (.CP(n_8462), .D(\UART_TXFF/n1651
notech_reg \UART_TXFF/iFIFOMem_reg[44][7] (.CP(n_8456), .D(\UART_TXFF/n1651
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][6] (.CP(n_8462), .D(\UART_TXFF/n1650
notech_reg \UART_TXFF/iFIFOMem_reg[44][6] (.CP(n_8456), .D(\UART_TXFF/n1650
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][5] (.CP(n_8461), .D(\UART_TXFF/n1649
notech_reg \UART_TXFF/iFIFOMem_reg[44][5] (.CP(n_8455), .D(\UART_TXFF/n1649
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][4] (.CP(n_8461), .D(\UART_TXFF/n1648
notech_reg \UART_TXFF/iFIFOMem_reg[44][4] (.CP(n_8455), .D(\UART_TXFF/n1648
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][3] (.CP(n_8462), .D(\UART_TXFF/n1647
notech_reg \UART_TXFF/iFIFOMem_reg[44][3] (.CP(n_8456), .D(\UART_TXFF/n1647
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][2] (.CP(n_8462), .D(\UART_TXFF/n1646
notech_reg \UART_TXFF/iFIFOMem_reg[44][2] (.CP(n_8456), .D(\UART_TXFF/n1646
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][1] (.CP(n_8462), .D(\UART_TXFF/n1645
notech_reg \UART_TXFF/iFIFOMem_reg[44][1] (.CP(n_8456), .D(\UART_TXFF/n1645
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[44][0] (.CP(n_8459), .D(\UART_TXFF/n1644
notech_reg \UART_TXFF/iFIFOMem_reg[44][0] (.CP(n_8453), .D(\UART_TXFF/n1644
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[44][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][7] (.CP(n_8459), .D(\UART_TXFF/n1643
notech_reg \UART_TXFF/iFIFOMem_reg[43][7] (.CP(n_8453), .D(\UART_TXFF/n1643
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][6] (.CP(n_8459), .D(\UART_TXFF/n1642
notech_reg \UART_TXFF/iFIFOMem_reg[43][6] (.CP(n_8453), .D(\UART_TXFF/n1642
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][5] (.CP(n_8459), .D(\UART_TXFF/n1641
notech_reg \UART_TXFF/iFIFOMem_reg[43][5] (.CP(n_8453), .D(\UART_TXFF/n1641
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][4] (.CP(n_8459), .D(\UART_TXFF/n1640
notech_reg \UART_TXFF/iFIFOMem_reg[43][4] (.CP(n_8453), .D(\UART_TXFF/n1640
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][3] (.CP(n_8459), .D(\UART_TXFF/n1639
notech_reg \UART_TXFF/iFIFOMem_reg[43][3] (.CP(n_8453), .D(\UART_TXFF/n1639
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][2] (.CP(n_8457), .D(\UART_TXFF/n1638
notech_reg \UART_TXFF/iFIFOMem_reg[43][2] (.CP(n_8451), .D(\UART_TXFF/n1638
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][1] (.CP(n_8457), .D(\UART_TXFF/n1637
notech_reg \UART_TXFF/iFIFOMem_reg[43][1] (.CP(n_8451), .D(\UART_TXFF/n1637
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[43][0] (.CP(n_8457), .D(\UART_TXFF/n1636
notech_reg \UART_TXFF/iFIFOMem_reg[43][0] (.CP(n_8451), .D(\UART_TXFF/n1636
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[43][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][7] (.CP(n_8459), .D(\UART_TXFF/n1635
notech_reg \UART_TXFF/iFIFOMem_reg[42][7] (.CP(n_8453), .D(\UART_TXFF/n1635
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][6] (.CP(n_8457), .D(\UART_TXFF/n1634
notech_reg \UART_TXFF/iFIFOMem_reg[42][6] (.CP(n_8451), .D(\UART_TXFF/n1634
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][5] (.CP(n_8459), .D(\UART_TXFF/n1633
notech_reg \UART_TXFF/iFIFOMem_reg[42][5] (.CP(n_8453), .D(\UART_TXFF/n1633
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][4] (.CP(n_8460), .D(\UART_TXFF/n1632
notech_reg \UART_TXFF/iFIFOMem_reg[42][4] (.CP(n_8454), .D(\UART_TXFF/n1632
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][3] (.CP(n_8460), .D(\UART_TXFF/n1631
notech_reg \UART_TXFF/iFIFOMem_reg[42][3] (.CP(n_8454), .D(\UART_TXFF/n1631
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][2] (.CP(n_8460), .D(\UART_TXFF/n1630
notech_reg \UART_TXFF/iFIFOMem_reg[42][2] (.CP(n_8454), .D(\UART_TXFF/n1630
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][1] (.CP(n_8460), .D(\UART_TXFF/n1629
notech_reg \UART_TXFF/iFIFOMem_reg[42][1] (.CP(n_8454), .D(\UART_TXFF/n1629
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[42][0] (.CP(n_8460), .D(\UART_TXFF/n1628
notech_reg \UART_TXFF/iFIFOMem_reg[42][0] (.CP(n_8454), .D(\UART_TXFF/n1628
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[42][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][7] (.CP(n_8460), .D(\UART_TXFF/n1627
notech_reg \UART_TXFF/iFIFOMem_reg[41][7] (.CP(n_8454), .D(\UART_TXFF/n1627
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][6] (.CP(n_8459), .D(\UART_TXFF/n1626
notech_reg \UART_TXFF/iFIFOMem_reg[41][6] (.CP(n_8453), .D(\UART_TXFF/n1626
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][5] (.CP(n_8459), .D(\UART_TXFF/n1625
notech_reg \UART_TXFF/iFIFOMem_reg[41][5] (.CP(n_8453), .D(\UART_TXFF/n1625
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][4] (.CP(n_8459), .D(\UART_TXFF/n1624
notech_reg \UART_TXFF/iFIFOMem_reg[41][4] (.CP(n_8453), .D(\UART_TXFF/n1624
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][3] (.CP(n_8460), .D(\UART_TXFF/n1623
notech_reg \UART_TXFF/iFIFOMem_reg[41][3] (.CP(n_8454), .D(\UART_TXFF/n1623
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][2] (.CP(n_8460), .D(\UART_TXFF/n1622
notech_reg \UART_TXFF/iFIFOMem_reg[41][2] (.CP(n_8454), .D(\UART_TXFF/n1622
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][1] (.CP(n_8466), .D(\UART_TXFF/n1621
notech_reg \UART_TXFF/iFIFOMem_reg[41][1] (.CP(n_8460), .D(\UART_TXFF/n1621
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[41][0] (.CP(n_8466), .D(\UART_TXFF/n1620
notech_reg \UART_TXFF/iFIFOMem_reg[41][0] (.CP(n_8460), .D(\UART_TXFF/n1620
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[41][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][7] (.CP(n_8466), .D(\UART_TXFF/n1619
notech_reg \UART_TXFF/iFIFOMem_reg[40][7] (.CP(n_8460), .D(\UART_TXFF/n1619
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][6] (.CP(n_8466), .D(\UART_TXFF/n1618
notech_reg \UART_TXFF/iFIFOMem_reg[40][6] (.CP(n_8460), .D(\UART_TXFF/n1618
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][5] (.CP(n_8466), .D(\UART_TXFF/n1617
notech_reg \UART_TXFF/iFIFOMem_reg[40][5] (.CP(n_8460), .D(\UART_TXFF/n1617
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][4] (.CP(n_8466), .D(\UART_TXFF/n1616
notech_reg \UART_TXFF/iFIFOMem_reg[40][4] (.CP(n_8460), .D(\UART_TXFF/n1616
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][3] (.CP(n_8466), .D(\UART_TXFF/n1615
notech_reg \UART_TXFF/iFIFOMem_reg[40][3] (.CP(n_8460), .D(\UART_TXFF/n1615
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][2] (.CP(n_8465), .D(\UART_TXFF/n1614
notech_reg \UART_TXFF/iFIFOMem_reg[40][2] (.CP(n_8459), .D(\UART_TXFF/n1614
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][1] (.CP(n_8466), .D(\UART_TXFF/n1613
notech_reg \UART_TXFF/iFIFOMem_reg[40][1] (.CP(n_8460), .D(\UART_TXFF/n1613
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[40][0] (.CP(n_8466), .D(\UART_TXFF/n1612
notech_reg \UART_TXFF/iFIFOMem_reg[40][0] (.CP(n_8460), .D(\UART_TXFF/n1612
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[40][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][7] (.CP(n_8466), .D(\UART_TXFF/n1611
notech_reg \UART_TXFF/iFIFOMem_reg[39][7] (.CP(n_8460), .D(\UART_TXFF/n1611
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][6] (.CP(n_8466), .D(\UART_TXFF/n1610
notech_reg \UART_TXFF/iFIFOMem_reg[39][6] (.CP(n_8460), .D(\UART_TXFF/n1610
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][5] (.CP(n_8467), .D(\UART_TXFF/n1609
notech_reg \UART_TXFF/iFIFOMem_reg[39][5] (.CP(n_8461), .D(\UART_TXFF/n1609
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][4] (.CP(n_8467), .D(\UART_TXFF/n1608
notech_reg \UART_TXFF/iFIFOMem_reg[39][4] (.CP(n_8461), .D(\UART_TXFF/n1608
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][3] (.CP(n_8467), .D(\UART_TXFF/n1607
notech_reg \UART_TXFF/iFIFOMem_reg[39][3] (.CP(n_8461), .D(\UART_TXFF/n1607
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][2] (.CP(n_8467), .D(\UART_TXFF/n1606
notech_reg \UART_TXFF/iFIFOMem_reg[39][2] (.CP(n_8461), .D(\UART_TXFF/n1606
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][1] (.CP(n_8467), .D(\UART_TXFF/n1605
notech_reg \UART_TXFF/iFIFOMem_reg[39][1] (.CP(n_8461), .D(\UART_TXFF/n1605
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[39][0] (.CP(n_8467), .D(\UART_TXFF/n1604
notech_reg \UART_TXFF/iFIFOMem_reg[39][0] (.CP(n_8461), .D(\UART_TXFF/n1604
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[39][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][7] (.CP(n_8467), .D(\UART_TXFF/n1603
notech_reg \UART_TXFF/iFIFOMem_reg[38][7] (.CP(n_8461), .D(\UART_TXFF/n1603
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][6] (.CP(n_8467), .D(\UART_TXFF/n1602
notech_reg \UART_TXFF/iFIFOMem_reg[38][6] (.CP(n_8461), .D(\UART_TXFF/n1602
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][5] (.CP(n_8467), .D(\UART_TXFF/n1601
notech_reg \UART_TXFF/iFIFOMem_reg[38][5] (.CP(n_8461), .D(\UART_TXFF/n1601
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][4] (.CP(n_8467), .D(\UART_TXFF/n1600
notech_reg \UART_TXFF/iFIFOMem_reg[38][4] (.CP(n_8461), .D(\UART_TXFF/n1600
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][3] (.CP(n_8467), .D(\UART_TXFF/n1599
notech_reg \UART_TXFF/iFIFOMem_reg[38][3] (.CP(n_8461), .D(\UART_TXFF/n1599
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][2] (.CP(n_8464), .D(\UART_TXFF/n1598
notech_reg \UART_TXFF/iFIFOMem_reg[38][2] (.CP(n_8458), .D(\UART_TXFF/n1598
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][1] (.CP(n_8464), .D(\UART_TXFF/n1597
notech_reg \UART_TXFF/iFIFOMem_reg[38][1] (.CP(n_8458), .D(\UART_TXFF/n1597
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[38][0] (.CP(n_8464), .D(\UART_TXFF/n1596
notech_reg \UART_TXFF/iFIFOMem_reg[38][0] (.CP(n_8458), .D(\UART_TXFF/n1596
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[38][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][7] (.CP(n_8464), .D(\UART_TXFF/n1595
notech_reg \UART_TXFF/iFIFOMem_reg[37][7] (.CP(n_8458), .D(\UART_TXFF/n1595
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][6] (.CP(n_8464), .D(\UART_TXFF/n1594
notech_reg \UART_TXFF/iFIFOMem_reg[37][6] (.CP(n_8458), .D(\UART_TXFF/n1594
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][5] (.CP(n_8464), .D(\UART_TXFF/n1593
notech_reg \UART_TXFF/iFIFOMem_reg[37][5] (.CP(n_8458), .D(\UART_TXFF/n1593
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][4] (.CP(n_8462), .D(\UART_TXFF/n1592
notech_reg \UART_TXFF/iFIFOMem_reg[37][4] (.CP(n_8456), .D(\UART_TXFF/n1592
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][3] (.CP(n_8462), .D(\UART_TXFF/n1591
notech_reg \UART_TXFF/iFIFOMem_reg[37][3] (.CP(n_8456), .D(\UART_TXFF/n1591
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][2] (.CP(n_8464), .D(\UART_TXFF/n1590
notech_reg \UART_TXFF/iFIFOMem_reg[37][2] (.CP(n_8458), .D(\UART_TXFF/n1590
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][1] (.CP(n_8464), .D(\UART_TXFF/n1589
notech_reg \UART_TXFF/iFIFOMem_reg[37][1] (.CP(n_8458), .D(\UART_TXFF/n1589
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[37][0] (.CP(n_8464), .D(\UART_TXFF/n1588
notech_reg \UART_TXFF/iFIFOMem_reg[37][0] (.CP(n_8458), .D(\UART_TXFF/n1588
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[37][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][7] (.CP(n_8464), .D(\UART_TXFF/n1587
notech_reg \UART_TXFF/iFIFOMem_reg[36][7] (.CP(n_8458), .D(\UART_TXFF/n1587
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][6] (.CP(n_8465), .D(\UART_TXFF/n1586
notech_reg \UART_TXFF/iFIFOMem_reg[36][6] (.CP(n_8459), .D(\UART_TXFF/n1586
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][5] (.CP(n_8465), .D(\UART_TXFF/n1585
notech_reg \UART_TXFF/iFIFOMem_reg[36][5] (.CP(n_8459), .D(\UART_TXFF/n1585
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][4] (.CP(n_8465), .D(\UART_TXFF/n1584
notech_reg \UART_TXFF/iFIFOMem_reg[36][4] (.CP(n_8459), .D(\UART_TXFF/n1584
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][3] (.CP(n_8465), .D(\UART_TXFF/n1583
notech_reg \UART_TXFF/iFIFOMem_reg[36][3] (.CP(n_8459), .D(\UART_TXFF/n1583
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][2] (.CP(n_8465), .D(\UART_TXFF/n1582
notech_reg \UART_TXFF/iFIFOMem_reg[36][2] (.CP(n_8459), .D(\UART_TXFF/n1582
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][1] (.CP(n_8465), .D(\UART_TXFF/n1581
notech_reg \UART_TXFF/iFIFOMem_reg[36][1] (.CP(n_8459), .D(\UART_TXFF/n1581
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[36][0] (.CP(n_8465), .D(\UART_TXFF/n1580
notech_reg \UART_TXFF/iFIFOMem_reg[36][0] (.CP(n_8459), .D(\UART_TXFF/n1580
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[36][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][7] (.CP(n_8464), .D(\UART_TXFF/n1579
notech_reg \UART_TXFF/iFIFOMem_reg[35][7] (.CP(n_8458), .D(\UART_TXFF/n1579
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][6] (.CP(n_8465), .D(\UART_TXFF/n1578
notech_reg \UART_TXFF/iFIFOMem_reg[35][6] (.CP(n_8459), .D(\UART_TXFF/n1578
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][5] (.CP(n_8465), .D(\UART_TXFF/n1577
notech_reg \UART_TXFF/iFIFOMem_reg[35][5] (.CP(n_8459), .D(\UART_TXFF/n1577
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][4] (.CP(n_8465), .D(\UART_TXFF/n1576
notech_reg \UART_TXFF/iFIFOMem_reg[35][4] (.CP(n_8459), .D(\UART_TXFF/n1576
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][3] (.CP(n_8457), .D(\UART_TXFF/n1575
notech_reg \UART_TXFF/iFIFOMem_reg[35][3] (.CP(n_8451), .D(\UART_TXFF/n1575
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][2] (.CP(n_8449), .D(\UART_TXFF/n1574
notech_reg \UART_TXFF/iFIFOMem_reg[35][2] (.CP(n_8443), .D(\UART_TXFF/n1574
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][1] (.CP(n_8449), .D(\UART_TXFF/n1573
notech_reg \UART_TXFF/iFIFOMem_reg[35][1] (.CP(n_8443), .D(\UART_TXFF/n1573
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[35][0] (.CP(n_8450), .D(\UART_TXFF/n1572
notech_reg \UART_TXFF/iFIFOMem_reg[35][0] (.CP(n_8444), .D(\UART_TXFF/n1572
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[35][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][7] (.CP(n_8450), .D(\UART_TXFF/n1571
notech_reg \UART_TXFF/iFIFOMem_reg[34][7] (.CP(n_8444), .D(\UART_TXFF/n1571
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][6] (.CP(n_8450), .D(\UART_TXFF/n1570
notech_reg \UART_TXFF/iFIFOMem_reg[34][6] (.CP(n_8444), .D(\UART_TXFF/n1570
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][5] (.CP(n_8449), .D(\UART_TXFF/n1569
notech_reg \UART_TXFF/iFIFOMem_reg[34][5] (.CP(n_8443), .D(\UART_TXFF/n1569
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][4] (.CP(n_8449), .D(\UART_TXFF/n1568
notech_reg \UART_TXFF/iFIFOMem_reg[34][4] (.CP(n_8443), .D(\UART_TXFF/n1568
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][3] (.CP(n_8449), .D(\UART_TXFF/n1567
notech_reg \UART_TXFF/iFIFOMem_reg[34][3] (.CP(n_8443), .D(\UART_TXFF/n1567
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][2] (.CP(n_8449), .D(\UART_TXFF/n1566
notech_reg \UART_TXFF/iFIFOMem_reg[34][2] (.CP(n_8443), .D(\UART_TXFF/n1566
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][1] (.CP(n_8449), .D(\UART_TXFF/n1565
notech_reg \UART_TXFF/iFIFOMem_reg[34][1] (.CP(n_8443), .D(\UART_TXFF/n1565
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[34][0] (.CP(n_8449), .D(\UART_TXFF/n1564
notech_reg \UART_TXFF/iFIFOMem_reg[34][0] (.CP(n_8443), .D(\UART_TXFF/n1564
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[34][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][7] (.CP(n_8450), .D(\UART_TXFF/n1563
notech_reg \UART_TXFF/iFIFOMem_reg[33][7] (.CP(n_8444), .D(\UART_TXFF/n1563
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][6] (.CP(n_8451), .D(\UART_TXFF/n1562
notech_reg \UART_TXFF/iFIFOMem_reg[33][6] (.CP(n_8445), .D(\UART_TXFF/n1562
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][5] (.CP(n_8450), .D(\UART_TXFF/n1561
notech_reg \UART_TXFF/iFIFOMem_reg[33][5] (.CP(n_8444), .D(\UART_TXFF/n1561
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][4] (.CP(n_8451), .D(\UART_TXFF/n1560
notech_reg \UART_TXFF/iFIFOMem_reg[33][4] (.CP(n_8445), .D(\UART_TXFF/n1560
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][3] (.CP(n_8451), .D(\UART_TXFF/n1559
notech_reg \UART_TXFF/iFIFOMem_reg[33][3] (.CP(n_8445), .D(\UART_TXFF/n1559
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][2] (.CP(n_8451), .D(\UART_TXFF/n1558
notech_reg \UART_TXFF/iFIFOMem_reg[33][2] (.CP(n_8445), .D(\UART_TXFF/n1558
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][1] (.CP(n_8450), .D(\UART_TXFF/n1557
notech_reg \UART_TXFF/iFIFOMem_reg[33][1] (.CP(n_8444), .D(\UART_TXFF/n1557
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[33][0] (.CP(n_8450), .D(\UART_TXFF/n1556
notech_reg \UART_TXFF/iFIFOMem_reg[33][0] (.CP(n_8444), .D(\UART_TXFF/n1556
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[33][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][7] (.CP(n_8450), .D(\UART_TXFF/n1555
notech_reg \UART_TXFF/iFIFOMem_reg[32][7] (.CP(n_8444), .D(\UART_TXFF/n1555
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][6] (.CP(n_8450), .D(\UART_TXFF/n1554
notech_reg \UART_TXFF/iFIFOMem_reg[32][6] (.CP(n_8444), .D(\UART_TXFF/n1554
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][5] (.CP(n_8450), .D(\UART_TXFF/n1553
notech_reg \UART_TXFF/iFIFOMem_reg[32][5] (.CP(n_8444), .D(\UART_TXFF/n1553
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][4] (.CP(n_8450), .D(\UART_TXFF/n1552
notech_reg \UART_TXFF/iFIFOMem_reg[32][4] (.CP(n_8444), .D(\UART_TXFF/n1552
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][3] (.CP(n_8446), .D(\UART_TXFF/n1551
notech_reg \UART_TXFF/iFIFOMem_reg[32][3] (.CP(n_8440), .D(\UART_TXFF/n1551
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][2] (.CP(n_8446), .D(\UART_TXFF/n1550
notech_reg \UART_TXFF/iFIFOMem_reg[32][2] (.CP(n_8440), .D(\UART_TXFF/n1550
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][1] (.CP(n_8446), .D(\UART_TXFF/n1549
notech_reg \UART_TXFF/iFIFOMem_reg[32][1] (.CP(n_8440), .D(\UART_TXFF/n1549
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[32][0] (.CP(n_8448), .D(\UART_TXFF/n1548
notech_reg \UART_TXFF/iFIFOMem_reg[32][0] (.CP(n_8442), .D(\UART_TXFF/n1548
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[32][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][7] (.CP(n_8448), .D(\UART_TXFF/n1547
notech_reg \UART_TXFF/iFIFOMem_reg[31][7] (.CP(n_8442), .D(\UART_TXFF/n1547
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][6] (.CP(n_8446), .D(\UART_TXFF/n1546
notech_reg \UART_TXFF/iFIFOMem_reg[31][6] (.CP(n_8440), .D(\UART_TXFF/n1546
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][5] (.CP(n_8446), .D(\UART_TXFF/n1545
notech_reg \UART_TXFF/iFIFOMem_reg[31][5] (.CP(n_8440), .D(\UART_TXFF/n1545
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][4] (.CP(n_8446), .D(\UART_TXFF/n1544
notech_reg \UART_TXFF/iFIFOMem_reg[31][4] (.CP(n_8440), .D(\UART_TXFF/n1544
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][3] (.CP(n_8446), .D(\UART_TXFF/n1543
notech_reg \UART_TXFF/iFIFOMem_reg[31][3] (.CP(n_8440), .D(\UART_TXFF/n1543
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][2] (.CP(n_8446), .D(\UART_TXFF/n1542
notech_reg \UART_TXFF/iFIFOMem_reg[31][2] (.CP(n_8440), .D(\UART_TXFF/n1542
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][1] (.CP(n_8446), .D(\UART_TXFF/n1541
notech_reg \UART_TXFF/iFIFOMem_reg[31][1] (.CP(n_8440), .D(\UART_TXFF/n1541
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[31][0] (.CP(n_8448), .D(\UART_TXFF/n1540
notech_reg \UART_TXFF/iFIFOMem_reg[31][0] (.CP(n_8442), .D(\UART_TXFF/n1540
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[31][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][7] (.CP(n_8448), .D(\UART_TXFF/n1539
notech_reg \UART_TXFF/iFIFOMem_reg[30][7] (.CP(n_8442), .D(\UART_TXFF/n1539
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][6] (.CP(n_8448), .D(\UART_TXFF/n1538
notech_reg \UART_TXFF/iFIFOMem_reg[30][6] (.CP(n_8442), .D(\UART_TXFF/n1538
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][5] (.CP(n_8449), .D(\UART_TXFF/n1537
notech_reg \UART_TXFF/iFIFOMem_reg[30][5] (.CP(n_8443), .D(\UART_TXFF/n1537
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][4] (.CP(n_8449), .D(\UART_TXFF/n1536
notech_reg \UART_TXFF/iFIFOMem_reg[30][4] (.CP(n_8443), .D(\UART_TXFF/n1536
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][3] (.CP(n_8449), .D(\UART_TXFF/n1535
notech_reg \UART_TXFF/iFIFOMem_reg[30][3] (.CP(n_8443), .D(\UART_TXFF/n1535
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][2] (.CP(n_8448), .D(\UART_TXFF/n1534
notech_reg \UART_TXFF/iFIFOMem_reg[30][2] (.CP(n_8442), .D(\UART_TXFF/n1534
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][1] (.CP(n_8448), .D(\UART_TXFF/n1533
notech_reg \UART_TXFF/iFIFOMem_reg[30][1] (.CP(n_8442), .D(\UART_TXFF/n1533
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[30][0] (.CP(n_8448), .D(\UART_TXFF/n1532
notech_reg \UART_TXFF/iFIFOMem_reg[30][0] (.CP(n_8442), .D(\UART_TXFF/n1532
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[30][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][7] (.CP(n_8448), .D(\UART_TXFF/n1531
notech_reg \UART_TXFF/iFIFOMem_reg[29][7] (.CP(n_8442), .D(\UART_TXFF/n1531
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][6] (.CP(n_8448), .D(\UART_TXFF/n1530
notech_reg \UART_TXFF/iFIFOMem_reg[29][6] (.CP(n_8442), .D(\UART_TXFF/n1530
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][5] (.CP(n_8448), .D(\UART_TXFF/n1529
notech_reg \UART_TXFF/iFIFOMem_reg[29][5] (.CP(n_8442), .D(\UART_TXFF/n1529
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][4] (.CP(n_8456), .D(\UART_TXFF/n1528
notech_reg \UART_TXFF/iFIFOMem_reg[29][4] (.CP(n_8450), .D(\UART_TXFF/n1528
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][3] (.CP(n_8456), .D(\UART_TXFF/n1527
notech_reg \UART_TXFF/iFIFOMem_reg[29][3] (.CP(n_8450), .D(\UART_TXFF/n1527
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][2] (.CP(n_8456), .D(\UART_TXFF/n1526
notech_reg \UART_TXFF/iFIFOMem_reg[29][2] (.CP(n_8450), .D(\UART_TXFF/n1526
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][1] (.CP(n_8456), .D(\UART_TXFF/n1525
notech_reg \UART_TXFF/iFIFOMem_reg[29][1] (.CP(n_8450), .D(\UART_TXFF/n1525
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[29][0] (.CP(n_8456), .D(\UART_TXFF/n1524
notech_reg \UART_TXFF/iFIFOMem_reg[29][0] (.CP(n_8450), .D(\UART_TXFF/n1524
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[29][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][7] (.CP(n_8455), .D(\UART_TXFF/n1523
notech_reg \UART_TXFF/iFIFOMem_reg[28][7] (.CP(n_8449), .D(\UART_TXFF/n1523
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][6] (.CP(n_8455), .D(\UART_TXFF/n1522
notech_reg \UART_TXFF/iFIFOMem_reg[28][6] (.CP(n_8449), .D(\UART_TXFF/n1522
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][5] (.CP(n_8455), .D(\UART_TXFF/n1521
notech_reg \UART_TXFF/iFIFOMem_reg[28][5] (.CP(n_8449), .D(\UART_TXFF/n1521
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][4] (.CP(n_8455), .D(\UART_TXFF/n1520
notech_reg \UART_TXFF/iFIFOMem_reg[28][4] (.CP(n_8449), .D(\UART_TXFF/n1520
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][3] (.CP(n_8455), .D(\UART_TXFF/n1519
notech_reg \UART_TXFF/iFIFOMem_reg[28][3] (.CP(n_8449), .D(\UART_TXFF/n1519
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][2] (.CP(n_8455), .D(\UART_TXFF/n1518
notech_reg \UART_TXFF/iFIFOMem_reg[28][2] (.CP(n_8449), .D(\UART_TXFF/n1518
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][1] (.CP(n_8456), .D(\UART_TXFF/n1517
notech_reg \UART_TXFF/iFIFOMem_reg[28][1] (.CP(n_8450), .D(\UART_TXFF/n1517
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[28][0] (.CP(n_8457), .D(\UART_TXFF/n1516
notech_reg \UART_TXFF/iFIFOMem_reg[28][0] (.CP(n_8451), .D(\UART_TXFF/n1516
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[28][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][7] (.CP(n_8457), .D(\UART_TXFF/n1515
notech_reg \UART_TXFF/iFIFOMem_reg[27][7] (.CP(n_8451), .D(\UART_TXFF/n1515
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][6] (.CP(n_8457), .D(\UART_TXFF/n1514
notech_reg \UART_TXFF/iFIFOMem_reg[27][6] (.CP(n_8451), .D(\UART_TXFF/n1514
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][5] (.CP(n_8457), .D(\UART_TXFF/n1513
notech_reg \UART_TXFF/iFIFOMem_reg[27][5] (.CP(n_8451), .D(\UART_TXFF/n1513
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][4] (.CP(n_8457), .D(\UART_TXFF/n1512
notech_reg \UART_TXFF/iFIFOMem_reg[27][4] (.CP(n_8451), .D(\UART_TXFF/n1512
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][3] (.CP(n_8457), .D(\UART_TXFF/n1511
notech_reg \UART_TXFF/iFIFOMem_reg[27][3] (.CP(n_8451), .D(\UART_TXFF/n1511
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][2] (.CP(n_8456), .D(\UART_TXFF/n1510
notech_reg \UART_TXFF/iFIFOMem_reg[27][2] (.CP(n_8450), .D(\UART_TXFF/n1510
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][1] (.CP(n_8456), .D(\UART_TXFF/n1509
notech_reg \UART_TXFF/iFIFOMem_reg[27][1] (.CP(n_8450), .D(\UART_TXFF/n1509
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[27][0] (.CP(n_8456), .D(\UART_TXFF/n1508
notech_reg \UART_TXFF/iFIFOMem_reg[27][0] (.CP(n_8450), .D(\UART_TXFF/n1508
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[27][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][7] (.CP(n_8456), .D(\UART_TXFF/n1507
notech_reg \UART_TXFF/iFIFOMem_reg[26][7] (.CP(n_8450), .D(\UART_TXFF/n1507
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][6] (.CP(n_8456), .D(\UART_TXFF/n1506
notech_reg \UART_TXFF/iFIFOMem_reg[26][6] (.CP(n_8450), .D(\UART_TXFF/n1506
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][5] (.CP(n_8454), .D(\UART_TXFF/n1505
notech_reg \UART_TXFF/iFIFOMem_reg[26][5] (.CP(n_8448), .D(\UART_TXFF/n1505
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][4] (.CP(n_8451), .D(\UART_TXFF/n1504
notech_reg \UART_TXFF/iFIFOMem_reg[26][4] (.CP(n_8445), .D(\UART_TXFF/n1504
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][3] (.CP(n_8454), .D(\UART_TXFF/n1503
notech_reg \UART_TXFF/iFIFOMem_reg[26][3] (.CP(n_8448), .D(\UART_TXFF/n1503
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][2] (.CP(n_8454), .D(\UART_TXFF/n1502
notech_reg \UART_TXFF/iFIFOMem_reg[26][2] (.CP(n_8448), .D(\UART_TXFF/n1502
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][1] (.CP(n_8454), .D(\UART_TXFF/n1501
notech_reg \UART_TXFF/iFIFOMem_reg[26][1] (.CP(n_8448), .D(\UART_TXFF/n1501
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[26][0] (.CP(n_8451), .D(\UART_TXFF/n1500
notech_reg \UART_TXFF/iFIFOMem_reg[26][0] (.CP(n_8445), .D(\UART_TXFF/n1500
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[26][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][7] (.CP(n_8451), .D(\UART_TXFF/n1499
notech_reg \UART_TXFF/iFIFOMem_reg[25][7] (.CP(n_8445), .D(\UART_TXFF/n1499
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][6] (.CP(n_8451), .D(\UART_TXFF/n1498
notech_reg \UART_TXFF/iFIFOMem_reg[25][6] (.CP(n_8445), .D(\UART_TXFF/n1498
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][5] (.CP(n_8451), .D(\UART_TXFF/n1497
notech_reg \UART_TXFF/iFIFOMem_reg[25][5] (.CP(n_8445), .D(\UART_TXFF/n1497
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][4] (.CP(n_8451), .D(\UART_TXFF/n1496
notech_reg \UART_TXFF/iFIFOMem_reg[25][4] (.CP(n_8445), .D(\UART_TXFF/n1496
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][3] (.CP(n_8451), .D(\UART_TXFF/n1495
notech_reg \UART_TXFF/iFIFOMem_reg[25][3] (.CP(n_8445), .D(\UART_TXFF/n1495
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][2] (.CP(n_8454), .D(\UART_TXFF/n1494
notech_reg \UART_TXFF/iFIFOMem_reg[25][2] (.CP(n_8448), .D(\UART_TXFF/n1494
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][1] (.CP(n_8455), .D(\UART_TXFF/n1493
notech_reg \UART_TXFF/iFIFOMem_reg[25][1] (.CP(n_8449), .D(\UART_TXFF/n1493
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[25][0] (.CP(n_8455), .D(\UART_TXFF/n1492
notech_reg \UART_TXFF/iFIFOMem_reg[25][0] (.CP(n_8449), .D(\UART_TXFF/n1492
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[25][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][7] (.CP(n_8455), .D(\UART_TXFF/n1491
notech_reg \UART_TXFF/iFIFOMem_reg[24][7] (.CP(n_8449), .D(\UART_TXFF/n1491
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][6] (.CP(n_8455), .D(\UART_TXFF/n1490
notech_reg \UART_TXFF/iFIFOMem_reg[24][6] (.CP(n_8449), .D(\UART_TXFF/n1490
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][5] (.CP(n_8455), .D(\UART_TXFF/n1489
notech_reg \UART_TXFF/iFIFOMem_reg[24][5] (.CP(n_8449), .D(\UART_TXFF/n1489
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][4] (.CP(n_8454), .D(\UART_TXFF/n1488
notech_reg \UART_TXFF/iFIFOMem_reg[24][4] (.CP(n_8448), .D(\UART_TXFF/n1488
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][3] (.CP(n_8454), .D(\UART_TXFF/n1487
notech_reg \UART_TXFF/iFIFOMem_reg[24][3] (.CP(n_8448), .D(\UART_TXFF/n1487
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][2] (.CP(n_8454), .D(\UART_TXFF/n1486
notech_reg \UART_TXFF/iFIFOMem_reg[24][2] (.CP(n_8448), .D(\UART_TXFF/n1486
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][1] (.CP(n_8454), .D(\UART_TXFF/n1485
notech_reg \UART_TXFF/iFIFOMem_reg[24][1] (.CP(n_8448), .D(\UART_TXFF/n1485
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[24][0] (.CP(n_8454), .D(\UART_TXFF/n1484
notech_reg \UART_TXFF/iFIFOMem_reg[24][0] (.CP(n_8448), .D(\UART_TXFF/n1484
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[24][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][7] (.CP(n_8454), .D(\UART_TXFF/n1483
notech_reg \UART_TXFF/iFIFOMem_reg[23][7] (.CP(n_8448), .D(\UART_TXFF/n1483
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][6] (.CP(n_8424), .D(\UART_TXFF/n1482
notech_reg \UART_TXFF/iFIFOMem_reg[23][6] (.CP(n_8418), .D(\UART_TXFF/n1482
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][5] (.CP(n_8391), .D(\UART_TXFF/n1481
notech_reg \UART_TXFF/iFIFOMem_reg[23][5] (.CP(n_8385), .D(\UART_TXFF/n1481
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][4] (.CP(n_8391), .D(\UART_TXFF/n1480
notech_reg \UART_TXFF/iFIFOMem_reg[23][4] (.CP(n_8385), .D(\UART_TXFF/n1480
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][3] (.CP(n_8391), .D(\UART_TXFF/n1479
notech_reg \UART_TXFF/iFIFOMem_reg[23][3] (.CP(n_8385), .D(\UART_TXFF/n1479
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][2] (.CP(n_8391), .D(\UART_TXFF/n1478
notech_reg \UART_TXFF/iFIFOMem_reg[23][2] (.CP(n_8385), .D(\UART_TXFF/n1478
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][1] (.CP(n_8391), .D(\UART_TXFF/n1477
notech_reg \UART_TXFF/iFIFOMem_reg[23][1] (.CP(n_8385), .D(\UART_TXFF/n1477
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[23][0] (.CP(n_8391), .D(\UART_TXFF/n1476
notech_reg \UART_TXFF/iFIFOMem_reg[23][0] (.CP(n_8385), .D(\UART_TXFF/n1476
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[23][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][7] (.CP(n_8391), .D(\UART_TXFF/n1475
notech_reg \UART_TXFF/iFIFOMem_reg[22][7] (.CP(n_8385), .D(\UART_TXFF/n1475
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][6] (.CP(n_8389), .D(\UART_TXFF/n1474
notech_reg \UART_TXFF/iFIFOMem_reg[22][6] (.CP(n_8383), .D(\UART_TXFF/n1474
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][5] (.CP(n_8391), .D(\UART_TXFF/n1473
notech_reg \UART_TXFF/iFIFOMem_reg[22][5] (.CP(n_8385), .D(\UART_TXFF/n1473
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][4] (.CP(n_8391), .D(\UART_TXFF/n1472
notech_reg \UART_TXFF/iFIFOMem_reg[22][4] (.CP(n_8385), .D(\UART_TXFF/n1472
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][3] (.CP(n_8391), .D(\UART_TXFF/n1471
notech_reg \UART_TXFF/iFIFOMem_reg[22][3] (.CP(n_8385), .D(\UART_TXFF/n1471
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][2] (.CP(n_8391), .D(\UART_TXFF/n1470
notech_reg \UART_TXFF/iFIFOMem_reg[22][2] (.CP(n_8385), .D(\UART_TXFF/n1470
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][1] (.CP(n_8391), .D(\UART_TXFF/n1469
notech_reg \UART_TXFF/iFIFOMem_reg[22][1] (.CP(n_8385), .D(\UART_TXFF/n1469
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[22][0] (.CP(n_8391), .D(\UART_TXFF/n1468
notech_reg \UART_TXFF/iFIFOMem_reg[22][0] (.CP(n_8385), .D(\UART_TXFF/n1468
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[22][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][7] (.CP(n_8391), .D(\UART_TXFF/n1467
notech_reg \UART_TXFF/iFIFOMem_reg[21][7] (.CP(n_8385), .D(\UART_TXFF/n1467
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][6] (.CP(n_8394), .D(\UART_TXFF/n1466
notech_reg \UART_TXFF/iFIFOMem_reg[21][6] (.CP(n_8388), .D(\UART_TXFF/n1466
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][5] (.CP(n_8394), .D(\UART_TXFF/n1465
notech_reg \UART_TXFF/iFIFOMem_reg[21][5] (.CP(n_8388), .D(\UART_TXFF/n1465
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][4] (.CP(n_8391), .D(\UART_TXFF/n1464
notech_reg \UART_TXFF/iFIFOMem_reg[21][4] (.CP(n_8385), .D(\UART_TXFF/n1464
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][3] (.CP(n_8391), .D(\UART_TXFF/n1463
notech_reg \UART_TXFF/iFIFOMem_reg[21][3] (.CP(n_8385), .D(\UART_TXFF/n1463
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][2] (.CP(n_8391), .D(\UART_TXFF/n1462
notech_reg \UART_TXFF/iFIFOMem_reg[21][2] (.CP(n_8385), .D(\UART_TXFF/n1462
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][1] (.CP(n_8391), .D(\UART_TXFF/n1461
notech_reg \UART_TXFF/iFIFOMem_reg[21][1] (.CP(n_8385), .D(\UART_TXFF/n1461
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[21][0] (.CP(n_8391), .D(\UART_TXFF/n1460
notech_reg \UART_TXFF/iFIFOMem_reg[21][0] (.CP(n_8385), .D(\UART_TXFF/n1460
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[21][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][7] (.CP(n_8391), .D(\UART_TXFF/n1459
notech_reg \UART_TXFF/iFIFOMem_reg[20][7] (.CP(n_8385), .D(\UART_TXFF/n1459
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][6] (.CP(n_8389), .D(\UART_TXFF/n1458
notech_reg \UART_TXFF/iFIFOMem_reg[20][6] (.CP(n_8383), .D(\UART_TXFF/n1458
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][5] (.CP(n_8389), .D(\UART_TXFF/n1457
notech_reg \UART_TXFF/iFIFOMem_reg[20][5] (.CP(n_8383), .D(\UART_TXFF/n1457
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][4] (.CP(n_8389), .D(\UART_TXFF/n1456
notech_reg \UART_TXFF/iFIFOMem_reg[20][4] (.CP(n_8383), .D(\UART_TXFF/n1456
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][3] (.CP(n_8389), .D(\UART_TXFF/n1455
notech_reg \UART_TXFF/iFIFOMem_reg[20][3] (.CP(n_8383), .D(\UART_TXFF/n1455
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][2] (.CP(n_8389), .D(\UART_TXFF/n1454
notech_reg \UART_TXFF/iFIFOMem_reg[20][2] (.CP(n_8383), .D(\UART_TXFF/n1454
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][1] (.CP(n_8389), .D(\UART_TXFF/n1453
notech_reg \UART_TXFF/iFIFOMem_reg[20][1] (.CP(n_8383), .D(\UART_TXFF/n1453
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[20][0] (.CP(n_8385), .D(\UART_TXFF/n1452
notech_reg \UART_TXFF/iFIFOMem_reg[20][0] (.CP(n_8379), .D(\UART_TXFF/n1452
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[20][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][7] (.CP(n_8385), .D(\UART_TXFF/n1451
notech_reg \UART_TXFF/iFIFOMem_reg[19][7] (.CP(n_8379), .D(\UART_TXFF/n1451
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][6] (.CP(n_8385), .D(\UART_TXFF/n1450
notech_reg \UART_TXFF/iFIFOMem_reg[19][6] (.CP(n_8379), .D(\UART_TXFF/n1450
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][5] (.CP(n_8389), .D(\UART_TXFF/n1449
notech_reg \UART_TXFF/iFIFOMem_reg[19][5] (.CP(n_8383), .D(\UART_TXFF/n1449
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][4] (.CP(n_8385), .D(\UART_TXFF/n1448
notech_reg \UART_TXFF/iFIFOMem_reg[19][4] (.CP(n_8379), .D(\UART_TXFF/n1448
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][3] (.CP(n_8389), .D(\UART_TXFF/n1447
notech_reg \UART_TXFF/iFIFOMem_reg[19][3] (.CP(n_8383), .D(\UART_TXFF/n1447
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][2] (.CP(n_8389), .D(\UART_TXFF/n1446
notech_reg \UART_TXFF/iFIFOMem_reg[19][2] (.CP(n_8383), .D(\UART_TXFF/n1446
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][1] (.CP(n_8389), .D(\UART_TXFF/n1445
notech_reg \UART_TXFF/iFIFOMem_reg[19][1] (.CP(n_8383), .D(\UART_TXFF/n1445
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[19][0] (.CP(n_8389), .D(\UART_TXFF/n1444
notech_reg \UART_TXFF/iFIFOMem_reg[19][0] (.CP(n_8383), .D(\UART_TXFF/n1444
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[19][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][7] (.CP(n_8389), .D(\UART_TXFF/n1443
notech_reg \UART_TXFF/iFIFOMem_reg[18][7] (.CP(n_8383), .D(\UART_TXFF/n1443
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][6] (.CP(n_8389), .D(\UART_TXFF/n1442
notech_reg \UART_TXFF/iFIFOMem_reg[18][6] (.CP(n_8383), .D(\UART_TXFF/n1442
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][5] (.CP(n_8389), .D(\UART_TXFF/n1441
notech_reg \UART_TXFF/iFIFOMem_reg[18][5] (.CP(n_8383), .D(\UART_TXFF/n1441
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][4] (.CP(n_8389), .D(\UART_TXFF/n1440
notech_reg \UART_TXFF/iFIFOMem_reg[18][4] (.CP(n_8383), .D(\UART_TXFF/n1440
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][3] (.CP(n_8389), .D(\UART_TXFF/n1439
notech_reg \UART_TXFF/iFIFOMem_reg[18][3] (.CP(n_8383), .D(\UART_TXFF/n1439
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][2] (.CP(n_8389), .D(\UART_TXFF/n1438
notech_reg \UART_TXFF/iFIFOMem_reg[18][2] (.CP(n_8383), .D(\UART_TXFF/n1438
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][1] (.CP(n_8389), .D(\UART_TXFF/n1437
notech_reg \UART_TXFF/iFIFOMem_reg[18][1] (.CP(n_8383), .D(\UART_TXFF/n1437
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[18][0] (.CP(n_8389), .D(\UART_TXFF/n1436
notech_reg \UART_TXFF/iFIFOMem_reg[18][0] (.CP(n_8383), .D(\UART_TXFF/n1436
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[18][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][7] (.CP(n_8396), .D(\UART_TXFF/n1435
notech_reg \UART_TXFF/iFIFOMem_reg[17][7] (.CP(n_8390), .D(\UART_TXFF/n1435
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][6] (.CP(n_8396), .D(\UART_TXFF/n1434
notech_reg \UART_TXFF/iFIFOMem_reg[17][6] (.CP(n_8390), .D(\UART_TXFF/n1434
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][5] (.CP(n_8396), .D(\UART_TXFF/n1433
notech_reg \UART_TXFF/iFIFOMem_reg[17][5] (.CP(n_8390), .D(\UART_TXFF/n1433
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][4] (.CP(n_8396), .D(\UART_TXFF/n1432
notech_reg \UART_TXFF/iFIFOMem_reg[17][4] (.CP(n_8390), .D(\UART_TXFF/n1432
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][3] (.CP(n_8396), .D(\UART_TXFF/n1431
notech_reg \UART_TXFF/iFIFOMem_reg[17][3] (.CP(n_8390), .D(\UART_TXFF/n1431
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][2] (.CP(n_8396), .D(\UART_TXFF/n1430
notech_reg \UART_TXFF/iFIFOMem_reg[17][2] (.CP(n_8390), .D(\UART_TXFF/n1430
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][1] (.CP(n_8396), .D(\UART_TXFF/n1429
notech_reg \UART_TXFF/iFIFOMem_reg[17][1] (.CP(n_8390), .D(\UART_TXFF/n1429
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[17][0] (.CP(n_8396), .D(\UART_TXFF/n1428
notech_reg \UART_TXFF/iFIFOMem_reg[17][0] (.CP(n_8390), .D(\UART_TXFF/n1428
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[17][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][7] (.CP(n_8396), .D(\UART_TXFF/n1427
notech_reg \UART_TXFF/iFIFOMem_reg[16][7] (.CP(n_8390), .D(\UART_TXFF/n1427
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][6] (.CP(n_8396), .D(\UART_TXFF/n1426
notech_reg \UART_TXFF/iFIFOMem_reg[16][6] (.CP(n_8390), .D(\UART_TXFF/n1426
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][5] (.CP(n_8396), .D(\UART_TXFF/n1425
notech_reg \UART_TXFF/iFIFOMem_reg[16][5] (.CP(n_8390), .D(\UART_TXFF/n1425
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][4] (.CP(n_8396), .D(\UART_TXFF/n1424
notech_reg \UART_TXFF/iFIFOMem_reg[16][4] (.CP(n_8390), .D(\UART_TXFF/n1424
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][3] (.CP(n_8399), .D(\UART_TXFF/n1423
notech_reg \UART_TXFF/iFIFOMem_reg[16][3] (.CP(n_8393), .D(\UART_TXFF/n1423
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][2] (.CP(n_8399), .D(\UART_TXFF/n1422
notech_reg \UART_TXFF/iFIFOMem_reg[16][2] (.CP(n_8393), .D(\UART_TXFF/n1422
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][1] (.CP(n_8399), .D(\UART_TXFF/n1421
notech_reg \UART_TXFF/iFIFOMem_reg[16][1] (.CP(n_8393), .D(\UART_TXFF/n1421
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[16][0] (.CP(n_8399), .D(\UART_TXFF/n1420
notech_reg \UART_TXFF/iFIFOMem_reg[16][0] (.CP(n_8393), .D(\UART_TXFF/n1420
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[16][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][7] (.CP(n_8399), .D(\UART_TXFF/n1419
notech_reg \UART_TXFF/iFIFOMem_reg[15][7] (.CP(n_8393), .D(\UART_TXFF/n1419
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][6] (.CP(n_8399), .D(\UART_TXFF/n1418
notech_reg \UART_TXFF/iFIFOMem_reg[15][6] (.CP(n_8393), .D(\UART_TXFF/n1418
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][5] (.CP(n_8396), .D(\UART_TXFF/n1417
notech_reg \UART_TXFF/iFIFOMem_reg[15][5] (.CP(n_8390), .D(\UART_TXFF/n1417
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][4] (.CP(n_8396), .D(\UART_TXFF/n1416
notech_reg \UART_TXFF/iFIFOMem_reg[15][4] (.CP(n_8390), .D(\UART_TXFF/n1416
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][3] (.CP(n_8396), .D(\UART_TXFF/n1415
notech_reg \UART_TXFF/iFIFOMem_reg[15][3] (.CP(n_8390), .D(\UART_TXFF/n1415
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][2] (.CP(n_8399), .D(\UART_TXFF/n1414
notech_reg \UART_TXFF/iFIFOMem_reg[15][2] (.CP(n_8393), .D(\UART_TXFF/n1414
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][1] (.CP(n_8399), .D(\UART_TXFF/n1413
notech_reg \UART_TXFF/iFIFOMem_reg[15][1] (.CP(n_8393), .D(\UART_TXFF/n1413
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[15][0] (.CP(n_8394), .D(\UART_TXFF/n1412
notech_reg \UART_TXFF/iFIFOMem_reg[15][0] (.CP(n_8388), .D(\UART_TXFF/n1412
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[15][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][7] (.CP(n_8394), .D(\UART_TXFF/n1411
notech_reg \UART_TXFF/iFIFOMem_reg[14][7] (.CP(n_8388), .D(\UART_TXFF/n1411
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][6] (.CP(n_8394), .D(\UART_TXFF/n1410
notech_reg \UART_TXFF/iFIFOMem_reg[14][6] (.CP(n_8388), .D(\UART_TXFF/n1410
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][5] (.CP(n_8394), .D(\UART_TXFF/n1409
notech_reg \UART_TXFF/iFIFOMem_reg[14][5] (.CP(n_8388), .D(\UART_TXFF/n1409
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][4] (.CP(n_8394), .D(\UART_TXFF/n1408
notech_reg \UART_TXFF/iFIFOMem_reg[14][4] (.CP(n_8388), .D(\UART_TXFF/n1408
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][3] (.CP(n_8394), .D(\UART_TXFF/n1407
notech_reg \UART_TXFF/iFIFOMem_reg[14][3] (.CP(n_8388), .D(\UART_TXFF/n1407
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][2] (.CP(n_8394), .D(\UART_TXFF/n1406
notech_reg \UART_TXFF/iFIFOMem_reg[14][2] (.CP(n_8388), .D(\UART_TXFF/n1406
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][1] (.CP(n_8394), .D(\UART_TXFF/n1405
notech_reg \UART_TXFF/iFIFOMem_reg[14][1] (.CP(n_8388), .D(\UART_TXFF/n1405
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[14][0] (.CP(n_8394), .D(\UART_TXFF/n1404
notech_reg \UART_TXFF/iFIFOMem_reg[14][0] (.CP(n_8388), .D(\UART_TXFF/n1404
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[14][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][7] (.CP(n_8394), .D(\UART_TXFF/n1403
notech_reg \UART_TXFF/iFIFOMem_reg[13][7] (.CP(n_8388), .D(\UART_TXFF/n1403
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][6] (.CP(n_8394), .D(\UART_TXFF/n1402
notech_reg \UART_TXFF/iFIFOMem_reg[13][6] (.CP(n_8388), .D(\UART_TXFF/n1402
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][5] (.CP(n_8394), .D(\UART_TXFF/n1401
notech_reg \UART_TXFF/iFIFOMem_reg[13][5] (.CP(n_8388), .D(\UART_TXFF/n1401
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][4] (.CP(n_8396), .D(\UART_TXFF/n1400
notech_reg \UART_TXFF/iFIFOMem_reg[13][4] (.CP(n_8390), .D(\UART_TXFF/n1400
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][3] (.CP(n_8396), .D(\UART_TXFF/n1399
notech_reg \UART_TXFF/iFIFOMem_reg[13][3] (.CP(n_8390), .D(\UART_TXFF/n1399
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][2] (.CP(n_8396), .D(\UART_TXFF/n1398
notech_reg \UART_TXFF/iFIFOMem_reg[13][2] (.CP(n_8390), .D(\UART_TXFF/n1398
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][1] (.CP(n_8396), .D(\UART_TXFF/n1397
notech_reg \UART_TXFF/iFIFOMem_reg[13][1] (.CP(n_8390), .D(\UART_TXFF/n1397
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[13][0] (.CP(n_8396), .D(\UART_TXFF/n1396
notech_reg \UART_TXFF/iFIFOMem_reg[13][0] (.CP(n_8390), .D(\UART_TXFF/n1396
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[13][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][7] (.CP(n_8394), .D(\UART_TXFF/n1395
notech_reg \UART_TXFF/iFIFOMem_reg[12][7] (.CP(n_8388), .D(\UART_TXFF/n1395
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][6] (.CP(n_8394), .D(\UART_TXFF/n1394
notech_reg \UART_TXFF/iFIFOMem_reg[12][6] (.CP(n_8388), .D(\UART_TXFF/n1394
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][5] (.CP(n_8394), .D(\UART_TXFF/n1393
notech_reg \UART_TXFF/iFIFOMem_reg[12][5] (.CP(n_8388), .D(\UART_TXFF/n1393
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][4] (.CP(n_8394), .D(\UART_TXFF/n1392
notech_reg \UART_TXFF/iFIFOMem_reg[12][4] (.CP(n_8388), .D(\UART_TXFF/n1392
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][3] (.CP(n_8394), .D(\UART_TXFF/n1391
notech_reg \UART_TXFF/iFIFOMem_reg[12][3] (.CP(n_8388), .D(\UART_TXFF/n1391
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][2] (.CP(n_8394), .D(\UART_TXFF/n1390
notech_reg \UART_TXFF/iFIFOMem_reg[12][2] (.CP(n_8388), .D(\UART_TXFF/n1390
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][1] (.CP(n_8385), .D(\UART_TXFF/n1389
notech_reg \UART_TXFF/iFIFOMem_reg[12][1] (.CP(n_8379), .D(\UART_TXFF/n1389
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[12][0] (.CP(n_8378), .D(\UART_TXFF/n1388
notech_reg \UART_TXFF/iFIFOMem_reg[12][0] (.CP(n_8372), .D(\UART_TXFF/n1388
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[12][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][7] (.CP(n_8378), .D(\UART_TXFF/n1387
notech_reg \UART_TXFF/iFIFOMem_reg[11][7] (.CP(n_8372), .D(\UART_TXFF/n1387
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][6] (.CP(n_8378), .D(\UART_TXFF/n1386
notech_reg \UART_TXFF/iFIFOMem_reg[11][6] (.CP(n_8372), .D(\UART_TXFF/n1386
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][5] (.CP(n_8378), .D(\UART_TXFF/n1385
notech_reg \UART_TXFF/iFIFOMem_reg[11][5] (.CP(n_8372), .D(\UART_TXFF/n1385
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][4] (.CP(n_8378), .D(\UART_TXFF/n1384
notech_reg \UART_TXFF/iFIFOMem_reg[11][4] (.CP(n_8372), .D(\UART_TXFF/n1384
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][3] (.CP(n_8378), .D(\UART_TXFF/n1383
notech_reg \UART_TXFF/iFIFOMem_reg[11][3] (.CP(n_8372), .D(\UART_TXFF/n1383
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][2] (.CP(n_8378), .D(\UART_TXFF/n1382
notech_reg \UART_TXFF/iFIFOMem_reg[11][2] (.CP(n_8372), .D(\UART_TXFF/n1382
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][1] (.CP(n_8378), .D(\UART_TXFF/n1381
notech_reg \UART_TXFF/iFIFOMem_reg[11][1] (.CP(n_8372), .D(\UART_TXFF/n1381
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[11][0] (.CP(n_8378), .D(\UART_TXFF/n1380
notech_reg \UART_TXFF/iFIFOMem_reg[11][0] (.CP(n_8372), .D(\UART_TXFF/n1380
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[11][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][7] (.CP(n_8378), .D(\UART_TXFF/n1379
notech_reg \UART_TXFF/iFIFOMem_reg[10][7] (.CP(n_8372), .D(\UART_TXFF/n1379
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][6] (.CP(n_8378), .D(\UART_TXFF/n1378
notech_reg \UART_TXFF/iFIFOMem_reg[10][6] (.CP(n_8372), .D(\UART_TXFF/n1378
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][5] (.CP(n_8378), .D(\UART_TXFF/n1377
notech_reg \UART_TXFF/iFIFOMem_reg[10][5] (.CP(n_8372), .D(\UART_TXFF/n1377
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][4] (.CP(n_8380), .D(\UART_TXFF/n1376
notech_reg \UART_TXFF/iFIFOMem_reg[10][4] (.CP(n_8374), .D(\UART_TXFF/n1376
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][3] (.CP(n_8380), .D(\UART_TXFF/n1375
notech_reg \UART_TXFF/iFIFOMem_reg[10][3] (.CP(n_8374), .D(\UART_TXFF/n1375
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][2] (.CP(n_8380), .D(\UART_TXFF/n1374
notech_reg \UART_TXFF/iFIFOMem_reg[10][2] (.CP(n_8374), .D(\UART_TXFF/n1374
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][1] (.CP(n_8380), .D(\UART_TXFF/n1373
notech_reg \UART_TXFF/iFIFOMem_reg[10][1] (.CP(n_8374), .D(\UART_TXFF/n1373
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[10][0] (.CP(n_8380), .D(\UART_TXFF/n1372
notech_reg \UART_TXFF/iFIFOMem_reg[10][0] (.CP(n_8374), .D(\UART_TXFF/n1372
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[10][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][7] (.CP(n_8380), .D(\UART_TXFF/n1371
notech_reg \UART_TXFF/iFIFOMem_reg[9][7] (.CP(n_8374), .D(\UART_TXFF/n1371
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][6] (.CP(n_8378), .D(\UART_TXFF/n1370
notech_reg \UART_TXFF/iFIFOMem_reg[9][6] (.CP(n_8372), .D(\UART_TXFF/n1370
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][5] (.CP(n_8378), .D(\UART_TXFF/n1369
notech_reg \UART_TXFF/iFIFOMem_reg[9][5] (.CP(n_8372), .D(\UART_TXFF/n1369
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][4] (.CP(n_8380), .D(\UART_TXFF/n1368
notech_reg \UART_TXFF/iFIFOMem_reg[9][4] (.CP(n_8374), .D(\UART_TXFF/n1368
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][3] (.CP(n_8380), .D(\UART_TXFF/n1367
notech_reg \UART_TXFF/iFIFOMem_reg[9][3] (.CP(n_8374), .D(\UART_TXFF/n1367
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][2] (.CP(n_8380), .D(\UART_TXFF/n1366
notech_reg \UART_TXFF/iFIFOMem_reg[9][2] (.CP(n_8374), .D(\UART_TXFF/n1366
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][1] (.CP(n_8375), .D(\UART_TXFF/n1365
notech_reg \UART_TXFF/iFIFOMem_reg[9][1] (.CP(n_8369), .D(\UART_TXFF/n1365
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[9][0] (.CP(n_8375), .D(\UART_TXFF/n1364
notech_reg \UART_TXFF/iFIFOMem_reg[9][0] (.CP(n_8369), .D(\UART_TXFF/n1364
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[9][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][7] (.CP(n_8375), .D(\UART_TXFF/n1363
notech_reg \UART_TXFF/iFIFOMem_reg[8][7] (.CP(n_8369), .D(\UART_TXFF/n1363
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][6] (.CP(n_8375), .D(\UART_TXFF/n1362
notech_reg \UART_TXFF/iFIFOMem_reg[8][6] (.CP(n_8369), .D(\UART_TXFF/n1362
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][5] (.CP(n_8375), .D(\UART_TXFF/n1361
notech_reg \UART_TXFF/iFIFOMem_reg[8][5] (.CP(n_8369), .D(\UART_TXFF/n1361
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][4] (.CP(n_8375), .D(\UART_TXFF/n1360
notech_reg \UART_TXFF/iFIFOMem_reg[8][4] (.CP(n_8369), .D(\UART_TXFF/n1360
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][3] (.CP(n_8375), .D(\UART_TXFF/n1359
notech_reg \UART_TXFF/iFIFOMem_reg[8][3] (.CP(n_8369), .D(\UART_TXFF/n1359
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][2] (.CP(n_8375), .D(\UART_TXFF/n1358
notech_reg \UART_TXFF/iFIFOMem_reg[8][2] (.CP(n_8369), .D(\UART_TXFF/n1358
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][1] (.CP(n_8375), .D(\UART_TXFF/n1357
notech_reg \UART_TXFF/iFIFOMem_reg[8][1] (.CP(n_8369), .D(\UART_TXFF/n1357
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[8][0] (.CP(n_8375), .D(\UART_TXFF/n1356
notech_reg \UART_TXFF/iFIFOMem_reg[8][0] (.CP(n_8369), .D(\UART_TXFF/n1356
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[8][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][7] (.CP(n_8375), .D(\UART_TXFF/n1355
notech_reg \UART_TXFF/iFIFOMem_reg[7][7] (.CP(n_8369), .D(\UART_TXFF/n1355
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][6] (.CP(n_8375), .D(\UART_TXFF/n1354
notech_reg \UART_TXFF/iFIFOMem_reg[7][6] (.CP(n_8369), .D(\UART_TXFF/n1354
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][5] (.CP(n_8378), .D(\UART_TXFF/n1353
notech_reg \UART_TXFF/iFIFOMem_reg[7][5] (.CP(n_8372), .D(\UART_TXFF/n1353
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][4] (.CP(n_8378), .D(\UART_TXFF/n1352
notech_reg \UART_TXFF/iFIFOMem_reg[7][4] (.CP(n_8372), .D(\UART_TXFF/n1352
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][3] (.CP(n_8378), .D(\UART_TXFF/n1351
notech_reg \UART_TXFF/iFIFOMem_reg[7][3] (.CP(n_8372), .D(\UART_TXFF/n1351
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][2] (.CP(n_8378), .D(\UART_TXFF/n1350
notech_reg \UART_TXFF/iFIFOMem_reg[7][2] (.CP(n_8372), .D(\UART_TXFF/n1350
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][1] (.CP(n_8378), .D(\UART_TXFF/n1349
notech_reg \UART_TXFF/iFIFOMem_reg[7][1] (.CP(n_8372), .D(\UART_TXFF/n1349
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[7][0] (.CP(n_8378), .D(\UART_TXFF/n1348
notech_reg \UART_TXFF/iFIFOMem_reg[7][0] (.CP(n_8372), .D(\UART_TXFF/n1348
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[7][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][7] (.CP(n_8375), .D(\UART_TXFF/n1347
notech_reg \UART_TXFF/iFIFOMem_reg[6][7] (.CP(n_8369), .D(\UART_TXFF/n1347
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][6] (.CP(n_8375), .D(\UART_TXFF/n1346
notech_reg \UART_TXFF/iFIFOMem_reg[6][6] (.CP(n_8369), .D(\UART_TXFF/n1346
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][5] (.CP(n_8375), .D(\UART_TXFF/n1345
notech_reg \UART_TXFF/iFIFOMem_reg[6][5] (.CP(n_8369), .D(\UART_TXFF/n1345
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][4] (.CP(n_8375), .D(\UART_TXFF/n1344
notech_reg \UART_TXFF/iFIFOMem_reg[6][4] (.CP(n_8369), .D(\UART_TXFF/n1344
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][3] (.CP(n_8375), .D(\UART_TXFF/n1343
notech_reg \UART_TXFF/iFIFOMem_reg[6][3] (.CP(n_8369), .D(\UART_TXFF/n1343
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][2] (.CP(n_8383), .D(\UART_TXFF/n1342
notech_reg \UART_TXFF/iFIFOMem_reg[6][2] (.CP(n_8377), .D(\UART_TXFF/n1342
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][1] (.CP(n_8383), .D(\UART_TXFF/n1341
notech_reg \UART_TXFF/iFIFOMem_reg[6][1] (.CP(n_8377), .D(\UART_TXFF/n1341
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[6][0] (.CP(n_8385), .D(\UART_TXFF/n1340
notech_reg \UART_TXFF/iFIFOMem_reg[6][0] (.CP(n_8379), .D(\UART_TXFF/n1340
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[6][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][7] (.CP(n_8385), .D(\UART_TXFF/n1339
notech_reg \UART_TXFF/iFIFOMem_reg[5][7] (.CP(n_8379), .D(\UART_TXFF/n1339
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][6] (.CP(n_8385), .D(\UART_TXFF/n1338
notech_reg \UART_TXFF/iFIFOMem_reg[5][6] (.CP(n_8379), .D(\UART_TXFF/n1338
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][5] (.CP(n_8383), .D(\UART_TXFF/n1337
notech_reg \UART_TXFF/iFIFOMem_reg[5][5] (.CP(n_8377), .D(\UART_TXFF/n1337
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][4] (.CP(n_8383), .D(\UART_TXFF/n1336
notech_reg \UART_TXFF/iFIFOMem_reg[5][4] (.CP(n_8377), .D(\UART_TXFF/n1336
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][3] (.CP(n_8383), .D(\UART_TXFF/n1335
notech_reg \UART_TXFF/iFIFOMem_reg[5][3] (.CP(n_8377), .D(\UART_TXFF/n1335
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][2] (.CP(n_8383), .D(\UART_TXFF/n1334
notech_reg \UART_TXFF/iFIFOMem_reg[5][2] (.CP(n_8377), .D(\UART_TXFF/n1334
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][1] (.CP(n_8383), .D(\UART_TXFF/n1333
notech_reg \UART_TXFF/iFIFOMem_reg[5][1] (.CP(n_8377), .D(\UART_TXFF/n1333
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[5][0] (.CP(n_8383), .D(\UART_TXFF/n1332
notech_reg \UART_TXFF/iFIFOMem_reg[5][0] (.CP(n_8377), .D(\UART_TXFF/n1332
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[5][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][7] (.CP(n_8385), .D(\UART_TXFF/n1331
notech_reg \UART_TXFF/iFIFOMem_reg[4][7] (.CP(n_8379), .D(\UART_TXFF/n1331
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][6] (.CP(n_8385), .D(\UART_TXFF/n1330
notech_reg \UART_TXFF/iFIFOMem_reg[4][6] (.CP(n_8379), .D(\UART_TXFF/n1330
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][5] (.CP(n_8385), .D(\UART_TXFF/n1329
notech_reg \UART_TXFF/iFIFOMem_reg[4][5] (.CP(n_8379), .D(\UART_TXFF/n1329
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][4] (.CP(n_8385), .D(\UART_TXFF/n1328
notech_reg \UART_TXFF/iFIFOMem_reg[4][4] (.CP(n_8379), .D(\UART_TXFF/n1328
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][3] (.CP(n_8385), .D(\UART_TXFF/n1327
notech_reg \UART_TXFF/iFIFOMem_reg[4][3] (.CP(n_8379), .D(\UART_TXFF/n1327
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][2] (.CP(n_8385), .D(\UART_TXFF/n1326
notech_reg \UART_TXFF/iFIFOMem_reg[4][2] (.CP(n_8379), .D(\UART_TXFF/n1326
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][1] (.CP(n_8385), .D(\UART_TXFF/n1325
notech_reg \UART_TXFF/iFIFOMem_reg[4][1] (.CP(n_8379), .D(\UART_TXFF/n1325
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[4][0] (.CP(n_8385), .D(\UART_TXFF/n1324
notech_reg \UART_TXFF/iFIFOMem_reg[4][0] (.CP(n_8379), .D(\UART_TXFF/n1324
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[4][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][7] (.CP(n_8385), .D(\UART_TXFF/n1323
notech_reg \UART_TXFF/iFIFOMem_reg[3][7] (.CP(n_8379), .D(\UART_TXFF/n1323
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][6] (.CP(n_8385), .D(\UART_TXFF/n1322
notech_reg \UART_TXFF/iFIFOMem_reg[3][6] (.CP(n_8379), .D(\UART_TXFF/n1322
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][5] (.CP(n_8385), .D(\UART_TXFF/n1321
notech_reg \UART_TXFF/iFIFOMem_reg[3][5] (.CP(n_8379), .D(\UART_TXFF/n1321
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][4] (.CP(n_8385), .D(\UART_TXFF/n1320
notech_reg \UART_TXFF/iFIFOMem_reg[3][4] (.CP(n_8379), .D(\UART_TXFF/n1320
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][3] (.CP(n_8380), .D(\UART_TXFF/n1319
notech_reg \UART_TXFF/iFIFOMem_reg[3][3] (.CP(n_8374), .D(\UART_TXFF/n1319
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][2] (.CP(n_8380), .D(\UART_TXFF/n1318
notech_reg \UART_TXFF/iFIFOMem_reg[3][2] (.CP(n_8374), .D(\UART_TXFF/n1318
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][1] (.CP(n_8380), .D(\UART_TXFF/n1317
notech_reg \UART_TXFF/iFIFOMem_reg[3][1] (.CP(n_8374), .D(\UART_TXFF/n1317
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[3][0] (.CP(n_8380), .D(\UART_TXFF/n1316
notech_reg \UART_TXFF/iFIFOMem_reg[3][0] (.CP(n_8374), .D(\UART_TXFF/n1316
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[3][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][7] (.CP(n_8380), .D(\UART_TXFF/n1315
notech_reg \UART_TXFF/iFIFOMem_reg[2][7] (.CP(n_8374), .D(\UART_TXFF/n1315
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][6] (.CP(n_8380), .D(\UART_TXFF/n1314
notech_reg \UART_TXFF/iFIFOMem_reg[2][6] (.CP(n_8374), .D(\UART_TXFF/n1314
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][5] (.CP(n_8380), .D(\UART_TXFF/n1313
notech_reg \UART_TXFF/iFIFOMem_reg[2][5] (.CP(n_8374), .D(\UART_TXFF/n1313
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][4] (.CP(n_8380), .D(\UART_TXFF/n1312
notech_reg \UART_TXFF/iFIFOMem_reg[2][4] (.CP(n_8374), .D(\UART_TXFF/n1312
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][3] (.CP(n_8380), .D(\UART_TXFF/n1311
notech_reg \UART_TXFF/iFIFOMem_reg[2][3] (.CP(n_8374), .D(\UART_TXFF/n1311
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][2] (.CP(n_8380), .D(\UART_TXFF/n1310
notech_reg \UART_TXFF/iFIFOMem_reg[2][2] (.CP(n_8374), .D(\UART_TXFF/n1310
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][1] (.CP(n_8380), .D(\UART_TXFF/n1309
notech_reg \UART_TXFF/iFIFOMem_reg[2][1] (.CP(n_8374), .D(\UART_TXFF/n1309
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[2][0] (.CP(n_8383), .D(\UART_TXFF/n1308
notech_reg \UART_TXFF/iFIFOMem_reg[2][0] (.CP(n_8377), .D(\UART_TXFF/n1308
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[2][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][7] (.CP(n_8383), .D(\UART_TXFF/n1307
notech_reg \UART_TXFF/iFIFOMem_reg[1][7] (.CP(n_8377), .D(\UART_TXFF/n1307
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][6] (.CP(n_8383), .D(\UART_TXFF/n1306
notech_reg \UART_TXFF/iFIFOMem_reg[1][6] (.CP(n_8377), .D(\UART_TXFF/n1306
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][5] (.CP(n_8383), .D(\UART_TXFF/n1305
notech_reg \UART_TXFF/iFIFOMem_reg[1][5] (.CP(n_8377), .D(\UART_TXFF/n1305
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][4] (.CP(n_8383), .D(\UART_TXFF/n1304
notech_reg \UART_TXFF/iFIFOMem_reg[1][4] (.CP(n_8377), .D(\UART_TXFF/n1304
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][3] (.CP(n_8383), .D(\UART_TXFF/n1303
notech_reg \UART_TXFF/iFIFOMem_reg[1][3] (.CP(n_8377), .D(\UART_TXFF/n1303
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][2] (.CP(n_8383), .D(\UART_TXFF/n1302
notech_reg \UART_TXFF/iFIFOMem_reg[1][2] (.CP(n_8377), .D(\UART_TXFF/n1302
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][1] (.CP(n_8383), .D(\UART_TXFF/n1301
notech_reg \UART_TXFF/iFIFOMem_reg[1][1] (.CP(n_8377), .D(\UART_TXFF/n1301
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[1][0] (.CP(n_8383), .D(\UART_TXFF/n1300
notech_reg \UART_TXFF/iFIFOMem_reg[1][0] (.CP(n_8377), .D(\UART_TXFF/n1300
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[1][0] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][7] (.CP(n_8383), .D(\UART_TXFF/n1299
notech_reg \UART_TXFF/iFIFOMem_reg[0][7] (.CP(n_8377), .D(\UART_TXFF/n1299
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][7] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][6] (.CP(n_8383), .D(\UART_TXFF/n1298
notech_reg \UART_TXFF/iFIFOMem_reg[0][6] (.CP(n_8377), .D(\UART_TXFF/n1298
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][6] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][5] (.CP(n_8383), .D(\UART_TXFF/n1297
notech_reg \UART_TXFF/iFIFOMem_reg[0][5] (.CP(n_8377), .D(\UART_TXFF/n1297
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][5] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][4] (.CP(n_8399), .D(\UART_TXFF/n1296
notech_reg \UART_TXFF/iFIFOMem_reg[0][4] (.CP(n_8393), .D(\UART_TXFF/n1296
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][4] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][3] (.CP(n_8416), .D(\UART_TXFF/n1295
notech_reg \UART_TXFF/iFIFOMem_reg[0][3] (.CP(n_8410), .D(\UART_TXFF/n1295
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][3] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][2] (.CP(n_8416), .D(\UART_TXFF/n1294
notech_reg \UART_TXFF/iFIFOMem_reg[0][2] (.CP(n_8410), .D(\UART_TXFF/n1294
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][2] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][1] (.CP(n_8416), .D(\UART_TXFF/n1293
notech_reg \UART_TXFF/iFIFOMem_reg[0][1] (.CP(n_8410), .D(\UART_TXFF/n1293
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][1] ));
notech_reg \UART_TXFF/iFIFOMem_reg[0][0] (.CP(n_8416), .D(\UART_TXFF/n1292
notech_reg \UART_TXFF/iFIFOMem_reg[0][0] (.CP(n_8410), .D(\UART_TXFF/n1292
), .CD(1'b1), .Q(\UART_TXFF/iFIFOMem[0][0] ));
notech_reg \UART_TXFF/Q_reg[7] (.CP(n_8416), .D(\UART_TXFF/n772 ), .CD(
notech_reg \UART_TXFF/Q_reg[7] (.CP(n_8410), .D(\UART_TXFF/n772 ), .CD(
1'b1), .Q(iTXFIFOQ[7]));
notech_reg \UART_TXFF/Q_reg[6] (.CP(n_8416), .D(\UART_TXFF/n770 ), .CD(
notech_reg \UART_TXFF/Q_reg[6] (.CP(n_8410), .D(\UART_TXFF/n770 ), .CD(
1'b1), .Q(iTXFIFOQ[6]));
notech_reg \UART_TXFF/Q_reg[5] (.CP(n_8416), .D(\UART_TXFF/n768 ), .CD(
notech_reg \UART_TXFF/Q_reg[5] (.CP(n_8410), .D(\UART_TXFF/n768 ), .CD(
1'b1), .Q(iTXFIFOQ[5]));
notech_reg \UART_TXFF/Q_reg[4] (.CP(n_8414), .D(\UART_TXFF/n766 ), .CD(
notech_reg \UART_TXFF/Q_reg[4] (.CP(n_8408), .D(\UART_TXFF/n766 ), .CD(
1'b1), .Q(iTXFIFOQ[4]));
notech_reg \UART_TXFF/Q_reg[3] (.CP(n_8416), .D(\UART_TXFF/n764 ), .CD(
notech_reg \UART_TXFF/Q_reg[3] (.CP(n_8410), .D(\UART_TXFF/n764 ), .CD(
1'b1), .Q(iTXFIFOQ[3]));
notech_reg \UART_TXFF/Q_reg[2] (.CP(n_8416), .D(\UART_TXFF/n762 ), .CD(
notech_reg \UART_TXFF/Q_reg[2] (.CP(n_8410), .D(\UART_TXFF/n762 ), .CD(
1'b1), .Q(iTXFIFOQ[2]));
notech_reg \UART_TXFF/Q_reg[1] (.CP(n_8416), .D(\UART_TXFF/n760 ), .CD(
notech_reg \UART_TXFF/Q_reg[1] (.CP(n_8410), .D(\UART_TXFF/n760 ), .CD(
1'b1), .Q(iTXFIFOQ[1]));
notech_reg \UART_TXFF/Q_reg[0] (.CP(n_8416), .D(\UART_TXFF/n758 ), .CD(
notech_reg \UART_TXFF/Q_reg[0] (.CP(n_8410), .D(\UART_TXFF/n758 ), .CD(
1'b1), .Q(iTXFIFOQ[0]));
notech_reg \UART_TXFF/iUSAGE_reg[0] (.CP(n_8417), .D(\UART_TXFF/n1291 ),
notech_reg \UART_TXFF/iUSAGE_reg[0] (.CP(n_8411), .D(\UART_TXFF/n1291 ),
.CD(\UART_IF_DSR/n8 ), .Q(\UART_TXFF/USAGE[0] ));
notech_reg \UART_TXFF/iUSAGE_reg[1] (.CP(n_8417), .D(\UART_TXFF/n1290 ),
notech_reg \UART_TXFF/iUSAGE_reg[1] (.CP(n_8411), .D(\UART_TXFF/n1290 ),
.CD(\UART_IS_RI/n1 ), .Q(\UART_TXFF/USAGE[1] ));
notech_reg \UART_TXFF/iUSAGE_reg[2] (.CP(n_8417), .D(\UART_TXFF/n1289 ),
notech_reg \UART_TXFF/iUSAGE_reg[2] (.CP(n_8411), .D(\UART_TXFF/n1289 ),
.CD(\UART_IF_DSR/n8 ), .Q(\UART_TXFF/USAGE[2] ));
notech_reg \UART_TXFF/iUSAGE_reg[3] (.CP(n_8417), .D(\UART_TXFF/n1288 ),
notech_reg \UART_TXFF/iUSAGE_reg[3] (.CP(n_8411), .D(\UART_TXFF/n1288 ),
.CD(\UART_IS_DCD/n1 ), .Q(\UART_TXFF/USAGE[3] ));
notech_reg \UART_TXFF/iUSAGE_reg[4] (.CP(n_8417), .D(\UART_TXFF/n1287 ),
notech_reg \UART_TXFF/iUSAGE_reg[4] (.CP(n_8411), .D(\UART_TXFF/n1287 ),
.CD(\UART_IS_SIN/n1 ), .Q(\iTXFIFOUsage[4] ));
notech_inv \UART_TXFF/U3 (.A(iDIN[0]), .Z(\UART_TXFF/n1 ));
notech_inv \UART_TXFF/U4 (.A(\UART_TXFF/n1 ), .Z(\UART_TXFF/n2 ));
6799,13 → 6805,13
notech_mux4 \UART_TXFF/U219 (.S0(\UART_TXFF/N17 ), .S1(\UART_TXFF/N16 ),
.A(\UART_TXFF/n209 ), .B(\UART_TXFF/n199 ), .C(\UART_TXFF/n204
), .D(\UART_TXFF/n194 ), .Z(\UART_TXFF/N123 ));
notech_mux2 \UART_TXFF/U220 (.S(n_8089), .A(\UART_TXFF/N123 ), .B(iTXFIFOQ
notech_mux2 \UART_TXFF/U220 (.S(n_8096), .A(\UART_TXFF/N123 ), .B(iTXFIFOQ
[7]), .Z(\UART_TXFF/n772 ));
notech_mux2 \UART_TXFF/U221 (.S(n_8089), .A(\UART_TXFF/N124 ), .B(iTXFIFOQ
notech_mux2 \UART_TXFF/U221 (.S(n_8096), .A(\UART_TXFF/N124 ), .B(iTXFIFOQ
[6]), .Z(\UART_TXFF/n770 ));
notech_mux2 \UART_TXFF/U222 (.S(n_8089), .A(\UART_TXFF/N125 ), .B(iTXFIFOQ
notech_mux2 \UART_TXFF/U222 (.S(n_8096), .A(\UART_TXFF/N125 ), .B(iTXFIFOQ
[5]), .Z(\UART_TXFF/n768 ));
notech_mux2 \UART_TXFF/U223 (.S(n_8089), .A(\UART_TXFF/N126 ), .B(iTXFIFOQ
notech_mux2 \UART_TXFF/U223 (.S(n_8096), .A(\UART_TXFF/N126 ), .B(iTXFIFOQ
[4]), .Z(\UART_TXFF/n766 ));
notech_mux2 \UART_TXFF/U224 (.S(RST), .A(\UART_TXFF/N127 ), .B(iTXFIFOQ[
3]), .Z(\UART_TXFF/n764 ));
7471,7 → 7477,7
notech_ao3 \UART_TXFF/U555 (.A(\UART_TXFF/n222 ), .B(\UART_TXFF/n259 ),
.C(\UART_TXFF/iWRAddr[4] ), .Z(\UART_TXFF/n279 ));
notech_ao3 \UART_TXFF/U556 (.A(\UART_TXFF/iWRAddr[5] ), .B(\UART_TXFF/n287
), .C(n_8089), .Z(\UART_TXFF/n259 ));
), .C(n_8096), .Z(\UART_TXFF/n259 ));
notech_mux2 \UART_TXFF/U557 (.S(\UART_TXFF/n288 ), .A(\UART_TXFF/iFIFOMem[31][7]
), .B(\UART_TXFF/n30 ), .Z(\UART_TXFF/n1547 ));
notech_mux2 \UART_TXFF/U558 (.S(\UART_TXFF/n288 ), .A(\UART_TXFF/iFIFOMem[31][6]
8194,17 → 8200,17
), .Z(\UART_TXFF/n368 ));
notech_xor2 \UART_TXFF/U926 (.A(\UART_TXFF/iWRAddr[1] ), .B(\UART_TXFF/N13
), .Z(\UART_TXFF/n367 ));
notech_reg \UART_RCLK/iDd_reg (.CP(n_8417), .D(RCLK), .CD(\UART_IS_DSR/n1
notech_reg \UART_RCLK/iDd_reg (.CP(n_8411), .D(RCLK), .CD(\UART_IS_DSR/n1
), .Q(\UART_RCLK/iDd ));
notech_and2 \UART_RCLK/U5 (.A(RCLK), .B(\UART_RCLK/n1 ), .Z(iRCLK));
notech_inv \UART_RCLK/U6 (.A(\UART_RCLK/iDd ), .Z(\UART_RCLK/n1 ));
notech_reg \UART_BG2/iCounter_reg[0] (.CP(n_8417), .D(\UART_BG2/n6 ), .CD
notech_reg \UART_BG2/iCounter_reg[0] (.CP(n_8411), .D(\UART_BG2/n6 ), .CD
(\UART_IS_CTS/n1 ), .Q(\UART_BG2/iCounter[0] ));
notech_reg \UART_BG2/iCounter_reg[1] (.CP(n_8417), .D(\UART_BG2/n4 ), .CD
notech_reg \UART_BG2/iCounter_reg[1] (.CP(n_8411), .D(\UART_BG2/n4 ), .CD
(\UART_IS_DSR/n1 ), .Q(\UART_BG2/iCounter[1] ));
notech_reg \UART_BG2/iCounter_reg[2] (.CP(n_8417), .D(\UART_BG2/n3 ), .CD
notech_reg \UART_BG2/iCounter_reg[2] (.CP(n_8411), .D(\UART_BG2/n3 ), .CD
(\UART_IS_DCD/n1 ), .Q(\UART_BG2/iCounter[2] ));
notech_reg \UART_BG2/iQ_reg (.CP(n_8417), .D(\UART_BG2/N14 ), .CD(\UART_IF_DSR/n8
notech_reg \UART_BG2/iQ_reg (.CP(n_8411), .D(\UART_BG2/N14 ), .CD(\UART_IF_DSR/n8
), .Q(iBaudtick2x));
notech_xor2 \UART_BG2/U4 (.A(\UART_BG2/iCounter[0] ), .B(iBaudtick16x),
.Z(\UART_BG2/n6 ));
8248,39 → 8254,39
), .Z(\UART_BG16/N8 ), .CO(\UART_BG16/add_54/carry [2]));
notech_xor2 \UART_BG16/add_54/U1 (.A(\UART_BG16/add_54/carry [15]), .B(\UART_BG16/iCounter[15]
), .Z(\UART_BG16/N22 ));
notech_reg \UART_BG16/iCounter_reg[0] (.CP(n_8417), .D(\UART_BG16/n55 ),
notech_reg \UART_BG16/iCounter_reg[0] (.CP(n_8411), .D(\UART_BG16/n55 ),
.CD(\UART_IS_DCD/n1 ), .Q(\UART_BG16/iCounter[0] ));
notech_reg \UART_BG16/BAUDTICK_reg (.CP(n_8413), .D(\UART_BG16/N40 ), .CD
notech_reg \UART_BG16/BAUDTICK_reg (.CP(n_8407), .D(\UART_BG16/N40 ), .CD
(\UART_IS_DSR/n1 ), .Q(iBaudtick16x));
notech_reg \UART_BG16/iCounter_reg[1] (.CP(n_8413), .D(\UART_BG16/n54 ),
notech_reg \UART_BG16/iCounter_reg[1] (.CP(n_8407), .D(\UART_BG16/n54 ),
.CD(\UART_IS_DSR/n1 ), .Q(\UART_BG16/iCounter[1] ));
notech_reg \UART_BG16/iCounter_reg[2] (.CP(n_8413), .D(\UART_BG16/n53 ),
notech_reg \UART_BG16/iCounter_reg[2] (.CP(n_8407), .D(\UART_BG16/n53 ),
.CD(\UART_IS_CTS/n1 ), .Q(\UART_BG16/iCounter[2] ));
notech_reg \UART_BG16/iCounter_reg[3] (.CP(n_8413), .D(\UART_BG16/n52 ),
notech_reg \UART_BG16/iCounter_reg[3] (.CP(n_8407), .D(\UART_BG16/n52 ),
.CD(\UART_IS_SIN/n1 ), .Q(\UART_BG16/iCounter[3] ));
notech_reg \UART_BG16/iCounter_reg[4] (.CP(n_8413), .D(\UART_BG16/n51 ),
notech_reg \UART_BG16/iCounter_reg[4] (.CP(n_8407), .D(\UART_BG16/n51 ),
.CD(\UART_IF_CTS/n8 ), .Q(\UART_BG16/iCounter[4] ));
notech_reg \UART_BG16/iCounter_reg[5] (.CP(n_8413), .D(\UART_BG16/n50 ),
notech_reg \UART_BG16/iCounter_reg[5] (.CP(n_8407), .D(\UART_BG16/n50 ),
.CD(\UART_IS_RI/n1 ), .Q(\UART_BG16/iCounter[5] ));
notech_reg \UART_BG16/iCounter_reg[6] (.CP(n_8412), .D(\UART_BG16/n49 ),
notech_reg \UART_BG16/iCounter_reg[6] (.CP(n_8406), .D(\UART_BG16/n49 ),
.CD(\UART_IS_SIN/n1 ), .Q(\UART_BG16/iCounter[6] ));
notech_reg \UART_BG16/iCounter_reg[7] (.CP(n_8412), .D(\UART_BG16/n48 ),
notech_reg \UART_BG16/iCounter_reg[7] (.CP(n_8406), .D(\UART_BG16/n48 ),
.CD(\UART_IF_DSR/n8 ), .Q(\UART_BG16/iCounter[7] ));
notech_reg \UART_BG16/iCounter_reg[8] (.CP(n_8413), .D(\UART_BG16/n47 ),
notech_reg \UART_BG16/iCounter_reg[8] (.CP(n_8407), .D(\UART_BG16/n47 ),
.CD(\UART_IS_DCD/n1 ), .Q(\UART_BG16/iCounter[8] ));
notech_reg \UART_BG16/iCounter_reg[9] (.CP(n_8413), .D(\UART_BG16/n46 ),
notech_reg \UART_BG16/iCounter_reg[9] (.CP(n_8407), .D(\UART_BG16/n46 ),
.CD(\UART_IS_DSR/n1 ), .Q(\UART_BG16/iCounter[9] ));
notech_reg \UART_BG16/iCounter_reg[10] (.CP(n_8413), .D(\UART_BG16/n45 )
notech_reg \UART_BG16/iCounter_reg[10] (.CP(n_8407), .D(\UART_BG16/n45 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_BG16/iCounter[10] ));
notech_reg \UART_BG16/iCounter_reg[11] (.CP(n_8413), .D(\UART_BG16/n44 )
notech_reg \UART_BG16/iCounter_reg[11] (.CP(n_8407), .D(\UART_BG16/n44 )
, .CD(\UART_IS_SIN/n1 ), .Q(\UART_BG16/iCounter[11] ));
notech_reg \UART_BG16/iCounter_reg[12] (.CP(n_8414), .D(\UART_BG16/n43 )
notech_reg \UART_BG16/iCounter_reg[12] (.CP(n_8408), .D(\UART_BG16/n43 )
, .CD(\UART_IF_CTS/n8 ), .Q(\UART_BG16/iCounter[12] ));
notech_reg \UART_BG16/iCounter_reg[13] (.CP(n_8414), .D(\UART_BG16/n42 )
notech_reg \UART_BG16/iCounter_reg[13] (.CP(n_8408), .D(\UART_BG16/n42 )
, .CD(\UART_IS_RI/n1 ), .Q(\UART_BG16/iCounter[13] ));
notech_reg \UART_BG16/iCounter_reg[14] (.CP(n_8414), .D(\UART_BG16/n41 )
notech_reg \UART_BG16/iCounter_reg[14] (.CP(n_8408), .D(\UART_BG16/n41 )
, .CD(\UART_IF_CTS/n8 ), .Q(\UART_BG16/iCounter[14] ));
notech_reg \UART_BG16/iCounter_reg[15] (.CP(n_8414), .D(\UART_BG16/n40 )
notech_reg \UART_BG16/iCounter_reg[15] (.CP(n_8408), .D(\UART_BG16/n40 )
, .CD(\UART_IF_DSR/n8 ), .Q(\UART_BG16/iCounter[15] ));
notech_inv \UART_BG16/U4 (.A(\UART_BG16/n1 ), .Z(\UART_BG16/n55 ));
notech_mux2 \UART_BG16/U5 (.S(\UART_BG16/iCounter[0] ), .A(\UART_BG16/n2
8403,53 → 8409,53
(\UART_BG16/n70 ));
notech_xor2 \UART_BG16/U76 (.A(\UART_BG16/iCounter[4] ), .B(iDLL[4]), .Z
(\UART_BG16/n69 ));
notech_reg \UART_ED_DCD/iDd_reg (.CP(n_8414), .D(N157), .CD(\UART_IS_CTS/n1
notech_reg \UART_ED_DCD/iDd_reg (.CP(n_8408), .D(N157), .CD(\UART_IS_CTS/n1
), .Q(\UART_ED_DCD/iDd ));
notech_nor2 \UART_ED_DCD/U4 (.A(\UART_ED_DCD/n1 ), .B(N157), .Z(iDCDnFE)
);
notech_inv \UART_ED_DCD/U6 (.A(\UART_ED_DCD/iDd ), .Z(\UART_ED_DCD/n1 )
);
notech_reg \UART_ED_RI/iDd_reg (.CP(n_8414), .D(N156), .CD(\UART_IF_DSR/n8
notech_reg \UART_ED_RI/iDd_reg (.CP(n_8408), .D(N156), .CD(\UART_IF_DSR/n8
), .Q(\UART_ED_RI/iDd ));
notech_nor2 \UART_ED_RI/U4 (.A(\UART_ED_RI/n1 ), .B(N156), .Z(iRInFE));
notech_inv \UART_ED_RI/U6 (.A(\UART_ED_RI/iDd ), .Z(\UART_ED_RI/n1 ));
notech_reg \UART_ED_DSR/iDd_reg (.CP(n_8414), .D(N155), .CD(\UART_IS_SIN/n1
notech_reg \UART_ED_DSR/iDd_reg (.CP(n_8408), .D(N155), .CD(\UART_IS_SIN/n1
), .Q(\UART_ED_DSR/iDd ));
notech_nor2 \UART_ED_DSR/U4 (.A(\UART_ED_DSR/n1 ), .B(N155), .Z(iDSRnFE)
);
notech_inv \UART_ED_DSR/U6 (.A(\UART_ED_DSR/iDd ), .Z(\UART_ED_DSR/n1 )
);
notech_reg \UART_ED_CTS/iDd_reg (.CP(n_8413), .D(N154), .CD(\UART_IS_RI/n1
notech_reg \UART_ED_CTS/iDd_reg (.CP(n_8407), .D(N154), .CD(\UART_IS_RI/n1
), .Q(\UART_ED_CTS/iDd ));
notech_nor2 \UART_ED_CTS/U4 (.A(\UART_ED_CTS/n1 ), .B(N154), .Z(iCTSnFE)
);
notech_inv \UART_ED_CTS/U6 (.A(\UART_ED_CTS/iDd ), .Z(\UART_ED_CTS/n1 )
);
notech_reg \UART_BIDET/iDd_reg (.CP(n_8414), .D(n674), .CD(\UART_IF_CTS/n8
notech_reg \UART_BIDET/iDd_reg (.CP(n_8408), .D(n674), .CD(\UART_IF_CTS/n8
), .Q(\UART_BIDET/iDd ));
notech_and2 \UART_BIDET/U5 (.A(n674), .B(\UART_BIDET/n1 ), .Z(iBIRE));
notech_inv \UART_BIDET/U6 (.A(\UART_BIDET/iDd ), .Z(\UART_BIDET/n1 ));
notech_reg \UART_FEDET/iDd_reg (.CP(n_8414), .D(n675), .CD(\UART_IS_RI/n1
notech_reg \UART_FEDET/iDd_reg (.CP(n_8408), .D(n675), .CD(\UART_IS_RI/n1
), .Q(\UART_FEDET/iDd ));
notech_and2 \UART_FEDET/U5 (.A(n675), .B(\UART_FEDET/n1 ), .Z(iFERE));
notech_inv \UART_FEDET/U6 (.A(\UART_FEDET/iDd ), .Z(\UART_FEDET/n1 ));
notech_reg \UART_PEDET/iDd_reg (.CP(n_8414), .D(N146), .CD(\UART_IS_CTS/n1
notech_reg \UART_PEDET/iDd_reg (.CP(n_8408), .D(N146), .CD(\UART_IS_CTS/n1
), .Q(\UART_PEDET/iDd ));
notech_and2 \UART_PEDET/U5 (.A(N146), .B(\UART_PEDET/n1 ), .Z(iPERE));
notech_inv \UART_PEDET/U6 (.A(\UART_PEDET/iDd ), .Z(\UART_PEDET/n1 ));
notech_reg \UART_IIC_THRE_ED/iDd_reg (.CP(n_8422), .D(iTXFIFOEmpty), .CD
notech_reg \UART_IIC_THRE_ED/iDd_reg (.CP(n_8416), .D(iTXFIFOEmpty), .CD
(\UART_IS_SIN/n1 ), .Q(\UART_IIC_THRE_ED/iDd ));
notech_and2 \UART_IIC_THRE_ED/U5 (.A(iTXFIFOEmpty), .B(\UART_IIC_THRE_ED/n1
), .Z(iLSR_THRERE));
notech_inv \UART_IIC_THRE_ED/U6 (.A(\UART_IIC_THRE_ED/iDd ), .Z(\UART_IIC_THRE_ED/n1
));
notech_reg \UART_IIC/iIIR_reg[3] (.CP(n_8422), .D(\UART_IIC/N22 ), .CD(n420
notech_reg \UART_IIC/iIIR_reg[3] (.CP(n_8416), .D(\UART_IIC/N22 ), .CD(n420
), .Q(\iIIR[3] ));
notech_reg \UART_IIC/iIIR_reg[2] (.CP(n_8422), .D(\UART_IIC/N21 ), .CD(\UART_IF_DSR/n8
notech_reg \UART_IIC/iIIR_reg[2] (.CP(n_8416), .D(\UART_IIC/N21 ), .CD(\UART_IF_DSR/n8
), .Q(\iIIR[2] ));
notech_reg \UART_IIC/iIIR_reg[1] (.CP(n_8423), .D(\UART_IIC/N20 ), .CD(\UART_IS_SIN/n1
notech_reg \UART_IIC/iIIR_reg[1] (.CP(n_8417), .D(\UART_IIC/N20 ), .CD(\UART_IS_SIN/n1
), .Q(\iIIR[1] ));
notech_reg_set \UART_IIC/iIIR_reg[0] (.CP(n_8341), .D(\UART_IIC/N19 ), .SD
notech_reg_set \UART_IIC/iIIR_reg[0] (.CP(n_8335), .D(\UART_IIC/N19 ), .SD
(\UART_IS_DSR/n1 ), .Q(\UART_IIC/IIR[0] ));
notech_inv \UART_IIC/U3 (.A(\UART_IIC/IIR[0] ), .Z(INT));
notech_nor2 \UART_IIC/U5 (.A(\UART_IIC/n1 ), .B(\UART_IIC/n2 ), .Z(\UART_IIC/N22
8476,11 → 8482,11
notech_and2 \UART_IIC/U16 (.A(\iMSR[0] ), .B(n434), .Z(\UART_IIC/n9 ));
notech_nand2 \UART_IIC/U18 (.A(iTHRInterrupt), .B(iIER[1]), .Z(\UART_IIC/n5
));
notech_reg \UART_IF_RI/iCount_reg[0] (.CP(n_8422), .D(\UART_IF_RI/n9 ),
notech_reg \UART_IF_RI/iCount_reg[0] (.CP(n_8416), .D(\UART_IF_RI/n9 ),
.CD(\UART_IS_CTS/n1 ), .Q(\UART_IF_RI/iCount[0] ));
notech_reg \UART_IF_RI/iCount_reg[1] (.CP(n_8422), .D(\UART_IF_RI/n10 ),
notech_reg \UART_IF_RI/iCount_reg[1] (.CP(n_8416), .D(\UART_IF_RI/n10 ),
.CD(\UART_IS_DSR/n1 ), .Q(\UART_IF_RI/iCount[1] ));
notech_reg \UART_IF_RI/Q_reg (.CP(n_8422), .D(\UART_IF_RI/n11 ), .CD(\UART_IS_DCD/n1
notech_reg \UART_IF_RI/Q_reg (.CP(n_8416), .D(\UART_IF_RI/n11 ), .CD(\UART_IS_DCD/n1
), .Q(iRIn));
notech_xor2 \UART_IF_RI/U4 (.A(\UART_IF_RI/iCount[0] ), .B(\UART_IF_RI/n1
), .Z(\UART_IF_RI/n9 ));
8501,11 → 8507,11
), .Z(\UART_IF_RI/n5 ));
notech_mux2 \UART_IF_RI/U13 (.S(\UART_IF_RI/iCount[0] ), .A(\UART_IF_RI/iCount[1]
), .B(iRIn), .Z(\UART_IF_RI/n11 ));
notech_reg \UART_IF_DCD/iCount_reg[0] (.CP(n_8422), .D(\UART_IF_DCD/n9 )
notech_reg \UART_IF_DCD/iCount_reg[0] (.CP(n_8416), .D(\UART_IF_DCD/n9 )
, .CD(\UART_IS_CTS/n1 ), .Q(\UART_IF_DCD/iCount[0] ));
notech_reg \UART_IF_DCD/iCount_reg[1] (.CP(n_8422), .D(\UART_IF_DCD/n10
notech_reg \UART_IF_DCD/iCount_reg[1] (.CP(n_8416), .D(\UART_IF_DCD/n10
), .CD(\UART_IS_DCD/n1 ), .Q(\UART_IF_DCD/iCount[1] ));
notech_reg \UART_IF_DCD/Q_reg (.CP(n_8422), .D(\UART_IF_DCD/n11 ), .CD(n419
notech_reg \UART_IF_DCD/Q_reg (.CP(n_8416), .D(\UART_IF_DCD/n11 ), .CD(n419
), .Q(iDCDn));
notech_xor2 \UART_IF_DCD/U4 (.A(\UART_IF_DCD/iCount[0] ), .B(\UART_IF_DCD/n1
), .Z(\UART_IF_DCD/n9 ));
8525,11 → 8531,11
(iBaudtick2x), .Z(\UART_IF_DCD/n5 ));
notech_mux2 \UART_IF_DCD/U13 (.S(\UART_IF_DCD/iCount[0] ), .A(\UART_IF_DCD/iCount[1]
), .B(iDCDn), .Z(\UART_IF_DCD/n11 ));
notech_reg \UART_IF_DSR/iCount_reg[0] (.CP(n_8422), .D(\UART_IF_DSR/n9 )
notech_reg \UART_IF_DSR/iCount_reg[0] (.CP(n_8416), .D(\UART_IF_DSR/n9 )
, .CD(\UART_IF_DSR/n8 ), .Q(\UART_IF_DSR/iCount[0] ));
notech_reg \UART_IF_DSR/iCount_reg[1] (.CP(n_8423), .D(\UART_IF_DSR/n10
notech_reg \UART_IF_DSR/iCount_reg[1] (.CP(n_8417), .D(\UART_IF_DSR/n10
), .CD(\UART_IF_DSR/n8 ), .Q(\UART_IF_DSR/iCount[1] ));
notech_reg \UART_IF_DSR/Q_reg (.CP(n_8423), .D(\UART_IF_DSR/n11 ), .CD(\UART_IF_DSR/n8
notech_reg \UART_IF_DSR/Q_reg (.CP(n_8417), .D(\UART_IF_DSR/n11 ), .CD(\UART_IF_DSR/n8
), .Q(iDSRn));
notech_inv \UART_IF_DSR/U3 (.A(RST), .Z(\UART_IF_DSR/n8 ));
notech_xor2 \UART_IF_DSR/U4 (.A(\UART_IF_DSR/iCount[0] ), .B(\UART_IF_DSR/n1
8550,11 → 8556,11
(iBaudtick2x), .Z(\UART_IF_DSR/n5 ));
notech_mux2 \UART_IF_DSR/U13 (.S(\UART_IF_DSR/iCount[0] ), .A(\UART_IF_DSR/iCount[1]
), .B(iDSRn), .Z(\UART_IF_DSR/n11 ));
notech_reg \UART_IF_CTS/iCount_reg[0] (.CP(n_8423), .D(\UART_IF_CTS/n18
notech_reg \UART_IF_CTS/iCount_reg[0] (.CP(n_8417), .D(\UART_IF_CTS/n18
), .CD(\UART_IF_CTS/n8 ), .Q(\UART_IF_CTS/iCount[0] ));
notech_reg \UART_IF_CTS/iCount_reg[1] (.CP(n_8423), .D(\UART_IF_CTS/n17
notech_reg \UART_IF_CTS/iCount_reg[1] (.CP(n_8417), .D(\UART_IF_CTS/n17
), .CD(\UART_IF_CTS/n8 ), .Q(\UART_IF_CTS/iCount[1] ));
notech_reg \UART_IF_CTS/Q_reg (.CP(n_8424), .D(\UART_IF_CTS/n16 ), .CD(\UART_IF_CTS/n8
notech_reg \UART_IF_CTS/Q_reg (.CP(n_8418), .D(\UART_IF_CTS/n16 ), .CD(\UART_IF_CTS/n8
), .Q(iCTSn));
notech_inv \UART_IF_CTS/U3 (.A(RST), .Z(\UART_IF_CTS/n8 ));
notech_xor2 \UART_IF_CTS/U4 (.A(\UART_IF_CTS/iCount[0] ), .B(\UART_IF_CTS/n1
8575,30 → 8581,30
(iBaudtick2x), .Z(\UART_IF_CTS/n5 ));
notech_mux2 \UART_IF_CTS/U13 (.S(\UART_IF_CTS/iCount[0] ), .A(\UART_IF_CTS/iCount[1]
), .B(iCTSn), .Z(\UART_IF_CTS/n16 ));
notech_reg \UART_IS_RI/iD_reg[1] (.CP(n_8424), .D(\UART_IS_RI/iD[0] ), .CD
notech_reg \UART_IS_RI/iD_reg[1] (.CP(n_8418), .D(\UART_IS_RI/iD[0] ), .CD
(\UART_IS_RI/n1 ), .Q(iRINs));
notech_inv \UART_IS_RI/U3 (.A(RST), .Z(\UART_IS_RI/n1 ));
notech_reg \UART_IS_DCD/iD_reg[1] (.CP(n_8423), .D(\UART_IS_DCD/iD[0] ),
notech_reg \UART_IS_DCD/iD_reg[1] (.CP(n_8417), .D(\UART_IS_DCD/iD[0] ),
.CD(\UART_IS_DCD/n1 ), .Q(iDCDNs));
notech_inv \UART_IS_DCD/U3 (.A(RST), .Z(\UART_IS_DCD/n1 ));
notech_reg \UART_IS_DSR/iD_reg[1] (.CP(n_8423), .D(\UART_IS_DSR/iD[0] ),
notech_reg \UART_IS_DSR/iD_reg[1] (.CP(n_8417), .D(\UART_IS_DSR/iD[0] ),
.CD(\UART_IS_DSR/n1 ), .Q(iDSRNs));
notech_inv \UART_IS_DSR/U3 (.A(RST), .Z(\UART_IS_DSR/n1 ));
notech_reg \UART_IS_CTS/iD_reg[1] (.CP(n_8423), .D(\UART_IS_CTS/iD[0] ),
notech_reg \UART_IS_CTS/iD_reg[1] (.CP(n_8417), .D(\UART_IS_CTS/iD[0] ),
.CD(\UART_IS_CTS/n1 ), .Q(iCTSNs));
notech_inv \UART_IS_CTS/U3 (.A(RST), .Z(\UART_IS_CTS/n1 ));
notech_reg \UART_IS_SIN/iD_reg[0] (.CP(n_8423), .D(SIN), .CD(\UART_IS_SIN/n1
notech_reg \UART_IS_SIN/iD_reg[0] (.CP(n_8417), .D(SIN), .CD(\UART_IS_SIN/n1
), .Q(\UART_IS_SIN/iD[0] ));
notech_reg \UART_IS_SIN/iD_reg[1] (.CP(n_8423), .D(\UART_IS_SIN/iD[0] ),
notech_reg \UART_IS_SIN/iD_reg[1] (.CP(n_8417), .D(\UART_IS_SIN/iD[0] ),
.CD(\UART_IS_SIN/n1 ), .Q(iSINr));
notech_inv \UART_IS_SIN/U3 (.A(RST), .Z(\UART_IS_SIN/n1 ));
notech_reg \UART_ED_READ/iDd_reg (.CP(n_8423), .D(n678), .CD(\UART_IS_DSR/n1
notech_reg \UART_ED_READ/iDd_reg (.CP(n_8417), .D(n678), .CD(\UART_IS_DSR/n1
), .Q(\UART_ED_READ/iDd ));
notech_nor2 \UART_ED_READ/U4 (.A(\UART_ED_READ/n1 ), .B(n678), .Z(iReadFE
));
notech_inv \UART_ED_READ/U6 (.A(\UART_ED_READ/iDd ), .Z(\UART_ED_READ/n1
));
notech_reg \UART_ED_WRITE/iDd_reg (.CP(n_8418), .D(N48), .CD(\UART_IS_DSR/n1
notech_reg \UART_ED_WRITE/iDd_reg (.CP(n_8412), .D(N48), .CD(\UART_IS_DSR/n1
), .Q(\UART_ED_WRITE/iDd ));
notech_nor2 \UART_ED_WRITE/U4 (.A(\UART_ED_WRITE/n1 ), .B(N48), .Z(iWriteFE
));
8900,7 → 8906,7
notech_and2 U551(.A(iRXFIFOQ[10]), .B(n438), .Z(n674));
notech_ao3 U550(.A(n504), .B(n505), .C(n674), .Z(n503));
notech_nor2 U549(.A(n503), .B(n500), .Z(n502));
notech_nor2 U548(.A(n502), .B(n_8089), .Z(n501));
notech_nor2 U548(.A(n502), .B(n_8096), .Z(n501));
notech_mux2 U547(.S(n501), .A(iLSR_FIFOERR), .B(n500), .Z(n378));
notech_nor2 U544(.A(n499), .B(\UART_RXFF/n441 ), .Z(n497));
notech_or4 U543(.A(n496), .B(n497), .C(iRXFIFOEmpty), .D(n498), .Z(n495)
9002,229 → 9008,229
notech_inv U449(.A(RST), .Z(n417));
notech_inv U448(.A(RST), .Z(n416));
notech_inv U447(.A(RST), .Z(n415));
notech_reg_set BAUDOUTN_reg(.CP(n_8341), .D(n677), .SD(n419), .Q(BAUDOUTN
notech_reg_set BAUDOUTN_reg(.CP(n_8335), .D(n677), .SD(n419), .Q(BAUDOUTN
));
notech_reg_set SOUT_reg(.CP(n_8341), .D(N202), .SD(n418), .Q(SOUT));
notech_reg iLSR_FIFOERR_reg(.CP(n_8418), .D(n378), .CD(1'b1), .Q(iLSR_FIFOERR
notech_reg_set SOUT_reg(.CP(n_8335), .D(N202), .SD(n418), .Q(SOUT));
notech_reg iLSR_FIFOERR_reg(.CP(n_8412), .D(n378), .CD(1'b1), .Q(iLSR_FIFOERR
));
notech_reg \iFECounter_reg[5] (.CP(n_8418), .D(n380), .CD(n417), .Q(iFECounter
notech_reg \iFECounter_reg[5] (.CP(n_8412), .D(n380), .CD(n417), .Q(iFECounter
[5]));
notech_reg \iFECounter_reg[4] (.CP(n_8418), .D(n381), .CD(n417), .Q(iFECounter
notech_reg \iFECounter_reg[4] (.CP(n_8412), .D(n381), .CD(n417), .Q(iFECounter
[4]));
notech_reg \iFECounter_reg[3] (.CP(n_8418), .D(n382), .CD(n415), .Q(iFECounter
notech_reg \iFECounter_reg[3] (.CP(n_8412), .D(n382), .CD(n415), .Q(iFECounter
[3]));
notech_reg \iFECounter_reg[2] (.CP(n_8418), .D(n383), .CD(n415), .Q(iFECounter
notech_reg \iFECounter_reg[2] (.CP(n_8412), .D(n383), .CD(n415), .Q(iFECounter
[2]));
notech_reg \iFECounter_reg[1] (.CP(n_8418), .D(n384), .CD(n416), .Q(iFECounter
notech_reg \iFECounter_reg[1] (.CP(n_8412), .D(n384), .CD(n416), .Q(iFECounter
[1]));
notech_reg \iFECounter_reg[0] (.CP(n_8418), .D(n385), .CD(n420), .Q(iFECounter
notech_reg \iFECounter_reg[0] (.CP(n_8412), .D(n385), .CD(n420), .Q(iFECounter
[0]));
notech_reg \iFECounter_reg[6] (.CP(n_8418), .D(n379), .CD(n418), .Q(iFECounter
notech_reg \iFECounter_reg[6] (.CP(n_8412), .D(n379), .CD(n418), .Q(iFECounter
[6]));
notech_reg iTHRInterrupt_reg(.CP(n_8418), .D(n376), .CD(n420), .Q(iTHRInterrupt
notech_reg iTHRInterrupt_reg(.CP(n_8412), .D(n376), .CD(n420), .Q(iTHRInterrupt
));
notech_reg iLSR_BI_reg(.CP(n_8418), .D(n377), .CD(n417), .Q(\iLSR[4] )
notech_reg iLSR_BI_reg(.CP(n_8412), .D(n377), .CD(n417), .Q(\iLSR[4] )
);
notech_reg iLSR_FE_reg(.CP(n_8419), .D(n386), .CD(n415), .Q(\iLSR[3] )
notech_reg iLSR_FE_reg(.CP(n_8413), .D(n386), .CD(n415), .Q(\iLSR[3] )
);
notech_reg iLSR_PE_reg(.CP(n_8419), .D(n387), .CD(n417), .Q(\iLSR[2] )
notech_reg iLSR_PE_reg(.CP(n_8413), .D(n387), .CD(n417), .Q(\iLSR[2] )
);
notech_reg iCharTimeout_reg(.CP(n_8419), .D(n388), .CD(n420), .Q(iCharTimeout
notech_reg iCharTimeout_reg(.CP(n_8413), .D(n388), .CD(n420), .Q(iCharTimeout
));
notech_reg \iTimeoutCount_reg[4] (.CP(n_8419), .D(n389), .CD(n418), .Q(iTimeoutCount
notech_reg \iTimeoutCount_reg[4] (.CP(n_8413), .D(n389), .CD(n418), .Q(iTimeoutCount
[4]));
notech_reg \iTimeoutCount_reg[3] (.CP(n_8422), .D(n390), .CD(n419), .Q(iTimeoutCount
notech_reg \iTimeoutCount_reg[3] (.CP(n_8416), .D(n390), .CD(n419), .Q(iTimeoutCount
[3]));
notech_reg \iTimeoutCount_reg[2] (.CP(n_8419), .D(n391), .CD(n419), .Q(iTimeoutCount
notech_reg \iTimeoutCount_reg[2] (.CP(n_8413), .D(n391), .CD(n419), .Q(iTimeoutCount
[2]));
notech_reg \iTimeoutCount_reg[1] (.CP(n_8419), .D(n392), .CD(n416), .Q(iTimeoutCount
notech_reg \iTimeoutCount_reg[1] (.CP(n_8413), .D(n392), .CD(n416), .Q(iTimeoutCount
[1]));
notech_reg \iTimeoutCount_reg[0] (.CP(n_8419), .D(n393), .CD(n415), .Q(iTimeoutCount
notech_reg \iTimeoutCount_reg[0] (.CP(n_8413), .D(n393), .CD(n415), .Q(iTimeoutCount
[0]));
notech_reg \iTimeoutCount_reg[5] (.CP(n_8419), .D(n394), .CD(n417), .Q(iTimeoutCount
notech_reg \iTimeoutCount_reg[5] (.CP(n_8413), .D(n394), .CD(n417), .Q(iTimeoutCount
[5]));
notech_reg iLSR_OE_reg(.CP(n_8419), .D(n395), .CD(n418), .Q(\iLSR[1] )
notech_reg iLSR_OE_reg(.CP(n_8413), .D(n395), .CD(n418), .Q(\iLSR[1] )
);
notech_reg iRXFIFOWrite_reg(.CP(n_8419), .D(N191), .CD(n415), .Q(iRXFIFOWrite
notech_reg iRXFIFOWrite_reg(.CP(n_8413), .D(N191), .CD(n415), .Q(iRXFIFOWrite
));
notech_reg \iRXFIFOD_reg[8] (.CP(n_8419), .D(n396), .CD(n419), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[8] (.CP(n_8413), .D(n396), .CD(n419), .Q(iRXFIFOD
[8]));
notech_reg \iRXFIFOD_reg[9] (.CP(n_8412), .D(n397), .CD(n417), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[9] (.CP(n_8406), .D(n397), .CD(n417), .Q(iRXFIFOD
[9]));
notech_reg \iRXFIFOD_reg[10] (.CP(n_8401), .D(n398), .CD(n420), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[10] (.CP(n_8395), .D(n398), .CD(n420), .Q(iRXFIFOD
[10]));
notech_reg \iRXFIFOD_reg[7] (.CP(n_8401), .D(n399), .CD(n415), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[7] (.CP(n_8395), .D(n399), .CD(n415), .Q(iRXFIFOD
[7]));
notech_reg \iRXFIFOD_reg[6] (.CP(n_8406), .D(n400), .CD(n417), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[6] (.CP(n_8400), .D(n400), .CD(n417), .Q(iRXFIFOD
[6]));
notech_reg \iRXFIFOD_reg[5] (.CP(n_8406), .D(n401), .CD(n418), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[5] (.CP(n_8400), .D(n401), .CD(n418), .Q(iRXFIFOD
[5]));
notech_reg \iRXFIFOD_reg[4] (.CP(n_8406), .D(n402), .CD(n419), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[4] (.CP(n_8400), .D(n402), .CD(n419), .Q(iRXFIFOD
[4]));
notech_reg \iRXFIFOD_reg[3] (.CP(n_8401), .D(n403), .CD(n418), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[3] (.CP(n_8395), .D(n403), .CD(n418), .Q(iRXFIFOD
[3]));
notech_reg \iRXFIFOD_reg[2] (.CP(n_8401), .D(n404), .CD(n416), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[2] (.CP(n_8395), .D(n404), .CD(n416), .Q(iRXFIFOD
[2]));
notech_reg \iRXFIFOD_reg[1] (.CP(n_8401), .D(n405), .CD(n419), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[1] (.CP(n_8395), .D(n405), .CD(n419), .Q(iRXFIFOD
[1]));
notech_reg \iRXFIFOD_reg[0] (.CP(n_8401), .D(n406), .CD(n420), .Q(iRXFIFOD
notech_reg \iRXFIFOD_reg[0] (.CP(n_8395), .D(n406), .CD(n420), .Q(iRXFIFOD
[0]));
notech_reg State_reg2(.CP(n_8401), .D(n673), .CD(n420), .Q(State_snps_wire
notech_reg State_reg2(.CP(n_8395), .D(n673), .CD(n420), .Q(State_snps_wire
));
notech_reg iRXFIFOClear_reg(.CP(n_8401), .D(N190), .CD(n420), .Q(iRXFIFOClear
notech_reg iRXFIFOClear_reg(.CP(n_8395), .D(N190), .CD(n420), .Q(iRXFIFOClear
));
notech_reg iTXStart_reg(.CP(n_8406), .D(N183), .CD(n418), .Q(iTXStart)
notech_reg iTXStart_reg(.CP(n_8400), .D(N183), .CD(n418), .Q(iTXStart)
);
notech_reg iTXRunning_reg(.CP(n_8406), .D(n414), .CD(n416), .Q(iTXRunning
notech_reg iTXRunning_reg(.CP(n_8400), .D(n414), .CD(n416), .Q(iTXRunning
));
notech_reg \State_reg[1] (.CP(n_8406), .D(N182), .CD(n419), .Q(State[1])
notech_reg \State_reg[1] (.CP(n_8400), .D(N182), .CD(n419), .Q(State[1])
);
notech_reg \iTSR_reg[0] (.CP(n_8406), .D(n317), .CD(n416), .Q(iTSR[0])
notech_reg \iTSR_reg[0] (.CP(n_8400), .D(n317), .CD(n416), .Q(iTSR[0])
);
notech_reg \iTSR_reg[1] (.CP(n_8406), .D(n318), .CD(n419), .Q(iTSR[1])
notech_reg \iTSR_reg[1] (.CP(n_8400), .D(n318), .CD(n419), .Q(iTSR[1])
);
notech_reg \iTSR_reg[2] (.CP(n_8406), .D(n319), .CD(n420), .Q(iTSR[2])
notech_reg \iTSR_reg[2] (.CP(n_8400), .D(n319), .CD(n420), .Q(iTSR[2])
);
notech_reg \iTSR_reg[3] (.CP(n_8406), .D(n320), .CD(n418), .Q(iTSR[3])
notech_reg \iTSR_reg[3] (.CP(n_8400), .D(n320), .CD(n418), .Q(iTSR[3])
);
notech_reg \iTSR_reg[4] (.CP(n_8406), .D(n321), .CD(n417), .Q(iTSR[4])
notech_reg \iTSR_reg[4] (.CP(n_8400), .D(n321), .CD(n417), .Q(iTSR[4])
);
notech_reg \iTSR_reg[5] (.CP(n_8406), .D(n322), .CD(n418), .Q(iTSR[5])
notech_reg \iTSR_reg[5] (.CP(n_8400), .D(n322), .CD(n418), .Q(iTSR[5])
);
notech_reg \iTSR_reg[6] (.CP(n_8406), .D(n323), .CD(n419), .Q(iTSR[6])
notech_reg \iTSR_reg[6] (.CP(n_8400), .D(n323), .CD(n419), .Q(iTSR[6])
);
notech_reg \iTSR_reg[7] (.CP(n_8406), .D(n324), .CD(n415), .Q(iTSR[7])
notech_reg \iTSR_reg[7] (.CP(n_8400), .D(n324), .CD(n415), .Q(iTSR[7])
);
notech_reg iTXFIFORead_reg(.CP(n_8406), .D(n679), .CD(n416), .Q(iTXFIFORead
notech_reg iTXFIFORead_reg(.CP(n_8400), .D(n679), .CD(n416), .Q(iTXFIFORead
));
notech_reg \State_reg[0] (.CP(n_8399), .D(N181), .CD(n415), .Q(State[0])
notech_reg \State_reg[0] (.CP(n_8393), .D(N181), .CD(n415), .Q(State[0])
);
notech_reg iMSR_dCTS_reg(.CP(n_8399), .D(n407), .CD(n416), .Q(\iMSR[0] )
notech_reg iMSR_dCTS_reg(.CP(n_8393), .D(n407), .CD(n416), .Q(\iMSR[0] )
);
notech_reg iRTS_reg(.CP(n_8399), .D(n408), .CD(n418), .Q(iRTS));
notech_reg \iSCR_reg[0] (.CP(n_8399), .D(n325), .CD(n417), .Q(iSCR[0])
notech_reg iRTS_reg(.CP(n_8393), .D(n408), .CD(n418), .Q(iRTS));
notech_reg \iSCR_reg[0] (.CP(n_8393), .D(n325), .CD(n417), .Q(iSCR[0])
);
notech_reg \iSCR_reg[1] (.CP(n_8399), .D(n326), .CD(n416), .Q(iSCR[1])
notech_reg \iSCR_reg[1] (.CP(n_8393), .D(n326), .CD(n416), .Q(iSCR[1])
);
notech_reg \iSCR_reg[2] (.CP(n_8399), .D(n327), .CD(n419), .Q(iSCR[2])
notech_reg \iSCR_reg[2] (.CP(n_8393), .D(n327), .CD(n419), .Q(iSCR[2])
);
notech_reg \iSCR_reg[3] (.CP(n_8399), .D(n328), .CD(n415), .Q(iSCR[3])
notech_reg \iSCR_reg[3] (.CP(n_8393), .D(n328), .CD(n415), .Q(iSCR[3])
);
notech_reg \iSCR_reg[4] (.CP(n_8399), .D(n329), .CD(n415), .Q(iSCR[4])
notech_reg \iSCR_reg[4] (.CP(n_8393), .D(n329), .CD(n415), .Q(iSCR[4])
);
notech_reg \iSCR_reg[5] (.CP(n_8399), .D(n330), .CD(n418), .Q(iSCR[5])
notech_reg \iSCR_reg[5] (.CP(n_8393), .D(n330), .CD(n418), .Q(iSCR[5])
);
notech_reg \iSCR_reg[6] (.CP(n_8399), .D(n331), .CD(n419), .Q(iSCR[6])
notech_reg \iSCR_reg[6] (.CP(n_8393), .D(n331), .CD(n419), .Q(iSCR[6])
);
notech_reg \iSCR_reg[7] (.CP(n_8399), .D(n332), .CD(n416), .Q(iSCR[7])
notech_reg \iSCR_reg[7] (.CP(n_8393), .D(n332), .CD(n416), .Q(iSCR[7])
);
notech_reg iMSR_TERI_reg(.CP(n_8401), .D(n409), .CD(n417), .Q(\iMSR[2] )
notech_reg iMSR_TERI_reg(.CP(n_8395), .D(n409), .CD(n417), .Q(\iMSR[2] )
);
notech_reg iMSR_dDSR_reg(.CP(n_8401), .D(n410), .CD(n415), .Q(\iMSR[1] )
notech_reg iMSR_dDSR_reg(.CP(n_8395), .D(n410), .CD(n415), .Q(\iMSR[1] )
);
notech_reg iMSR_dDCD_reg(.CP(n_8401), .D(n411), .CD(n419), .Q(\iMSR[3] )
notech_reg iMSR_dDCD_reg(.CP(n_8395), .D(n411), .CD(n419), .Q(\iMSR[3] )
);
notech_reg \iMCR_reg[0] (.CP(n_8401), .D(n333), .CD(n415), .Q(iMCR[0])
notech_reg \iMCR_reg[0] (.CP(n_8395), .D(n333), .CD(n415), .Q(iMCR[0])
);
notech_reg \iMCR_reg[1] (.CP(n_8401), .D(n334), .CD(n418), .Q(iMCR[1])
notech_reg \iMCR_reg[1] (.CP(n_8395), .D(n334), .CD(n418), .Q(iMCR[1])
);
notech_reg \iMCR_reg[2] (.CP(n_8401), .D(n335), .CD(n417), .Q(iMCR[2])
notech_reg \iMCR_reg[2] (.CP(n_8395), .D(n335), .CD(n417), .Q(iMCR[2])
);
notech_reg \iMCR_reg[3] (.CP(n_8401), .D(n336), .CD(n420), .Q(iMCR[3])
notech_reg \iMCR_reg[3] (.CP(n_8395), .D(n336), .CD(n420), .Q(iMCR[3])
);
notech_reg \iMCR_reg[4] (.CP(n_8401), .D(n337), .CD(n417), .Q(iMCR[4])
notech_reg \iMCR_reg[4] (.CP(n_8395), .D(n337), .CD(n417), .Q(iMCR[4])
);
notech_reg \iMCR_reg[5] (.CP(n_8401), .D(n338), .CD(n417), .Q(iMCR[5])
notech_reg \iMCR_reg[5] (.CP(n_8395), .D(n338), .CD(n417), .Q(iMCR[5])
);
notech_reg \iLCR_reg[0] (.CP(n_8401), .D(n339), .CD(n418), .Q(iLCR[0])
notech_reg \iLCR_reg[0] (.CP(n_8395), .D(n339), .CD(n418), .Q(iLCR[0])
);
notech_reg \iLCR_reg[1] (.CP(n_8401), .D(n340), .CD(n419), .Q(iLCR[1])
notech_reg \iLCR_reg[1] (.CP(n_8395), .D(n340), .CD(n419), .Q(iLCR[1])
);
notech_reg \iLCR_reg[2] (.CP(n_8401), .D(n341), .CD(n419), .Q(iLCR[2])
notech_reg \iLCR_reg[2] (.CP(n_8395), .D(n341), .CD(n419), .Q(iLCR[2])
);
notech_reg \iLCR_reg[3] (.CP(n_8411), .D(n342), .CD(n416), .Q(iLCR[3])
notech_reg \iLCR_reg[3] (.CP(n_8405), .D(n342), .CD(n416), .Q(iLCR[3])
);
notech_reg \iLCR_reg[4] (.CP(n_8411), .D(n343), .CD(n417), .Q(iLCR[4])
notech_reg \iLCR_reg[4] (.CP(n_8405), .D(n343), .CD(n417), .Q(iLCR[4])
);
notech_reg \iLCR_reg[5] (.CP(n_8411), .D(n344), .CD(n418), .Q(iLCR[5])
notech_reg \iLCR_reg[5] (.CP(n_8405), .D(n344), .CD(n418), .Q(iLCR[5])
);
notech_reg \iLCR_reg[6] (.CP(n_8411), .D(n345), .CD(n416), .Q(iLCR[6])
notech_reg \iLCR_reg[6] (.CP(n_8405), .D(n345), .CD(n416), .Q(iLCR[6])
);
notech_reg \iIER_reg[0] (.CP(n_8411), .D(n346), .CD(n417), .Q(iIER[0])
notech_reg \iIER_reg[0] (.CP(n_8405), .D(n346), .CD(n417), .Q(iIER[0])
);
notech_reg \iIER_reg[1] (.CP(n_8411), .D(n347), .CD(n419), .Q(iIER[1])
notech_reg \iIER_reg[1] (.CP(n_8405), .D(n347), .CD(n419), .Q(iIER[1])
);
notech_reg \iIER_reg[2] (.CP(n_8409), .D(n348), .CD(n417), .Q(iIER[2])
notech_reg \iIER_reg[2] (.CP(n_8403), .D(n348), .CD(n417), .Q(iIER[2])
);
notech_reg \iIER_reg[3] (.CP(n_8409), .D(n349), .CD(n420), .Q(iIER[3])
notech_reg \iIER_reg[3] (.CP(n_8403), .D(n349), .CD(n420), .Q(iIER[3])
);
notech_reg iFCR_FIFO64E_reg(.CP(n_8409), .D(n412), .CD(n420), .Q(iFCR_5)
notech_reg iFCR_FIFO64E_reg(.CP(n_8403), .D(n412), .CD(n420), .Q(iFCR_5)
);
notech_reg \iDLM_reg[0] (.CP(n_8411), .D(n350), .CD(n415), .Q(iDLM[0])
notech_reg \iDLM_reg[0] (.CP(n_8405), .D(n350), .CD(n415), .Q(iDLM[0])
);
notech_reg \iDLM_reg[1] (.CP(n_8409), .D(n351), .CD(n420), .Q(iDLM[1])
notech_reg \iDLM_reg[1] (.CP(n_8403), .D(n351), .CD(n420), .Q(iDLM[1])
);
notech_reg \iDLM_reg[2] (.CP(n_8411), .D(n352), .CD(n416), .Q(iDLM[2])
notech_reg \iDLM_reg[2] (.CP(n_8405), .D(n352), .CD(n416), .Q(iDLM[2])
);
notech_reg \iDLM_reg[3] (.CP(n_8412), .D(n353), .CD(n415), .Q(iDLM[3])
notech_reg \iDLM_reg[3] (.CP(n_8406), .D(n353), .CD(n415), .Q(iDLM[3])
);
notech_reg \iDLM_reg[4] (.CP(n_8412), .D(n354), .CD(n418), .Q(iDLM[4])
notech_reg \iDLM_reg[4] (.CP(n_8406), .D(n354), .CD(n418), .Q(iDLM[4])
);
notech_reg \iDLM_reg[5] (.CP(n_8412), .D(n355), .CD(n415), .Q(iDLM[5])
notech_reg \iDLM_reg[5] (.CP(n_8406), .D(n355), .CD(n415), .Q(iDLM[5])
);
notech_reg \iDLM_reg[6] (.CP(n_8412), .D(n356), .CD(n417), .Q(iDLM[6])
notech_reg \iDLM_reg[6] (.CP(n_8406), .D(n356), .CD(n417), .Q(iDLM[6])
);
notech_reg \iDLM_reg[7] (.CP(n_8412), .D(n357), .CD(n420), .Q(iDLM[7])
notech_reg \iDLM_reg[7] (.CP(n_8406), .D(n357), .CD(n420), .Q(iDLM[7])
);
notech_reg \iDLL_reg[0] (.CP(n_8412), .D(n358), .CD(n415), .Q(iDLL[0])
notech_reg \iDLL_reg[0] (.CP(n_8406), .D(n358), .CD(n415), .Q(iDLL[0])
);
notech_reg \iDLL_reg[1] (.CP(n_8411), .D(n359), .CD(n419), .Q(iDLL[1])
notech_reg \iDLL_reg[1] (.CP(n_8405), .D(n359), .CD(n419), .Q(iDLL[1])
);
notech_reg \iDLL_reg[2] (.CP(n_8411), .D(n360), .CD(n418), .Q(iDLL[2])
notech_reg \iDLL_reg[2] (.CP(n_8405), .D(n360), .CD(n418), .Q(iDLL[2])
);
notech_reg \iDLL_reg[3] (.CP(n_8411), .D(n361), .CD(n416), .Q(iDLL[3])
notech_reg \iDLL_reg[3] (.CP(n_8405), .D(n361), .CD(n416), .Q(iDLL[3])
);
notech_reg \iDLL_reg[4] (.CP(n_8412), .D(n362), .CD(n418), .Q(iDLL[4])
notech_reg \iDLL_reg[4] (.CP(n_8406), .D(n362), .CD(n418), .Q(iDLL[4])
);
notech_reg \iDLL_reg[5] (.CP(n_8412), .D(n363), .CD(n420), .Q(iDLL[5])
notech_reg \iDLL_reg[5] (.CP(n_8406), .D(n363), .CD(n420), .Q(iDLL[5])
);
notech_reg \iDLL_reg[6] (.CP(n_8408), .D(n364), .CD(n419), .Q(iDLL[6])
notech_reg \iDLL_reg[6] (.CP(n_8402), .D(n364), .CD(n419), .Q(iDLL[6])
);
notech_reg \iDLL_reg[7] (.CP(n_8408), .D(n365), .CD(n416), .Q(iDLL[7])
notech_reg \iDLL_reg[7] (.CP(n_8402), .D(n365), .CD(n416), .Q(iDLL[7])
);
notech_reg \iLCR_reg[7] (.CP(n_8408), .D(n366), .CD(n417), .Q(iLCR[7])
notech_reg \iLCR_reg[7] (.CP(n_8402), .D(n366), .CD(n417), .Q(iLCR[7])
);
notech_reg iFCR_TXFIFOReset_reg(.CP(n_8408), .D(N95), .CD(n417), .Q(iFCR
notech_reg iFCR_TXFIFOReset_reg(.CP(n_8402), .D(N95), .CD(n417), .Q(iFCR
[2]));
notech_reg iFCR_RXFIFOReset_reg(.CP(n_8408), .D(N94), .CD(n418), .Q(iFCR
notech_reg iFCR_RXFIFOReset_reg(.CP(n_8402), .D(N94), .CD(n418), .Q(iFCR
[1]));
notech_reg iFCR_FIFOEnable_reg(.CP(n_8408), .D(n367), .CD(n416), .Q(iIIR_6
notech_reg iFCR_FIFOEnable_reg(.CP(n_8402), .D(n367), .CD(n416), .Q(iIIR_6
));
notech_reg \iFCR_RXTrigger_reg[0] (.CP(n_8406), .D(n368), .CD(n419), .Q(iFCR_RXTrigger
notech_reg \iFCR_RXTrigger_reg[0] (.CP(n_8400), .D(n368), .CD(n419), .Q(iFCR_RXTrigger
[0]));
notech_reg \iFCR_RXTrigger_reg[1] (.CP(n_8406), .D(n369), .CD(n420), .Q(iFCR_RXTrigger
notech_reg \iFCR_RXTrigger_reg[1] (.CP(n_8400), .D(n369), .CD(n420), .Q(iFCR_RXTrigger
[1]));
notech_reg \iA_reg[0] (.CP(n_8406), .D(A[0]), .CD(n420), .Q(iA[0]));
notech_reg \iA_reg[1] (.CP(n_8406), .D(A[1]), .CD(n415), .Q(iA[1]));
notech_reg \iA_reg[2] (.CP(n_8406), .D(A[2]), .CD(n416), .Q(iA[2]));
notech_reg \iDIN_reg[0] (.CP(n_8408), .D(DIN[0]), .CD(n416), .Q(iDIN[0])
notech_reg \iA_reg[0] (.CP(n_8400), .D(A[0]), .CD(n420), .Q(iA[0]));
notech_reg \iA_reg[1] (.CP(n_8400), .D(A[1]), .CD(n415), .Q(iA[1]));
notech_reg \iA_reg[2] (.CP(n_8400), .D(A[2]), .CD(n416), .Q(iA[2]));
notech_reg \iDIN_reg[0] (.CP(n_8402), .D(DIN[0]), .CD(n416), .Q(iDIN[0])
);
notech_reg \iDIN_reg[1] (.CP(n_8409), .D(DIN[1]), .CD(n415), .Q(iDIN[1])
notech_reg \iDIN_reg[1] (.CP(n_8403), .D(DIN[1]), .CD(n415), .Q(iDIN[1])
);
notech_reg \iDIN_reg[2] (.CP(n_8409), .D(DIN[2]), .CD(n420), .Q(iDIN[2])
notech_reg \iDIN_reg[2] (.CP(n_8403), .D(DIN[2]), .CD(n420), .Q(iDIN[2])
);
notech_reg \iDIN_reg[3] (.CP(n_8409), .D(DIN[3]), .CD(n420), .Q(iDIN[3])
notech_reg \iDIN_reg[3] (.CP(n_8403), .D(DIN[3]), .CD(n420), .Q(iDIN[3])
);
notech_reg \iDIN_reg[4] (.CP(n_8409), .D(DIN[4]), .CD(n415), .Q(iDIN[4])
notech_reg \iDIN_reg[4] (.CP(n_8403), .D(DIN[4]), .CD(n415), .Q(iDIN[4])
);
notech_reg \iDIN_reg[5] (.CP(n_8409), .D(DIN[5]), .CD(n419), .Q(iDIN[5])
notech_reg \iDIN_reg[5] (.CP(n_8403), .D(DIN[5]), .CD(n419), .Q(iDIN[5])
);
notech_reg \iDIN_reg[6] (.CP(n_8409), .D(DIN[6]), .CD(n420), .Q(iDIN[6])
notech_reg \iDIN_reg[6] (.CP(n_8403), .D(DIN[6]), .CD(n420), .Q(iDIN[6])
);
notech_reg \iDIN_reg[7] (.CP(n_8408), .D(DIN[7]), .CD(n416), .Q(iDIN[7])
notech_reg \iDIN_reg[7] (.CP(n_8402), .D(DIN[7]), .CD(n416), .Q(iDIN[7])
);
endmodule
module AWDP_DEC_36_0(O0, counter);
module AWDP_DEC_27_0(O0, counter);
 
output [15:0] O0;
input [15:0] counter;
9235,48 → 9241,48
notech_ha2 i_16(.A(n_96), .B(n_126), .Z(O0[15]));
notech_inv i_1(.A(counter[0]), .Z(O0[0]));
notech_inv i_0(.A(counter[15]), .Z(n_96));
notech_xor2 i_34(.A(counter[14]), .B(n_124), .Z(n_5687));
notech_inv i_35(.A(n_5687), .Z(O0[14]));
notech_or2 i_33(.A(counter[14]), .B(n_124), .Z(n_126));
notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_5714));
notech_inv i_334004(.A(n_5714), .Z(O0[13]));
notech_xor2 i_33(.A(counter[14]), .B(n_124), .Z(n_5705));
notech_inv i_34(.A(n_5705), .Z(O0[14]));
notech_or2 i_32(.A(counter[14]), .B(n_124), .Z(n_126));
notech_xor2 i_324058(.A(counter[13]), .B(n_122), .Z(n_5732));
notech_inv i_334059(.A(n_5732), .Z(O0[13]));
notech_or2 i_31(.A(counter[13]), .B(n_122), .Z(n_124));
notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_5741));
notech_inv i_314005(.A(n_5741), .Z(O0[12]));
notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_5759));
notech_inv i_314060(.A(n_5759), .Z(O0[12]));
notech_or2 i_29(.A(counter[12]), .B(n_120), .Z(n_122));
notech_xor2 i_294006(.A(counter[11]), .B(n_118), .Z(n_5768));
notech_inv i_304007(.A(n_5768), .Z(O0[11]));
notech_xor2 i_294061(.A(counter[11]), .B(n_118), .Z(n_5786));
notech_inv i_304062(.A(n_5786), .Z(O0[11]));
notech_or2 i_28(.A(counter[11]), .B(n_118), .Z(n_120));
notech_xor2 i_284008(.A(counter[10]), .B(n_116), .Z(n_5795));
notech_inv i_294009(.A(n_5795), .Z(O0[10]));
notech_xor2 i_284063(.A(counter[10]), .B(n_116), .Z(n_5813));
notech_inv i_294064(.A(n_5813), .Z(O0[10]));
notech_or2 i_27(.A(counter[10]), .B(n_116), .Z(n_118));
notech_xor2 i_274010(.A(counter[9]), .B(n_114), .Z(n_5822));
notech_inv i_284011(.A(n_5822), .Z(O0[9]));
notech_xor2 i_274065(.A(counter[9]), .B(n_114), .Z(n_5840));
notech_inv i_284066(.A(n_5840), .Z(O0[9]));
notech_or2 i_26(.A(counter[9]), .B(n_114), .Z(n_116));
notech_xor2 i_274012(.A(counter[8]), .B(n_112), .Z(n_5849));
notech_inv i_284013(.A(n_5849), .Z(O0[8]));
notech_or2 i_264014(.A(counter[8]), .B(n_112), .Z(n_114));
notech_xor2 i_274015(.A(counter[7]), .B(n_110), .Z(n_5876));
notech_inv i_284016(.A(n_5876), .Z(O0[7]));
notech_or2 i_264017(.A(counter[7]), .B(n_110), .Z(n_112));
notech_xor2 i_274018(.A(counter[6]), .B(n_108), .Z(n_5903));
notech_inv i_284019(.A(n_5903), .Z(O0[6]));
notech_or2 i_264020(.A(counter[6]), .B(n_108), .Z(n_110));
notech_xor2 i_274021(.A(counter[5]), .B(n_106), .Z(n_5930));
notech_inv i_284022(.A(n_5930), .Z(O0[5]));
notech_or2 i_264023(.A(counter[5]), .B(n_106), .Z(n_108));
notech_xor2 i_274024(.A(counter[4]), .B(n_104), .Z(n_5957));
notech_inv i_284025(.A(n_5957), .Z(O0[4]));
notech_or2 i_264026(.A(counter[4]), .B(n_104), .Z(n_106));
notech_xor2 i_274027(.A(counter[3]), .B(n_102), .Z(n_5984));
notech_inv i_284028(.A(n_5984), .Z(O0[3]));
notech_or2 i_264029(.A(counter[3]), .B(n_102), .Z(n_104));
notech_xor2 i_274030(.A(counter[2]), .B(n_100), .Z(n_6011));
notech_inv i_284031(.A(n_6011), .Z(O0[2]));
notech_or2 i_264032(.A(counter[2]), .B(n_100), .Z(n_102));
notech_xor2 i_274033(.A(counter[1]), .B(counter[0]), .Z(n_6039));
notech_inv i_284034(.A(n_6039), .Z(O0[1]));
notech_or2 i_264035(.A(counter[1]), .B(counter[0]), .Z(n_100));
notech_xor2 i_274067(.A(counter[8]), .B(n_112), .Z(n_5867));
notech_inv i_284068(.A(n_5867), .Z(O0[8]));
notech_or2 i_264069(.A(counter[8]), .B(n_112), .Z(n_114));
notech_xor2 i_274070(.A(counter[7]), .B(n_110), .Z(n_5894));
notech_inv i_284071(.A(n_5894), .Z(O0[7]));
notech_or2 i_264072(.A(counter[7]), .B(n_110), .Z(n_112));
notech_xor2 i_274073(.A(counter[6]), .B(n_108), .Z(n_5921));
notech_inv i_284074(.A(n_5921), .Z(O0[6]));
notech_or2 i_264075(.A(counter[6]), .B(n_108), .Z(n_110));
notech_xor2 i_274076(.A(counter[5]), .B(n_106), .Z(n_5948));
notech_inv i_284077(.A(n_5948), .Z(O0[5]));
notech_or2 i_264078(.A(counter[5]), .B(n_106), .Z(n_108));
notech_xor2 i_274079(.A(counter[4]), .B(n_104), .Z(n_5975));
notech_inv i_284080(.A(n_5975), .Z(O0[4]));
notech_or2 i_264081(.A(counter[4]), .B(n_104), .Z(n_106));
notech_xor2 i_274082(.A(counter[3]), .B(n_102), .Z(n_6002));
notech_inv i_284083(.A(n_6002), .Z(O0[3]));
notech_or2 i_264084(.A(counter[3]), .B(n_102), .Z(n_104));
notech_xor2 i_274085(.A(counter[2]), .B(n_100), .Z(n_6029));
notech_inv i_284086(.A(n_6029), .Z(O0[2]));
notech_or2 i_264087(.A(counter[2]), .B(n_100), .Z(n_102));
notech_xor2 i_274088(.A(counter[1]), .B(counter[0]), .Z(n_6057));
notech_inv i_284089(.A(n_6057), .Z(O0[1]));
notech_or2 i_264090(.A(counter[1]), .B(counter[0]), .Z(n_100));
endmodule
module AWDP_SUB_39_0(O0, counter);
 
9320,45 → 9326,45
notech_ha2 i_15(.A(n_96), .B(n_124), .Z(O0[15]));
notech_inv i_1(.A(\counter[1] ), .Z(O0[1]));
notech_inv i_0(.A(\counter[15] ), .Z(n_96));
notech_xor2 i_37(.A(\counter[14] ), .B(n_122), .Z(n_6066));
notech_inv i_38(.A(n_6066), .Z(O0[14]));
notech_xor2 i_37(.A(\counter[14] ), .B(n_122), .Z(n_6084));
notech_inv i_38(.A(n_6084), .Z(O0[14]));
notech_or2 i_36(.A(\counter[14] ), .B(n_122), .Z(n_124));
notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_6093));
notech_inv i_32(.A(n_6093), .Z(O0[13]));
notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_6111));
notech_inv i_32(.A(n_6111), .Z(O0[13]));
notech_or2 i_30(.A(\counter[13] ), .B(n_120), .Z(n_122));
notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_6120));
notech_inv i_304036(.A(n_6120), .Z(O0[12]));
notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_6138));
notech_inv i_304091(.A(n_6138), .Z(O0[12]));
notech_or2 i_28(.A(\counter[12] ), .B(n_118), .Z(n_120));
notech_xor2 i_284037(.A(\counter[11] ), .B(n_116), .Z(n_6147));
notech_inv i_294038(.A(n_6147), .Z(O0[11]));
notech_xor2 i_284092(.A(\counter[11] ), .B(n_116), .Z(n_6165));
notech_inv i_294093(.A(n_6165), .Z(O0[11]));
notech_or2 i_27(.A(\counter[11] ), .B(n_116), .Z(n_118));
notech_xor2 i_274039(.A(\counter[10] ), .B(n_114), .Z(n_6174));
notech_inv i_284040(.A(n_6174), .Z(O0[10]));
notech_xor2 i_274094(.A(\counter[10] ), .B(n_114), .Z(n_6192));
notech_inv i_284095(.A(n_6192), .Z(O0[10]));
notech_or2 i_26(.A(\counter[10] ), .B(n_114), .Z(n_116));
notech_xor2 i_274041(.A(\counter[9] ), .B(n_112), .Z(n_6201));
notech_inv i_284042(.A(n_6201), .Z(O0[9]));
notech_or2 i_264043(.A(\counter[9] ), .B(n_112), .Z(n_114));
notech_xor2 i_274044(.A(\counter[8] ), .B(n_110), .Z(n_6228));
notech_inv i_284045(.A(n_6228), .Z(O0[8]));
notech_or2 i_264046(.A(\counter[8] ), .B(n_110), .Z(n_112));
notech_xor2 i_274047(.A(\counter[7] ), .B(n_108), .Z(n_6255));
notech_inv i_284048(.A(n_6255), .Z(O0[7]));
notech_or2 i_264049(.A(\counter[7] ), .B(n_108), .Z(n_110));
notech_xor2 i_274050(.A(\counter[6] ), .B(n_106), .Z(n_6282));
notech_inv i_284051(.A(n_6282), .Z(O0[6]));
notech_or2 i_264052(.A(\counter[6] ), .B(n_106), .Z(n_108));
notech_xor2 i_274053(.A(\counter[5] ), .B(n_104), .Z(n_6309));
notech_inv i_284054(.A(n_6309), .Z(O0[5]));
notech_or2 i_264055(.A(\counter[5] ), .B(n_104), .Z(n_106));
notech_xor2 i_274056(.A(\counter[4] ), .B(n_102), .Z(n_6336));
notech_inv i_284057(.A(n_6336), .Z(O0[4]));
notech_or2 i_264058(.A(\counter[4] ), .B(n_102), .Z(n_104));
notech_xor2 i_274059(.A(\counter[3] ), .B(n_100), .Z(n_6363));
notech_inv i_284060(.A(n_6363), .Z(O0[3]));
notech_or2 i_264061(.A(\counter[3] ), .B(n_100), .Z(n_102));
notech_xor2 i_274062(.A(\counter[2] ), .B(\counter[1] ), .Z(n_6391));
notech_inv i_284063(.A(n_6391), .Z(O0[2]));
notech_or2 i_264064(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100));
notech_xor2 i_274096(.A(\counter[9] ), .B(n_112), .Z(n_6219));
notech_inv i_284097(.A(n_6219), .Z(O0[9]));
notech_or2 i_264098(.A(\counter[9] ), .B(n_112), .Z(n_114));
notech_xor2 i_274099(.A(\counter[8] ), .B(n_110), .Z(n_6246));
notech_inv i_284100(.A(n_6246), .Z(O0[8]));
notech_or2 i_264101(.A(\counter[8] ), .B(n_110), .Z(n_112));
notech_xor2 i_274102(.A(\counter[7] ), .B(n_108), .Z(n_6273));
notech_inv i_284103(.A(n_6273), .Z(O0[7]));
notech_or2 i_264104(.A(\counter[7] ), .B(n_108), .Z(n_110));
notech_xor2 i_274105(.A(\counter[6] ), .B(n_106), .Z(n_6300));
notech_inv i_284106(.A(n_6300), .Z(O0[6]));
notech_or2 i_264107(.A(\counter[6] ), .B(n_106), .Z(n_108));
notech_xor2 i_274108(.A(\counter[5] ), .B(n_104), .Z(n_6327));
notech_inv i_284109(.A(n_6327), .Z(O0[5]));
notech_or2 i_264110(.A(\counter[5] ), .B(n_104), .Z(n_106));
notech_xor2 i_274111(.A(\counter[4] ), .B(n_102), .Z(n_6354));
notech_inv i_284112(.A(n_6354), .Z(O0[4]));
notech_or2 i_264113(.A(\counter[4] ), .B(n_102), .Z(n_104));
notech_xor2 i_274114(.A(\counter[3] ), .B(n_100), .Z(n_6381));
notech_inv i_284115(.A(n_6381), .Z(O0[3]));
notech_or2 i_264116(.A(\counter[3] ), .B(n_100), .Z(n_102));
notech_xor2 i_274117(.A(\counter[2] ), .B(\counter[1] ), .Z(n_6409));
notech_inv i_284118(.A(n_6409), .Z(O0[2]));
notech_or2 i_264119(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100));
endmodule
module v8253_counter_0(clk, rst_n, clock, gate, out, data_in, set_control_mode, latch_count
, latch_status, write, read, data_out);
9387,44 → 9393,44
 
 
 
notech_inv i_1384(.A(n_8242), .Z(n_8249));
notech_inv i_1383(.A(n_8242), .Z(n_8248));
notech_inv i_1382(.A(n_8242), .Z(n_8247));
notech_inv i_1380(.A(n_8242), .Z(n_8245));
notech_inv i_1379(.A(n_8242), .Z(n_8244));
notech_inv i_1378(.A(n_8242), .Z(n_8243));
notech_inv i_1377(.A(clk), .Z(n_8242));
notech_inv i_1296(.A(n_8146), .Z(n_8153));
notech_inv i_1295(.A(n_8146), .Z(n_8152));
notech_inv i_1294(.A(n_8146), .Z(n_8151));
notech_inv i_1292(.A(n_8146), .Z(n_8149));
notech_inv i_1291(.A(n_8146), .Z(n_8148));
notech_inv i_1290(.A(n_8146), .Z(n_8147));
notech_inv i_1289(.A(rst_n), .Z(n_8146));
notech_inv i_104(.A(n_7894), .Z(n_7895));
notech_inv i_103(.A(n_3290), .Z(n_7894));
notech_inv i_77(.A(n_7876), .Z(n_7877));
notech_inv i_55(.A(n_3240), .Z(n_7876));
notech_inv i_1371(.A(n_8236), .Z(n_8243));
notech_inv i_1370(.A(n_8236), .Z(n_8242));
notech_inv i_1369(.A(n_8236), .Z(n_8241));
notech_inv i_1367(.A(n_8236), .Z(n_8239));
notech_inv i_1366(.A(n_8236), .Z(n_8238));
notech_inv i_1365(.A(n_8236), .Z(n_8237));
notech_inv i_1364(.A(clk), .Z(n_8236));
notech_inv i_1296(.A(n_8153), .Z(n_8160));
notech_inv i_1295(.A(n_8153), .Z(n_8159));
notech_inv i_1294(.A(n_8153), .Z(n_8158));
notech_inv i_1292(.A(n_8153), .Z(n_8156));
notech_inv i_1291(.A(n_8153), .Z(n_8155));
notech_inv i_1290(.A(n_8153), .Z(n_8154));
notech_inv i_1289(.A(rst_n), .Z(n_8153));
notech_inv i_108(.A(n_7912), .Z(n_7913));
notech_inv i_104(.A(n_3292), .Z(n_7912));
notech_inv i_73(.A(n_7894), .Z(n_7895));
notech_inv i_55(.A(n_3242), .Z(n_7894));
notech_nao3 i_101(.A(n_406), .B(n_1326), .C(n_409), .Z(n_271));
notech_nao3 i_95(.A(n_406), .B(n_1327), .C(n_409), .Z(n_265));
notech_nao3 i_89(.A(n_406), .B(n_1328), .C(n_409), .Z(n_260));
notech_nao3 i_83(.A(n_406), .B(n_1329), .C(n_409), .Z(n_255));
notech_nand2 i_85(.A(counter_m[7]), .B(n_400), .Z(n_252));
notech_and2 i_11976(.A(data_in[0]), .B(n_3290), .Z(n_250));
notech_and2 i_21977(.A(data_in[1]), .B(n_3290), .Z(n_249));
notech_and2 i_31978(.A(data_in[2]), .B(n_3290), .Z(n_248));
notech_and2 i_41979(.A(data_in[3]), .B(n_3290), .Z(n_247));
notech_and2 i_51980(.A(data_in[4]), .B(n_3290), .Z(n_246));
notech_and2 i_61981(.A(data_in[5]), .B(n_3290), .Z(n_245));
notech_and2 i_71982(.A(data_in[6]), .B(n_3290), .Z(n_244));
notech_and2 i_81983(.A(data_in[7]), .B(n_3290), .Z(n_243));
notech_nand2 i_233(.A(clock), .B(n_3281), .Z(n_242));
notech_and2 i_1450(.A(n_3290), .B(n_464), .Z(n_241));
notech_nao3 i_76(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .Z(n_236));
notech_and2 i_12019(.A(data_in[0]), .B(n_3292), .Z(n_250));
notech_and2 i_22020(.A(data_in[1]), .B(n_3292), .Z(n_249));
notech_and2 i_32021(.A(data_in[2]), .B(n_3292), .Z(n_248));
notech_and2 i_42022(.A(data_in[3]), .B(n_3292), .Z(n_247));
notech_and2 i_52023(.A(data_in[4]), .B(n_3292), .Z(n_246));
notech_and2 i_62024(.A(data_in[5]), .B(n_3292), .Z(n_245));
notech_and2 i_72025(.A(data_in[6]), .B(n_3292), .Z(n_244));
notech_and2 i_82026(.A(data_in[7]), .B(n_3292), .Z(n_243));
notech_nand2 i_236(.A(clock), .B(n_3283), .Z(n_242));
notech_and2 i_1450(.A(n_3292), .B(n_464), .Z(n_241));
notech_nao3 i_78(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .Z(n_238));
notech_and4 i_79(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .D(write
), .Z(n_235));
notech_nao3 i_74(.A(rw_mode[1]), .B(write), .C(rw_mode[0]), .Z(n_234));
notech_nand2 i_73(.A(read), .B(n_171), .Z(n_233));
), .Z(n_237));
notech_nao3 i_76(.A(rw_mode[1]), .B(write), .C(rw_mode[0]), .Z(n_236));
notech_nand2 i_75(.A(read), .B(n_173), .Z(n_235));
notech_nand2 i_215(.A(rw_mode[0]), .B(n_344), .Z(n_232));
notech_nand2 i_214(.A(status[7]), .B(status_latched), .Z(n_231));
notech_nand2 i_211(.A(status[6]), .B(status_latched), .Z(n_230));
9435,11 → 9441,11
notech_nand2 i_196(.A(status[1]), .B(status_latched), .Z(n_225));
notech_nand2 i_193(.A(status_latched), .B(status[0]), .Z(n_224));
notech_and2 i_15(.A(n_368), .B(n_366), .Z(n_223));
notech_and4 i_68(.A(n_370), .B(n_358), .C(n_3276), .D(n_364), .Z(n_220)
notech_and4 i_68(.A(n_370), .B(n_358), .C(n_3278), .D(n_364), .Z(n_220)
);
notech_nao3 i_185(.A(written), .B(clock_pulse), .C(n_220), .Z(n_219));
notech_and3 i_67(.A(n_323), .B(n_203), .C(n_322), .Z(n_218));
notech_ao4 i_66(.A(n_373), .B(n_368), .C(n_372), .D(n_3280), .Z(n_217)
notech_ao4 i_66(.A(n_373), .B(n_368), .C(n_372), .D(n_3282), .Z(n_217)
);
notech_or4 i_182(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(msb_write), .Z
(n_216));
9448,35 → 9454,35
notech_or2 i_72(.A(data_in[1]), .B(data_in[3]), .Z(n_211));
notech_nand2 i_177(.A(set_control_mode), .B(n_211), .Z(n_210));
notech_nor2 i_176(.A(written), .B(n_319), .Z(n_209));
notech_ao4 i_175(.A(n_390), .B(n_389), .C(counter_l[0]), .D(n_3292), .Z(n_207
notech_ao4 i_175(.A(n_390), .B(n_389), .C(counter_l[0]), .D(n_3294), .Z(n_207
));
notech_ao4 i_174(.A(mode[1]), .B(n_365), .C(n_207), .D(n_370), .Z(n_205)
);
notech_or4 i_38(.A(n_388), .B(n_377), .C(n_370), .D(n_390), .Z(n_203));
notech_ao4 i_164(.A(n_205), .B(n_3240), .C(n_174), .D(n_401), .Z(n_200)
notech_ao4 i_164(.A(n_205), .B(n_3242), .C(n_172), .D(n_401), .Z(n_200)
);
notech_or2 i_69(.A(n_200), .B(n_318), .Z(n_199));
notech_and3 i_158(.A(n_406), .B(n_1427), .C(n_3241), .Z(n_198));
notech_or2 i_65(.A(n_1307), .B(n_3242), .Z(n_197));
notech_and3 i_158(.A(n_406), .B(n_1427), .C(n_3243), .Z(n_198));
notech_or2 i_65(.A(n_1307), .B(n_3244), .Z(n_197));
notech_nand2 i_155(.A(counter_l[1]), .B(n_400), .Z(n_196));
notech_nand2 i_152(.A(counter_l[2]), .B(n_400), .Z(n_195));
notech_nor2 i_64(.A(n_1313), .B(n_3242), .Z(n_194));
notech_nor2 i_63(.A(n_1433), .B(n_3242), .Z(n_193));
notech_nor2 i_64(.A(n_1313), .B(n_3244), .Z(n_194));
notech_nor2 i_63(.A(n_1433), .B(n_3244), .Z(n_193));
notech_xor2 i_62(.A(counter[4]), .B(counter[5]), .Z(n_191));
notech_xor2 i_61(.A(counter[6]), .B(n_384), .Z(n_189));
notech_xor2 i_60(.A(counter[8]), .B(counter[9]), .Z(n_187));
notech_xor2 i_59(.A(counter[10]), .B(n_382), .Z(n_185));
notech_xor2 i_58(.A(counter[11]), .B(n_3239), .Z(n_182));
notech_xor2 i_58(.A(counter[11]), .B(n_3241), .Z(n_182));
notech_and2 i_42(.A(n_438), .B(n_425), .Z(n_180));
notech_xor2 i_57(.A(counter[12]), .B(counter[13]), .Z(n_179));
notech_xor2 i_56(.A(counter[14]), .B(n_378), .Z(n_177));
notech_nand2 i_86(.A(counter[15]), .B(n_379), .Z(n_176));
notech_and2 i_80(.A(n_344), .B(write), .Z(n_175));
notech_and3 i_47(.A(n_363), .B(n_362), .C(n_368), .Z(n_174));
notech_and4 i_54(.A(n_370), .B(n_362), .C(n_366), .D(n_363), .Z(n_173)
notech_nand3 i_77(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_174));
notech_nao3 i_47(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_173)
);
notech_nand3 i_75(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_172));
notech_nao3 i_48(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_171)
notech_and3 i_48(.A(n_363), .B(n_362), .C(n_368), .Z(n_172));
notech_and4 i_54(.A(n_370), .B(n_362), .C(n_366), .D(n_363), .Z(n_171)
);
notech_ao3 i_71(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .Z(n_170)
);
9483,567 → 9489,567
notech_ao4 i_70(.A(n_373), .B(n_223), .C(n_374), .D(n_214), .Z(n_169));
notech_or4 i_19(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(n_209), .Z(n_168
));
notech_or2 i_226(.A(n_170), .B(n_3291), .Z(n_167));
notech_or2 i_229(.A(n_170), .B(n_3293), .Z(n_167));
notech_nao3 i_105(.A(counter[11]), .B(n_421), .C(n_417), .Z(n_274));
notech_nand3 i_106(.A(n_3240), .B(n_3243), .C(n_182), .Z(n_275));
notech_nand3 i_106(.A(n_3242), .B(n_3245), .C(n_182), .Z(n_275));
notech_nao3 i_107(.A(n_406), .B(n_1325), .C(n_409), .Z(n_276));
notech_nao3 i_114(.A(n_406), .B(n_1324), .C(n_409), .Z(n_281));
notech_nao3 i_120(.A(n_406), .B(n_1323), .C(n_409), .Z(n_286));
notech_nao3 i_124(.A(counter[8]), .B(n_421), .C(n_417), .Z(n_289));
notech_nao3 i_125(.A(n_3240), .B(n_3243), .C(counter[8]), .Z(n_290));
notech_nao3 i_125(.A(n_3242), .B(n_3245), .C(counter[8]), .Z(n_290));
notech_nao3 i_126(.A(n_406), .B(n_1322), .C(n_409), .Z(n_291));
notech_ao3 i_129(.A(counter[7]), .B(n_385), .C(n_417), .Z(n_293));
notech_ao3 i_130(.A(n_406), .B(n_1321), .C(n_409), .Z(n_294));
notech_and3 i_131(.A(n_406), .B(n_1437), .C(n_3241), .Z(n_295));
notech_and3 i_131(.A(n_406), .B(n_1437), .C(n_3243), .Z(n_295));
notech_nand2 i_146(.A(counter_l[4]), .B(n_400), .Z(n_304));
notech_and3 i_145(.A(n_406), .B(n_1434), .C(n_3241), .Z(n_307));
notech_and3 i_145(.A(n_406), .B(n_1434), .C(n_3243), .Z(n_307));
notech_nand2 i_149(.A(counter_l[3]), .B(n_400), .Z(n_308));
notech_nand3 i_156(.A(counter_l[0]), .B(n_400), .C(n_370), .Z(n_315));
notech_nand3 i_157(.A(n_405), .B(n_3240), .C(n_197), .Z(n_316));
notech_nand3 i_160(.A(n_168), .B(n_3290), .C(n_199), .Z(n_317));
notech_nand3 i_157(.A(n_405), .B(n_3242), .C(n_197), .Z(n_316));
notech_nand3 i_160(.A(n_168), .B(n_3292), .C(n_199), .Z(n_317));
notech_and3 i_163(.A(n_203), .B(n_366), .C(n_394), .Z(n_318));
notech_nor2 i_18(.A(msb_write), .B(n_359), .Z(n_319));
notech_nao3 i_188(.A(n_390), .B(n_3237), .C(n_370), .Z(n_322));
notech_or4 i_189(.A(n_393), .B(n_3282), .C(counter[1]), .D(n_362), .Z(n_323
notech_nao3 i_188(.A(n_390), .B(n_3239), .C(n_370), .Z(n_322));
notech_or4 i_189(.A(n_393), .B(n_3284), .C(counter[1]), .D(n_362), .Z(n_323
));
notech_and2 i_1578(.A(latch_count), .B(n_3290), .Z(n_326));
notech_nand2 i_2135(.A(latch_status), .B(n_3260), .Z(n_327));
notech_nand2 i_42760(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_344));
notech_nand2 i_03980(.A(n_232), .B(n_171), .Z(n_345));
notech_nand2 i_3(.A(n_345), .B(n_3260), .Z(n_346));
notech_nand3 i_1(.A(n_232), .B(n_171), .C(n_3260), .Z(n_347));
notech_ao4 i_376(.A(n_347), .B(n_3244), .C(n_346), .D(n_3252), .Z(n_348)
notech_and2 i_1578(.A(latch_count), .B(n_3292), .Z(n_326));
notech_nand2 i_2138(.A(latch_status), .B(n_3262), .Z(n_327));
notech_nand2 i_42803(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_344));
notech_nand2 i_04034(.A(n_232), .B(n_173), .Z(n_345));
notech_nand2 i_3(.A(n_345), .B(n_3262), .Z(n_346));
notech_nand3 i_1(.A(n_232), .B(n_173), .C(n_3262), .Z(n_347));
notech_ao4 i_373(.A(n_347), .B(n_3246), .C(n_346), .D(n_3254), .Z(n_348)
);
notech_ao4 i_375(.A(n_347), .B(n_3245), .C(n_346), .D(n_3253), .Z(n_349)
notech_ao4 i_372(.A(n_347), .B(n_3247), .C(n_346), .D(n_3255), .Z(n_349)
);
notech_ao4 i_374(.A(n_347), .B(n_3246), .C(n_346), .D(n_3254), .Z(n_350)
notech_ao4 i_371(.A(n_347), .B(n_3248), .C(n_346), .D(n_3256), .Z(n_350)
);
notech_ao4 i_373(.A(n_347), .B(n_3247), .C(n_346), .D(n_3255), .Z(n_351)
notech_ao4 i_370(.A(n_347), .B(n_3249), .C(n_346), .D(n_3257), .Z(n_351)
);
notech_ao4 i_372(.A(n_347), .B(n_3248), .C(n_346), .D(n_3256), .Z(n_352)
notech_ao4 i_369(.A(n_347), .B(n_3250), .C(n_346), .D(n_3258), .Z(n_352)
);
notech_ao4 i_371(.A(n_347), .B(n_3249), .C(n_346), .D(n_3257), .Z(n_353)
notech_ao4 i_368(.A(n_347), .B(n_3251), .C(n_346), .D(n_3259), .Z(n_353)
);
notech_ao4 i_370(.A(n_347), .B(n_3250), .C(n_346), .D(n_3258), .Z(n_354)
notech_ao4 i_367(.A(n_347), .B(n_3252), .C(n_346), .D(n_3260), .Z(n_354)
);
notech_ao4 i_369(.A(n_347), .B(n_3251), .C(n_346), .D(n_3259), .Z(n_355)
notech_ao4 i_366(.A(n_347), .B(n_3253), .C(n_346), .D(n_3261), .Z(n_355)
);
notech_nao3 i_62763(.A(n_3278), .B(n_3279), .C(mode[1]), .Z(n_358));
notech_nao3 i_62806(.A(n_3280), .B(n_3281), .C(mode[1]), .Z(n_358));
notech_nand3 i_13(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_359)
);
notech_nand2 i_32768(.A(mode[1]), .B(n_3279), .Z(n_362));
notech_nand2 i_354(.A(mode[2]), .B(n_3279), .Z(n_363));
notech_nand2 i_32811(.A(mode[1]), .B(n_3281), .Z(n_362));
notech_nand2 i_351(.A(mode[2]), .B(n_3281), .Z(n_363));
notech_and2 i_16(.A(n_363), .B(n_362), .Z(n_364));
notech_nand2 i_355(.A(mode[0]), .B(n_3278), .Z(n_365));
notech_nao3 i_62766(.A(mode[0]), .B(n_3278), .C(mode[1]), .Z(n_366));
notech_nao3 i_82775(.A(mode[2]), .B(mode[0]), .C(mode[1]), .Z(n_368));
notech_nand2 i_42769(.A(mode[1]), .B(mode[0]), .Z(n_370));
notech_nand2 i_352(.A(mode[0]), .B(n_3280), .Z(n_365));
notech_nao3 i_62809(.A(mode[0]), .B(n_3280), .C(mode[1]), .Z(n_366));
notech_nao3 i_82818(.A(mode[2]), .B(mode[0]), .C(mode[1]), .Z(n_368));
notech_nand2 i_42812(.A(mode[1]), .B(mode[0]), .Z(n_370));
notech_and2 i_37(.A(n_370), .B(n_362), .Z(n_372));
notech_nand2 i_33(.A(loaded), .B(clock_pulse), .Z(n_373));
notech_nand3 i_36(.A(loaded), .B(clock_pulse), .C(gate_sampled), .Z(n_374
));
notech_or4 i_82800(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(counter
notech_or4 i_82843(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(counter
[0]), .Z(n_377));
notech_or2 i_6(.A(counter[12]), .B(counter[13]), .Z(n_378));
notech_nao3 i_25(.A(n_3287), .B(n_3288), .C(counter[12]), .Z(n_379));
notech_nao3 i_25(.A(n_3289), .B(n_3290), .C(counter[12]), .Z(n_379));
notech_or2 i_7(.A(counter[8]), .B(counter[9]), .Z(n_382));
notech_nao3 i_252796(.A(n_3285), .B(n_3286), .C(counter[8]), .Z(n_383)
notech_nao3 i_252839(.A(n_3287), .B(n_3288), .C(counter[8]), .Z(n_383)
);
notech_or2 i_8(.A(counter[4]), .B(counter[5]), .Z(n_384));
notech_or2 i_252807(.A(counter[6]), .B(n_384), .Z(n_385));
notech_or2 i_252850(.A(counter[6]), .B(n_384), .Z(n_385));
notech_or4 i_17(.A(n_385), .B(counter[7]), .C(counter[11]), .D(n_383), .Z
(n_387));
notech_or4 i_50(.A(n_387), .B(counter[14]), .C(n_378), .D(counter[15]),
.Z(n_388));
notech_or2 i_342865(.A(n_377), .B(n_388), .Z(n_389));
notech_or2 i_342908(.A(n_377), .B(n_388), .Z(n_389));
notech_nand2 i_4(.A(counter_l[0]), .B(out), .Z(n_390));
notech_nao3 i_360(.A(n_3238), .B(n_3284), .C(counter[2]), .Z(n_393));
notech_nao3 i_342837(.A(counter[1]), .B(n_3282), .C(n_393), .Z(n_394));
notech_ao4 i_350(.A(n_218), .B(n_374), .C(n_217), .D(n_3276), .Z(n_399)
notech_nao3 i_357(.A(n_3240), .B(n_3286), .C(counter[2]), .Z(n_393));
notech_nao3 i_342880(.A(counter[1]), .B(n_3284), .C(n_393), .Z(n_394));
notech_ao4 i_347(.A(n_218), .B(n_374), .C(n_217), .D(n_3278), .Z(n_399)
);
notech_nand2 i_2130(.A(n_399), .B(n_219), .Z(n_400));
notech_or2 i_262(.A(n_169), .B(n_400), .Z(n_401));
notech_or4 i_345(.A(n_393), .B(n_401), .C(counter[1]), .D(n_3282), .Z(n_402
notech_nand2 i_2133(.A(n_399), .B(n_219), .Z(n_400));
notech_or2 i_265(.A(n_169), .B(n_400), .Z(n_401));
notech_or4 i_342(.A(n_393), .B(n_401), .C(counter[1]), .D(n_3284), .Z(n_402
));
notech_or4 i_34(.A(counter[0]), .B(n_393), .C(n_401), .D(n_3283), .Z(n_403
notech_or4 i_34(.A(counter[0]), .B(n_393), .C(n_401), .D(n_3285), .Z(n_403
));
notech_or4 i_251(.A(n_370), .B(n_373), .C(n_400), .D(n_3274), .Z(n_405)
notech_or4 i_254(.A(n_370), .B(n_373), .C(n_400), .D(n_3276), .Z(n_405)
);
notech_nand2 i_266(.A(bcd), .B(n_3236), .Z(n_406));
notech_nand2 i_27(.A(n_406), .B(n_3241), .Z(n_407));
notech_nand2 i_14(.A(n_405), .B(n_3240), .Z(n_409));
notech_nand3 i_28(.A(n_406), .B(n_405), .C(n_3240), .Z(n_411));
notech_ao4 i_337(.A(n_407), .B(n_3293), .C(n_411), .D(n_3294), .Z(n_412)
notech_nand2 i_269(.A(bcd), .B(n_3238), .Z(n_406));
notech_nand2 i_27(.A(n_406), .B(n_3243), .Z(n_407));
notech_nand2 i_14(.A(n_405), .B(n_3242), .Z(n_409));
notech_nand3 i_28(.A(n_406), .B(n_405), .C(n_3242), .Z(n_411));
notech_ao4 i_334(.A(n_407), .B(n_3295), .C(n_411), .D(n_3296), .Z(n_412)
);
notech_ao4 i_336(.A(n_407), .B(n_3295), .C(n_411), .D(n_3296), .Z(n_413)
notech_ao4 i_333(.A(n_407), .B(n_3297), .C(n_411), .D(n_3298), .Z(n_413)
);
notech_ao4 i_335(.A(n_194), .B(n_409), .C(n_193), .D(n_405), .Z(n_414)
notech_ao4 i_332(.A(n_194), .B(n_409), .C(n_193), .D(n_405), .Z(n_414)
);
notech_or2 i_264(.A(n_387), .B(n_406), .Z(n_415));
notech_nao3 i_32(.A(n_3242), .B(n_3240), .C(n_387), .Z(n_416));
notech_nand2 i_45(.A(n_3240), .B(n_3242), .Z(n_417));
notech_ao4 i_331(.A(n_411), .B(n_3297), .C(counter[4]), .D(n_417), .Z(n_418
notech_or2 i_267(.A(n_387), .B(n_406), .Z(n_415));
notech_nao3 i_32(.A(n_3244), .B(n_3242), .C(n_387), .Z(n_416));
notech_nand2 i_45(.A(n_3242), .B(n_3244), .Z(n_417));
notech_ao4 i_328(.A(n_411), .B(n_3299), .C(counter[4]), .D(n_417), .Z(n_418
));
notech_or4 i_265(.A(counter[6]), .B(counter[7]), .C(n_384), .D(n_406), .Z
notech_or4 i_268(.A(counter[6]), .B(counter[7]), .C(n_384), .D(n_406), .Z
(n_421));
notech_nao3 i_30(.A(n_387), .B(n_3240), .C(n_406), .Z(n_424));
notech_or2 i_31(.A(n_424), .B(n_3243), .Z(n_425));
notech_ao4 i_329(.A(n_411), .B(n_3298), .C(n_191), .D(n_425), .Z(n_426)
notech_nao3 i_30(.A(n_387), .B(n_3242), .C(n_406), .Z(n_424));
notech_or2 i_31(.A(n_424), .B(n_3245), .Z(n_425));
notech_ao4 i_326(.A(n_411), .B(n_3300), .C(n_191), .D(n_425), .Z(n_426)
);
notech_ao4 i_328(.A(n_3273), .B(n_3240), .C(n_407), .D(n_3299), .Z(n_427
notech_ao4 i_325(.A(n_3275), .B(n_3242), .C(n_407), .D(n_3301), .Z(n_427
));
notech_ao4 i_327(.A(n_411), .B(n_3300), .C(n_425), .D(n_189), .Z(n_428)
notech_ao4 i_324(.A(n_411), .B(n_3302), .C(n_425), .D(n_189), .Z(n_428)
);
notech_ao4 i_326(.A(n_3240), .B(n_3272), .C(n_407), .D(n_3301), .Z(n_429
notech_ao4 i_323(.A(n_3242), .B(n_3274), .C(n_407), .D(n_3303), .Z(n_429
));
notech_mux2 i_322(.S(n_400), .A(n_3243), .B(counter_l[7]), .Z(n_433));
notech_ao4 i_318(.A(n_3240), .B(n_3271), .C(n_407), .D(n_3302), .Z(n_437
notech_mux2 i_319(.S(n_400), .A(n_3245), .B(counter_l[7]), .Z(n_433));
notech_ao4 i_315(.A(n_3242), .B(n_3273), .C(n_407), .D(n_3304), .Z(n_437
));
notech_nand3 i_35(.A(n_415), .B(n_7877), .C(n_3243), .Z(n_438));
notech_ao4 i_316(.A(n_425), .B(n_3285), .C(n_187), .D(n_438), .Z(n_439)
notech_nand3 i_35(.A(n_415), .B(n_7895), .C(n_3245), .Z(n_438));
notech_ao4 i_313(.A(n_425), .B(n_3287), .C(n_187), .D(n_438), .Z(n_439)
);
notech_reg output_m_reg_7(.CP(n_8248), .D(n_2792), .CD(n_8152), .Q(output_m
notech_reg output_m_reg_7(.CP(n_8242), .D(n_2794), .CD(n_8159), .Q(output_m
[7]));
notech_mux2 i_3357(.S(output_latched), .A(counter[15]), .B(output_m[7]),
.Z(n_2792));
notech_ao4 i_315(.A(n_7877), .B(n_3270), .C(n_407), .D(n_3303), .Z(n_441
.Z(n_2794));
notech_ao4 i_312(.A(n_7895), .B(n_3272), .C(n_407), .D(n_3305), .Z(n_441
));
notech_reg output_m_reg_6(.CP(n_8248), .D(n_2798), .CD(n_8152), .Q(output_m
notech_reg output_m_reg_6(.CP(n_8242), .D(n_2800), .CD(n_8159), .Q(output_m
[6]));
notech_mux2 i_3365(.S(output_latched), .A(counter[14]), .B(output_m[6]),
.Z(n_2798));
notech_ao4 i_313(.A(n_425), .B(n_3286), .C(n_185), .D(n_438), .Z(n_442)
.Z(n_2800));
notech_ao4 i_310(.A(n_425), .B(n_3288), .C(n_185), .D(n_438), .Z(n_442)
);
notech_reg output_m_reg_5(.CP(n_8247), .D(n_2804), .CD(n_8151), .Q(output_m
notech_reg output_m_reg_5(.CP(n_8241), .D(n_2806), .CD(n_8158), .Q(output_m
[5]));
notech_mux2 i_3373(.S(output_latched), .A(counter[13]), .B(output_m[5]),
.Z(n_2804));
notech_reg output_m_reg_4(.CP(n_8247), .D(n_2810), .CD(n_8151), .Q(output_m
.Z(n_2806));
notech_reg output_m_reg_4(.CP(n_8241), .D(n_2812), .CD(n_8158), .Q(output_m
[4]));
notech_mux2 i_3381(.S(output_latched), .A(counter[12]), .B(output_m[4]),
.Z(n_2810));
notech_ao4 i_312(.A(n_7877), .B(n_3269), .C(n_407), .D(n_3304), .Z(n_444
.Z(n_2812));
notech_ao4 i_309(.A(n_7895), .B(n_3271), .C(n_407), .D(n_3306), .Z(n_444
));
notech_reg output_m_reg_3(.CP(n_8248), .D(n_2816), .CD(n_8152), .Q(output_m
notech_reg output_m_reg_3(.CP(n_8242), .D(n_2818), .CD(n_8159), .Q(output_m
[3]));
notech_mux2 i_3389(.S(output_latched), .A(counter[11]), .B(output_m[3]),
.Z(n_2816));
notech_reg output_m_reg_2(.CP(n_8248), .D(n_2822), .CD(n_8152), .Q(output_m
.Z(n_2818));
notech_reg output_m_reg_2(.CP(n_8242), .D(n_2824), .CD(n_8159), .Q(output_m
[2]));
notech_mux2 i_3397(.S(output_latched), .A(counter[10]), .B(output_m[2]),
.Z(n_2822));
notech_reg output_m_reg_1(.CP(n_8248), .D(n_2828), .CD(n_8152), .Q(output_m
.Z(n_2824));
notech_reg output_m_reg_1(.CP(n_8242), .D(n_2830), .CD(n_8159), .Q(output_m
[1]));
notech_mux2 i_3405(.S(output_latched), .A(counter[9]), .B(output_m[1]),
.Z(n_2828));
notech_reg output_m_reg_0(.CP(n_8248), .D(n_2834), .CD(n_8152), .Q(output_m
.Z(n_2830));
notech_reg output_m_reg_0(.CP(n_8242), .D(n_2836), .CD(n_8159), .Q(output_m
[0]));
notech_mux2 i_3413(.S(output_latched), .A(counter[8]), .B(output_m[0]),
.Z(n_2834));
notech_ao4 i_308(.A(n_7877), .B(n_3268), .C(n_407), .D(n_3305), .Z(n_448
.Z(n_2836));
notech_ao4 i_305(.A(n_7895), .B(n_3270), .C(n_407), .D(n_3307), .Z(n_448
));
notech_reg status_reg_7(.CP(n_8248), .D(n_2840), .CD(n_8152), .Q(status[
notech_reg status_reg_7(.CP(n_8242), .D(n_2842), .CD(n_8159), .Q(status[
7]));
notech_mux2 i_3421(.S(n_327), .A(out), .B(status[7]), .Z(n_2840));
notech_mux2 i_306(.S(counter[12]), .A(n_416), .B(n_424), .Z(n_449));
notech_reg status_reg_6(.CP(n_8247), .D(n_2846), .CD(n_8151), .Q(status[
notech_mux2 i_3421(.S(n_327), .A(out), .B(status[7]), .Z(n_2842));
notech_mux2 i_303(.S(counter[12]), .A(n_416), .B(n_424), .Z(n_449));
notech_reg status_reg_6(.CP(n_8241), .D(n_2848), .CD(n_8158), .Q(status[
6]));
notech_mux2 i_3429(.S(n_327), .A(null_counter), .B(status[6]), .Z(n_2846
notech_mux2 i_3429(.S(n_327), .A(null_counter), .B(status[6]), .Z(n_2848
));
notech_reg status_reg_5(.CP(n_8247), .D(n_2852), .CD(n_8151), .Q(status[
notech_reg status_reg_5(.CP(n_8241), .D(n_2854), .CD(n_8158), .Q(status[
5]));
notech_mux2 i_3437(.S(n_327), .A(rw_mode[1]), .B(status[5]), .Z(n_2852)
notech_mux2 i_3437(.S(n_327), .A(rw_mode[1]), .B(status[5]), .Z(n_2854)
);
notech_nao3 i_23(.A(bcd), .B(n_3238), .C(n_377), .Z(n_451));
notech_reg status_reg_4(.CP(n_8247), .D(n_2858), .CD(n_8151), .Q(status[
notech_nao3 i_23(.A(bcd), .B(n_3240), .C(n_377), .Z(n_451));
notech_reg status_reg_4(.CP(n_8241), .D(n_2860), .CD(n_8158), .Q(status[
4]));
notech_mux2 i_3445(.S(n_327), .A(rw_mode[0]), .B(status[4]), .Z(n_2858)
notech_mux2 i_3445(.S(n_327), .A(rw_mode[0]), .B(status[4]), .Z(n_2860)
);
notech_ao4 i_305(.A(n_7877), .B(n_3267), .C(n_407), .D(n_3306), .Z(n_452
notech_ao4 i_302(.A(n_7895), .B(n_3269), .C(n_407), .D(n_3308), .Z(n_452
));
notech_reg status_reg_3(.CP(n_8247), .D(n_2864), .CD(n_8151), .Q(status[
notech_reg status_reg_3(.CP(n_8241), .D(n_2866), .CD(n_8158), .Q(status[
3]));
notech_mux2 i_3453(.S(n_327), .A(mode[2]), .B(status[3]), .Z(n_2864));
notech_nao3 i_44(.A(n_451), .B(n_7877), .C(n_415), .Z(n_453));
notech_reg status_reg_2(.CP(n_8247), .D(n_2870), .CD(n_8151), .Q(status[
notech_mux2 i_3453(.S(n_327), .A(mode[2]), .B(status[3]), .Z(n_2866));
notech_nao3 i_44(.A(n_451), .B(n_7895), .C(n_415), .Z(n_453));
notech_reg status_reg_2(.CP(n_8241), .D(n_2872), .CD(n_8158), .Q(status[
2]));
notech_mux2 i_3461(.S(n_327), .A(mode[1]), .B(status[2]), .Z(n_2870));
notech_ao4 i_302(.A(n_180), .B(n_3287), .C(n_179), .D(n_453), .Z(n_454)
notech_mux2 i_3461(.S(n_327), .A(mode[1]), .B(status[2]), .Z(n_2872));
notech_ao4 i_299(.A(n_180), .B(n_3289), .C(n_179), .D(n_453), .Z(n_454)
);
notech_reg status_reg_1(.CP(n_8247), .D(n_2876), .CD(n_8151), .Q(status[
notech_reg status_reg_1(.CP(n_8241), .D(n_2878), .CD(n_8158), .Q(status[
1]));
notech_mux2 i_3469(.S(n_327), .A(mode[0]), .B(status[1]), .Z(n_2876));
notech_reg status_reg_0(.CP(n_8247), .D(n_2882), .CD(n_8151), .Q(status[
notech_mux2 i_3469(.S(n_327), .A(mode[0]), .B(status[1]), .Z(n_2878));
notech_reg status_reg_0(.CP(n_8241), .D(n_2884), .CD(n_8158), .Q(status[
0]));
notech_mux2 i_3477(.S(n_327), .A(bcd), .B(status[0]), .Z(n_2882));
notech_ao4 i_301(.A(n_7877), .B(n_3266), .C(n_407), .D(n_3307), .Z(n_456
notech_mux2 i_3477(.S(n_327), .A(bcd), .B(status[0]), .Z(n_2884));
notech_ao4 i_295(.A(n_7895), .B(n_3268), .C(n_407), .D(n_3309), .Z(n_456
));
notech_reg output_l_reg_7(.CP(n_8247), .D(n_2888), .CD(n_8151), .Q(output_l
notech_reg output_l_reg_7(.CP(n_8241), .D(n_2890), .CD(n_8158), .Q(output_l
[7]));
notech_mux2 i_3485(.S(output_latched), .A(counter[7]), .B(output_l[7]),
.Z(n_2888));
notech_ao4 i_296(.A(n_180), .B(n_3288), .C(n_453), .D(n_177), .Z(n_457)
.Z(n_2890));
notech_ao4 i_277(.A(n_180), .B(n_3290), .C(n_453), .D(n_177), .Z(n_457)
);
notech_reg output_l_reg_6(.CP(n_8247), .D(n_2894), .CD(n_8151), .Q(output_l
notech_reg output_l_reg_6(.CP(n_8241), .D(n_2896), .CD(n_8158), .Q(output_l
[6]));
notech_mux2 i_3493(.S(output_latched), .A(counter[6]), .B(output_l[6]),
.Z(n_2894));
notech_reg output_l_reg_5(.CP(n_8247), .D(n_2900), .CD(n_8151), .Q(output_l
.Z(n_2896));
notech_reg output_l_reg_5(.CP(n_8241), .D(n_2902), .CD(n_8158), .Q(output_l
[5]));
notech_mux2 i_3501(.S(output_latched), .A(counter[5]), .B(output_l[5]),
.Z(n_2900));
notech_ao4 i_292(.A(n_7877), .B(n_3265), .C(n_407), .D(n_3308), .Z(n_459
.Z(n_2902));
notech_ao4 i_275(.A(n_7895), .B(n_3267), .C(n_407), .D(n_3310), .Z(n_459
));
notech_reg output_l_reg_4(.CP(n_8249), .D(n_2906), .CD(n_8153), .Q(output_l
notech_reg output_l_reg_4(.CP(n_8243), .D(n_2908), .CD(n_8160), .Q(output_l
[4]));
notech_mux2 i_3509(.S(output_latched), .A(counter[4]), .B(output_l[4]),
.Z(n_2906));
notech_ao4 i_274(.A(n_424), .B(n_3289), .C(n_416), .D(n_176), .Z(n_460)
.Z(n_2908));
notech_ao4 i_272(.A(n_424), .B(n_3291), .C(n_416), .D(n_176), .Z(n_460)
);
notech_reg output_l_reg_3(.CP(n_8249), .D(n_2912), .CD(n_8153), .Q(output_l
notech_reg output_l_reg_3(.CP(n_8243), .D(n_2914), .CD(n_8160), .Q(output_l
[3]));
notech_mux2 i_3517(.S(output_latched), .A(counter[3]), .B(output_l[3]),
.Z(n_2912));
notech_reg output_l_reg_2(.CP(n_8249), .D(n_2918), .CD(n_8153), .Q(output_l
.Z(n_2914));
notech_reg output_l_reg_2(.CP(n_8243), .D(n_2920), .CD(n_8160), .Q(output_l
[2]));
notech_mux2 i_3525(.S(output_latched), .A(counter[2]), .B(output_l[2]),
.Z(n_2918));
notech_ao4 i_270(.A(n_451), .B(n_400), .C(n_407), .D(n_3309), .Z(n_462)
.Z(n_2920));
notech_ao4 i_270(.A(n_451), .B(n_400), .C(n_407), .D(n_3311), .Z(n_462)
);
notech_reg output_l_reg_1(.CP(n_8249), .D(n_2924), .CD(n_8153), .Q(output_l
notech_reg output_l_reg_1(.CP(n_8243), .D(n_2926), .CD(n_8160), .Q(output_l
[1]));
notech_mux2 i_3533(.S(output_latched), .A(counter[1]), .B(output_l[1]),
.Z(n_2924));
notech_reg output_l_reg_0(.CP(n_8249), .D(n_2930), .CD(n_8153), .Q(output_l
.Z(n_2926));
notech_reg output_l_reg_0(.CP(n_8243), .D(n_2932), .CD(n_8160), .Q(output_l
[0]));
notech_mux2 i_3541(.S(output_latched), .A(counter[0]), .B(output_l[0]),
.Z(n_2930));
notech_or2 i_10(.A(n_235), .B(n_175), .Z(n_464));
notech_reg output_latched_reg(.CP(n_8249), .D(n_2936), .CD(n_8153), .Q(output_latched
.Z(n_2932));
notech_or2 i_10(.A(n_237), .B(n_175), .Z(n_464));
notech_reg output_latched_reg(.CP(n_8243), .D(n_2938), .CD(n_8160), .Q(output_latched
));
notech_mux2 i_3549(.S(n_1972), .A(output_latched), .B(n_326), .Z(n_2936)
notech_mux2 i_3549(.S(n_2020), .A(output_latched), .B(n_326), .Z(n_2938)
);
notech_reg msb_read_reg(.CP(n_8249), .D(n_2942), .CD(n_8153), .Q(msb_read
notech_reg msb_read_reg(.CP(n_8243), .D(n_2944), .CD(n_8160), .Q(msb_read
));
notech_nand2 i_3557(.A(n_2944), .B(n_2945), .Z(n_2942));
notech_or4 i_3558(.A(msb_read), .B(n_344), .C(set_control_mode), .D(n_3310
), .Z(n_2944));
notech_nand3 i_3559(.A(msb_read), .B(n_7895), .C(n_172), .Z(n_2945));
notech_ao4 i_223(.A(n_403), .B(n_174), .C(n_7877), .D(n_173), .Z(n_466)
);
notech_reg status_latched_reg(.CP(n_8249), .D(n_2948), .CD(n_8153), .Q(status_latched
notech_nand2 i_3557(.A(n_2946), .B(n_2947), .Z(n_2944));
notech_or4 i_3558(.A(msb_read), .B(n_344), .C(set_control_mode), .D(n_3312
), .Z(n_2946));
notech_nand3 i_3559(.A(msb_read), .B(n_7913), .C(n_174), .Z(n_2947));
notech_reg status_latched_reg(.CP(n_8243), .D(n_2950), .CD(n_8160), .Q(status_latched
));
notech_nand2 i_3565(.A(n_2951), .B(n_2950), .Z(n_2948));
notech_nand3 i_3566(.A(latch_status), .B(n_7895), .C(n_470), .Z(n_2950)
notech_nand2 i_3565(.A(n_2953), .B(n_2952), .Z(n_2950));
notech_nand3 i_3566(.A(latch_status), .B(n_7913), .C(n_467), .Z(n_2952)
);
notech_or4 i_3567(.A(latch_status), .B(read), .C(set_control_mode), .D(n_3260
), .Z(n_2951));
notech_reg null_counter_reg(.CP(n_8249), .D(n_2954), .CD(n_8153), .Q(null_counter
notech_or4 i_3567(.A(latch_status), .B(read), .C(set_control_mode), .D(n_3262
), .Z(n_2953));
notech_or2 i_223(.A(latch_status), .B(read), .Z(n_467));
notech_reg null_counter_reg(.CP(n_8243), .D(n_2956), .CD(n_8160), .Q(null_counter
));
notech_nand2 i_3573(.A(n_2956), .B(n_2957), .Z(n_2954));
notech_ao4 i_3574(.A(n_170), .B(n_3291), .C(n_7895), .D(n_3275), .Z(n_2956
notech_nand2 i_3573(.A(n_2958), .B(n_2959), .Z(n_2956));
notech_ao4 i_3574(.A(n_170), .B(n_3293), .C(n_7913), .D(n_3277), .Z(n_2958
));
notech_nand3 i_3575(.A(null_counter), .B(n_167), .C(n_3275), .Z(n_2957)
notech_nand3 i_3575(.A(null_counter), .B(n_167), .C(n_3277), .Z(n_2959)
);
notech_reg_set out_reg(.CP(n_8249), .D(n_2960), .SD(n_8153), .Q(out));
notech_mux2 i_3581(.S(n_3261), .A(out), .B(n_2327), .Z(n_2960));
notech_reg counter_reg_15(.CP(n_8248), .D(n_2966), .CD(n_8152), .Q(counter
notech_reg_set out_reg(.CP(n_8243), .D(n_2962), .SD(n_8160), .Q(out));
notech_mux2 i_3581(.S(n_3263), .A(out), .B(n_1960), .Z(n_2962));
notech_reg counter_reg_15(.CP(n_8242), .D(n_2968), .CD(n_8159), .Q(counter
[15]));
notech_mux2 i_3589(.S(\nbus_11[0] ), .A(counter[15]), .B(n_3262), .Z(n_2966
notech_mux2 i_3589(.S(\nbus_11[0] ), .A(counter[15]), .B(n_3264), .Z(n_2968
));
notech_or2 i_219(.A(latch_status), .B(read), .Z(n_470));
notech_reg counter_reg_14(.CP(n_8248), .D(n_2972), .CD(n_8152), .Q(counter
notech_reg counter_reg_14(.CP(n_8242), .D(n_2974), .CD(n_8159), .Q(counter
[14]));
notech_mux2 i_3597(.S(\nbus_11[0] ), .A(counter[14]), .B(n_1892), .Z(n_2972
notech_mux2 i_3597(.S(\nbus_11[0] ), .A(counter[14]), .B(n_1883), .Z(n_2974
));
notech_reg counter_reg_13(.CP(n_8248), .D(n_2978), .CD(n_8152), .Q(counter
notech_reg counter_reg_13(.CP(n_8242), .D(n_2980), .CD(n_8159), .Q(counter
[13]));
notech_mux2 i_3605(.S(\nbus_11[0] ), .A(counter[13]), .B(n_1886), .Z(n_2978
notech_mux2 i_3605(.S(\nbus_11[0] ), .A(counter[13]), .B(n_1877), .Z(n_2980
));
notech_reg counter_reg_12(.CP(n_8248), .D(n_2984), .CD(n_8152), .Q(counter
notech_ao4 i_217(.A(n_403), .B(n_172), .C(n_7895), .D(n_171), .Z(n_472)
);
notech_reg counter_reg_12(.CP(n_8242), .D(n_2986), .CD(n_8159), .Q(counter
[12]));
notech_mux2 i_3613(.S(\nbus_11[0] ), .A(counter[12]), .B(n_1880), .Z(n_2984
notech_mux2 i_3613(.S(\nbus_11[0] ), .A(counter[12]), .B(n_1871), .Z(n_2986
));
notech_reg counter_reg_11(.CP(n_8248), .D(n_2990), .CD(n_8152), .Q(counter
notech_reg counter_reg_11(.CP(n_8242), .D(n_2992), .CD(n_8159), .Q(counter
[11]));
notech_mux2 i_3621(.S(\nbus_11[0] ), .A(counter[11]), .B(n_3263), .Z(n_2990
notech_mux2 i_3621(.S(\nbus_11[0] ), .A(counter[11]), .B(n_3265), .Z(n_2992
));
notech_nand2 i_82023(.A(n_348), .B(n_231), .Z(data_out[7]));
notech_reg counter_reg_10(.CP(n_8249), .D(n_2996), .CD(n_8153), .Q(counter
notech_nand2 i_82066(.A(n_348), .B(n_231), .Z(data_out[7]));
notech_reg counter_reg_10(.CP(n_8243), .D(n_2998), .CD(n_8160), .Q(counter
[10]));
notech_mux2 i_3629(.S(\nbus_11[0] ), .A(counter[10]), .B(n_1868), .Z(n_2996
notech_mux2 i_3629(.S(\nbus_11[0] ), .A(counter[10]), .B(n_1859), .Z(n_2998
));
notech_nand2 i_72022(.A(n_349), .B(n_230), .Z(data_out[6]));
notech_reg counter_reg_9(.CP(n_8249), .D(n_3002), .CD(n_8153), .Q(counter
notech_nand2 i_72065(.A(n_349), .B(n_230), .Z(data_out[6]));
notech_reg counter_reg_9(.CP(n_8243), .D(n_3004), .CD(n_8160), .Q(counter
[9]));
notech_mux2 i_3637(.S(\nbus_11[0] ), .A(counter[9]), .B(n_1862), .Z(n_3002
notech_mux2 i_3637(.S(\nbus_11[0] ), .A(counter[9]), .B(n_1853), .Z(n_3004
));
notech_nand2 i_62021(.A(n_350), .B(n_229), .Z(data_out[5]));
notech_reg counter_reg_8(.CP(n_8248), .D(n_3008), .CD(n_8152), .Q(counter
notech_nand2 i_62064(.A(n_350), .B(n_229), .Z(data_out[5]));
notech_reg counter_reg_8(.CP(n_8242), .D(n_3010), .CD(n_8159), .Q(counter
[8]));
notech_mux2 i_3645(.S(\nbus_11[0] ), .A(counter[8]), .B(n_3264), .Z(n_3008
notech_mux2 i_3645(.S(\nbus_11[0] ), .A(counter[8]), .B(n_3266), .Z(n_3010
));
notech_nand2 i_52020(.A(n_351), .B(n_228), .Z(data_out[4]));
notech_reg counter_reg_7(.CP(n_8249), .D(n_3014), .CD(n_8153), .Q(counter
notech_nand2 i_52063(.A(n_351), .B(n_228), .Z(data_out[4]));
notech_reg counter_reg_7(.CP(n_8243), .D(n_3016), .CD(n_8160), .Q(counter
[7]));
notech_mux2 i_3653(.S(\nbus_11[0] ), .A(counter[7]), .B(n_1850), .Z(n_3014
notech_mux2 i_3653(.S(\nbus_11[0] ), .A(counter[7]), .B(n_1841), .Z(n_3016
));
notech_nand2 i_42019(.A(n_352), .B(n_227), .Z(data_out[3]));
notech_reg counter_reg_6(.CP(n_8244), .D(n_3020), .CD(n_8148), .Q(counter
notech_nand2 i_42062(.A(n_352), .B(n_227), .Z(data_out[3]));
notech_reg counter_reg_6(.CP(n_8238), .D(n_3022), .CD(n_8155), .Q(counter
[6]));
notech_mux2 i_3661(.S(\nbus_11[0] ), .A(counter[6]), .B(n_1844), .Z(n_3020
notech_mux2 i_3661(.S(\nbus_11[0] ), .A(counter[6]), .B(n_1835), .Z(n_3022
));
notech_nand2 i_32018(.A(n_353), .B(n_226), .Z(data_out[2]));
notech_reg counter_reg_5(.CP(n_8244), .D(n_3026), .CD(n_8148), .Q(counter
notech_nand2 i_32061(.A(n_353), .B(n_226), .Z(data_out[2]));
notech_reg counter_reg_5(.CP(n_8238), .D(n_3028), .CD(n_8155), .Q(counter
[5]));
notech_mux2 i_3669(.S(\nbus_11[0] ), .A(counter[5]), .B(n_1838), .Z(n_3026
notech_mux2 i_3669(.S(\nbus_11[0] ), .A(counter[5]), .B(n_1829), .Z(n_3028
));
notech_nand2 i_22017(.A(n_354), .B(n_225), .Z(data_out[1]));
notech_reg counter_reg_4(.CP(n_8243), .D(n_3032), .CD(n_8147), .Q(counter
notech_nand2 i_22060(.A(n_354), .B(n_225), .Z(data_out[1]));
notech_reg counter_reg_4(.CP(n_8237), .D(n_3034), .CD(n_8154), .Q(counter
[4]));
notech_mux2 i_3677(.S(\nbus_11[0] ), .A(counter[4]), .B(n_1832), .Z(n_3032
notech_mux2 i_3677(.S(\nbus_11[0] ), .A(counter[4]), .B(n_1823), .Z(n_3034
));
notech_nand2 i_12016(.A(n_355), .B(n_224), .Z(data_out[0]));
notech_reg counter_reg_3(.CP(n_8243), .D(n_3038), .CD(n_8147), .Q(counter
notech_nand2 i_12059(.A(n_355), .B(n_224), .Z(data_out[0]));
notech_reg counter_reg_3(.CP(n_8237), .D(n_3040), .CD(n_8154), .Q(counter
[3]));
notech_mux2 i_3685(.S(\nbus_11[0] ), .A(counter[3]), .B(n_1826), .Z(n_3038
notech_mux2 i_3685(.S(\nbus_11[0] ), .A(counter[3]), .B(n_1817), .Z(n_3040
));
notech_reg counter_reg_2(.CP(n_8244), .D(n_3044), .CD(n_8148), .Q(counter
notech_reg counter_reg_2(.CP(n_8238), .D(n_3046), .CD(n_8155), .Q(counter
[2]));
notech_mux2 i_3693(.S(\nbus_11[0] ), .A(counter[2]), .B(n_1820), .Z(n_3044
notech_mux2 i_3693(.S(\nbus_11[0] ), .A(counter[2]), .B(n_1811), .Z(n_3046
));
notech_and4 i_1903(.A(n_168), .B(n_402), .C(n_466), .D(n_7895), .Z(n_2324
));
notech_reg counter_reg_1(.CP(n_8244), .D(n_3050), .CD(n_8148), .Q(counter
notech_reg counter_reg_1(.CP(n_8238), .D(n_3052), .CD(n_8155), .Q(counter
[1]));
notech_mux2 i_3701(.S(\nbus_11[0] ), .A(counter[1]), .B(n_1814), .Z(n_3050
notech_mux2 i_3701(.S(\nbus_11[0] ), .A(counter[1]), .B(n_1805), .Z(n_3052
));
notech_nand2 i_1856(.A(n_7895), .B(n_7877), .Z(n_2251));
notech_reg counter_reg_0(.CP(n_8244), .D(n_3056), .CD(n_8148), .Q(counter
notech_nand2 i_1898(.A(n_7913), .B(n_7895), .Z(n_2316));
notech_reg counter_reg_0(.CP(n_8238), .D(n_3058), .CD(n_8155), .Q(counter
[0]));
notech_mux2 i_3709(.S(\nbus_11[0] ), .A(counter[0]), .B(n_1808), .Z(n_3056
notech_mux2 i_3709(.S(\nbus_11[0] ), .A(counter[0]), .B(n_1799), .Z(n_3058
));
notech_reg bcd_reg(.CP(n_8244), .D(n_3062), .CD(n_8148), .Q(bcd));
notech_mux2 i_3717(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_3062
notech_nao3 i_1863(.A(n_238), .B(n_7913), .C(n_319), .Z(\nbus_14[0] ));
notech_reg bcd_reg(.CP(n_8238), .D(n_3064), .CD(n_8155), .Q(bcd));
notech_mux2 i_3717(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_3064
));
notech_nao3 i_1816(.A(n_236), .B(n_7895), .C(n_319), .Z(\nbus_14[0] ));
notech_reg counter_m_reg_7(.CP(n_8244), .D(n_3068), .CD(n_8148), .Q(counter_m
notech_or4 i_1856(.A(n_237), .B(n_175), .C(set_control_mode), .D(n_400),
.Z(n_2232));
notech_reg counter_m_reg_7(.CP(n_8238), .D(n_3070), .CD(n_8155), .Q(counter_m
[7]));
notech_mux2 i_3725(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_243), .Z(n_3068
notech_mux2 i_3725(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_243), .Z(n_3070
));
notech_or4 i_1809(.A(n_235), .B(n_175), .C(set_control_mode), .D(n_400),
.Z(n_2158));
notech_reg counter_m_reg_6(.CP(n_8243), .D(n_3074), .CD(n_8147), .Q(counter_m
notech_reg counter_m_reg_6(.CP(n_8237), .D(n_3076), .CD(n_8154), .Q(counter_m
[6]));
notech_mux2 i_3733(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_244), .Z(n_3074
notech_mux2 i_3733(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_244), .Z(n_3076
));
notech_reg counter_m_reg_5(.CP(n_8243), .D(n_3080), .CD(n_8147), .Q(counter_m
notech_nand2 i_1840(.A(n_242), .B(gate_last), .Z(n_2204));
notech_reg counter_m_reg_5(.CP(n_8237), .D(n_3082), .CD(n_8154), .Q(counter_m
[5]));
notech_mux2 i_3741(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_245), .Z(n_3080
notech_mux2 i_3741(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_245), .Z(n_3082
));
notech_reg counter_m_reg_4(.CP(n_8243), .D(n_3086), .CD(n_8147), .Q(counter_m
notech_reg counter_m_reg_4(.CP(n_8237), .D(n_3088), .CD(n_8154), .Q(counter_m
[4]));
notech_mux2 i_3749(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_246), .Z(n_3086
notech_mux2 i_3749(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_246), .Z(n_3088
));
notech_nao3 i_1735(.A(n_234), .B(n_3290), .C(n_235), .Z(\nbus_12[0] ));
notech_reg counter_m_reg_3(.CP(n_8243), .D(n_3092), .CD(n_8147), .Q(counter_m
notech_nao3 i_1777(.A(n_236), .B(n_7913), .C(n_237), .Z(\nbus_12[0] ));
notech_reg counter_m_reg_3(.CP(n_8237), .D(n_3094), .CD(n_8154), .Q(counter_m
[3]));
notech_mux2 i_3757(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_247), .Z(n_3092
notech_mux2 i_3757(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_247), .Z(n_3094
));
notech_nao3 i_1727(.A(n_233), .B(n_7895), .C(latch_count), .Z(n_1972));
notech_reg counter_m_reg_2(.CP(n_8243), .D(n_3098), .CD(n_8147), .Q(counter_m
notech_nao3 i_1769(.A(n_235), .B(n_3292), .C(latch_count), .Z(n_2020));
notech_reg counter_m_reg_2(.CP(n_8237), .D(n_3100), .CD(n_8154), .Q(counter_m
[2]));
notech_mux2 i_3765(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_248), .Z(n_3098
notech_mux2 i_3765(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_248), .Z(n_3100
));
notech_nand3 i_1651(.A(n_169), .B(n_7877), .C(n_405), .Z(\nbus_11[0] )
);
notech_reg counter_m_reg_1(.CP(n_8243), .D(n_3104), .CD(n_8147), .Q(counter_m
notech_and4 i_1738(.A(n_168), .B(n_402), .C(n_472), .D(n_7913), .Z(n_1957
));
notech_reg counter_m_reg_1(.CP(n_8237), .D(n_3106), .CD(n_8154), .Q(counter_m
[1]));
notech_mux2 i_3773(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_249), .Z(n_3104
notech_mux2 i_3773(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_249), .Z(n_3106
));
notech_nand2 i_1601(.A(n_242), .B(gate_last), .Z(n_1686));
notech_reg counter_m_reg_0(.CP(n_8243), .D(n_3110), .CD(n_8147), .Q(counter_m
notech_nand3 i_1646(.A(n_169), .B(n_7895), .C(n_405), .Z(\nbus_11[0] )
);
notech_reg counter_m_reg_0(.CP(n_8237), .D(n_3112), .CD(n_8154), .Q(counter_m
[0]));
notech_mux2 i_3781(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_250), .Z(n_3110
notech_mux2 i_3781(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_250), .Z(n_3112
));
notech_and4 i_161418(.A(n_462), .B(n_460), .C(n_252), .D(n_255), .Z(n_1898
notech_and4 i_161430(.A(n_462), .B(n_460), .C(n_252), .D(n_255), .Z(n_1889
));
notech_reg counter_l_reg_7(.CP(n_8243), .D(n_3116), .CD(n_8147), .Q(counter_l
notech_reg counter_l_reg_7(.CP(n_8237), .D(n_3118), .CD(n_8154), .Q(counter_l
[7]));
notech_mux2 i_3789(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_243), .Z(n_3116
notech_mux2 i_3789(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_243), .Z(n_3118
));
notech_nand3 i_151417(.A(n_457), .B(n_459), .C(n_260), .Z(n_1892));
notech_reg counter_l_reg_6(.CP(n_8243), .D(n_3122), .CD(n_8147), .Q(counter_l
notech_nand3 i_151429(.A(n_457), .B(n_459), .C(n_260), .Z(n_1883));
notech_reg counter_l_reg_6(.CP(n_8237), .D(n_3124), .CD(n_8154), .Q(counter_l
[6]));
notech_mux2 i_3797(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_244), .Z(n_3122
notech_mux2 i_3797(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_244), .Z(n_3124
));
notech_nand3 i_141416(.A(n_454), .B(n_456), .C(n_265), .Z(n_1886));
notech_reg counter_l_reg_5(.CP(n_8243), .D(n_3128), .CD(n_8147), .Q(counter_l
notech_nand3 i_141428(.A(n_454), .B(n_456), .C(n_265), .Z(n_1877));
notech_reg counter_l_reg_5(.CP(n_8237), .D(n_3130), .CD(n_8154), .Q(counter_l
[5]));
notech_mux2 i_3805(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_245), .Z(n_3128
notech_mux2 i_3805(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_245), .Z(n_3130
));
notech_nand3 i_131415(.A(n_449), .B(n_452), .C(n_271), .Z(n_1880));
notech_reg counter_l_reg_4(.CP(n_8245), .D(n_3134), .CD(n_8149), .Q(counter_l
notech_nand3 i_131427(.A(n_449), .B(n_452), .C(n_271), .Z(n_1871));
notech_reg counter_l_reg_4(.CP(n_8239), .D(n_3136), .CD(n_8156), .Q(counter_l
[4]));
notech_mux2 i_3813(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_246), .Z(n_3134
notech_mux2 i_3813(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_246), .Z(n_3136
));
notech_and4 i_121414(.A(n_274), .B(n_448), .C(n_275), .D(n_276), .Z(n_1874
notech_and4 i_121426(.A(n_274), .B(n_448), .C(n_275), .D(n_276), .Z(n_1865
));
notech_reg counter_l_reg_3(.CP(n_8245), .D(n_3140), .CD(n_8149), .Q(counter_l
notech_reg counter_l_reg_3(.CP(n_8239), .D(n_3142), .CD(n_8156), .Q(counter_l
[3]));
notech_mux2 i_3821(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_247), .Z(n_3140
notech_mux2 i_3821(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_247), .Z(n_3142
));
notech_nand3 i_111413(.A(n_442), .B(n_444), .C(n_281), .Z(n_1868));
notech_reg counter_l_reg_2(.CP(n_8245), .D(n_3146), .CD(n_8149), .Q(counter_l
notech_nand3 i_111425(.A(n_442), .B(n_444), .C(n_281), .Z(n_1859));
notech_reg counter_l_reg_2(.CP(n_8239), .D(n_3148), .CD(n_8156), .Q(counter_l
[2]));
notech_mux2 i_3829(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_248), .Z(n_3146
notech_mux2 i_3829(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_248), .Z(n_3148
));
notech_nand3 i_101412(.A(n_439), .B(n_441), .C(n_286), .Z(n_1862));
notech_reg counter_l_reg_1(.CP(n_8245), .D(n_3152), .CD(n_8149), .Q(counter_l
notech_nand3 i_101424(.A(n_439), .B(n_441), .C(n_286), .Z(n_1853));
notech_reg counter_l_reg_1(.CP(n_8239), .D(n_3154), .CD(n_8156), .Q(counter_l
[1]));
notech_mux2 i_3837(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_249), .Z(n_3152
notech_mux2 i_3837(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_249), .Z(n_3154
));
notech_and4 i_91411(.A(n_290), .B(n_289), .C(n_437), .D(n_291), .Z(n_1856
notech_and4 i_91423(.A(n_290), .B(n_289), .C(n_437), .D(n_291), .Z(n_1847
));
notech_reg counter_l_reg_0(.CP(n_8245), .D(n_3158), .CD(n_8149), .Q(counter_l
notech_reg counter_l_reg_0(.CP(n_8239), .D(n_3160), .CD(n_8156), .Q(counter_l
[0]));
notech_mux2 i_3845(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_250), .Z(n_3158
notech_mux2 i_3845(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_250), .Z(n_3160
));
notech_or4 i_81410(.A(n_294), .B(n_293), .C(n_295), .D(n_433), .Z(n_1850
notech_or4 i_81422(.A(n_294), .B(n_293), .C(n_295), .D(n_433), .Z(n_1841
));
notech_reg gate_sampled_reg(.CP(n_8245), .D(n_3164), .CD(n_8149), .Q(gate_sampled
notech_reg gate_sampled_reg(.CP(n_8239), .D(n_3166), .CD(n_8156), .Q(gate_sampled
));
notech_nand2 i_3853(.A(n_242), .B(n_3274), .Z(n_3164));
notech_nand2 i_71409(.A(n_429), .B(n_428), .Z(n_1844));
notech_reg loaded_reg(.CP(n_8247), .D(n_3170), .CD(n_8151), .Q(loaded)
notech_nand2 i_3853(.A(n_242), .B(n_3276), .Z(n_3166));
notech_nand2 i_71421(.A(n_429), .B(n_428), .Z(n_1835));
notech_reg loaded_reg(.CP(n_8241), .D(n_3172), .CD(n_8158), .Q(loaded)
);
notech_mux2 i_3861(.S(n_2251), .A(loaded), .B(n_7895), .Z(n_3170));
notech_nand2 i_61408(.A(n_427), .B(n_426), .Z(n_1838));
notech_reg trigger_sampled_reg(.CP(n_8245), .D(n_3176), .CD(n_8149), .Q(trigger_sampled
notech_mux2 i_3861(.S(n_2316), .A(loaded), .B(n_7913), .Z(n_3172));
notech_nand2 i_61420(.A(n_427), .B(n_426), .Z(n_1829));
notech_reg trigger_sampled_reg(.CP(n_8239), .D(n_3178), .CD(n_8156), .Q(trigger_sampled
));
notech_mux2 i_3869(.S(n_242), .A(trigger), .B(trigger_sampled), .Z(n_3176
notech_mux2 i_3869(.S(n_242), .A(trigger), .B(trigger_sampled), .Z(n_3178
));
notech_nao3 i_51407(.A(n_418), .B(n_304), .C(n_307), .Z(n_1832));
notech_reg trigger_reg(.CP(n_8245), .D(n_3182), .CD(n_8149), .Q(trigger)
notech_nao3 i_51419(.A(n_418), .B(n_304), .C(n_307), .Z(n_1823));
notech_reg trigger_reg(.CP(n_8239), .D(n_3184), .CD(n_8156), .Q(trigger)
);
notech_mux2 i_3877(.S(n_1686), .A(trigger), .B(n_3277), .Z(n_3182));
notech_nand2 i_41406(.A(n_414), .B(n_308), .Z(n_1826));
notech_reg_set gate_last_reg(.CP(n_8245), .D(1'b1), .SD(n_8149), .Q(gate_last
notech_mux2 i_3877(.S(n_2204), .A(trigger), .B(n_3279), .Z(n_3184));
notech_nand2 i_41418(.A(n_414), .B(n_308), .Z(n_1817));
notech_reg_set gate_last_reg(.CP(n_8239), .D(1'b1), .SD(n_8156), .Q(gate_last
));
notech_reg written_reg(.CP(n_8244), .D(n_3190), .CD(n_8148), .Q(written)
notech_reg written_reg(.CP(n_8238), .D(n_3192), .CD(n_8155), .Q(written)
);
notech_mux2 i_3889(.S(n_2158), .A(written), .B(n_241), .Z(n_3190));
notech_nand2 i_31405(.A(n_413), .B(n_195), .Z(n_1820));
notech_reg mode_reg_2(.CP(n_8244), .D(n_3196), .CD(n_8148), .Q(mode[2])
notech_mux2 i_3889(.S(n_2232), .A(written), .B(n_241), .Z(n_3192));
notech_nand2 i_31417(.A(n_413), .B(n_195), .Z(n_1811));
notech_reg mode_reg_2(.CP(n_8238), .D(n_3198), .CD(n_8155), .Q(mode[2])
);
notech_mux2 i_3897(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z
(n_3196));
notech_nand2 i_21404(.A(n_412), .B(n_196), .Z(n_1814));
notech_reg_set mode_reg_1(.CP(n_8244), .D(n_3202), .SD(n_8148), .Q(mode[
(n_3198));
notech_nand2 i_21416(.A(n_412), .B(n_196), .Z(n_1805));
notech_reg_set mode_reg_1(.CP(n_8238), .D(n_3204), .SD(n_8155), .Q(mode[
1]));
notech_mux2 i_3905(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z
(n_3202));
notech_nao3 i_11403(.A(n_316), .B(n_315), .C(n_198), .Z(n_1808));
notech_reg mode_reg_0(.CP(n_8244), .D(n_3208), .CD(n_8148), .Q(mode[0])
(n_3204));
notech_nao3 i_11415(.A(n_316), .B(n_315), .C(n_198), .Z(n_1799));
notech_reg mode_reg_0(.CP(n_8238), .D(n_3210), .CD(n_8155), .Q(mode[0])
);
notech_mux2 i_3913(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z
(n_3208));
notech_reg clock_pulse_reg(.CP(n_8244), .D(n_3214), .CD(n_8148), .Q(clock_pulse
(n_3210));
notech_reg clock_pulse_reg(.CP(n_8238), .D(n_3216), .CD(n_8155), .Q(clock_pulse
));
notech_ao3 i_3921(.A(clock_last), .B(1'b1), .C(clock), .Z(n_3214));
notech_reg clock_last_reg(.CP(n_8245), .D(clock), .CD(n_8149), .Q(clock_last
notech_ao3 i_3921(.A(clock_last), .B(1'b1), .C(clock), .Z(n_3216));
notech_reg clock_last_reg(.CP(n_8239), .D(clock), .CD(n_8156), .Q(clock_last
));
notech_reg msb_write_reg(.CP(n_8245), .D(n_3218), .CD(n_8149), .Q(msb_write
notech_reg msb_write_reg(.CP(n_8239), .D(n_3220), .CD(n_8156), .Q(msb_write
));
notech_nand2 i_3929(.A(n_3220), .B(n_3221), .Z(n_3218));
notech_or4 i_3930(.A(n_344), .B(msb_write), .C(n_3291), .D(set_control_mode
), .Z(n_3220));
notech_nand3 i_3931(.A(msb_write), .B(n_7895), .C(n_359), .Z(n_3221));
notech_nand3 i_1554(.A(n_212), .B(n_210), .C(n_317), .Z(n_2327));
notech_reg rw_mode_reg_1(.CP(n_8245), .D(n_3224), .CD(n_8149), .Q(rw_mode
notech_nand2 i_3929(.A(n_3222), .B(n_3223), .Z(n_3220));
notech_or4 i_3930(.A(n_344), .B(msb_write), .C(n_3293), .D(set_control_mode
), .Z(n_3222));
notech_nand3 i_3931(.A(msb_write), .B(n_7913), .C(n_359), .Z(n_3223));
notech_nand3 i_1554(.A(n_212), .B(n_210), .C(n_317), .Z(n_1960));
notech_reg rw_mode_reg_1(.CP(n_8239), .D(n_3226), .CD(n_8156), .Q(rw_mode
[1]));
notech_mux2 i_3937(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]),
.Z(n_3224));
notech_reg_set rw_mode_reg_0(.CP(n_8245), .D(n_3230), .SD(n_8149), .Q(rw_mode
.Z(n_3226));
notech_reg_set rw_mode_reg_0(.CP(n_8239), .D(n_3232), .SD(n_8156), .Q(rw_mode
[0]));
notech_mux2 i_3945(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]),
.Z(n_3230));
notech_inv i_4318(.A(n_377), .Z(n_3236));
notech_inv i_4319(.A(n_394), .Z(n_3237));
notech_inv i_4320(.A(n_388), .Z(n_3238));
notech_inv i_4321(.A(n_383), .Z(n_3239));
notech_inv i_4322(.A(n_400), .Z(n_3240));
notech_inv i_4323(.A(n_405), .Z(n_3241));
notech_inv i_4324(.A(n_406), .Z(n_3242));
notech_inv i_4325(.A(n_421), .Z(n_3243));
notech_inv i_4326(.A(output_m[7]), .Z(n_3244));
notech_inv i_4327(.A(output_m[6]), .Z(n_3245));
notech_inv i_4328(.A(output_m[5]), .Z(n_3246));
notech_inv i_4329(.A(output_m[4]), .Z(n_3247));
notech_inv i_4330(.A(output_m[3]), .Z(n_3248));
notech_inv i_4331(.A(output_m[2]), .Z(n_3249));
notech_inv i_4332(.A(output_m[1]), .Z(n_3250));
notech_inv i_4333(.A(output_m[0]), .Z(n_3251));
notech_inv i_4334(.A(output_l[7]), .Z(n_3252));
notech_inv i_4335(.A(output_l[6]), .Z(n_3253));
notech_inv i_4336(.A(output_l[5]), .Z(n_3254));
notech_inv i_4337(.A(output_l[4]), .Z(n_3255));
notech_inv i_4338(.A(output_l[3]), .Z(n_3256));
notech_inv i_4339(.A(output_l[2]), .Z(n_3257));
notech_inv i_4340(.A(output_l[1]), .Z(n_3258));
notech_inv i_4341(.A(output_l[0]), .Z(n_3259));
notech_inv i_4342(.A(status_latched), .Z(n_3260));
notech_inv i_4343(.A(n_2324), .Z(n_3261));
notech_inv i_4344(.A(n_1898), .Z(n_3262));
notech_inv i_4345(.A(n_1874), .Z(n_3263));
notech_inv i_4346(.A(n_1856), .Z(n_3264));
notech_inv i_4347(.A(counter_m[6]), .Z(n_3265));
notech_inv i_4348(.A(counter_m[5]), .Z(n_3266));
notech_inv i_4349(.A(counter_m[4]), .Z(n_3267));
notech_inv i_4350(.A(counter_m[3]), .Z(n_3268));
notech_inv i_4351(.A(counter_m[2]), .Z(n_3269));
notech_inv i_4352(.A(counter_m[1]), .Z(n_3270));
notech_inv i_4353(.A(counter_m[0]), .Z(n_3271));
notech_inv i_4354(.A(counter_l[6]), .Z(n_3272));
notech_inv i_4355(.A(counter_l[5]), .Z(n_3273));
notech_inv i_4356(.A(gate_sampled), .Z(n_3274));
notech_inv i_4357(.A(n_2251), .Z(n_3275));
notech_inv i_4358(.A(trigger_sampled), .Z(n_3276));
notech_inv i_4359(.A(gate_last), .Z(n_3277));
notech_inv i_4360(.A(mode[2]), .Z(n_3278));
notech_inv i_4361(.A(mode[0]), .Z(n_3279));
notech_inv i_4362(.A(clock_pulse), .Z(n_3280));
notech_inv i_4363(.A(clock_last), .Z(n_3281));
notech_inv i_4364(.A(counter[0]), .Z(n_3282));
notech_inv i_4365(.A(counter[1]), .Z(n_3283));
notech_inv i_4366(.A(counter[3]), .Z(n_3284));
notech_inv i_4367(.A(counter[9]), .Z(n_3285));
notech_inv i_4368(.A(counter[10]), .Z(n_3286));
notech_inv i_4369(.A(counter[13]), .Z(n_3287));
notech_inv i_4370(.A(counter[14]), .Z(n_3288));
notech_inv i_4371(.A(counter[15]), .Z(n_3289));
notech_inv i_4372(.A(set_control_mode), .Z(n_3290));
notech_inv i_4373(.A(write), .Z(n_3291));
notech_inv i_4374(.A(out), .Z(n_3292));
notech_inv i_4375(.A(n_1429), .Z(n_3293));
notech_inv i_4376(.A(n_1309), .Z(n_3294));
notech_inv i_4377(.A(n_1431), .Z(n_3295));
notech_inv i_4378(.A(n_1311), .Z(n_3296));
notech_inv i_4379(.A(n_1315), .Z(n_3297));
notech_inv i_4380(.A(n_1317), .Z(n_3298));
notech_inv i_4381(.A(n_1435), .Z(n_3299));
notech_inv i_4382(.A(n_1319), .Z(n_3300));
notech_inv i_4383(.A(n_1436), .Z(n_3301));
notech_inv i_4384(.A(n_1438), .Z(n_3302));
notech_inv i_4385(.A(n_1439), .Z(n_3303));
notech_inv i_4386(.A(n_1440), .Z(n_3304));
notech_inv i_4387(.A(n_1441), .Z(n_3305));
notech_inv i_4388(.A(n_1442), .Z(n_3306));
notech_inv i_4389(.A(n_1443), .Z(n_3307));
notech_inv i_4390(.A(n_1444), .Z(n_3308));
notech_inv i_4391(.A(n_1445), .Z(n_3309));
notech_inv i_4392(.A(read), .Z(n_3310));
AWDP_DEC_36_0 i_1338(.O0({n_1329, n_1328, n_1327, n_1326, n_1325, n_1324
.Z(n_3232));
notech_inv i_4318(.A(n_377), .Z(n_3238));
notech_inv i_4319(.A(n_394), .Z(n_3239));
notech_inv i_4320(.A(n_388), .Z(n_3240));
notech_inv i_4321(.A(n_383), .Z(n_3241));
notech_inv i_4322(.A(n_400), .Z(n_3242));
notech_inv i_4323(.A(n_405), .Z(n_3243));
notech_inv i_4324(.A(n_406), .Z(n_3244));
notech_inv i_4325(.A(n_421), .Z(n_3245));
notech_inv i_4326(.A(output_m[7]), .Z(n_3246));
notech_inv i_4327(.A(output_m[6]), .Z(n_3247));
notech_inv i_4328(.A(output_m[5]), .Z(n_3248));
notech_inv i_4329(.A(output_m[4]), .Z(n_3249));
notech_inv i_4330(.A(output_m[3]), .Z(n_3250));
notech_inv i_4331(.A(output_m[2]), .Z(n_3251));
notech_inv i_4332(.A(output_m[1]), .Z(n_3252));
notech_inv i_4333(.A(output_m[0]), .Z(n_3253));
notech_inv i_4334(.A(output_l[7]), .Z(n_3254));
notech_inv i_4335(.A(output_l[6]), .Z(n_3255));
notech_inv i_4336(.A(output_l[5]), .Z(n_3256));
notech_inv i_4337(.A(output_l[4]), .Z(n_3257));
notech_inv i_4338(.A(output_l[3]), .Z(n_3258));
notech_inv i_4339(.A(output_l[2]), .Z(n_3259));
notech_inv i_4340(.A(output_l[1]), .Z(n_3260));
notech_inv i_4341(.A(output_l[0]), .Z(n_3261));
notech_inv i_4342(.A(status_latched), .Z(n_3262));
notech_inv i_4343(.A(n_1957), .Z(n_3263));
notech_inv i_4344(.A(n_1889), .Z(n_3264));
notech_inv i_4345(.A(n_1865), .Z(n_3265));
notech_inv i_4346(.A(n_1847), .Z(n_3266));
notech_inv i_4347(.A(counter_m[6]), .Z(n_3267));
notech_inv i_4348(.A(counter_m[5]), .Z(n_3268));
notech_inv i_4349(.A(counter_m[4]), .Z(n_3269));
notech_inv i_4350(.A(counter_m[3]), .Z(n_3270));
notech_inv i_4351(.A(counter_m[2]), .Z(n_3271));
notech_inv i_4352(.A(counter_m[1]), .Z(n_3272));
notech_inv i_4353(.A(counter_m[0]), .Z(n_3273));
notech_inv i_4354(.A(counter_l[6]), .Z(n_3274));
notech_inv i_4355(.A(counter_l[5]), .Z(n_3275));
notech_inv i_4356(.A(gate_sampled), .Z(n_3276));
notech_inv i_4357(.A(n_2316), .Z(n_3277));
notech_inv i_4358(.A(trigger_sampled), .Z(n_3278));
notech_inv i_4359(.A(gate_last), .Z(n_3279));
notech_inv i_4360(.A(mode[2]), .Z(n_3280));
notech_inv i_4361(.A(mode[0]), .Z(n_3281));
notech_inv i_4362(.A(clock_pulse), .Z(n_3282));
notech_inv i_4363(.A(clock_last), .Z(n_3283));
notech_inv i_4364(.A(counter[0]), .Z(n_3284));
notech_inv i_4365(.A(counter[1]), .Z(n_3285));
notech_inv i_4366(.A(counter[3]), .Z(n_3286));
notech_inv i_4367(.A(counter[9]), .Z(n_3287));
notech_inv i_4368(.A(counter[10]), .Z(n_3288));
notech_inv i_4369(.A(counter[13]), .Z(n_3289));
notech_inv i_4370(.A(counter[14]), .Z(n_3290));
notech_inv i_4371(.A(counter[15]), .Z(n_3291));
notech_inv i_4372(.A(set_control_mode), .Z(n_3292));
notech_inv i_4373(.A(write), .Z(n_3293));
notech_inv i_4374(.A(out), .Z(n_3294));
notech_inv i_4375(.A(n_1429), .Z(n_3295));
notech_inv i_4376(.A(n_1309), .Z(n_3296));
notech_inv i_4377(.A(n_1431), .Z(n_3297));
notech_inv i_4378(.A(n_1311), .Z(n_3298));
notech_inv i_4379(.A(n_1315), .Z(n_3299));
notech_inv i_4380(.A(n_1317), .Z(n_3300));
notech_inv i_4381(.A(n_1435), .Z(n_3301));
notech_inv i_4382(.A(n_1319), .Z(n_3302));
notech_inv i_4383(.A(n_1436), .Z(n_3303));
notech_inv i_4384(.A(n_1438), .Z(n_3304));
notech_inv i_4385(.A(n_1439), .Z(n_3305));
notech_inv i_4386(.A(n_1440), .Z(n_3306));
notech_inv i_4387(.A(n_1441), .Z(n_3307));
notech_inv i_4388(.A(n_1442), .Z(n_3308));
notech_inv i_4389(.A(n_1443), .Z(n_3309));
notech_inv i_4390(.A(n_1444), .Z(n_3310));
notech_inv i_4391(.A(n_1445), .Z(n_3311));
notech_inv i_4392(.A(read), .Z(n_3312));
AWDP_DEC_27_0 i_1338(.O0({n_1329, n_1328, n_1327, n_1326, n_1325, n_1324
, n_1323, n_1322, n_1321, n_1319, n_1317, n_1315, n_1313, n_1311
, n_1309, n_1307}), .counter(counter));
AWDP_SUB_39_0 i_1332(.O0({n_1445, n_1444, n_1443, n_1442, n_1441, n_1440
10050,7 → 10056,7
, n_1439, n_1438, n_1437, n_1436, n_1435, n_1434, n_1433, n_1431
, n_1429, n_1427}), .counter(counter));
endmodule
module AWDP_DEC_36_1(O0, counter);
module AWDP_DEC_27_1(O0, counter);
 
output [15:0] O0;
input [15:0] counter;
10061,48 → 10067,48
notech_ha2 i_16(.A(n_96), .B(n_126), .Z(O0[15]));
notech_inv i_1(.A(counter[0]), .Z(O0[0]));
notech_inv i_0(.A(counter[15]), .Z(n_96));
notech_xor2 i_37(.A(counter[14]), .B(n_124), .Z(n_6418));
notech_inv i_38(.A(n_6418), .Z(O0[14]));
notech_xor2 i_37(.A(counter[14]), .B(n_124), .Z(n_6436));
notech_inv i_38(.A(n_6436), .Z(O0[14]));
notech_or2 i_36(.A(counter[14]), .B(n_124), .Z(n_126));
notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_6445));
notech_inv i_33(.A(n_6445), .Z(O0[13]));
notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_6463));
notech_inv i_33(.A(n_6463), .Z(O0[13]));
notech_or2 i_31(.A(counter[13]), .B(n_122), .Z(n_124));
notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_6472));
notech_inv i_314065(.A(n_6472), .Z(O0[12]));
notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_6490));
notech_inv i_314120(.A(n_6490), .Z(O0[12]));
notech_or2 i_29(.A(counter[12]), .B(n_120), .Z(n_122));
notech_xor2 i_294066(.A(counter[11]), .B(n_118), .Z(n_6499));
notech_inv i_304067(.A(n_6499), .Z(O0[11]));
notech_xor2 i_294121(.A(counter[11]), .B(n_118), .Z(n_6517));
notech_inv i_304122(.A(n_6517), .Z(O0[11]));
notech_or2 i_28(.A(counter[11]), .B(n_118), .Z(n_120));
notech_xor2 i_284068(.A(counter[10]), .B(n_116), .Z(n_6526));
notech_inv i_294069(.A(n_6526), .Z(O0[10]));
notech_xor2 i_284123(.A(counter[10]), .B(n_116), .Z(n_6544));
notech_inv i_294124(.A(n_6544), .Z(O0[10]));
notech_or2 i_27(.A(counter[10]), .B(n_116), .Z(n_118));
notech_xor2 i_274070(.A(counter[9]), .B(n_114), .Z(n_6553));
notech_inv i_284071(.A(n_6553), .Z(O0[9]));
notech_xor2 i_274125(.A(counter[9]), .B(n_114), .Z(n_6571));
notech_inv i_284126(.A(n_6571), .Z(O0[9]));
notech_or2 i_26(.A(counter[9]), .B(n_114), .Z(n_116));
notech_xor2 i_274072(.A(counter[8]), .B(n_112), .Z(n_6580));
notech_inv i_284073(.A(n_6580), .Z(O0[8]));
notech_or2 i_264074(.A(counter[8]), .B(n_112), .Z(n_114));
notech_xor2 i_274075(.A(counter[7]), .B(n_110), .Z(n_6607));
notech_inv i_284076(.A(n_6607), .Z(O0[7]));
notech_or2 i_264077(.A(counter[7]), .B(n_110), .Z(n_112));
notech_xor2 i_274078(.A(counter[6]), .B(n_108), .Z(n_6634));
notech_inv i_284079(.A(n_6634), .Z(O0[6]));
notech_or2 i_264080(.A(counter[6]), .B(n_108), .Z(n_110));
notech_xor2 i_274081(.A(counter[5]), .B(n_106), .Z(n_6661));
notech_inv i_284082(.A(n_6661), .Z(O0[5]));
notech_or2 i_264083(.A(counter[5]), .B(n_106), .Z(n_108));
notech_xor2 i_274084(.A(counter[4]), .B(n_104), .Z(n_6688));
notech_inv i_284085(.A(n_6688), .Z(O0[4]));
notech_or2 i_264086(.A(counter[4]), .B(n_104), .Z(n_106));
notech_xor2 i_274087(.A(counter[3]), .B(n_102), .Z(n_6715));
notech_inv i_284088(.A(n_6715), .Z(O0[3]));
notech_or2 i_264089(.A(counter[3]), .B(n_102), .Z(n_104));
notech_xor2 i_274090(.A(counter[2]), .B(n_100), .Z(n_6742));
notech_inv i_284091(.A(n_6742), .Z(O0[2]));
notech_or2 i_264092(.A(counter[2]), .B(n_100), .Z(n_102));
notech_xor2 i_274093(.A(counter[1]), .B(counter[0]), .Z(n_6770));
notech_inv i_284094(.A(n_6770), .Z(O0[1]));
notech_or2 i_264095(.A(counter[1]), .B(counter[0]), .Z(n_100));
notech_xor2 i_274127(.A(counter[8]), .B(n_112), .Z(n_6598));
notech_inv i_284128(.A(n_6598), .Z(O0[8]));
notech_or2 i_264129(.A(counter[8]), .B(n_112), .Z(n_114));
notech_xor2 i_274130(.A(counter[7]), .B(n_110), .Z(n_6625));
notech_inv i_284131(.A(n_6625), .Z(O0[7]));
notech_or2 i_264132(.A(counter[7]), .B(n_110), .Z(n_112));
notech_xor2 i_274133(.A(counter[6]), .B(n_108), .Z(n_6652));
notech_inv i_284134(.A(n_6652), .Z(O0[6]));
notech_or2 i_264135(.A(counter[6]), .B(n_108), .Z(n_110));
notech_xor2 i_274136(.A(counter[5]), .B(n_106), .Z(n_6679));
notech_inv i_284137(.A(n_6679), .Z(O0[5]));
notech_or2 i_264138(.A(counter[5]), .B(n_106), .Z(n_108));
notech_xor2 i_274139(.A(counter[4]), .B(n_104), .Z(n_6706));
notech_inv i_284140(.A(n_6706), .Z(O0[4]));
notech_or2 i_264141(.A(counter[4]), .B(n_104), .Z(n_106));
notech_xor2 i_274142(.A(counter[3]), .B(n_102), .Z(n_6733));
notech_inv i_284143(.A(n_6733), .Z(O0[3]));
notech_or2 i_264144(.A(counter[3]), .B(n_102), .Z(n_104));
notech_xor2 i_274145(.A(counter[2]), .B(n_100), .Z(n_6760));
notech_inv i_284146(.A(n_6760), .Z(O0[2]));
notech_or2 i_264147(.A(counter[2]), .B(n_100), .Z(n_102));
notech_xor2 i_274148(.A(counter[1]), .B(counter[0]), .Z(n_6788));
notech_inv i_284149(.A(n_6788), .Z(O0[1]));
notech_or2 i_264150(.A(counter[1]), .B(counter[0]), .Z(n_100));
endmodule
module AWDP_SUB_39_1(O0, counter);
 
10146,45 → 10152,45
notech_ha2 i_15(.A(n_96), .B(n_124), .Z(O0[15]));
notech_inv i_1(.A(\counter[1] ), .Z(O0[1]));
notech_inv i_0(.A(\counter[15] ), .Z(n_96));
notech_xor2 i_37(.A(\counter[14] ), .B(n_122), .Z(n_6797));
notech_inv i_38(.A(n_6797), .Z(O0[14]));
notech_xor2 i_37(.A(\counter[14] ), .B(n_122), .Z(n_6815));
notech_inv i_38(.A(n_6815), .Z(O0[14]));
notech_or2 i_36(.A(\counter[14] ), .B(n_122), .Z(n_124));
notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_6824));
notech_inv i_32(.A(n_6824), .Z(O0[13]));
notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_6842));
notech_inv i_32(.A(n_6842), .Z(O0[13]));
notech_or2 i_30(.A(\counter[13] ), .B(n_120), .Z(n_122));
notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_6851));
notech_inv i_304096(.A(n_6851), .Z(O0[12]));
notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_6869));
notech_inv i_304151(.A(n_6869), .Z(O0[12]));
notech_or2 i_28(.A(\counter[12] ), .B(n_118), .Z(n_120));
notech_xor2 i_284097(.A(\counter[11] ), .B(n_116), .Z(n_6878));
notech_inv i_294098(.A(n_6878), .Z(O0[11]));
notech_xor2 i_284152(.A(\counter[11] ), .B(n_116), .Z(n_6896));
notech_inv i_294153(.A(n_6896), .Z(O0[11]));
notech_or2 i_27(.A(\counter[11] ), .B(n_116), .Z(n_118));
notech_xor2 i_274099(.A(\counter[10] ), .B(n_114), .Z(n_6905));
notech_inv i_284100(.A(n_6905), .Z(O0[10]));
notech_xor2 i_274154(.A(\counter[10] ), .B(n_114), .Z(n_6923));
notech_inv i_284155(.A(n_6923), .Z(O0[10]));
notech_or2 i_26(.A(\counter[10] ), .B(n_114), .Z(n_116));
notech_xor2 i_274101(.A(\counter[9] ), .B(n_112), .Z(n_6932));
notech_inv i_284102(.A(n_6932), .Z(O0[9]));
notech_or2 i_264103(.A(\counter[9] ), .B(n_112), .Z(n_114));
notech_xor2 i_274104(.A(\counter[8] ), .B(n_110), .Z(n_6959));
notech_inv i_284105(.A(n_6959), .Z(O0[8]));
notech_or2 i_264106(.A(\counter[8] ), .B(n_110), .Z(n_112));
notech_xor2 i_274107(.A(\counter[7] ), .B(n_108), .Z(n_6986));
notech_inv i_284108(.A(n_6986), .Z(O0[7]));
notech_or2 i_264109(.A(\counter[7] ), .B(n_108), .Z(n_110));
notech_xor2 i_274110(.A(\counter[6] ), .B(n_106), .Z(n_7013));
notech_inv i_284111(.A(n_7013), .Z(O0[6]));
notech_or2 i_264112(.A(\counter[6] ), .B(n_106), .Z(n_108));
notech_xor2 i_274113(.A(\counter[5] ), .B(n_104), .Z(n_7040));
notech_inv i_284114(.A(n_7040), .Z(O0[5]));
notech_or2 i_264115(.A(\counter[5] ), .B(n_104), .Z(n_106));
notech_xor2 i_274116(.A(\counter[4] ), .B(n_102), .Z(n_7067));
notech_inv i_284117(.A(n_7067), .Z(O0[4]));
notech_or2 i_264118(.A(\counter[4] ), .B(n_102), .Z(n_104));
notech_xor2 i_274119(.A(\counter[3] ), .B(n_100), .Z(n_7094));
notech_inv i_284120(.A(n_7094), .Z(O0[3]));
notech_or2 i_264121(.A(\counter[3] ), .B(n_100), .Z(n_102));
notech_xor2 i_274122(.A(\counter[2] ), .B(\counter[1] ), .Z(n_7122));
notech_inv i_284123(.A(n_7122), .Z(O0[2]));
notech_or2 i_264124(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100));
notech_xor2 i_274156(.A(\counter[9] ), .B(n_112), .Z(n_6950));
notech_inv i_284157(.A(n_6950), .Z(O0[9]));
notech_or2 i_264158(.A(\counter[9] ), .B(n_112), .Z(n_114));
notech_xor2 i_274159(.A(\counter[8] ), .B(n_110), .Z(n_6977));
notech_inv i_284160(.A(n_6977), .Z(O0[8]));
notech_or2 i_264161(.A(\counter[8] ), .B(n_110), .Z(n_112));
notech_xor2 i_274162(.A(\counter[7] ), .B(n_108), .Z(n_7004));
notech_inv i_284163(.A(n_7004), .Z(O0[7]));
notech_or2 i_264164(.A(\counter[7] ), .B(n_108), .Z(n_110));
notech_xor2 i_274165(.A(\counter[6] ), .B(n_106), .Z(n_7031));
notech_inv i_284166(.A(n_7031), .Z(O0[6]));
notech_or2 i_264167(.A(\counter[6] ), .B(n_106), .Z(n_108));
notech_xor2 i_274168(.A(\counter[5] ), .B(n_104), .Z(n_7058));
notech_inv i_284169(.A(n_7058), .Z(O0[5]));
notech_or2 i_264170(.A(\counter[5] ), .B(n_104), .Z(n_106));
notech_xor2 i_274171(.A(\counter[4] ), .B(n_102), .Z(n_7085));
notech_inv i_284172(.A(n_7085), .Z(O0[4]));
notech_or2 i_264173(.A(\counter[4] ), .B(n_102), .Z(n_104));
notech_xor2 i_274174(.A(\counter[3] ), .B(n_100), .Z(n_7112));
notech_inv i_284175(.A(n_7112), .Z(O0[3]));
notech_or2 i_264176(.A(\counter[3] ), .B(n_100), .Z(n_102));
notech_xor2 i_274177(.A(\counter[2] ), .B(\counter[1] ), .Z(n_7140));
notech_inv i_284178(.A(n_7140), .Z(O0[2]));
notech_or2 i_264179(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100));
endmodule
module v8253_counter_1(clk, rst_n, clock, gate, out, data_in, set_control_mode, latch_count
, latch_status, write, read, data_out);
10213,44 → 10219,44
 
 
 
notech_inv i_1376(.A(n_8233), .Z(n_8240));
notech_inv i_1375(.A(n_8233), .Z(n_8239));
notech_inv i_1374(.A(n_8233), .Z(n_8238));
notech_inv i_1372(.A(n_8233), .Z(n_8236));
notech_inv i_1371(.A(n_8233), .Z(n_8235));
notech_inv i_1370(.A(n_8233), .Z(n_8234));
notech_inv i_1369(.A(clk), .Z(n_8233));
notech_inv i_1288(.A(n_8137), .Z(n_8144));
notech_inv i_1287(.A(n_8137), .Z(n_8143));
notech_inv i_1286(.A(n_8137), .Z(n_8142));
notech_inv i_1284(.A(n_8137), .Z(n_8140));
notech_inv i_1283(.A(n_8137), .Z(n_8139));
notech_inv i_1282(.A(n_8137), .Z(n_8138));
notech_inv i_1281(.A(rst_n), .Z(n_8137));
notech_inv i_116(.A(n_7903), .Z(n_7904));
notech_inv i_115(.A(n_2772), .Z(n_7903));
notech_inv i_40(.A(n_7867), .Z(n_7868));
notech_inv i_39(.A(n_2721), .Z(n_7867));
notech_inv i_1363(.A(n_8227), .Z(n_8234));
notech_inv i_1362(.A(n_8227), .Z(n_8233));
notech_inv i_1361(.A(n_8227), .Z(n_8232));
notech_inv i_1359(.A(n_8227), .Z(n_8230));
notech_inv i_1358(.A(n_8227), .Z(n_8229));
notech_inv i_1357(.A(n_8227), .Z(n_8228));
notech_inv i_1356(.A(clk), .Z(n_8227));
notech_inv i_1288(.A(n_8144), .Z(n_8151));
notech_inv i_1287(.A(n_8144), .Z(n_8150));
notech_inv i_1286(.A(n_8144), .Z(n_8149));
notech_inv i_1284(.A(n_8144), .Z(n_8147));
notech_inv i_1283(.A(n_8144), .Z(n_8146));
notech_inv i_1282(.A(n_8144), .Z(n_8145));
notech_inv i_1281(.A(rst_n), .Z(n_8144));
notech_inv i_117(.A(n_7921), .Z(n_7922));
notech_inv i_116(.A(n_2774), .Z(n_7921));
notech_inv i_40(.A(n_7885), .Z(n_7886));
notech_inv i_39(.A(n_2723), .Z(n_7885));
notech_nao3 i_101(.A(n_406), .B(n_1326), .C(n_409), .Z(n_271));
notech_nao3 i_95(.A(n_406), .B(n_1327), .C(n_409), .Z(n_265));
notech_nao3 i_89(.A(n_406), .B(n_1328), .C(n_409), .Z(n_260));
notech_nao3 i_83(.A(n_406), .B(n_1329), .C(n_409), .Z(n_255));
notech_nand2 i_85(.A(counter_m[7]), .B(n_400), .Z(n_252));
notech_and2 i_11976(.A(data_in[0]), .B(n_2772), .Z(n_250));
notech_and2 i_21977(.A(data_in[1]), .B(n_2772), .Z(n_249));
notech_and2 i_31978(.A(data_in[2]), .B(n_2772), .Z(n_248));
notech_and2 i_41979(.A(data_in[3]), .B(n_2772), .Z(n_247));
notech_and2 i_51980(.A(data_in[4]), .B(n_2772), .Z(n_246));
notech_and2 i_61981(.A(data_in[5]), .B(n_2772), .Z(n_245));
notech_and2 i_71982(.A(data_in[6]), .B(n_2772), .Z(n_244));
notech_and2 i_81983(.A(data_in[7]), .B(n_2772), .Z(n_243));
notech_nand2 i_233(.A(clock), .B(n_2763), .Z(n_242));
notech_and2 i_1450(.A(n_2772), .B(n_464), .Z(n_241));
notech_nao3 i_76(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .Z(n_236));
notech_and2 i_12019(.A(data_in[0]), .B(n_2774), .Z(n_250));
notech_and2 i_22020(.A(data_in[1]), .B(n_2774), .Z(n_249));
notech_and2 i_32021(.A(data_in[2]), .B(n_2774), .Z(n_248));
notech_and2 i_42022(.A(data_in[3]), .B(n_2774), .Z(n_247));
notech_and2 i_52023(.A(data_in[4]), .B(n_2774), .Z(n_246));
notech_and2 i_62024(.A(data_in[5]), .B(n_2774), .Z(n_245));
notech_and2 i_72025(.A(data_in[6]), .B(n_2774), .Z(n_244));
notech_and2 i_82026(.A(data_in[7]), .B(n_2774), .Z(n_243));
notech_nand2 i_236(.A(clock), .B(n_2765), .Z(n_242));
notech_and2 i_1450(.A(n_2774), .B(n_464), .Z(n_241));
notech_nao3 i_78(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .Z(n_238));
notech_and4 i_79(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .D(write
), .Z(n_235));
notech_nao3 i_74(.A(rw_mode[1]), .B(write), .C(rw_mode[0]), .Z(n_234));
notech_nand2 i_73(.A(read), .B(n_171), .Z(n_233));
), .Z(n_237));
notech_nao3 i_76(.A(rw_mode[1]), .B(write), .C(rw_mode[0]), .Z(n_236));
notech_nand2 i_75(.A(read), .B(n_173), .Z(n_235));
notech_nand2 i_215(.A(rw_mode[0]), .B(n_344), .Z(n_232));
notech_nand2 i_214(.A(status[7]), .B(status_latched), .Z(n_231));
notech_nand2 i_211(.A(status[6]), .B(status_latched), .Z(n_230));
10261,11 → 10267,11
notech_nand2 i_196(.A(status[1]), .B(status_latched), .Z(n_225));
notech_nand2 i_193(.A(status_latched), .B(status[0]), .Z(n_224));
notech_and2 i_15(.A(n_368), .B(n_366), .Z(n_223));
notech_and4 i_68(.A(n_370), .B(n_358), .C(n_2758), .D(n_364), .Z(n_220)
notech_and4 i_68(.A(n_370), .B(n_358), .C(n_2760), .D(n_364), .Z(n_220)
);
notech_nao3 i_185(.A(written), .B(clock_pulse), .C(n_220), .Z(n_219));
notech_and3 i_67(.A(n_323), .B(n_203), .C(n_322), .Z(n_218));
notech_ao4 i_66(.A(n_373), .B(n_368), .C(n_372), .D(n_2762), .Z(n_217)
notech_ao4 i_66(.A(n_373), .B(n_368), .C(n_372), .D(n_2764), .Z(n_217)
);
notech_or4 i_182(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(msb_write), .Z
(n_216));
10274,35 → 10280,35
notech_or2 i_72(.A(data_in[1]), .B(data_in[3]), .Z(n_211));
notech_nand2 i_177(.A(set_control_mode), .B(n_211), .Z(n_210));
notech_nor2 i_176(.A(written), .B(n_319), .Z(n_209));
notech_ao4 i_175(.A(n_390), .B(n_389), .C(counter_l[0]), .D(n_2742), .Z(n_207
notech_ao4 i_175(.A(n_390), .B(n_389), .C(counter_l[0]), .D(n_2744), .Z(n_207
));
notech_ao4 i_174(.A(mode[1]), .B(n_365), .C(n_207), .D(n_370), .Z(n_205)
);
notech_or4 i_38(.A(n_388), .B(n_377), .C(n_370), .D(n_390), .Z(n_203));
notech_ao4 i_164(.A(n_205), .B(n_2721), .C(n_174), .D(n_401), .Z(n_200)
notech_ao4 i_164(.A(n_205), .B(n_2723), .C(n_172), .D(n_401), .Z(n_200)
);
notech_or2 i_69(.A(n_200), .B(n_318), .Z(n_199));
notech_and3 i_158(.A(n_406), .B(n_1427), .C(n_2722), .Z(n_198));
notech_or2 i_65(.A(n_1307), .B(n_2723), .Z(n_197));
notech_and3 i_158(.A(n_406), .B(n_1427), .C(n_2724), .Z(n_198));
notech_or2 i_65(.A(n_1307), .B(n_2725), .Z(n_197));
notech_nand2 i_155(.A(counter_l[1]), .B(n_400), .Z(n_196));
notech_nand2 i_152(.A(counter_l[2]), .B(n_400), .Z(n_195));
notech_nor2 i_64(.A(n_1313), .B(n_2723), .Z(n_194));
notech_nor2 i_63(.A(n_1433), .B(n_2723), .Z(n_193));
notech_nor2 i_64(.A(n_1313), .B(n_2725), .Z(n_194));
notech_nor2 i_63(.A(n_1433), .B(n_2725), .Z(n_193));
notech_xor2 i_62(.A(counter[4]), .B(counter[5]), .Z(n_191));
notech_xor2 i_61(.A(counter[6]), .B(n_384), .Z(n_189));
notech_xor2 i_60(.A(counter[8]), .B(counter[9]), .Z(n_187));
notech_xor2 i_59(.A(counter[10]), .B(n_382), .Z(n_185));
notech_xor2 i_58(.A(counter[11]), .B(n_2720), .Z(n_182));
notech_xor2 i_58(.A(counter[11]), .B(n_2722), .Z(n_182));
notech_and2 i_42(.A(n_438), .B(n_425), .Z(n_180));
notech_xor2 i_57(.A(counter[12]), .B(counter[13]), .Z(n_179));
notech_xor2 i_56(.A(counter[14]), .B(n_378), .Z(n_177));
notech_nand2 i_86(.A(counter[15]), .B(n_379), .Z(n_176));
notech_and2 i_80(.A(n_344), .B(write), .Z(n_175));
notech_and3 i_47(.A(n_363), .B(n_362), .C(n_368), .Z(n_174));
notech_and4 i_54(.A(n_370), .B(n_362), .C(n_366), .D(n_363), .Z(n_173)
notech_nand3 i_77(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_174));
notech_nao3 i_47(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_173)
);
notech_nand3 i_75(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_172));
notech_nao3 i_48(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_171)
notech_and3 i_48(.A(n_363), .B(n_362), .C(n_368), .Z(n_172));
notech_and4 i_54(.A(n_370), .B(n_362), .C(n_366), .D(n_363), .Z(n_171)
);
notech_ao3 i_71(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .Z(n_170)
);
10309,568 → 10315,568
notech_ao4 i_70(.A(n_373), .B(n_223), .C(n_374), .D(n_214), .Z(n_169));
notech_or4 i_19(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(n_209), .Z(n_168
));
notech_or2 i_226(.A(n_170), .B(n_2773), .Z(n_167));
notech_or2 i_229(.A(n_170), .B(n_2775), .Z(n_167));
notech_nao3 i_105(.A(counter[11]), .B(n_421), .C(n_417), .Z(n_274));
notech_nand3 i_106(.A(n_2721), .B(n_2724), .C(n_182), .Z(n_275));
notech_nand3 i_106(.A(n_2723), .B(n_2726), .C(n_182), .Z(n_275));
notech_nao3 i_107(.A(n_406), .B(n_1325), .C(n_409), .Z(n_276));
notech_nao3 i_114(.A(n_406), .B(n_1324), .C(n_409), .Z(n_281));
notech_nao3 i_120(.A(n_406), .B(n_1323), .C(n_409), .Z(n_286));
notech_nao3 i_124(.A(counter[8]), .B(n_421), .C(n_417), .Z(n_289));
notech_nao3 i_125(.A(n_2721), .B(n_2724), .C(counter[8]), .Z(n_290));
notech_nao3 i_125(.A(n_2723), .B(n_2726), .C(counter[8]), .Z(n_290));
notech_nao3 i_126(.A(n_406), .B(n_1322), .C(n_409), .Z(n_291));
notech_ao3 i_129(.A(counter[7]), .B(n_385), .C(n_417), .Z(n_293));
notech_ao3 i_130(.A(n_406), .B(n_1321), .C(n_409), .Z(n_294));
notech_and3 i_131(.A(n_406), .B(n_1437), .C(n_2722), .Z(n_295));
notech_and3 i_131(.A(n_406), .B(n_1437), .C(n_2724), .Z(n_295));
notech_nand2 i_146(.A(counter_l[4]), .B(n_400), .Z(n_304));
notech_and3 i_145(.A(n_406), .B(n_1434), .C(n_2722), .Z(n_307));
notech_and3 i_145(.A(n_406), .B(n_1434), .C(n_2724), .Z(n_307));
notech_nand2 i_149(.A(counter_l[3]), .B(n_400), .Z(n_308));
notech_nand3 i_156(.A(counter_l[0]), .B(n_400), .C(n_370), .Z(n_315));
notech_nand3 i_157(.A(n_405), .B(n_2721), .C(n_197), .Z(n_316));
notech_nand3 i_160(.A(n_168), .B(n_2772), .C(n_199), .Z(n_317));
notech_nand3 i_157(.A(n_405), .B(n_2723), .C(n_197), .Z(n_316));
notech_nand3 i_160(.A(n_168), .B(n_2774), .C(n_199), .Z(n_317));
notech_and3 i_163(.A(n_203), .B(n_366), .C(n_394), .Z(n_318));
notech_nor2 i_18(.A(msb_write), .B(n_359), .Z(n_319));
notech_nao3 i_188(.A(n_390), .B(n_2718), .C(n_370), .Z(n_322));
notech_or4 i_189(.A(n_393), .B(n_2764), .C(counter[1]), .D(n_362), .Z(n_323
notech_nao3 i_188(.A(n_390), .B(n_2720), .C(n_370), .Z(n_322));
notech_or4 i_189(.A(n_393), .B(n_2766), .C(counter[1]), .D(n_362), .Z(n_323
));
notech_and2 i_1578(.A(latch_count), .B(n_2772), .Z(n_326));
notech_nand2 i_2135(.A(latch_status), .B(n_2741), .Z(n_327));
notech_nand2 i_42884(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_344));
notech_nand2 i_03979(.A(n_232), .B(n_171), .Z(n_345));
notech_nand2 i_3(.A(n_345), .B(n_2741), .Z(n_346));
notech_nand3 i_1(.A(n_232), .B(n_171), .C(n_2741), .Z(n_347));
notech_ao4 i_376(.A(n_347), .B(n_2725), .C(n_346), .D(n_2733), .Z(n_348)
notech_and2 i_1578(.A(latch_count), .B(n_2774), .Z(n_326));
notech_nand2 i_2138(.A(latch_status), .B(n_2743), .Z(n_327));
notech_nand2 i_42927(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_344));
notech_nand2 i_04033(.A(n_232), .B(n_173), .Z(n_345));
notech_nand2 i_3(.A(n_345), .B(n_2743), .Z(n_346));
notech_nand3 i_1(.A(n_232), .B(n_173), .C(n_2743), .Z(n_347));
notech_ao4 i_373(.A(n_347), .B(n_2727), .C(n_346), .D(n_2735), .Z(n_348)
);
notech_ao4 i_375(.A(n_347), .B(n_2726), .C(n_346), .D(n_2734), .Z(n_349)
notech_ao4 i_372(.A(n_347), .B(n_2728), .C(n_346), .D(n_2736), .Z(n_349)
);
notech_ao4 i_374(.A(n_347), .B(n_2727), .C(n_346), .D(n_2735), .Z(n_350)
notech_ao4 i_371(.A(n_347), .B(n_2729), .C(n_346), .D(n_2737), .Z(n_350)
);
notech_ao4 i_373(.A(n_347), .B(n_2728), .C(n_346), .D(n_2736), .Z(n_351)
notech_ao4 i_370(.A(n_347), .B(n_2730), .C(n_346), .D(n_2738), .Z(n_351)
);
notech_ao4 i_372(.A(n_347), .B(n_2729), .C(n_346), .D(n_2737), .Z(n_352)
notech_ao4 i_369(.A(n_347), .B(n_2731), .C(n_346), .D(n_2739), .Z(n_352)
);
notech_ao4 i_371(.A(n_347), .B(n_2730), .C(n_346), .D(n_2738), .Z(n_353)
notech_ao4 i_368(.A(n_347), .B(n_2732), .C(n_346), .D(n_2740), .Z(n_353)
);
notech_ao4 i_370(.A(n_347), .B(n_2731), .C(n_346), .D(n_2739), .Z(n_354)
notech_ao4 i_367(.A(n_347), .B(n_2733), .C(n_346), .D(n_2741), .Z(n_354)
);
notech_ao4 i_369(.A(n_347), .B(n_2732), .C(n_346), .D(n_2740), .Z(n_355)
notech_ao4 i_366(.A(n_347), .B(n_2734), .C(n_346), .D(n_2742), .Z(n_355)
);
notech_nao3 i_62891(.A(n_2760), .B(n_2761), .C(mode[1]), .Z(n_358));
notech_nao3 i_62932(.A(n_2762), .B(n_2763), .C(mode[1]), .Z(n_358));
notech_nand3 i_13(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_359)
);
notech_nand2 i_32900(.A(mode[1]), .B(n_2761), .Z(n_362));
notech_nand2 i_354(.A(mode[2]), .B(n_2761), .Z(n_363));
notech_nand2 i_32942(.A(mode[1]), .B(n_2763), .Z(n_362));
notech_nand2 i_351(.A(mode[2]), .B(n_2763), .Z(n_363));
notech_and2 i_16(.A(n_363), .B(n_362), .Z(n_364));
notech_nand2 i_355(.A(mode[0]), .B(n_2760), .Z(n_365));
notech_nao3 i_62896(.A(mode[0]), .B(n_2760), .C(mode[1]), .Z(n_366));
notech_nao3 i_82914(.A(mode[2]), .B(mode[0]), .C(mode[1]), .Z(n_368));
notech_nand2 i_42903(.A(mode[1]), .B(mode[0]), .Z(n_370));
notech_nand2 i_352(.A(mode[0]), .B(n_2762), .Z(n_365));
notech_nao3 i_62937(.A(mode[0]), .B(n_2762), .C(mode[1]), .Z(n_366));
notech_nao3 i_82955(.A(mode[2]), .B(mode[0]), .C(mode[1]), .Z(n_368));
notech_nand2 i_42945(.A(mode[1]), .B(mode[0]), .Z(n_370));
notech_and2 i_37(.A(n_370), .B(n_362), .Z(n_372));
notech_nand2 i_33(.A(loaded), .B(clock_pulse), .Z(n_373));
notech_nand3 i_36(.A(loaded), .B(clock_pulse), .C(gate_sampled), .Z(n_374
));
notech_or4 i_82946(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(counter
notech_or4 i_82988(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(counter
[0]), .Z(n_377));
notech_or2 i_6(.A(counter[12]), .B(counter[13]), .Z(n_378));
notech_nao3 i_25(.A(n_2769), .B(n_2770), .C(counter[12]), .Z(n_379));
notech_nao3 i_25(.A(n_2771), .B(n_2772), .C(counter[12]), .Z(n_379));
notech_or2 i_7(.A(counter[8]), .B(counter[9]), .Z(n_382));
notech_nao3 i_252941(.A(n_2767), .B(n_2768), .C(counter[8]), .Z(n_383)
notech_nao3 i_252983(.A(n_2769), .B(n_2770), .C(counter[8]), .Z(n_383)
);
notech_or2 i_8(.A(counter[4]), .B(counter[5]), .Z(n_384));
notech_or2 i_252956(.A(counter[6]), .B(n_384), .Z(n_385));
notech_or2 i_252998(.A(counter[6]), .B(n_384), .Z(n_385));
notech_or4 i_17(.A(n_385), .B(counter[7]), .C(counter[11]), .D(n_383), .Z
(n_387));
notech_or4 i_50(.A(n_387), .B(counter[14]), .C(n_378), .D(counter[15]),
.Z(n_388));
notech_or2 i_343022(.A(n_377), .B(n_388), .Z(n_389));
notech_or2 i_343064(.A(n_377), .B(n_388), .Z(n_389));
notech_nand2 i_4(.A(counter_l[0]), .B(n_1268), .Z(n_390));
notech_nao3 i_360(.A(n_2719), .B(n_2766), .C(counter[2]), .Z(n_393));
notech_nao3 i_342986(.A(counter[1]), .B(n_2764), .C(n_393), .Z(n_394));
notech_ao4 i_350(.A(n_218), .B(n_374), .C(n_217), .D(n_2758), .Z(n_399)
notech_nao3 i_357(.A(n_2721), .B(n_2768), .C(counter[2]), .Z(n_393));
notech_nao3 i_343028(.A(counter[1]), .B(n_2766), .C(n_393), .Z(n_394));
notech_ao4 i_347(.A(n_218), .B(n_374), .C(n_217), .D(n_2760), .Z(n_399)
);
notech_nand2 i_2130(.A(n_399), .B(n_219), .Z(n_400));
notech_or2 i_262(.A(n_169), .B(n_400), .Z(n_401));
notech_or4 i_345(.A(n_393), .B(n_401), .C(counter[1]), .D(n_2764), .Z(n_402
notech_nand2 i_2133(.A(n_399), .B(n_219), .Z(n_400));
notech_or2 i_265(.A(n_169), .B(n_400), .Z(n_401));
notech_or4 i_342(.A(n_393), .B(n_401), .C(counter[1]), .D(n_2766), .Z(n_402
));
notech_or4 i_34(.A(counter[0]), .B(n_393), .C(n_401), .D(n_2765), .Z(n_403
notech_or4 i_34(.A(counter[0]), .B(n_393), .C(n_401), .D(n_2767), .Z(n_403
));
notech_or4 i_251(.A(n_370), .B(n_373), .C(n_400), .D(n_2756), .Z(n_405)
notech_or4 i_254(.A(n_370), .B(n_373), .C(n_400), .D(n_2758), .Z(n_405)
);
notech_nand2 i_266(.A(bcd), .B(n_2717), .Z(n_406));
notech_nand2 i_27(.A(n_406), .B(n_2722), .Z(n_407));
notech_nand2 i_14(.A(n_405), .B(n_2721), .Z(n_409));
notech_nand3 i_28(.A(n_406), .B(n_405), .C(n_2721), .Z(n_411));
notech_ao4 i_337(.A(n_407), .B(n_2774), .C(n_411), .D(n_2775), .Z(n_412)
notech_nand2 i_269(.A(bcd), .B(n_2719), .Z(n_406));
notech_nand2 i_27(.A(n_406), .B(n_2724), .Z(n_407));
notech_nand2 i_14(.A(n_405), .B(n_2723), .Z(n_409));
notech_nand3 i_28(.A(n_406), .B(n_405), .C(n_2723), .Z(n_411));
notech_ao4 i_334(.A(n_407), .B(n_2776), .C(n_411), .D(n_2777), .Z(n_412)
);
notech_ao4 i_336(.A(n_407), .B(n_2776), .C(n_411), .D(n_2777), .Z(n_413)
notech_ao4 i_333(.A(n_407), .B(n_2778), .C(n_411), .D(n_2779), .Z(n_413)
);
notech_ao4 i_335(.A(n_194), .B(n_409), .C(n_193), .D(n_405), .Z(n_414)
notech_ao4 i_332(.A(n_194), .B(n_409), .C(n_193), .D(n_405), .Z(n_414)
);
notech_or2 i_264(.A(n_387), .B(n_406), .Z(n_415));
notech_nao3 i_32(.A(n_2723), .B(n_2721), .C(n_387), .Z(n_416));
notech_nand2 i_45(.A(n_2721), .B(n_2723), .Z(n_417));
notech_ao4 i_331(.A(n_411), .B(n_2778), .C(counter[4]), .D(n_417), .Z(n_418
notech_or2 i_267(.A(n_387), .B(n_406), .Z(n_415));
notech_nao3 i_32(.A(n_2725), .B(n_2723), .C(n_387), .Z(n_416));
notech_nand2 i_45(.A(n_2723), .B(n_2725), .Z(n_417));
notech_ao4 i_328(.A(n_411), .B(n_2780), .C(counter[4]), .D(n_417), .Z(n_418
));
notech_or4 i_265(.A(counter[6]), .B(counter[7]), .C(n_384), .D(n_406), .Z
notech_or4 i_268(.A(counter[6]), .B(counter[7]), .C(n_384), .D(n_406), .Z
(n_421));
notech_nao3 i_30(.A(n_387), .B(n_2721), .C(n_406), .Z(n_424));
notech_or2 i_31(.A(n_424), .B(n_2724), .Z(n_425));
notech_ao4 i_329(.A(n_411), .B(n_2779), .C(n_191), .D(n_425), .Z(n_426)
notech_nao3 i_30(.A(n_387), .B(n_2723), .C(n_406), .Z(n_424));
notech_or2 i_31(.A(n_424), .B(n_2726), .Z(n_425));
notech_ao4 i_326(.A(n_411), .B(n_2781), .C(n_191), .D(n_425), .Z(n_426)
);
notech_ao4 i_328(.A(n_2755), .B(n_2721), .C(n_407), .D(n_2780), .Z(n_427
notech_ao4 i_325(.A(n_2757), .B(n_2723), .C(n_407), .D(n_2782), .Z(n_427
));
notech_ao4 i_327(.A(n_411), .B(n_2781), .C(n_425), .D(n_189), .Z(n_428)
notech_ao4 i_324(.A(n_411), .B(n_2783), .C(n_425), .D(n_189), .Z(n_428)
);
notech_ao4 i_326(.A(n_2721), .B(n_2754), .C(n_407), .D(n_2782), .Z(n_429
notech_ao4 i_323(.A(n_2723), .B(n_2756), .C(n_407), .D(n_2784), .Z(n_429
));
notech_mux2 i_322(.S(n_400), .A(n_2724), .B(counter_l[7]), .Z(n_433));
notech_ao4 i_318(.A(n_2721), .B(n_2753), .C(n_407), .D(n_2783), .Z(n_437
notech_mux2 i_319(.S(n_400), .A(n_2726), .B(counter_l[7]), .Z(n_433));
notech_ao4 i_315(.A(n_2723), .B(n_2755), .C(n_407), .D(n_2785), .Z(n_437
));
notech_nand3 i_35(.A(n_415), .B(n_7868), .C(n_2724), .Z(n_438));
notech_ao4 i_316(.A(n_425), .B(n_2767), .C(n_187), .D(n_438), .Z(n_439)
notech_nand3 i_35(.A(n_415), .B(n_7886), .C(n_2726), .Z(n_438));
notech_ao4 i_313(.A(n_425), .B(n_2769), .C(n_187), .D(n_438), .Z(n_439)
);
notech_reg output_m_reg_7(.CP(n_8239), .D(n_2269), .CD(n_8143), .Q(output_m
notech_reg output_m_reg_7(.CP(n_8233), .D(n_2268), .CD(n_8150), .Q(output_m
[7]));
notech_mux2 i_2317(.S(output_latched), .A(counter[15]), .B(output_m[7]),
.Z(n_2269));
notech_ao4 i_315(.A(n_7868), .B(n_2752), .C(n_407), .D(n_2784), .Z(n_441
.Z(n_2268));
notech_ao4 i_312(.A(n_7886), .B(n_2754), .C(n_407), .D(n_2786), .Z(n_441
));
notech_reg output_m_reg_6(.CP(n_8239), .D(n_2275), .CD(n_8143), .Q(output_m
notech_reg output_m_reg_6(.CP(n_8233), .D(n_2274), .CD(n_8150), .Q(output_m
[6]));
notech_mux2 i_2325(.S(output_latched), .A(counter[14]), .B(output_m[6]),
.Z(n_2275));
notech_ao4 i_313(.A(n_425), .B(n_2768), .C(n_185), .D(n_438), .Z(n_442)
.Z(n_2274));
notech_ao4 i_310(.A(n_425), .B(n_2770), .C(n_185), .D(n_438), .Z(n_442)
);
notech_reg output_m_reg_5(.CP(n_8238), .D(n_2281), .CD(n_8142), .Q(output_m
notech_reg output_m_reg_5(.CP(n_8232), .D(n_2280), .CD(n_8149), .Q(output_m
[5]));
notech_mux2 i_2333(.S(output_latched), .A(counter[13]), .B(output_m[5]),
.Z(n_2281));
notech_reg output_m_reg_4(.CP(n_8238), .D(n_2287), .CD(n_8142), .Q(output_m
.Z(n_2280));
notech_reg output_m_reg_4(.CP(n_8232), .D(n_2286), .CD(n_8149), .Q(output_m
[4]));
notech_mux2 i_2341(.S(output_latched), .A(counter[12]), .B(output_m[4]),
.Z(n_2287));
notech_ao4 i_312(.A(n_7868), .B(n_2751), .C(n_407), .D(n_2785), .Z(n_444
.Z(n_2286));
notech_ao4 i_309(.A(n_7886), .B(n_2753), .C(n_407), .D(n_2787), .Z(n_444
));
notech_reg output_m_reg_3(.CP(n_8239), .D(n_2293), .CD(n_8143), .Q(output_m
notech_reg output_m_reg_3(.CP(n_8233), .D(n_2292), .CD(n_8150), .Q(output_m
[3]));
notech_mux2 i_2349(.S(output_latched), .A(counter[11]), .B(output_m[3]),
.Z(n_2293));
notech_reg output_m_reg_2(.CP(n_8239), .D(n_2299), .CD(n_8143), .Q(output_m
.Z(n_2292));
notech_reg output_m_reg_2(.CP(n_8233), .D(n_2299), .CD(n_8150), .Q(output_m
[2]));
notech_mux2 i_2357(.S(output_latched), .A(counter[10]), .B(output_m[2]),
.Z(n_2299));
notech_reg output_m_reg_1(.CP(n_8239), .D(n_2305), .CD(n_8143), .Q(output_m
notech_reg output_m_reg_1(.CP(n_8233), .D(n_2305), .CD(n_8150), .Q(output_m
[1]));
notech_mux2 i_2365(.S(output_latched), .A(counter[9]), .B(output_m[1]),
.Z(n_2305));
notech_reg output_m_reg_0(.CP(n_8239), .D(n_2311), .CD(n_8143), .Q(output_m
notech_reg output_m_reg_0(.CP(n_8233), .D(n_2311), .CD(n_8150), .Q(output_m
[0]));
notech_mux2 i_2373(.S(output_latched), .A(counter[8]), .B(output_m[0]),
.Z(n_2311));
notech_ao4 i_308(.A(n_7868), .B(n_2750), .C(n_407), .D(n_2786), .Z(n_448
notech_ao4 i_305(.A(n_7886), .B(n_2752), .C(n_407), .D(n_2788), .Z(n_448
));
notech_reg status_reg_7(.CP(n_8239), .D(n_2317), .CD(n_8143), .Q(status[
notech_reg status_reg_7(.CP(n_8233), .D(n_2318), .CD(n_8150), .Q(status[
7]));
notech_mux2 i_2381(.S(n_327), .A(n_1268), .B(status[7]), .Z(n_2317));
notech_mux2 i_306(.S(counter[12]), .A(n_416), .B(n_424), .Z(n_449));
notech_reg status_reg_6(.CP(n_8238), .D(n_2323), .CD(n_8142), .Q(status[
notech_mux2 i_2381(.S(n_327), .A(n_1268), .B(status[7]), .Z(n_2318));
notech_mux2 i_303(.S(counter[12]), .A(n_416), .B(n_424), .Z(n_449));
notech_reg status_reg_6(.CP(n_8232), .D(n_2326), .CD(n_8149), .Q(status[
6]));
notech_mux2 i_2389(.S(n_327), .A(null_counter), .B(status[6]), .Z(n_2323
notech_mux2 i_2389(.S(n_327), .A(null_counter), .B(status[6]), .Z(n_2326
));
notech_reg status_reg_5(.CP(n_8238), .D(n_2331), .CD(n_8142), .Q(status[
notech_reg status_reg_5(.CP(n_8232), .D(n_2333), .CD(n_8149), .Q(status[
5]));
notech_mux2 i_2397(.S(n_327), .A(rw_mode[1]), .B(status[5]), .Z(n_2331)
notech_mux2 i_2397(.S(n_327), .A(rw_mode[1]), .B(status[5]), .Z(n_2333)
);
notech_nao3 i_23(.A(bcd), .B(n_2719), .C(n_377), .Z(n_451));
notech_reg status_reg_4(.CP(n_8238), .D(n_2338), .CD(n_8142), .Q(status[
notech_nao3 i_23(.A(bcd), .B(n_2721), .C(n_377), .Z(n_451));
notech_reg status_reg_4(.CP(n_8232), .D(n_2340), .CD(n_8149), .Q(status[
4]));
notech_mux2 i_2405(.S(n_327), .A(rw_mode[0]), .B(status[4]), .Z(n_2338)
notech_mux2 i_2405(.S(n_327), .A(rw_mode[0]), .B(status[4]), .Z(n_2340)
);
notech_ao4 i_305(.A(n_7868), .B(n_2749), .C(n_407), .D(n_2787), .Z(n_452
notech_ao4 i_302(.A(n_7886), .B(n_2751), .C(n_407), .D(n_2789), .Z(n_452
));
notech_reg status_reg_3(.CP(n_8238), .D(n_2345), .CD(n_8142), .Q(status[
notech_reg status_reg_3(.CP(n_8232), .D(n_2347), .CD(n_8149), .Q(status[
3]));
notech_mux2 i_2413(.S(n_327), .A(mode[2]), .B(status[3]), .Z(n_2345));
notech_nao3 i_44(.A(n_451), .B(n_7868), .C(n_415), .Z(n_453));
notech_reg status_reg_2(.CP(n_8238), .D(n_2351), .CD(n_8142), .Q(status[
notech_mux2 i_2413(.S(n_327), .A(mode[2]), .B(status[3]), .Z(n_2347));
notech_nao3 i_44(.A(n_451), .B(n_7886), .C(n_415), .Z(n_453));
notech_reg status_reg_2(.CP(n_8232), .D(n_2353), .CD(n_8149), .Q(status[
2]));
notech_mux2 i_2421(.S(n_327), .A(mode[1]), .B(status[2]), .Z(n_2351));
notech_ao4 i_302(.A(n_180), .B(n_2769), .C(n_179), .D(n_453), .Z(n_454)
notech_mux2 i_2421(.S(n_327), .A(mode[1]), .B(status[2]), .Z(n_2353));
notech_ao4 i_299(.A(n_180), .B(n_2771), .C(n_179), .D(n_453), .Z(n_454)
);
notech_reg status_reg_1(.CP(n_8238), .D(n_2357), .CD(n_8142), .Q(status[
notech_reg status_reg_1(.CP(n_8232), .D(n_2359), .CD(n_8149), .Q(status[
1]));
notech_mux2 i_2429(.S(n_327), .A(mode[0]), .B(status[1]), .Z(n_2357));
notech_reg status_reg_0(.CP(n_8238), .D(n_2363), .CD(n_8142), .Q(status[
notech_mux2 i_2429(.S(n_327), .A(mode[0]), .B(status[1]), .Z(n_2359));
notech_reg status_reg_0(.CP(n_8232), .D(n_2365), .CD(n_8149), .Q(status[
0]));
notech_mux2 i_2437(.S(n_327), .A(bcd), .B(status[0]), .Z(n_2363));
notech_ao4 i_301(.A(n_7868), .B(n_2748), .C(n_407), .D(n_2788), .Z(n_456
notech_mux2 i_2437(.S(n_327), .A(bcd), .B(status[0]), .Z(n_2365));
notech_ao4 i_295(.A(n_7886), .B(n_2750), .C(n_407), .D(n_2790), .Z(n_456
));
notech_reg output_l_reg_7(.CP(n_8238), .D(n_2369), .CD(n_8142), .Q(output_l
notech_reg output_l_reg_7(.CP(n_8232), .D(n_2371), .CD(n_8149), .Q(output_l
[7]));
notech_mux2 i_2445(.S(output_latched), .A(counter[7]), .B(output_l[7]),
.Z(n_2369));
notech_ao4 i_296(.A(n_180), .B(n_2770), .C(n_453), .D(n_177), .Z(n_457)
.Z(n_2371));
notech_ao4 i_277(.A(n_180), .B(n_2772), .C(n_453), .D(n_177), .Z(n_457)
);
notech_reg output_l_reg_6(.CP(n_8238), .D(n_2375), .CD(n_8142), .Q(output_l
notech_reg output_l_reg_6(.CP(n_8232), .D(n_2377), .CD(n_8149), .Q(output_l
[6]));
notech_mux2 i_2453(.S(output_latched), .A(counter[6]), .B(output_l[6]),
.Z(n_2375));
notech_reg output_l_reg_5(.CP(n_8238), .D(n_2381), .CD(n_8142), .Q(output_l
.Z(n_2377));
notech_reg output_l_reg_5(.CP(n_8232), .D(n_2383), .CD(n_8149), .Q(output_l
[5]));
notech_mux2 i_2461(.S(output_latched), .A(counter[5]), .B(output_l[5]),
.Z(n_2381));
notech_ao4 i_292(.A(n_7868), .B(n_2747), .C(n_407), .D(n_2789), .Z(n_459
.Z(n_2383));
notech_ao4 i_275(.A(n_7886), .B(n_2749), .C(n_407), .D(n_2791), .Z(n_459
));
notech_reg output_l_reg_4(.CP(n_8240), .D(n_2387), .CD(n_8144), .Q(output_l
notech_reg output_l_reg_4(.CP(n_8234), .D(n_2389), .CD(n_8151), .Q(output_l
[4]));
notech_mux2 i_2469(.S(output_latched), .A(counter[4]), .B(output_l[4]),
.Z(n_2387));
notech_ao4 i_274(.A(n_424), .B(n_2771), .C(n_416), .D(n_176), .Z(n_460)
.Z(n_2389));
notech_ao4 i_272(.A(n_424), .B(n_2773), .C(n_416), .D(n_176), .Z(n_460)
);
notech_reg output_l_reg_3(.CP(n_8240), .D(n_2393), .CD(n_8144), .Q(output_l
notech_reg output_l_reg_3(.CP(n_8234), .D(n_2395), .CD(n_8151), .Q(output_l
[3]));
notech_mux2 i_2477(.S(output_latched), .A(counter[3]), .B(output_l[3]),
.Z(n_2393));
notech_reg output_l_reg_2(.CP(n_8240), .D(n_2399), .CD(n_8144), .Q(output_l
.Z(n_2395));
notech_reg output_l_reg_2(.CP(n_8234), .D(n_2401), .CD(n_8151), .Q(output_l
[2]));
notech_mux2 i_2485(.S(output_latched), .A(counter[2]), .B(output_l[2]),
.Z(n_2399));
notech_ao4 i_270(.A(n_451), .B(n_400), .C(n_407), .D(n_2790), .Z(n_462)
.Z(n_2401));
notech_ao4 i_270(.A(n_451), .B(n_400), .C(n_407), .D(n_2792), .Z(n_462)
);
notech_reg output_l_reg_1(.CP(n_8240), .D(n_2405), .CD(n_8144), .Q(output_l
notech_reg output_l_reg_1(.CP(n_8234), .D(n_2407), .CD(n_8151), .Q(output_l
[1]));
notech_mux2 i_2493(.S(output_latched), .A(counter[1]), .B(output_l[1]),
.Z(n_2405));
notech_reg output_l_reg_0(.CP(n_8240), .D(n_2411), .CD(n_8144), .Q(output_l
.Z(n_2407));
notech_reg output_l_reg_0(.CP(n_8234), .D(n_2413), .CD(n_8151), .Q(output_l
[0]));
notech_mux2 i_2501(.S(output_latched), .A(counter[0]), .B(output_l[0]),
.Z(n_2411));
notech_or2 i_10(.A(n_235), .B(n_175), .Z(n_464));
notech_reg output_latched_reg(.CP(n_8240), .D(n_2417), .CD(n_8144), .Q(output_latched
.Z(n_2413));
notech_or2 i_10(.A(n_237), .B(n_175), .Z(n_464));
notech_reg output_latched_reg(.CP(n_8234), .D(n_2419), .CD(n_8151), .Q(output_latched
));
notech_mux2 i_2509(.S(n_1972), .A(output_latched), .B(n_326), .Z(n_2417)
notech_mux2 i_2509(.S(n_2020), .A(output_latched), .B(n_326), .Z(n_2419)
);
notech_reg msb_read_reg(.CP(n_8240), .D(n_2423), .CD(n_8144), .Q(msb_read
notech_reg msb_read_reg(.CP(n_8234), .D(n_2425), .CD(n_8151), .Q(msb_read
));
notech_nand2 i_2517(.A(n_2425), .B(n_2426), .Z(n_2423));
notech_or4 i_2518(.A(msb_read), .B(n_344), .C(set_control_mode), .D(n_2791
), .Z(n_2425));
notech_nand3 i_2519(.A(msb_read), .B(n_7904), .C(n_172), .Z(n_2426));
notech_ao4 i_223(.A(n_403), .B(n_174), .C(n_7868), .D(n_173), .Z(n_466)
);
notech_reg status_latched_reg(.CP(n_8240), .D(n_2429), .CD(n_8144), .Q(status_latched
notech_nand2 i_2517(.A(n_2427), .B(n_2428), .Z(n_2425));
notech_or4 i_2518(.A(msb_read), .B(n_344), .C(set_control_mode), .D(n_2793
), .Z(n_2427));
notech_nand3 i_2519(.A(msb_read), .B(n_7922), .C(n_174), .Z(n_2428));
notech_reg status_latched_reg(.CP(n_8234), .D(n_2431), .CD(n_8151), .Q(status_latched
));
notech_nand2 i_2525(.A(n_2432), .B(n_2431), .Z(n_2429));
notech_nand3 i_2526(.A(latch_status), .B(n_7904), .C(n_470), .Z(n_2431)
notech_nand2 i_2525(.A(n_2434), .B(n_2433), .Z(n_2431));
notech_nand3 i_2526(.A(latch_status), .B(n_7922), .C(n_467), .Z(n_2433)
);
notech_or4 i_2527(.A(latch_status), .B(read), .C(set_control_mode), .D(n_2741
), .Z(n_2432));
notech_reg null_counter_reg(.CP(n_8240), .D(n_2435), .CD(n_8144), .Q(null_counter
notech_or4 i_2527(.A(latch_status), .B(read), .C(set_control_mode), .D(n_2743
), .Z(n_2434));
notech_or2 i_223(.A(latch_status), .B(read), .Z(n_467));
notech_reg null_counter_reg(.CP(n_8234), .D(n_2437), .CD(n_8151), .Q(null_counter
));
notech_nand2 i_2533(.A(n_2437), .B(n_2438), .Z(n_2435));
notech_ao4 i_2534(.A(n_170), .B(n_2773), .C(n_7904), .D(n_2757), .Z(n_2437
notech_nand2 i_2533(.A(n_2439), .B(n_2440), .Z(n_2437));
notech_ao4 i_2534(.A(n_170), .B(n_2775), .C(n_7922), .D(n_2759), .Z(n_2439
));
notech_nand3 i_2535(.A(null_counter), .B(n_167), .C(n_2757), .Z(n_2438)
notech_nand3 i_2535(.A(null_counter), .B(n_167), .C(n_2759), .Z(n_2440)
);
notech_reg_set out_reg(.CP(n_8240), .D(n_2441), .SD(n_8144), .Q(n_1268)
notech_reg_set out_reg(.CP(n_8234), .D(n_2443), .SD(n_8151), .Q(n_1268)
);
notech_mux2 i_2541(.S(n_2743), .A(n_1268), .B(n_2327), .Z(n_2441));
notech_reg counter_reg_15(.CP(n_8239), .D(n_2447), .CD(n_8143), .Q(counter
notech_mux2 i_2541(.S(n_2745), .A(n_1268), .B(n_1960), .Z(n_2443));
notech_reg counter_reg_15(.CP(n_8233), .D(n_2449), .CD(n_8150), .Q(counter
[15]));
notech_mux2 i_2549(.S(\nbus_11[0] ), .A(counter[15]), .B(n_2744), .Z(n_2447
notech_mux2 i_2549(.S(\nbus_11[0] ), .A(counter[15]), .B(n_2746), .Z(n_2449
));
notech_or2 i_219(.A(latch_status), .B(read), .Z(n_470));
notech_reg counter_reg_14(.CP(n_8239), .D(n_2453), .CD(n_8143), .Q(counter
notech_reg counter_reg_14(.CP(n_8233), .D(n_2455), .CD(n_8150), .Q(counter
[14]));
notech_mux2 i_2557(.S(\nbus_11[0] ), .A(counter[14]), .B(n_1892), .Z(n_2453
notech_mux2 i_2557(.S(\nbus_11[0] ), .A(counter[14]), .B(n_1883), .Z(n_2455
));
notech_reg counter_reg_13(.CP(n_8239), .D(n_2459), .CD(n_8143), .Q(counter
notech_reg counter_reg_13(.CP(n_8233), .D(n_2461), .CD(n_8150), .Q(counter
[13]));
notech_mux2 i_2565(.S(\nbus_11[0] ), .A(counter[13]), .B(n_1886), .Z(n_2459
notech_mux2 i_2565(.S(\nbus_11[0] ), .A(counter[13]), .B(n_1877), .Z(n_2461
));
notech_reg counter_reg_12(.CP(n_8239), .D(n_2465), .CD(n_8143), .Q(counter
notech_ao4 i_217(.A(n_403), .B(n_172), .C(n_7886), .D(n_171), .Z(n_472)
);
notech_reg counter_reg_12(.CP(n_8233), .D(n_2467), .CD(n_8150), .Q(counter
[12]));
notech_mux2 i_2573(.S(\nbus_11[0] ), .A(counter[12]), .B(n_1880), .Z(n_2465
notech_mux2 i_2573(.S(\nbus_11[0] ), .A(counter[12]), .B(n_1871), .Z(n_2467
));
notech_reg counter_reg_11(.CP(n_8239), .D(n_2471), .CD(n_8143), .Q(counter
notech_reg counter_reg_11(.CP(n_8233), .D(n_2473), .CD(n_8150), .Q(counter
[11]));
notech_mux2 i_2581(.S(\nbus_11[0] ), .A(counter[11]), .B(n_2745), .Z(n_2471
notech_mux2 i_2581(.S(\nbus_11[0] ), .A(counter[11]), .B(n_2747), .Z(n_2473
));
notech_nand2 i_82023(.A(n_348), .B(n_231), .Z(data_out[7]));
notech_reg counter_reg_10(.CP(n_8240), .D(n_2477), .CD(n_8144), .Q(counter
notech_nand2 i_82066(.A(n_348), .B(n_231), .Z(data_out[7]));
notech_reg counter_reg_10(.CP(n_8234), .D(n_2479), .CD(n_8151), .Q(counter
[10]));
notech_mux2 i_2589(.S(\nbus_11[0] ), .A(counter[10]), .B(n_1868), .Z(n_2477
notech_mux2 i_2589(.S(\nbus_11[0] ), .A(counter[10]), .B(n_1859), .Z(n_2479
));
notech_nand2 i_72022(.A(n_349), .B(n_230), .Z(data_out[6]));
notech_reg counter_reg_9(.CP(n_8240), .D(n_2483), .CD(n_8144), .Q(counter
notech_nand2 i_72065(.A(n_349), .B(n_230), .Z(data_out[6]));
notech_reg counter_reg_9(.CP(n_8234), .D(n_2485), .CD(n_8151), .Q(counter
[9]));
notech_mux2 i_2597(.S(\nbus_11[0] ), .A(counter[9]), .B(n_1862), .Z(n_2483
notech_mux2 i_2597(.S(\nbus_11[0] ), .A(counter[9]), .B(n_1853), .Z(n_2485
));
notech_nand2 i_62021(.A(n_350), .B(n_229), .Z(data_out[5]));
notech_reg counter_reg_8(.CP(n_8239), .D(n_2489), .CD(n_8143), .Q(counter
notech_nand2 i_62064(.A(n_350), .B(n_229), .Z(data_out[5]));
notech_reg counter_reg_8(.CP(n_8233), .D(n_2491), .CD(n_8150), .Q(counter
[8]));
notech_mux2 i_2605(.S(\nbus_11[0] ), .A(counter[8]), .B(n_2746), .Z(n_2489
notech_mux2 i_2605(.S(\nbus_11[0] ), .A(counter[8]), .B(n_2748), .Z(n_2491
));
notech_nand2 i_52020(.A(n_351), .B(n_228), .Z(data_out[4]));
notech_reg counter_reg_7(.CP(n_8240), .D(n_2495), .CD(n_8144), .Q(counter
notech_nand2 i_52063(.A(n_351), .B(n_228), .Z(data_out[4]));
notech_reg counter_reg_7(.CP(n_8234), .D(n_2497), .CD(n_8151), .Q(counter
[7]));
notech_mux2 i_2613(.S(\nbus_11[0] ), .A(counter[7]), .B(n_1850), .Z(n_2495
notech_mux2 i_2613(.S(\nbus_11[0] ), .A(counter[7]), .B(n_1841), .Z(n_2497
));
notech_nand2 i_42019(.A(n_352), .B(n_227), .Z(data_out[3]));
notech_reg counter_reg_6(.CP(n_8235), .D(n_2501), .CD(n_8139), .Q(counter
notech_nand2 i_42062(.A(n_352), .B(n_227), .Z(data_out[3]));
notech_reg counter_reg_6(.CP(n_8229), .D(n_2503), .CD(n_8146), .Q(counter
[6]));
notech_mux2 i_2621(.S(\nbus_11[0] ), .A(counter[6]), .B(n_1844), .Z(n_2501
notech_mux2 i_2621(.S(\nbus_11[0] ), .A(counter[6]), .B(n_1835), .Z(n_2503
));
notech_nand2 i_32018(.A(n_353), .B(n_226), .Z(data_out[2]));
notech_reg counter_reg_5(.CP(n_8235), .D(n_2507), .CD(n_8139), .Q(counter
notech_nand2 i_32061(.A(n_353), .B(n_226), .Z(data_out[2]));
notech_reg counter_reg_5(.CP(n_8229), .D(n_2509), .CD(n_8146), .Q(counter
[5]));
notech_mux2 i_2629(.S(\nbus_11[0] ), .A(counter[5]), .B(n_1838), .Z(n_2507
notech_mux2 i_2629(.S(\nbus_11[0] ), .A(counter[5]), .B(n_1829), .Z(n_2509
));
notech_nand2 i_22017(.A(n_354), .B(n_225), .Z(data_out[1]));
notech_reg counter_reg_4(.CP(n_8234), .D(n_2513), .CD(n_8138), .Q(counter
notech_nand2 i_22060(.A(n_354), .B(n_225), .Z(data_out[1]));
notech_reg counter_reg_4(.CP(n_8228), .D(n_2515), .CD(n_8145), .Q(counter
[4]));
notech_mux2 i_2637(.S(\nbus_11[0] ), .A(counter[4]), .B(n_1832), .Z(n_2513
notech_mux2 i_2637(.S(\nbus_11[0] ), .A(counter[4]), .B(n_1823), .Z(n_2515
));
notech_nand2 i_12016(.A(n_355), .B(n_224), .Z(data_out[0]));
notech_reg counter_reg_3(.CP(n_8234), .D(n_2519), .CD(n_8138), .Q(counter
notech_nand2 i_12059(.A(n_355), .B(n_224), .Z(data_out[0]));
notech_reg counter_reg_3(.CP(n_8228), .D(n_2521), .CD(n_8145), .Q(counter
[3]));
notech_mux2 i_2645(.S(\nbus_11[0] ), .A(counter[3]), .B(n_1826), .Z(n_2519
notech_mux2 i_2645(.S(\nbus_11[0] ), .A(counter[3]), .B(n_1817), .Z(n_2521
));
notech_reg counter_reg_2(.CP(n_8235), .D(n_2525), .CD(n_8139), .Q(counter
notech_reg counter_reg_2(.CP(n_8229), .D(n_2527), .CD(n_8146), .Q(counter
[2]));
notech_mux2 i_2653(.S(\nbus_11[0] ), .A(counter[2]), .B(n_1820), .Z(n_2525
notech_mux2 i_2653(.S(\nbus_11[0] ), .A(counter[2]), .B(n_1811), .Z(n_2527
));
notech_and4 i_1903(.A(n_168), .B(n_402), .C(n_466), .D(n_7904), .Z(n_2324
));
notech_reg counter_reg_1(.CP(n_8235), .D(n_2531), .CD(n_8139), .Q(counter
notech_reg counter_reg_1(.CP(n_8229), .D(n_2533), .CD(n_8146), .Q(counter
[1]));
notech_mux2 i_2661(.S(\nbus_11[0] ), .A(counter[1]), .B(n_1814), .Z(n_2531
notech_mux2 i_2661(.S(\nbus_11[0] ), .A(counter[1]), .B(n_1805), .Z(n_2533
));
notech_nand2 i_1856(.A(n_7904), .B(n_7868), .Z(n_2251));
notech_reg counter_reg_0(.CP(n_8235), .D(n_2537), .CD(n_8139), .Q(counter
notech_nand2 i_1898(.A(n_7922), .B(n_7886), .Z(n_2316));
notech_reg counter_reg_0(.CP(n_8229), .D(n_2539), .CD(n_8146), .Q(counter
[0]));
notech_mux2 i_2669(.S(\nbus_11[0] ), .A(counter[0]), .B(n_1808), .Z(n_2537
notech_mux2 i_2669(.S(\nbus_11[0] ), .A(counter[0]), .B(n_1799), .Z(n_2539
));
notech_reg bcd_reg(.CP(n_8235), .D(n_2543), .CD(n_8139), .Q(bcd));
notech_mux2 i_2677(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_2543
notech_nao3 i_1863(.A(n_238), .B(n_7922), .C(n_319), .Z(\nbus_14[0] ));
notech_reg bcd_reg(.CP(n_8229), .D(n_2545), .CD(n_8146), .Q(bcd));
notech_mux2 i_2677(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_2545
));
notech_nao3 i_1816(.A(n_236), .B(n_7904), .C(n_319), .Z(\nbus_14[0] ));
notech_reg counter_m_reg_7(.CP(n_8235), .D(n_2549), .CD(n_8139), .Q(counter_m
notech_or4 i_1856(.A(n_237), .B(n_175), .C(set_control_mode), .D(n_400),
.Z(n_2232));
notech_reg counter_m_reg_7(.CP(n_8229), .D(n_2551), .CD(n_8146), .Q(counter_m
[7]));
notech_mux2 i_2685(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_243), .Z(n_2549
notech_mux2 i_2685(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_243), .Z(n_2551
));
notech_or4 i_1809(.A(n_235), .B(n_175), .C(set_control_mode), .D(n_400),
.Z(n_2158));
notech_reg counter_m_reg_6(.CP(n_8234), .D(n_2555), .CD(n_8138), .Q(counter_m
notech_reg counter_m_reg_6(.CP(n_8228), .D(n_2557), .CD(n_8145), .Q(counter_m
[6]));
notech_mux2 i_2693(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_244), .Z(n_2555
notech_mux2 i_2693(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_244), .Z(n_2557
));
notech_reg counter_m_reg_5(.CP(n_8234), .D(n_2561), .CD(n_8138), .Q(counter_m
notech_nand2 i_1840(.A(n_242), .B(gate_last), .Z(n_2204));
notech_reg counter_m_reg_5(.CP(n_8228), .D(n_2563), .CD(n_8145), .Q(counter_m
[5]));
notech_mux2 i_2701(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_245), .Z(n_2561
notech_mux2 i_2701(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_245), .Z(n_2563
));
notech_reg counter_m_reg_4(.CP(n_8234), .D(n_2567), .CD(n_8138), .Q(counter_m
notech_reg counter_m_reg_4(.CP(n_8228), .D(n_2569), .CD(n_8145), .Q(counter_m
[4]));
notech_mux2 i_2709(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_246), .Z(n_2567
notech_mux2 i_2709(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_246), .Z(n_2569
));
notech_nao3 i_1735(.A(n_234), .B(n_2772), .C(n_235), .Z(\nbus_12[0] ));
notech_reg counter_m_reg_3(.CP(n_8234), .D(n_2573), .CD(n_8138), .Q(counter_m
notech_nao3 i_1777(.A(n_236), .B(n_7922), .C(n_237), .Z(\nbus_12[0] ));
notech_reg counter_m_reg_3(.CP(n_8228), .D(n_2575), .CD(n_8145), .Q(counter_m
[3]));
notech_mux2 i_2717(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_247), .Z(n_2573
notech_mux2 i_2717(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_247), .Z(n_2575
));
notech_nao3 i_1727(.A(n_233), .B(n_7904), .C(latch_count), .Z(n_1972));
notech_reg counter_m_reg_2(.CP(n_8234), .D(n_2579), .CD(n_8138), .Q(counter_m
notech_nao3 i_1769(.A(n_235), .B(n_2774), .C(latch_count), .Z(n_2020));
notech_reg counter_m_reg_2(.CP(n_8228), .D(n_2581), .CD(n_8145), .Q(counter_m
[2]));
notech_mux2 i_2725(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_248), .Z(n_2579
notech_mux2 i_2725(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_248), .Z(n_2581
));
notech_nand3 i_1651(.A(n_169), .B(n_7868), .C(n_405), .Z(\nbus_11[0] )
);
notech_reg counter_m_reg_1(.CP(n_8234), .D(n_2585), .CD(n_8138), .Q(counter_m
notech_and4 i_1738(.A(n_168), .B(n_402), .C(n_472), .D(n_7922), .Z(n_1957
));
notech_reg counter_m_reg_1(.CP(n_8228), .D(n_2587), .CD(n_8145), .Q(counter_m
[1]));
notech_mux2 i_2733(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_249), .Z(n_2585
notech_mux2 i_2733(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_249), .Z(n_2587
));
notech_nand2 i_1601(.A(n_242), .B(gate_last), .Z(n_1686));
notech_reg counter_m_reg_0(.CP(n_8234), .D(n_2591), .CD(n_8138), .Q(counter_m
notech_nand3 i_1646(.A(n_169), .B(n_7886), .C(n_405), .Z(\nbus_11[0] )
);
notech_reg counter_m_reg_0(.CP(n_8228), .D(n_2593), .CD(n_8145), .Q(counter_m
[0]));
notech_mux2 i_2741(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_250), .Z(n_2591
notech_mux2 i_2741(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_250), .Z(n_2593
));
notech_and4 i_161418(.A(n_462), .B(n_460), .C(n_252), .D(n_255), .Z(n_1898
notech_and4 i_161430(.A(n_462), .B(n_460), .C(n_252), .D(n_255), .Z(n_1889
));
notech_reg counter_l_reg_7(.CP(n_8234), .D(n_2597), .CD(n_8138), .Q(counter_l
notech_reg counter_l_reg_7(.CP(n_8228), .D(n_2599), .CD(n_8145), .Q(counter_l
[7]));
notech_mux2 i_2749(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_243), .Z(n_2597
notech_mux2 i_2749(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_243), .Z(n_2599
));
notech_nand3 i_151417(.A(n_457), .B(n_459), .C(n_260), .Z(n_1892));
notech_reg counter_l_reg_6(.CP(n_8234), .D(n_2603), .CD(n_8138), .Q(counter_l
notech_nand3 i_151429(.A(n_457), .B(n_459), .C(n_260), .Z(n_1883));
notech_reg counter_l_reg_6(.CP(n_8228), .D(n_2605), .CD(n_8145), .Q(counter_l
[6]));
notech_mux2 i_2757(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_244), .Z(n_2603
notech_mux2 i_2757(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_244), .Z(n_2605
));
notech_nand3 i_141416(.A(n_454), .B(n_456), .C(n_265), .Z(n_1886));
notech_reg counter_l_reg_5(.CP(n_8234), .D(n_2609), .CD(n_8138), .Q(counter_l
notech_nand3 i_141428(.A(n_454), .B(n_456), .C(n_265), .Z(n_1877));
notech_reg counter_l_reg_5(.CP(n_8228), .D(n_2611), .CD(n_8145), .Q(counter_l
[5]));
notech_mux2 i_2765(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_245), .Z(n_2609
notech_mux2 i_2765(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_245), .Z(n_2611
));
notech_nand3 i_131415(.A(n_449), .B(n_452), .C(n_271), .Z(n_1880));
notech_reg counter_l_reg_4(.CP(n_8236), .D(n_2615), .CD(n_8140), .Q(counter_l
notech_nand3 i_131427(.A(n_449), .B(n_452), .C(n_271), .Z(n_1871));
notech_reg counter_l_reg_4(.CP(n_8230), .D(n_2617), .CD(n_8147), .Q(counter_l
[4]));
notech_mux2 i_2773(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_246), .Z(n_2615
notech_mux2 i_2773(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_246), .Z(n_2617
));
notech_and4 i_121414(.A(n_274), .B(n_448), .C(n_275), .D(n_276), .Z(n_1874
notech_and4 i_121426(.A(n_274), .B(n_448), .C(n_275), .D(n_276), .Z(n_1865
));
notech_reg counter_l_reg_3(.CP(n_8236), .D(n_2621), .CD(n_8140), .Q(counter_l
notech_reg counter_l_reg_3(.CP(n_8230), .D(n_2623), .CD(n_8147), .Q(counter_l
[3]));
notech_mux2 i_2781(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_247), .Z(n_2621
notech_mux2 i_2781(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_247), .Z(n_2623
));
notech_nand3 i_111413(.A(n_442), .B(n_444), .C(n_281), .Z(n_1868));
notech_reg counter_l_reg_2(.CP(n_8236), .D(n_2627), .CD(n_8140), .Q(counter_l
notech_nand3 i_111425(.A(n_442), .B(n_444), .C(n_281), .Z(n_1859));
notech_reg counter_l_reg_2(.CP(n_8230), .D(n_2629), .CD(n_8147), .Q(counter_l
[2]));
notech_mux2 i_2789(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_248), .Z(n_2627
notech_mux2 i_2789(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_248), .Z(n_2629
));
notech_nand3 i_101412(.A(n_439), .B(n_441), .C(n_286), .Z(n_1862));
notech_reg counter_l_reg_1(.CP(n_8236), .D(n_2633), .CD(n_8140), .Q(counter_l
notech_nand3 i_101424(.A(n_439), .B(n_441), .C(n_286), .Z(n_1853));
notech_reg counter_l_reg_1(.CP(n_8230), .D(n_2635), .CD(n_8147), .Q(counter_l
[1]));
notech_mux2 i_2797(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_249), .Z(n_2633
notech_mux2 i_2797(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_249), .Z(n_2635
));
notech_and4 i_91411(.A(n_290), .B(n_289), .C(n_437), .D(n_291), .Z(n_1856
notech_and4 i_91423(.A(n_290), .B(n_289), .C(n_437), .D(n_291), .Z(n_1847
));
notech_reg counter_l_reg_0(.CP(n_8236), .D(n_2639), .CD(n_8140), .Q(counter_l
notech_reg counter_l_reg_0(.CP(n_8230), .D(n_2641), .CD(n_8147), .Q(counter_l
[0]));
notech_mux2 i_2805(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_250), .Z(n_2639
notech_mux2 i_2805(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_250), .Z(n_2641
));
notech_or4 i_81410(.A(n_294), .B(n_293), .C(n_295), .D(n_433), .Z(n_1850
notech_or4 i_81422(.A(n_294), .B(n_293), .C(n_295), .D(n_433), .Z(n_1841
));
notech_reg gate_sampled_reg(.CP(n_8236), .D(n_2645), .CD(n_8140), .Q(gate_sampled
notech_reg gate_sampled_reg(.CP(n_8230), .D(n_2647), .CD(n_8147), .Q(gate_sampled
));
notech_nand2 i_2813(.A(n_242), .B(n_2756), .Z(n_2645));
notech_nand2 i_71409(.A(n_429), .B(n_428), .Z(n_1844));
notech_reg loaded_reg(.CP(n_8238), .D(n_2651), .CD(n_8142), .Q(loaded)
notech_nand2 i_2813(.A(n_242), .B(n_2758), .Z(n_2647));
notech_nand2 i_71421(.A(n_429), .B(n_428), .Z(n_1835));
notech_reg loaded_reg(.CP(n_8232), .D(n_2653), .CD(n_8149), .Q(loaded)
);
notech_mux2 i_2821(.S(n_2251), .A(loaded), .B(n_7904), .Z(n_2651));
notech_nand2 i_61408(.A(n_427), .B(n_426), .Z(n_1838));
notech_reg trigger_sampled_reg(.CP(n_8236), .D(n_2657), .CD(n_8140), .Q(trigger_sampled
notech_mux2 i_2821(.S(n_2316), .A(loaded), .B(n_7922), .Z(n_2653));
notech_nand2 i_61420(.A(n_427), .B(n_426), .Z(n_1829));
notech_reg trigger_sampled_reg(.CP(n_8230), .D(n_2659), .CD(n_8147), .Q(trigger_sampled
));
notech_mux2 i_2829(.S(n_242), .A(trigger), .B(trigger_sampled), .Z(n_2657
notech_mux2 i_2829(.S(n_242), .A(trigger), .B(trigger_sampled), .Z(n_2659
));
notech_nao3 i_51407(.A(n_418), .B(n_304), .C(n_307), .Z(n_1832));
notech_reg trigger_reg(.CP(n_8236), .D(n_2663), .CD(n_8140), .Q(trigger)
notech_nao3 i_51419(.A(n_418), .B(n_304), .C(n_307), .Z(n_1823));
notech_reg trigger_reg(.CP(n_8230), .D(n_2665), .CD(n_8147), .Q(trigger)
);
notech_mux2 i_2837(.S(n_1686), .A(trigger), .B(n_2759), .Z(n_2663));
notech_nand2 i_41406(.A(n_414), .B(n_308), .Z(n_1826));
notech_reg_set gate_last_reg(.CP(n_8236), .D(1'b1), .SD(n_8140), .Q(gate_last
notech_mux2 i_2837(.S(n_2204), .A(trigger), .B(n_2761), .Z(n_2665));
notech_nand2 i_41418(.A(n_414), .B(n_308), .Z(n_1817));
notech_reg_set gate_last_reg(.CP(n_8230), .D(1'b1), .SD(n_8147), .Q(gate_last
));
notech_reg written_reg(.CP(n_8235), .D(n_2671), .CD(n_8139), .Q(written)
notech_reg written_reg(.CP(n_8229), .D(n_2673), .CD(n_8146), .Q(written)
);
notech_mux2 i_2849(.S(n_2158), .A(written), .B(n_241), .Z(n_2671));
notech_nand2 i_31405(.A(n_413), .B(n_195), .Z(n_1820));
notech_reg mode_reg_2(.CP(n_8235), .D(n_2677), .CD(n_8139), .Q(mode[2])
notech_mux2 i_2849(.S(n_2232), .A(written), .B(n_241), .Z(n_2673));
notech_nand2 i_31417(.A(n_413), .B(n_195), .Z(n_1811));
notech_reg mode_reg_2(.CP(n_8229), .D(n_2679), .CD(n_8146), .Q(mode[2])
);
notech_mux2 i_2857(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z
(n_2677));
notech_nand2 i_21404(.A(n_412), .B(n_196), .Z(n_1814));
notech_reg_set mode_reg_1(.CP(n_8235), .D(n_2683), .SD(n_8139), .Q(mode[
(n_2679));
notech_nand2 i_21416(.A(n_412), .B(n_196), .Z(n_1805));
notech_reg_set mode_reg_1(.CP(n_8229), .D(n_2685), .SD(n_8146), .Q(mode[
1]));
notech_mux2 i_2865(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z
(n_2683));
notech_nao3 i_11403(.A(n_316), .B(n_315), .C(n_198), .Z(n_1808));
notech_reg mode_reg_0(.CP(n_8235), .D(n_2689), .CD(n_8139), .Q(mode[0])
(n_2685));
notech_nao3 i_11415(.A(n_316), .B(n_315), .C(n_198), .Z(n_1799));
notech_reg mode_reg_0(.CP(n_8229), .D(n_2691), .CD(n_8146), .Q(mode[0])
);
notech_mux2 i_2873(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z
(n_2689));
notech_reg clock_pulse_reg(.CP(n_8235), .D(n_2695), .CD(n_8139), .Q(clock_pulse
(n_2691));
notech_reg clock_pulse_reg(.CP(n_8229), .D(n_2697), .CD(n_8146), .Q(clock_pulse
));
notech_ao3 i_2881(.A(clock_last), .B(1'b1), .C(clock), .Z(n_2695));
notech_reg clock_last_reg(.CP(n_8236), .D(clock), .CD(n_8140), .Q(clock_last
notech_ao3 i_2881(.A(clock_last), .B(1'b1), .C(clock), .Z(n_2697));
notech_reg clock_last_reg(.CP(n_8230), .D(clock), .CD(n_8147), .Q(clock_last
));
notech_reg msb_write_reg(.CP(n_8236), .D(n_2699), .CD(n_8140), .Q(msb_write
notech_reg msb_write_reg(.CP(n_8230), .D(n_2701), .CD(n_8147), .Q(msb_write
));
notech_nand2 i_2889(.A(n_2701), .B(n_2702), .Z(n_2699));
notech_or4 i_2890(.A(n_344), .B(msb_write), .C(n_2773), .D(set_control_mode
), .Z(n_2701));
notech_nand3 i_2891(.A(msb_write), .B(n_7904), .C(n_359), .Z(n_2702));
notech_nand3 i_1554(.A(n_212), .B(n_210), .C(n_317), .Z(n_2327));
notech_reg rw_mode_reg_1(.CP(n_8236), .D(n_2705), .CD(n_8140), .Q(rw_mode
notech_nand2 i_2889(.A(n_2703), .B(n_2704), .Z(n_2701));
notech_or4 i_2890(.A(n_344), .B(msb_write), .C(n_2775), .D(set_control_mode
), .Z(n_2703));
notech_nand3 i_2891(.A(msb_write), .B(n_7922), .C(n_359), .Z(n_2704));
notech_nand3 i_1554(.A(n_212), .B(n_210), .C(n_317), .Z(n_1960));
notech_reg rw_mode_reg_1(.CP(n_8230), .D(n_2707), .CD(n_8147), .Q(rw_mode
[1]));
notech_mux2 i_2897(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]),
.Z(n_2705));
notech_reg_set rw_mode_reg_0(.CP(n_8236), .D(n_2711), .SD(n_8140), .Q(rw_mode
.Z(n_2707));
notech_reg_set rw_mode_reg_0(.CP(n_8230), .D(n_2713), .SD(n_8147), .Q(rw_mode
[0]));
notech_mux2 i_2905(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]),
.Z(n_2711));
notech_inv i_3278(.A(n_377), .Z(n_2717));
notech_inv i_3279(.A(n_394), .Z(n_2718));
notech_inv i_3280(.A(n_388), .Z(n_2719));
notech_inv i_3281(.A(n_383), .Z(n_2720));
notech_inv i_3282(.A(n_400), .Z(n_2721));
notech_inv i_3283(.A(n_405), .Z(n_2722));
notech_inv i_3284(.A(n_406), .Z(n_2723));
notech_inv i_3285(.A(n_421), .Z(n_2724));
notech_inv i_3286(.A(output_m[7]), .Z(n_2725));
notech_inv i_3287(.A(output_m[6]), .Z(n_2726));
notech_inv i_3288(.A(output_m[5]), .Z(n_2727));
notech_inv i_3289(.A(output_m[4]), .Z(n_2728));
notech_inv i_3290(.A(output_m[3]), .Z(n_2729));
notech_inv i_3291(.A(output_m[2]), .Z(n_2730));
notech_inv i_3292(.A(output_m[1]), .Z(n_2731));
notech_inv i_3293(.A(output_m[0]), .Z(n_2732));
notech_inv i_3294(.A(output_l[7]), .Z(n_2733));
notech_inv i_3295(.A(output_l[6]), .Z(n_2734));
notech_inv i_3296(.A(output_l[5]), .Z(n_2735));
notech_inv i_3297(.A(output_l[4]), .Z(n_2736));
notech_inv i_3298(.A(output_l[3]), .Z(n_2737));
notech_inv i_3299(.A(output_l[2]), .Z(n_2738));
notech_inv i_3300(.A(output_l[1]), .Z(n_2739));
notech_inv i_3301(.A(output_l[0]), .Z(n_2740));
notech_inv i_3302(.A(status_latched), .Z(n_2741));
notech_inv i_3303(.A(n_1268), .Z(n_2742));
notech_inv i_3304(.A(n_2324), .Z(n_2743));
notech_inv i_3305(.A(n_1898), .Z(n_2744));
notech_inv i_3306(.A(n_1874), .Z(n_2745));
notech_inv i_3307(.A(n_1856), .Z(n_2746));
notech_inv i_3308(.A(counter_m[6]), .Z(n_2747));
notech_inv i_3309(.A(counter_m[5]), .Z(n_2748));
notech_inv i_3310(.A(counter_m[4]), .Z(n_2749));
notech_inv i_3311(.A(counter_m[3]), .Z(n_2750));
notech_inv i_3312(.A(counter_m[2]), .Z(n_2751));
notech_inv i_3313(.A(counter_m[1]), .Z(n_2752));
notech_inv i_3314(.A(counter_m[0]), .Z(n_2753));
notech_inv i_3315(.A(counter_l[6]), .Z(n_2754));
notech_inv i_3316(.A(counter_l[5]), .Z(n_2755));
notech_inv i_3317(.A(gate_sampled), .Z(n_2756));
notech_inv i_3318(.A(n_2251), .Z(n_2757));
notech_inv i_3319(.A(trigger_sampled), .Z(n_2758));
notech_inv i_3320(.A(gate_last), .Z(n_2759));
notech_inv i_3321(.A(mode[2]), .Z(n_2760));
notech_inv i_3322(.A(mode[0]), .Z(n_2761));
notech_inv i_3323(.A(clock_pulse), .Z(n_2762));
notech_inv i_3324(.A(clock_last), .Z(n_2763));
notech_inv i_3325(.A(counter[0]), .Z(n_2764));
notech_inv i_3326(.A(counter[1]), .Z(n_2765));
notech_inv i_3327(.A(counter[3]), .Z(n_2766));
notech_inv i_3328(.A(counter[9]), .Z(n_2767));
notech_inv i_3329(.A(counter[10]), .Z(n_2768));
notech_inv i_3330(.A(counter[13]), .Z(n_2769));
notech_inv i_3331(.A(counter[14]), .Z(n_2770));
notech_inv i_3332(.A(counter[15]), .Z(n_2771));
notech_inv i_3333(.A(set_control_mode), .Z(n_2772));
notech_inv i_3334(.A(write), .Z(n_2773));
notech_inv i_3335(.A(n_1429), .Z(n_2774));
notech_inv i_3336(.A(n_1309), .Z(n_2775));
notech_inv i_3337(.A(n_1431), .Z(n_2776));
notech_inv i_3338(.A(n_1311), .Z(n_2777));
notech_inv i_3339(.A(n_1315), .Z(n_2778));
notech_inv i_3340(.A(n_1317), .Z(n_2779));
notech_inv i_3341(.A(n_1435), .Z(n_2780));
notech_inv i_3342(.A(n_1319), .Z(n_2781));
notech_inv i_3343(.A(n_1436), .Z(n_2782));
notech_inv i_3344(.A(n_1438), .Z(n_2783));
notech_inv i_3345(.A(n_1439), .Z(n_2784));
notech_inv i_3346(.A(n_1440), .Z(n_2785));
notech_inv i_3347(.A(n_1441), .Z(n_2786));
notech_inv i_3348(.A(n_1442), .Z(n_2787));
notech_inv i_3349(.A(n_1443), .Z(n_2788));
notech_inv i_3350(.A(n_1444), .Z(n_2789));
notech_inv i_3351(.A(n_1445), .Z(n_2790));
notech_inv i_3352(.A(read), .Z(n_2791));
AWDP_DEC_36_1 i_1338(.O0({n_1329, n_1328, n_1327, n_1326, n_1325, n_1324
.Z(n_2713));
notech_inv i_3278(.A(n_377), .Z(n_2719));
notech_inv i_3279(.A(n_394), .Z(n_2720));
notech_inv i_3280(.A(n_388), .Z(n_2721));
notech_inv i_3281(.A(n_383), .Z(n_2722));
notech_inv i_3282(.A(n_400), .Z(n_2723));
notech_inv i_3283(.A(n_405), .Z(n_2724));
notech_inv i_3284(.A(n_406), .Z(n_2725));
notech_inv i_3285(.A(n_421), .Z(n_2726));
notech_inv i_3286(.A(output_m[7]), .Z(n_2727));
notech_inv i_3287(.A(output_m[6]), .Z(n_2728));
notech_inv i_3288(.A(output_m[5]), .Z(n_2729));
notech_inv i_3289(.A(output_m[4]), .Z(n_2730));
notech_inv i_3290(.A(output_m[3]), .Z(n_2731));
notech_inv i_3291(.A(output_m[2]), .Z(n_2732));
notech_inv i_3292(.A(output_m[1]), .Z(n_2733));
notech_inv i_3293(.A(output_m[0]), .Z(n_2734));
notech_inv i_3294(.A(output_l[7]), .Z(n_2735));
notech_inv i_3295(.A(output_l[6]), .Z(n_2736));
notech_inv i_3296(.A(output_l[5]), .Z(n_2737));
notech_inv i_3297(.A(output_l[4]), .Z(n_2738));
notech_inv i_3298(.A(output_l[3]), .Z(n_2739));
notech_inv i_3299(.A(output_l[2]), .Z(n_2740));
notech_inv i_3300(.A(output_l[1]), .Z(n_2741));
notech_inv i_3301(.A(output_l[0]), .Z(n_2742));
notech_inv i_3302(.A(status_latched), .Z(n_2743));
notech_inv i_3303(.A(n_1268), .Z(n_2744));
notech_inv i_3304(.A(n_1957), .Z(n_2745));
notech_inv i_3305(.A(n_1889), .Z(n_2746));
notech_inv i_3306(.A(n_1865), .Z(n_2747));
notech_inv i_3307(.A(n_1847), .Z(n_2748));
notech_inv i_3308(.A(counter_m[6]), .Z(n_2749));
notech_inv i_3309(.A(counter_m[5]), .Z(n_2750));
notech_inv i_3310(.A(counter_m[4]), .Z(n_2751));
notech_inv i_3311(.A(counter_m[3]), .Z(n_2752));
notech_inv i_3312(.A(counter_m[2]), .Z(n_2753));
notech_inv i_3313(.A(counter_m[1]), .Z(n_2754));
notech_inv i_3314(.A(counter_m[0]), .Z(n_2755));
notech_inv i_3315(.A(counter_l[6]), .Z(n_2756));
notech_inv i_3316(.A(counter_l[5]), .Z(n_2757));
notech_inv i_3317(.A(gate_sampled), .Z(n_2758));
notech_inv i_3318(.A(n_2316), .Z(n_2759));
notech_inv i_3319(.A(trigger_sampled), .Z(n_2760));
notech_inv i_3320(.A(gate_last), .Z(n_2761));
notech_inv i_3321(.A(mode[2]), .Z(n_2762));
notech_inv i_3322(.A(mode[0]), .Z(n_2763));
notech_inv i_3323(.A(clock_pulse), .Z(n_2764));
notech_inv i_3324(.A(clock_last), .Z(n_2765));
notech_inv i_3325(.A(counter[0]), .Z(n_2766));
notech_inv i_3326(.A(counter[1]), .Z(n_2767));
notech_inv i_3327(.A(counter[3]), .Z(n_2768));
notech_inv i_3328(.A(counter[9]), .Z(n_2769));
notech_inv i_3329(.A(counter[10]), .Z(n_2770));
notech_inv i_3330(.A(counter[13]), .Z(n_2771));
notech_inv i_3331(.A(counter[14]), .Z(n_2772));
notech_inv i_3332(.A(counter[15]), .Z(n_2773));
notech_inv i_3333(.A(set_control_mode), .Z(n_2774));
notech_inv i_3334(.A(write), .Z(n_2775));
notech_inv i_3335(.A(n_1429), .Z(n_2776));
notech_inv i_3336(.A(n_1309), .Z(n_2777));
notech_inv i_3337(.A(n_1431), .Z(n_2778));
notech_inv i_3338(.A(n_1311), .Z(n_2779));
notech_inv i_3339(.A(n_1315), .Z(n_2780));
notech_inv i_3340(.A(n_1317), .Z(n_2781));
notech_inv i_3341(.A(n_1435), .Z(n_2782));
notech_inv i_3342(.A(n_1319), .Z(n_2783));
notech_inv i_3343(.A(n_1436), .Z(n_2784));
notech_inv i_3344(.A(n_1438), .Z(n_2785));
notech_inv i_3345(.A(n_1439), .Z(n_2786));
notech_inv i_3346(.A(n_1440), .Z(n_2787));
notech_inv i_3347(.A(n_1441), .Z(n_2788));
notech_inv i_3348(.A(n_1442), .Z(n_2789));
notech_inv i_3349(.A(n_1443), .Z(n_2790));
notech_inv i_3350(.A(n_1444), .Z(n_2791));
notech_inv i_3351(.A(n_1445), .Z(n_2792));
notech_inv i_3352(.A(read), .Z(n_2793));
AWDP_DEC_27_1 i_1338(.O0({n_1329, n_1328, n_1327, n_1326, n_1325, n_1324
, n_1323, n_1322, n_1321, n_1319, n_1317, n_1315, n_1313, n_1311
, n_1309, n_1307}), .counter(counter));
AWDP_SUB_39_1 i_1332(.O0({n_1445, n_1444, n_1443, n_1442, n_1441, n_1440
10877,7 → 10883,7
, n_1439, n_1438, n_1437, n_1436, n_1435, n_1434, n_1433, n_1431
, n_1429, n_1427}), .counter(counter));
endmodule
module AWDP_DEC_36_2(O0, counter);
module AWDP_DEC_27_2(O0, counter);
 
output [15:0] O0;
input [15:0] counter;
10888,48 → 10894,48
notech_ha2 i_16(.A(n_96), .B(n_126), .Z(O0[15]));
notech_inv i_1(.A(counter[0]), .Z(O0[0]));
notech_inv i_0(.A(counter[15]), .Z(n_96));
notech_xor2 i_37(.A(counter[14]), .B(n_124), .Z(n_7149));
notech_inv i_38(.A(n_7149), .Z(O0[14]));
notech_xor2 i_37(.A(counter[14]), .B(n_124), .Z(n_7167));
notech_inv i_38(.A(n_7167), .Z(O0[14]));
notech_or2 i_36(.A(counter[14]), .B(n_124), .Z(n_126));
notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_7176));
notech_inv i_33(.A(n_7176), .Z(O0[13]));
notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_7194));
notech_inv i_33(.A(n_7194), .Z(O0[13]));
notech_or2 i_31(.A(counter[13]), .B(n_122), .Z(n_124));
notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_7203));
notech_inv i_314125(.A(n_7203), .Z(O0[12]));
notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_7221));
notech_inv i_314180(.A(n_7221), .Z(O0[12]));
notech_or2 i_29(.A(counter[12]), .B(n_120), .Z(n_122));
notech_xor2 i_294126(.A(counter[11]), .B(n_118), .Z(n_7230));
notech_inv i_304127(.A(n_7230), .Z(O0[11]));
notech_xor2 i_294181(.A(counter[11]), .B(n_118), .Z(n_7248));
notech_inv i_304182(.A(n_7248), .Z(O0[11]));
notech_or2 i_28(.A(counter[11]), .B(n_118), .Z(n_120));
notech_xor2 i_284128(.A(counter[10]), .B(n_116), .Z(n_7257));
notech_inv i_294129(.A(n_7257), .Z(O0[10]));
notech_xor2 i_284183(.A(counter[10]), .B(n_116), .Z(n_7275));
notech_inv i_294184(.A(n_7275), .Z(O0[10]));
notech_or2 i_27(.A(counter[10]), .B(n_116), .Z(n_118));
notech_xor2 i_274130(.A(counter[9]), .B(n_114), .Z(n_7284));
notech_inv i_284131(.A(n_7284), .Z(O0[9]));
notech_xor2 i_274185(.A(counter[9]), .B(n_114), .Z(n_7302));
notech_inv i_284186(.A(n_7302), .Z(O0[9]));
notech_or2 i_26(.A(counter[9]), .B(n_114), .Z(n_116));
notech_xor2 i_274132(.A(counter[8]), .B(n_112), .Z(n_7311));
notech_inv i_284133(.A(n_7311), .Z(O0[8]));
notech_or2 i_264134(.A(counter[8]), .B(n_112), .Z(n_114));
notech_xor2 i_274135(.A(counter[7]), .B(n_110), .Z(n_7338));
notech_inv i_284136(.A(n_7338), .Z(O0[7]));
notech_or2 i_264137(.A(counter[7]), .B(n_110), .Z(n_112));
notech_xor2 i_274138(.A(counter[6]), .B(n_108), .Z(n_7365));
notech_inv i_284139(.A(n_7365), .Z(O0[6]));
notech_or2 i_264140(.A(counter[6]), .B(n_108), .Z(n_110));
notech_xor2 i_274141(.A(counter[5]), .B(n_106), .Z(n_7392));
notech_inv i_284142(.A(n_7392), .Z(O0[5]));
notech_or2 i_264143(.A(counter[5]), .B(n_106), .Z(n_108));
notech_xor2 i_274144(.A(counter[4]), .B(n_104), .Z(n_7419));
notech_inv i_284145(.A(n_7419), .Z(O0[4]));
notech_or2 i_264146(.A(counter[4]), .B(n_104), .Z(n_106));
notech_xor2 i_274147(.A(counter[3]), .B(n_102), .Z(n_7446));
notech_inv i_284148(.A(n_7446), .Z(O0[3]));
notech_or2 i_264149(.A(counter[3]), .B(n_102), .Z(n_104));
notech_xor2 i_274150(.A(counter[2]), .B(n_100), .Z(n_7473));
notech_inv i_284151(.A(n_7473), .Z(O0[2]));
notech_or2 i_264152(.A(counter[2]), .B(n_100), .Z(n_102));
notech_xor2 i_274153(.A(counter[1]), .B(counter[0]), .Z(n_7501));
notech_inv i_284154(.A(n_7501), .Z(O0[1]));
notech_or2 i_264155(.A(counter[1]), .B(counter[0]), .Z(n_100));
notech_xor2 i_274187(.A(counter[8]), .B(n_112), .Z(n_7329));
notech_inv i_284188(.A(n_7329), .Z(O0[8]));
notech_or2 i_264189(.A(counter[8]), .B(n_112), .Z(n_114));
notech_xor2 i_274190(.A(counter[7]), .B(n_110), .Z(n_7356));
notech_inv i_284191(.A(n_7356), .Z(O0[7]));
notech_or2 i_264192(.A(counter[7]), .B(n_110), .Z(n_112));
notech_xor2 i_274193(.A(counter[6]), .B(n_108), .Z(n_7383));
notech_inv i_284194(.A(n_7383), .Z(O0[6]));
notech_or2 i_264195(.A(counter[6]), .B(n_108), .Z(n_110));
notech_xor2 i_274196(.A(counter[5]), .B(n_106), .Z(n_7410));
notech_inv i_284197(.A(n_7410), .Z(O0[5]));
notech_or2 i_264198(.A(counter[5]), .B(n_106), .Z(n_108));
notech_xor2 i_274199(.A(counter[4]), .B(n_104), .Z(n_7437));
notech_inv i_284200(.A(n_7437), .Z(O0[4]));
notech_or2 i_264201(.A(counter[4]), .B(n_104), .Z(n_106));
notech_xor2 i_274202(.A(counter[3]), .B(n_102), .Z(n_7464));
notech_inv i_284203(.A(n_7464), .Z(O0[3]));
notech_or2 i_264204(.A(counter[3]), .B(n_102), .Z(n_104));
notech_xor2 i_274205(.A(counter[2]), .B(n_100), .Z(n_7491));
notech_inv i_284206(.A(n_7491), .Z(O0[2]));
notech_or2 i_264207(.A(counter[2]), .B(n_100), .Z(n_102));
notech_xor2 i_274208(.A(counter[1]), .B(counter[0]), .Z(n_7519));
notech_inv i_284209(.A(n_7519), .Z(O0[1]));
notech_or2 i_264210(.A(counter[1]), .B(counter[0]), .Z(n_100));
endmodule
module AWDP_SUB_39_2(O0, counter);
 
10973,45 → 10979,45
notech_ha2 i_15(.A(n_96), .B(n_124), .Z(O0[15]));
notech_inv i_1(.A(\counter[1] ), .Z(O0[1]));
notech_inv i_0(.A(\counter[15] ), .Z(n_96));
notech_xor2 i_46(.A(\counter[14] ), .B(n_122), .Z(n_7528));
notech_inv i_47(.A(n_7528), .Z(O0[14]));
notech_xor2 i_46(.A(\counter[14] ), .B(n_122), .Z(n_7546));
notech_inv i_47(.A(n_7546), .Z(O0[14]));
notech_or2 i_45(.A(\counter[14] ), .B(n_122), .Z(n_124));
notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_7555));
notech_inv i_32(.A(n_7555), .Z(O0[13]));
notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_7573));
notech_inv i_32(.A(n_7573), .Z(O0[13]));
notech_or2 i_30(.A(\counter[13] ), .B(n_120), .Z(n_122));
notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_7582));
notech_inv i_304156(.A(n_7582), .Z(O0[12]));
notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_7600));
notech_inv i_304211(.A(n_7600), .Z(O0[12]));
notech_or2 i_28(.A(\counter[12] ), .B(n_118), .Z(n_120));
notech_xor2 i_284157(.A(\counter[11] ), .B(n_116), .Z(n_7609));
notech_inv i_294158(.A(n_7609), .Z(O0[11]));
notech_xor2 i_284212(.A(\counter[11] ), .B(n_116), .Z(n_7627));
notech_inv i_294213(.A(n_7627), .Z(O0[11]));
notech_or2 i_27(.A(\counter[11] ), .B(n_116), .Z(n_118));
notech_xor2 i_274159(.A(\counter[10] ), .B(n_114), .Z(n_7636));
notech_inv i_284160(.A(n_7636), .Z(O0[10]));
notech_xor2 i_274214(.A(\counter[10] ), .B(n_114), .Z(n_7654));
notech_inv i_284215(.A(n_7654), .Z(O0[10]));
notech_or2 i_26(.A(\counter[10] ), .B(n_114), .Z(n_116));
notech_xor2 i_274161(.A(\counter[9] ), .B(n_112), .Z(n_7663));
notech_inv i_284162(.A(n_7663), .Z(O0[9]));
notech_or2 i_264163(.A(\counter[9] ), .B(n_112), .Z(n_114));
notech_xor2 i_274164(.A(\counter[8] ), .B(n_110), .Z(n_7690));
notech_inv i_284165(.A(n_7690), .Z(O0[8]));
notech_or2 i_264166(.A(\counter[8] ), .B(n_110), .Z(n_112));
notech_xor2 i_274167(.A(\counter[7] ), .B(n_108), .Z(n_7717));
notech_inv i_284168(.A(n_7717), .Z(O0[7]));
notech_or2 i_264169(.A(\counter[7] ), .B(n_108), .Z(n_110));
notech_xor2 i_274170(.A(\counter[6] ), .B(n_106), .Z(n_7744));
notech_inv i_284171(.A(n_7744), .Z(O0[6]));
notech_or2 i_264172(.A(\counter[6] ), .B(n_106), .Z(n_108));
notech_xor2 i_274173(.A(\counter[5] ), .B(n_104), .Z(n_7771));
notech_inv i_284174(.A(n_7771), .Z(O0[5]));
notech_or2 i_264175(.A(\counter[5] ), .B(n_104), .Z(n_106));
notech_xor2 i_274176(.A(\counter[4] ), .B(n_102), .Z(n_7798));
notech_inv i_284177(.A(n_7798), .Z(O0[4]));
notech_or2 i_264178(.A(\counter[4] ), .B(n_102), .Z(n_104));
notech_xor2 i_274179(.A(\counter[3] ), .B(n_100), .Z(n_7825));
notech_inv i_284180(.A(n_7825), .Z(O0[3]));
notech_or2 i_264181(.A(\counter[3] ), .B(n_100), .Z(n_102));
notech_xor2 i_274182(.A(\counter[2] ), .B(\counter[1] ), .Z(n_7853));
notech_inv i_284183(.A(n_7853), .Z(O0[2]));
notech_or2 i_264184(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100));
notech_xor2 i_274216(.A(\counter[9] ), .B(n_112), .Z(n_7681));
notech_inv i_284217(.A(n_7681), .Z(O0[9]));
notech_or2 i_264218(.A(\counter[9] ), .B(n_112), .Z(n_114));
notech_xor2 i_274219(.A(\counter[8] ), .B(n_110), .Z(n_7708));
notech_inv i_284220(.A(n_7708), .Z(O0[8]));
notech_or2 i_264221(.A(\counter[8] ), .B(n_110), .Z(n_112));
notech_xor2 i_274222(.A(\counter[7] ), .B(n_108), .Z(n_7735));
notech_inv i_284223(.A(n_7735), .Z(O0[7]));
notech_or2 i_264224(.A(\counter[7] ), .B(n_108), .Z(n_110));
notech_xor2 i_274225(.A(\counter[6] ), .B(n_106), .Z(n_7762));
notech_inv i_284226(.A(n_7762), .Z(O0[6]));
notech_or2 i_264227(.A(\counter[6] ), .B(n_106), .Z(n_108));
notech_xor2 i_274228(.A(\counter[5] ), .B(n_104), .Z(n_7789));
notech_inv i_284229(.A(n_7789), .Z(O0[5]));
notech_or2 i_264230(.A(\counter[5] ), .B(n_104), .Z(n_106));
notech_xor2 i_274231(.A(\counter[4] ), .B(n_102), .Z(n_7816));
notech_inv i_284232(.A(n_7816), .Z(O0[4]));
notech_or2 i_264233(.A(\counter[4] ), .B(n_102), .Z(n_104));
notech_xor2 i_274234(.A(\counter[3] ), .B(n_100), .Z(n_7843));
notech_inv i_284235(.A(n_7843), .Z(O0[3]));
notech_or2 i_264236(.A(\counter[3] ), .B(n_100), .Z(n_102));
notech_xor2 i_274237(.A(\counter[2] ), .B(\counter[1] ), .Z(n_7871));
notech_inv i_284238(.A(n_7871), .Z(O0[2]));
notech_or2 i_264239(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100));
endmodule
module v8253_counter_2(clk, rst_n, clock, gate, out, data_in, set_control_mode, latch_count
, latch_status, write, read, data_out);
11040,26 → 11046,26
 
 
 
notech_inv i_1368(.A(n_8224), .Z(n_8231));
notech_inv i_1367(.A(n_8224), .Z(n_8230));
notech_inv i_1366(.A(n_8224), .Z(n_8229));
notech_inv i_1364(.A(n_8224), .Z(n_8227));
notech_inv i_1363(.A(n_8224), .Z(n_8226));
notech_inv i_1362(.A(n_8224), .Z(n_8225));
notech_inv i_1360(.A(clk), .Z(n_8224));
notech_inv i_1280(.A(n_8128), .Z(n_8135));
notech_inv i_1279(.A(n_8128), .Z(n_8134));
notech_inv i_1278(.A(n_8128), .Z(n_8133));
notech_inv i_1276(.A(n_8128), .Z(n_8131));
notech_inv i_1275(.A(n_8128), .Z(n_8130));
notech_inv i_1274(.A(n_8128), .Z(n_8129));
notech_inv i_1272(.A(rst_n), .Z(n_8128));
notech_inv i_177(.A(n_7953), .Z(n_7954));
notech_inv i_176(.A(n_2181), .Z(n_7953));
notech_inv i_162(.A(n_7944), .Z(n_7945));
notech_inv i_161(.A(n_2241), .Z(n_7944));
notech_inv i_91(.A(n_7885), .Z(n_7886));
notech_inv i_89(.A(n_407), .Z(n_7885));
notech_inv i_1355(.A(n_8218), .Z(n_8225));
notech_inv i_1354(.A(n_8218), .Z(n_8224));
notech_inv i_1352(.A(n_8218), .Z(n_8223));
notech_inv i_1350(.A(n_8218), .Z(n_8221));
notech_inv i_1349(.A(n_8218), .Z(n_8220));
notech_inv i_1348(.A(n_8218), .Z(n_8219));
notech_inv i_1347(.A(clk), .Z(n_8218));
notech_inv i_1280(.A(n_8135), .Z(n_8142));
notech_inv i_1279(.A(n_8135), .Z(n_8141));
notech_inv i_1278(.A(n_8135), .Z(n_8140));
notech_inv i_1276(.A(n_8135), .Z(n_8138));
notech_inv i_1275(.A(n_8135), .Z(n_8137));
notech_inv i_1274(.A(n_8135), .Z(n_8136));
notech_inv i_1272(.A(rst_n), .Z(n_8135));
notech_inv i_178(.A(n_7971), .Z(n_7972));
notech_inv i_177(.A(n_2179), .Z(n_7971));
notech_inv i_164(.A(n_7962), .Z(n_7963));
notech_inv i_162(.A(n_2244), .Z(n_7962));
notech_inv i_93(.A(n_7903), .Z(n_7904));
notech_inv i_91(.A(n_407), .Z(n_7903));
notech_nao3 i_117(.A(counter[11]), .B(n_421), .C(n_418), .Z(n_271));
notech_nao3 i_113(.A(n_407), .B(n_1326), .C(n_410), .Z(n_268));
notech_nao3 i_107(.A(n_407), .B(n_1327), .C(n_410), .Z(n_262));
11066,22 → 11072,22
notech_nao3 i_101(.A(n_407), .B(n_1328), .C(n_410), .Z(n_257));
notech_nao3 i_95(.A(n_407), .B(n_1329), .C(n_410), .Z(n_252));
notech_nand2 i_97(.A(counter_m[7]), .B(n_395), .Z(n_249));
notech_and2 i_11976(.A(data_in[0]), .B(n_2241), .Z(n_247));
notech_and2 i_21977(.A(data_in[1]), .B(n_2241), .Z(n_246));
notech_and2 i_31978(.A(data_in[2]), .B(n_2241), .Z(n_245));
notech_and2 i_41979(.A(data_in[3]), .B(n_2241), .Z(n_244));
notech_and2 i_51980(.A(data_in[4]), .B(n_2241), .Z(n_243));
notech_and2 i_61981(.A(data_in[5]), .B(n_2241), .Z(n_242));
notech_and2 i_71982(.A(data_in[6]), .B(n_2241), .Z(n_241));
notech_and2 i_81983(.A(data_in[7]), .B(n_2241), .Z(n_240));
notech_nand2 i_233(.A(clock), .B(n_2227), .Z(n_239));
notech_nand2 i_234(.A(gate), .B(n_2222), .Z(n_238));
notech_and3 i_1450(.A(write), .B(n_356), .C(n_2241), .Z(n_237));
notech_or2 i_92(.A(n_321), .B(gate), .Z(n_234));
notech_or4 i_41(.A(n_164), .B(n_395), .C(n_383), .D(n_401), .Z(n_232));
notech_nand2 i_82(.A(read), .B(n_165), .Z(n_231));
notech_nand2 i_256(.A(rw_mode[0]), .B(n_2229), .Z(n_230));
notech_nand2 i_238(.A(status[7]), .B(status_latched), .Z(n_229));
notech_and2 i_12019(.A(data_in[0]), .B(n_2244), .Z(n_247));
notech_and2 i_22020(.A(data_in[1]), .B(n_2244), .Z(n_246));
notech_and2 i_32021(.A(data_in[2]), .B(n_2244), .Z(n_245));
notech_and2 i_42022(.A(data_in[3]), .B(n_2244), .Z(n_244));
notech_and2 i_52023(.A(data_in[4]), .B(n_2244), .Z(n_243));
notech_and2 i_62024(.A(data_in[5]), .B(n_2244), .Z(n_242));
notech_and2 i_72025(.A(data_in[6]), .B(n_2244), .Z(n_241));
notech_and2 i_82026(.A(data_in[7]), .B(n_2244), .Z(n_240));
notech_nand2 i_236(.A(clock), .B(n_2228), .Z(n_239));
notech_nand2 i_237(.A(gate), .B(n_2224), .Z(n_238));
notech_and3 i_1450(.A(write), .B(n_356), .C(n_2244), .Z(n_237));
notech_nand2 i_84(.A(read), .B(n_166), .Z(n_234));
notech_or2 i_83(.A(n_321), .B(gate), .Z(n_233));
notech_or4 i_41(.A(n_164), .B(n_395), .C(n_383), .D(n_401), .Z(n_231));
notech_nand2 i_228(.A(rw_mode[0]), .B(n_2230), .Z(n_230));
notech_nand2 i_227(.A(status[7]), .B(status_latched), .Z(n_229));
notech_nand2 i_224(.A(status[6]), .B(status_latched), .Z(n_228));
notech_nand2 i_221(.A(status[5]), .B(status_latched), .Z(n_227));
notech_nand2 i_218(.A(status[4]), .B(status_latched), .Z(n_226));
11089,7 → 11095,7
notech_nand2 i_212(.A(status[2]), .B(status_latched), .Z(n_224));
notech_nand2 i_209(.A(status[1]), .B(status_latched), .Z(n_223));
notech_nand2 i_206(.A(status_latched), .B(status[0]), .Z(n_222));
notech_and4 i_202(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .D(n_2228),
notech_and4 i_202(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .D(n_2229),
.Z(n_221));
notech_nor2 i_81(.A(written), .B(n_221), .Z(n_220));
notech_or4 i_201(.A(mode[2]), .B(mode[1]), .C(mode[0]), .D(n_220), .Z(n_219
11097,107 → 11103,107
notech_and2 i_27(.A(n_391), .B(n_358), .Z(n_218));
notech_mux2 i_53(.S(n_380), .A(n_379), .B(n_383), .Z(n_215));
notech_ao4 i_76(.A(n_384), .B(n_386), .C(n_215), .D(n_364), .Z(n_211));
notech_nao3 i_194(.A(gate_sampled), .B(n_2177), .C(n_211), .Z(n_210));
notech_ao4 i_75(.A(n_391), .B(n_362), .C(n_321), .D(n_2226), .Z(n_209)
notech_nao3 i_194(.A(gate_sampled), .B(n_2174), .C(n_211), .Z(n_210));
notech_ao4 i_75(.A(n_391), .B(n_362), .C(n_321), .D(n_2227), .Z(n_209)
);
notech_or4 i_60(.A(trigger_sampled), .B(n_2178), .C(n_359), .D(n_388), .Z
notech_or4 i_60(.A(trigger_sampled), .B(n_2176), .C(n_359), .D(n_388), .Z
(n_208));
notech_or4 i_190(.A(mode[2]), .B(mode[1]), .C(mode[0]), .D(msb_write), .Z
(n_207));
notech_and2 i_52(.A(n_207), .B(n_2179), .Z(n_205));
notech_and2 i_52(.A(n_207), .B(n_2177), .Z(n_205));
notech_and2 i_187(.A(counter_l[0]), .B(n_379), .Z(n_203));
notech_ao3 i_42(.A(counter_l[0]), .B(out), .C(n_379), .Z(n_202));
notech_and2 i_79(.A(n_403), .B(n_2187), .Z(n_200));
notech_ao3 i_77(.A(n_2231), .B(n_2232), .C(data_in[1]), .Z(n_199));
notech_and2 i_79(.A(n_403), .B(n_2185), .Z(n_200));
notech_ao3 i_77(.A(n_2233), .B(n_2234), .C(data_in[1]), .Z(n_199));
notech_and3 i_169(.A(n_407), .B(n_1427), .C(n_406), .Z(n_198));
notech_nand2 i_74(.A(n_407), .B(n_2266), .Z(n_197));
notech_nand2 i_74(.A(n_407), .B(n_2265), .Z(n_197));
notech_nand2 i_166(.A(counter_l[1]), .B(n_395), .Z(n_196));
notech_nand2 i_163(.A(counter_l[2]), .B(n_395), .Z(n_195));
notech_and2 i_73(.A(n_407), .B(n_2267), .Z(n_194));
notech_and2 i_72(.A(n_407), .B(n_2268), .Z(n_193));
notech_and2 i_73(.A(n_407), .B(n_2266), .Z(n_194));
notech_and2 i_72(.A(n_407), .B(n_2267), .Z(n_193));
notech_xor2 i_71(.A(counter[4]), .B(counter[5]), .Z(n_191));
notech_xor2 i_70(.A(counter[6]), .B(n_374), .Z(n_189));
notech_xor2 i_69(.A(counter[8]), .B(counter[9]), .Z(n_187));
notech_xor2 i_68(.A(counter[10]), .B(n_371), .Z(n_185));
notech_xor2 i_67(.A(n_2237), .B(n_372), .Z(n_183));
notech_xor2 i_67(.A(n_2240), .B(n_372), .Z(n_183));
notech_and2 i_43(.A(n_438), .B(n_425), .Z(n_181));
notech_xor2 i_66(.A(counter[12]), .B(counter[13]), .Z(n_180));
notech_xor2 i_65(.A(counter[14]), .B(n_368), .Z(n_178));
notech_nand2 i_98(.A(counter[15]), .B(n_369), .Z(n_177));
notech_ao3 i_61(.A(n_2179), .B(n_364), .C(n_2185), .Z(n_176));
notech_nand3 i_90(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_175)
notech_nand3 i_92(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_176)
);
notech_ao4 i_62(.A(n_344), .B(msb_write), .C(rw_mode[1]), .D(n_2230), .Z
(n_173));
notech_nand2 i_88(.A(write), .B(n_2184), .Z(n_172));
notech_nand2 i_87(.A(write), .B(n_356), .Z(n_171));
notech_nand3 i_86(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_170));
notech_ao4 i_63(.A(rw_mode[0]), .B(n_2229), .C(n_344), .D(n_2228), .Z(n_167
notech_ao4 i_61(.A(n_344), .B(msb_write), .C(rw_mode[1]), .D(n_2231), .Z
(n_174));
notech_nand2 i_90(.A(write), .B(n_2183), .Z(n_173));
notech_nand2 i_89(.A(write), .B(n_356), .Z(n_172));
notech_nand3 i_88(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_171));
notech_ao4 i_62(.A(rw_mode[0]), .B(n_2230), .C(n_344), .D(n_2229), .Z(n_168
));
notech_nand2 i_83(.A(write), .B(n_2182), .Z(n_166));
notech_nao3 i_51(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_165)
notech_nand2 i_85(.A(write), .B(n_2181), .Z(n_167));
notech_nao3 i_50(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_166)
);
notech_ao3 i_63(.A(n_2177), .B(n_364), .C(n_2180), .Z(n_165));
notech_ao4 i_80(.A(n_218), .B(n_362), .C(n_205), .D(n_363), .Z(n_164));
notech_nand3 i_118(.A(n_2181), .B(n_2186), .C(n_183), .Z(n_272));
notech_nand3 i_118(.A(n_2179), .B(n_2184), .C(n_183), .Z(n_272));
notech_nao3 i_119(.A(n_407), .B(n_1325), .C(n_410), .Z(n_273));
notech_nao3 i_125(.A(n_407), .B(n_1324), .C(n_410), .Z(n_278));
notech_nao3 i_131(.A(n_407), .B(n_1323), .C(n_410), .Z(n_283));
notech_nao3 i_135(.A(counter[8]), .B(n_421), .C(n_418), .Z(n_286));
notech_nao3 i_136(.A(n_2181), .B(n_2186), .C(counter[8]), .Z(n_287));
notech_nao3 i_137(.A(n_7886), .B(n_1322), .C(n_410), .Z(n_288));
notech_nao3 i_136(.A(n_2179), .B(n_2184), .C(counter[8]), .Z(n_287));
notech_nao3 i_137(.A(n_7904), .B(n_1322), .C(n_410), .Z(n_288));
notech_ao3 i_140(.A(counter[7]), .B(n_375), .C(n_418), .Z(n_290));
notech_ao3 i_141(.A(n_7886), .B(n_1321), .C(n_410), .Z(n_291));
notech_and3 i_142(.A(n_7886), .B(n_1437), .C(n_406), .Z(n_292));
notech_ao3 i_141(.A(n_7904), .B(n_1321), .C(n_410), .Z(n_291));
notech_and3 i_142(.A(n_7904), .B(n_1437), .C(n_406), .Z(n_292));
notech_nand2 i_157(.A(counter_l[4]), .B(n_395), .Z(n_301));
notech_and3 i_156(.A(n_7886), .B(n_1434), .C(n_406), .Z(n_304));
notech_and3 i_156(.A(n_7904), .B(n_1434), .C(n_406), .Z(n_304));
notech_nand2 i_160(.A(counter_l[3]), .B(n_395), .Z(n_305));
notech_nao3 i_167(.A(counter_l[0]), .B(n_395), .C(n_2178), .Z(n_312));
notech_nand3 i_168(.A(n_2183), .B(n_2181), .C(n_197), .Z(n_313));
notech_and4 i_172(.A(n_232), .B(n_2241), .C(n_219), .D(n_2181), .Z(n_314
notech_nao3 i_167(.A(counter_l[0]), .B(n_395), .C(n_2176), .Z(n_312));
notech_nand3 i_168(.A(n_2182), .B(n_2179), .C(n_197), .Z(n_313));
notech_and4 i_172(.A(n_231), .B(n_2244), .C(n_219), .D(n_2179), .Z(n_314
));
notech_or4 i_173(.A(set_control_mode), .B(n_2185), .C(n_200), .D(n_2189)
notech_or4 i_173(.A(set_control_mode), .B(n_2180), .C(n_200), .D(n_2187)
, .Z(n_315));
notech_ao4 i_182(.A(n_203), .B(n_2244), .C(n_164), .D(n_395), .Z(n_318)
notech_ao4 i_182(.A(n_203), .B(n_2246), .C(n_164), .D(n_395), .Z(n_318)
);
notech_and2 i_32(.A(n_384), .B(n_364), .Z(n_321));
notech_nand3 i_192(.A(written), .B(clock_pulse), .C(n_208), .Z(n_322));
notech_nand2 i_193(.A(trigger_sampled), .B(n_2188), .Z(n_323));
notech_and2 i_1578(.A(latch_count), .B(n_2241), .Z(n_326));
notech_nand2 i_2135(.A(latch_status), .B(n_2207), .Z(n_327));
notech_nand2 i_43038(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_344));
notech_nand2 i_0(.A(n_230), .B(n_165), .Z(n_345));
notech_nand2 i_26(.A(n_345), .B(n_2207), .Z(n_346));
notech_nand3 i_25(.A(n_230), .B(n_165), .C(n_2207), .Z(n_347));
notech_ao4 i_380(.A(n_347), .B(n_2191), .C(n_346), .D(n_2199), .Z(n_348)
notech_nand2 i_193(.A(trigger_sampled), .B(n_2186), .Z(n_323));
notech_and2 i_1578(.A(latch_count), .B(n_2244), .Z(n_326));
notech_nand2 i_2138(.A(latch_status), .B(n_2206), .Z(n_327));
notech_nand2 i_43080(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_344));
notech_nand2 i_0(.A(n_230), .B(n_166), .Z(n_345));
notech_nand2 i_26(.A(n_345), .B(n_2206), .Z(n_346));
notech_nand3 i_25(.A(n_230), .B(n_166), .C(n_2206), .Z(n_347));
notech_ao4 i_377(.A(n_347), .B(n_2189), .C(n_346), .D(n_2197), .Z(n_348)
);
notech_ao4 i_379(.A(n_347), .B(n_2192), .C(n_346), .D(n_2200), .Z(n_349)
notech_ao4 i_376(.A(n_347), .B(n_2190), .C(n_346), .D(n_2198), .Z(n_349)
);
notech_ao4 i_378(.A(n_347), .B(n_2193), .C(n_346), .D(n_2201), .Z(n_350)
notech_ao4 i_375(.A(n_347), .B(n_2191), .C(n_346), .D(n_2199), .Z(n_350)
);
notech_ao4 i_377(.A(n_347), .B(n_2194), .C(n_346), .D(n_2202), .Z(n_351)
notech_ao4 i_374(.A(n_347), .B(n_2192), .C(n_346), .D(n_2200), .Z(n_351)
);
notech_ao4 i_376(.A(n_347), .B(n_2195), .C(n_346), .D(n_2203), .Z(n_352)
notech_ao4 i_373(.A(n_347), .B(n_2193), .C(n_346), .D(n_2201), .Z(n_352)
);
notech_ao4 i_375(.A(n_347), .B(n_2196), .C(n_346), .D(n_2204), .Z(n_353)
notech_ao4 i_372(.A(n_347), .B(n_2194), .C(n_346), .D(n_2202), .Z(n_353)
);
notech_ao4 i_374(.A(n_347), .B(n_2197), .C(n_346), .D(n_2205), .Z(n_354)
notech_ao4 i_371(.A(n_347), .B(n_2195), .C(n_346), .D(n_2203), .Z(n_354)
);
notech_ao4 i_373(.A(n_347), .B(n_2198), .C(n_346), .D(n_2206), .Z(n_355)
notech_ao4 i_370(.A(n_347), .B(n_2196), .C(n_346), .D(n_2205), .Z(n_355)
);
notech_nand3 i_28(.A(rw_mode[0]), .B(rw_mode[1]), .C(n_2228), .Z(n_356)
notech_nand3 i_28(.A(rw_mode[0]), .B(rw_mode[1]), .C(n_2229), .Z(n_356)
);
notech_nao3 i_63044(.A(mode[0]), .B(n_2224), .C(mode[1]), .Z(n_358));
notech_ao3 i_38(.A(n_2224), .B(n_2225), .C(mode[0]), .Z(n_359));
notech_nand2 i_6(.A(n_2241), .B(n_219), .Z(n_360));
notech_nao3 i_63086(.A(mode[0]), .B(n_2225), .C(mode[1]), .Z(n_358));
notech_ao3 i_38(.A(n_2225), .B(n_2226), .C(mode[0]), .Z(n_359));
notech_nand2 i_6(.A(n_2244), .B(n_219), .Z(n_360));
notech_nand2 i_22(.A(loaded), .B(clock_pulse), .Z(n_362));
notech_nand3 i_30(.A(loaded), .B(gate_sampled), .C(clock_pulse), .Z(n_363
));
notech_nand2 i_43047(.A(mode[0]), .B(mode[1]), .Z(n_364));
notech_nand2 i_43089(.A(mode[0]), .B(mode[1]), .Z(n_364));
notech_or2 i_33(.A(counter[3]), .B(counter[2]), .Z(n_365));
notech_or2 i_12(.A(counter[12]), .B(counter[13]), .Z(n_368));
notech_nao3 i_21(.A(n_2238), .B(n_2239), .C(counter[12]), .Z(n_369));
notech_nao3 i_21(.A(n_2241), .B(n_2242), .C(counter[12]), .Z(n_369));
notech_or2 i_1(.A(counter[8]), .B(counter[9]), .Z(n_371));
notech_nao3 i_16(.A(n_2235), .B(n_2236), .C(counter[8]), .Z(n_372));
notech_nao3 i_16(.A(n_2238), .B(n_2239), .C(counter[8]), .Z(n_372));
notech_or2 i_3(.A(counter[4]), .B(counter[5]), .Z(n_374));
notech_or2 i_17(.A(counter[6]), .B(n_374), .Z(n_375));
notech_or4 i_47(.A(counter[7]), .B(n_375), .C(counter[11]), .D(n_372), .Z
11204,515 → 11210,515
(n_377));
notech_or4 i_58(.A(n_377), .B(counter[14]), .C(n_368), .D(counter[15]),
.Z(n_378));
notech_or4 i_343162(.A(counter[1]), .B(counter[0]), .C(n_378), .D(n_365)
notech_or4 i_343204(.A(counter[1]), .B(counter[0]), .C(n_378), .D(n_365)
, .Z(n_379));
notech_nand2 i_18(.A(counter_l[0]), .B(out), .Z(n_380));
notech_or4 i_343132(.A(n_378), .B(n_365), .C(counter[0]), .D(n_2234), .Z
notech_or4 i_343174(.A(n_378), .B(n_365), .C(counter[0]), .D(n_2237), .Z
(n_383));
notech_or2 i_33046(.A(mode[0]), .B(n_2225), .Z(n_384));
notech_or4 i_363(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(n_2233
notech_or2 i_33088(.A(mode[0]), .B(n_2226), .Z(n_384));
notech_or4 i_360(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(n_2236
), .Z(n_385));
notech_or2 i_343115(.A(n_378), .B(n_385), .Z(n_386));
notech_or2 i_368(.A(mode[0]), .B(n_2224), .Z(n_387));
notech_or2 i_343157(.A(n_378), .B(n_385), .Z(n_386));
notech_or2 i_365(.A(mode[0]), .B(n_2225), .Z(n_387));
notech_nand2 i_11(.A(n_387), .B(n_384), .Z(n_388));
notech_nand3 i_83054(.A(mode[0]), .B(mode[2]), .C(n_2225), .Z(n_391));
notech_nand3 i_2130(.A(n_323), .B(n_322), .C(n_210), .Z(n_395));
notech_ao4 i_355(.A(n_7945), .B(n_199), .C(n_234), .D(n_360), .Z(n_397)
notech_nand3 i_83096(.A(mode[0]), .B(mode[2]), .C(n_2226), .Z(n_391));
notech_nand3 i_2133(.A(n_323), .B(n_322), .C(n_210), .Z(n_395));
notech_ao4 i_352(.A(n_7963), .B(n_199), .C(n_233), .D(n_360), .Z(n_397)
);
notech_or4 i_360(.A(n_378), .B(n_385), .C(n_164), .D(n_395), .Z(n_399)
notech_or4 i_357(.A(n_378), .B(n_385), .C(n_164), .D(n_395), .Z(n_399)
);
notech_ao3 i_9(.A(n_2181), .B(n_2175), .C(n_164), .Z(n_400));
notech_and2 i_40(.A(n_391), .B(n_2179), .Z(n_401));
notech_ao4 i_358(.A(n_202), .B(n_2175), .C(n_2178), .D(n_400), .Z(n_403)
notech_ao3 i_9(.A(n_2179), .B(n_2171), .C(n_164), .Z(n_400));
notech_and2 i_40(.A(n_391), .B(n_2177), .Z(n_401));
notech_ao4 i_355(.A(n_202), .B(n_2171), .C(n_2176), .D(n_400), .Z(n_403)
);
notech_and4 i_251(.A(gate_sampled), .B(n_2178), .C(n_2177), .D(n_2181),
notech_and4 i_254(.A(gate_sampled), .B(n_2176), .C(n_2174), .D(n_2179),
.Z(n_406));
notech_or4 i_266(.A(counter[1]), .B(n_365), .C(counter[0]), .D(n_2212),
notech_or4 i_269(.A(counter[1]), .B(n_365), .C(counter[0]), .D(n_2212),
.Z(n_407));
notech_nand2 i_13(.A(n_7886), .B(n_406), .Z(n_408));
notech_nand2 i_4(.A(n_2183), .B(n_2181), .Z(n_410));
notech_nand3 i_14(.A(n_7886), .B(n_2183), .C(n_2181), .Z(n_412));
notech_ao4 i_350(.A(n_408), .B(n_2246), .C(n_412), .D(n_2247), .Z(n_413)
notech_nand2 i_13(.A(n_7904), .B(n_406), .Z(n_408));
notech_nand2 i_4(.A(n_2182), .B(n_2179), .Z(n_410));
notech_nand3 i_14(.A(n_7904), .B(n_2182), .C(n_2179), .Z(n_412));
notech_ao4 i_347(.A(n_408), .B(n_2247), .C(n_412), .D(n_2248), .Z(n_413)
);
notech_ao4 i_349(.A(n_408), .B(n_2248), .C(n_412), .D(n_2249), .Z(n_414)
notech_ao4 i_346(.A(n_408), .B(n_2249), .C(n_412), .D(n_2250), .Z(n_414)
);
notech_ao4 i_348(.A(n_194), .B(n_410), .C(n_193), .D(n_2183), .Z(n_415)
notech_ao4 i_345(.A(n_194), .B(n_410), .C(n_193), .D(n_2182), .Z(n_415)
);
notech_or2 i_264(.A(n_377), .B(n_407), .Z(n_416));
notech_or2 i_267(.A(n_377), .B(n_407), .Z(n_416));
notech_or2 i_23(.A(n_416), .B(n_395), .Z(n_417));
notech_or2 i_49(.A(n_7886), .B(n_395), .Z(n_418));
notech_ao4 i_345(.A(n_412), .B(n_2250), .C(counter[4]), .D(n_418), .Z(n_419
notech_or2 i_49(.A(n_7904), .B(n_395), .Z(n_418));
notech_ao4 i_342(.A(n_412), .B(n_2251), .C(counter[4]), .D(n_418), .Z(n_419
));
notech_or4 i_265(.A(counter[6]), .B(counter[7]), .C(n_7886), .D(n_374),
notech_or4 i_268(.A(counter[6]), .B(counter[7]), .C(n_7904), .D(n_374),
.Z(n_421));
notech_nao3 i_19(.A(n_377), .B(n_2181), .C(n_7886), .Z(n_424));
notech_or2 i_24(.A(n_424), .B(n_2186), .Z(n_425));
notech_ao4 i_343(.A(n_412), .B(n_2252), .C(n_191), .D(n_425), .Z(n_426)
notech_nao3 i_19(.A(n_377), .B(n_2179), .C(n_7904), .Z(n_424));
notech_or2 i_24(.A(n_424), .B(n_2184), .Z(n_425));
notech_ao4 i_340(.A(n_412), .B(n_2252), .C(n_191), .D(n_425), .Z(n_426)
);
notech_ao4 i_342(.A(n_2221), .B(n_2181), .C(n_408), .D(n_2253), .Z(n_427
notech_ao4 i_339(.A(n_2223), .B(n_2179), .C(n_408), .D(n_2253), .Z(n_427
));
notech_ao4 i_341(.A(n_412), .B(n_2255), .C(n_425), .D(n_189), .Z(n_428)
notech_ao4 i_338(.A(n_412), .B(n_2254), .C(n_425), .D(n_189), .Z(n_428)
);
notech_ao4 i_340(.A(n_2181), .B(n_2220), .C(n_408), .D(n_2256), .Z(n_429
notech_ao4 i_337(.A(n_2179), .B(n_2222), .C(n_408), .D(n_2255), .Z(n_429
));
notech_mux2 i_336(.S(n_395), .A(n_2186), .B(counter_l[7]), .Z(n_433));
notech_reg output_m_reg_7(.CP(n_8230), .D(n_1699), .CD(n_8134), .Q(output_m
notech_mux2 i_333(.S(n_395), .A(n_2184), .B(counter_l[7]), .Z(n_433));
notech_reg output_m_reg_7(.CP(n_8224), .D(n_1699), .CD(n_8141), .Q(output_m
[7]));
notech_mux2 i_1241(.S(output_latched), .A(counter[15]), .B(output_m[7]),
.Z(n_1699));
notech_reg output_m_reg_6(.CP(n_8230), .D(n_1705), .CD(n_8134), .Q(output_m
notech_reg output_m_reg_6(.CP(n_8224), .D(n_1705), .CD(n_8141), .Q(output_m
[6]));
notech_mux2 i_1249(.S(output_latched), .A(counter[14]), .B(output_m[6]),
.Z(n_1705));
notech_ao4 i_332(.A(n_2181), .B(n_2219), .C(n_408), .D(n_2257), .Z(n_437
notech_ao4 i_329(.A(n_2179), .B(n_2221), .C(n_408), .D(n_2256), .Z(n_437
));
notech_reg output_m_reg_5(.CP(n_8229), .D(n_1711), .CD(n_8133), .Q(output_m
notech_reg output_m_reg_5(.CP(n_8223), .D(n_1711), .CD(n_8140), .Q(output_m
[5]));
notech_mux2 i_1257(.S(output_latched), .A(counter[13]), .B(output_m[5]),
.Z(n_1711));
notech_nand3 i_31(.A(n_416), .B(n_7954), .C(n_2186), .Z(n_438));
notech_reg output_m_reg_4(.CP(n_8229), .D(n_1717), .CD(n_8133), .Q(output_m
notech_nand3 i_31(.A(n_416), .B(n_7972), .C(n_2184), .Z(n_438));
notech_reg output_m_reg_4(.CP(n_8223), .D(n_1717), .CD(n_8140), .Q(output_m
[4]));
notech_mux2 i_1265(.S(output_latched), .A(counter[12]), .B(output_m[4]),
.Z(n_1717));
notech_ao4 i_330(.A(n_425), .B(n_2235), .C(n_187), .D(n_438), .Z(n_439)
notech_ao4 i_327(.A(n_425), .B(n_2238), .C(n_187), .D(n_438), .Z(n_439)
);
notech_reg output_m_reg_3(.CP(n_8230), .D(n_1723), .CD(n_8134), .Q(output_m
notech_reg output_m_reg_3(.CP(n_8224), .D(n_1723), .CD(n_8141), .Q(output_m
[3]));
notech_mux2 i_1273(.S(output_latched), .A(counter[11]), .B(output_m[3]),
.Z(n_1723));
notech_reg output_m_reg_2(.CP(n_8230), .D(n_1729), .CD(n_8134), .Q(output_m
notech_reg output_m_reg_2(.CP(n_8224), .D(n_1729), .CD(n_8141), .Q(output_m
[2]));
notech_mux2 i_1281(.S(output_latched), .A(counter[10]), .B(output_m[2]),
.Z(n_1729));
notech_ao4 i_329(.A(n_7954), .B(n_2218), .C(n_408), .D(n_2258), .Z(n_441
notech_ao4 i_326(.A(n_7972), .B(n_2219), .C(n_408), .D(n_2257), .Z(n_441
));
notech_reg output_m_reg_1(.CP(n_8230), .D(n_1735), .CD(n_8134), .Q(output_m
notech_reg output_m_reg_1(.CP(n_8224), .D(n_1735), .CD(n_8141), .Q(output_m
[1]));
notech_mux2 i_1289(.S(output_latched), .A(counter[9]), .B(output_m[1]),
.Z(n_1735));
notech_ao4 i_327(.A(n_425), .B(n_2236), .C(n_185), .D(n_438), .Z(n_442)
notech_ao4 i_324(.A(n_425), .B(n_2239), .C(n_185), .D(n_438), .Z(n_442)
);
notech_reg output_m_reg_0(.CP(n_8230), .D(n_1741), .CD(n_8134), .Q(output_m
notech_reg output_m_reg_0(.CP(n_8224), .D(n_1741), .CD(n_8141), .Q(output_m
[0]));
notech_mux2 i_1297(.S(output_latched), .A(counter[8]), .B(output_m[0]),
.Z(n_1741));
notech_reg status_reg_7(.CP(n_8230), .D(n_1747), .CD(n_8134), .Q(status[
notech_reg status_reg_7(.CP(n_8224), .D(n_1747), .CD(n_8141), .Q(status[
7]));
notech_mux2 i_1305(.S(n_327), .A(out), .B(status[7]), .Z(n_1747));
notech_ao4 i_326(.A(n_7954), .B(n_2217), .C(n_408), .D(n_2259), .Z(n_444
notech_ao4 i_323(.A(n_7972), .B(n_2218), .C(n_408), .D(n_2258), .Z(n_444
));
notech_reg status_reg_6(.CP(n_8229), .D(n_1753), .CD(n_8133), .Q(status[
notech_reg status_reg_6(.CP(n_8223), .D(n_1753), .CD(n_8140), .Q(status[
6]));
notech_mux2 i_1313(.S(n_327), .A(null_counter), .B(status[6]), .Z(n_1753
));
notech_reg status_reg_5(.CP(n_8229), .D(n_1759), .CD(n_8133), .Q(status[
notech_reg status_reg_5(.CP(n_8223), .D(n_1759), .CD(n_8140), .Q(status[
5]));
notech_mux2 i_1321(.S(n_327), .A(rw_mode[1]), .B(status[5]), .Z(n_1759)
);
notech_reg status_reg_4(.CP(n_8229), .D(n_1765), .CD(n_8133), .Q(status[
notech_reg status_reg_4(.CP(n_8223), .D(n_1765), .CD(n_8140), .Q(status[
4]));
notech_mux2 i_1329(.S(n_327), .A(rw_mode[0]), .B(status[4]), .Z(n_1765)
);
notech_reg status_reg_3(.CP(n_8229), .D(n_1771), .CD(n_8133), .Q(status[
notech_reg status_reg_3(.CP(n_8223), .D(n_1771), .CD(n_8140), .Q(status[
3]));
notech_mux2 i_1337(.S(n_327), .A(mode[2]), .B(status[3]), .Z(n_1771));
notech_ao4 i_322(.A(n_7954), .B(n_2216), .C(n_408), .D(n_2260), .Z(n_448
notech_ao4 i_319(.A(n_7972), .B(n_2216), .C(n_408), .D(n_2259), .Z(n_448
));
notech_reg status_reg_2(.CP(n_8229), .D(n_1777), .CD(n_8133), .Q(status[
notech_reg status_reg_2(.CP(n_8223), .D(n_1777), .CD(n_8140), .Q(status[
2]));
notech_mux2 i_1345(.S(n_327), .A(mode[1]), .B(status[2]), .Z(n_1777));
notech_mux2 i_320(.S(counter[12]), .A(n_417), .B(n_424), .Z(n_449));
notech_reg status_reg_1(.CP(n_8229), .D(n_1783), .CD(n_8133), .Q(status[
notech_mux2 i_317(.S(counter[12]), .A(n_417), .B(n_424), .Z(n_449));
notech_reg status_reg_1(.CP(n_8223), .D(n_1783), .CD(n_8140), .Q(status[
1]));
notech_mux2 i_1353(.S(n_327), .A(mode[0]), .B(status[1]), .Z(n_1783));
notech_reg status_reg_0(.CP(n_8229), .D(n_1789), .CD(n_8133), .Q(status[
notech_reg status_reg_0(.CP(n_8223), .D(n_1789), .CD(n_8140), .Q(status[
0]));
notech_mux2 i_1361(.S(n_327), .A(bcd), .B(status[0]), .Z(n_1789));
notech_nand2 i_7(.A(bcd), .B(n_2176), .Z(n_451));
notech_reg output_l_reg_7(.CP(n_8229), .D(n_1795), .CD(n_8133), .Q(output_l
notech_nand2 i_7(.A(bcd), .B(n_2173), .Z(n_451));
notech_reg output_l_reg_7(.CP(n_8223), .D(n_1795), .CD(n_8140), .Q(output_l
[7]));
notech_mux2 i_1369(.S(output_latched), .A(counter[7]), .B(output_l[7]),
.Z(n_1795));
notech_ao4 i_319(.A(n_7954), .B(n_2215), .C(n_408), .D(n_2261), .Z(n_452
notech_ao4 i_316(.A(n_7972), .B(n_2215), .C(n_408), .D(n_2260), .Z(n_452
));
notech_reg output_l_reg_6(.CP(n_8229), .D(n_1801), .CD(n_8133), .Q(output_l
notech_reg output_l_reg_6(.CP(n_8223), .D(n_1802), .CD(n_8140), .Q(output_l
[6]));
notech_mux2 i_1377(.S(output_latched), .A(counter[6]), .B(output_l[6]),
.Z(n_1801));
notech_nao3 i_48(.A(n_451), .B(n_7954), .C(n_416), .Z(n_453));
notech_reg output_l_reg_5(.CP(n_8229), .D(n_1807), .CD(n_8133), .Q(output_l
.Z(n_1802));
notech_nao3 i_48(.A(n_451), .B(n_7972), .C(n_416), .Z(n_453));
notech_reg output_l_reg_5(.CP(n_8223), .D(n_1809), .CD(n_8140), .Q(output_l
[5]));
notech_mux2 i_1385(.S(output_latched), .A(counter[5]), .B(output_l[5]),
.Z(n_1807));
notech_ao4 i_316(.A(n_181), .B(n_2238), .C(n_180), .D(n_453), .Z(n_454)
.Z(n_1809));
notech_ao4 i_313(.A(n_181), .B(n_2241), .C(n_180), .D(n_453), .Z(n_454)
);
notech_reg output_l_reg_4(.CP(n_8231), .D(n_1815), .CD(n_8135), .Q(output_l
notech_reg output_l_reg_4(.CP(n_8225), .D(n_1816), .CD(n_8142), .Q(output_l
[4]));
notech_mux2 i_1393(.S(output_latched), .A(counter[4]), .B(output_l[4]),
.Z(n_1815));
notech_reg output_l_reg_3(.CP(n_8231), .D(n_1822), .CD(n_8135), .Q(output_l
.Z(n_1816));
notech_reg output_l_reg_3(.CP(n_8225), .D(n_1824), .CD(n_8142), .Q(output_l
[3]));
notech_mux2 i_1401(.S(output_latched), .A(counter[3]), .B(output_l[3]),
.Z(n_1822));
notech_ao4 i_315(.A(n_7954), .B(n_2214), .C(n_408), .D(n_2262), .Z(n_456
.Z(n_1824));
notech_ao4 i_312(.A(n_7972), .B(n_2214), .C(n_408), .D(n_2261), .Z(n_456
));
notech_reg output_l_reg_2(.CP(n_8231), .D(n_1829), .CD(n_8135), .Q(output_l
notech_reg output_l_reg_2(.CP(n_8225), .D(n_1831), .CD(n_8142), .Q(output_l
[2]));
notech_mux2 i_1409(.S(output_latched), .A(counter[2]), .B(output_l[2]),
.Z(n_1829));
notech_ao4 i_313(.A(n_181), .B(n_2239), .C(n_453), .D(n_178), .Z(n_457)
.Z(n_1831));
notech_ao4 i_310(.A(n_181), .B(n_2242), .C(n_453), .D(n_178), .Z(n_457)
);
notech_reg output_l_reg_1(.CP(n_8231), .D(n_1836), .CD(n_8135), .Q(output_l
notech_reg output_l_reg_1(.CP(n_8225), .D(n_1838), .CD(n_8142), .Q(output_l
[1]));
notech_mux2 i_1417(.S(output_latched), .A(counter[1]), .B(output_l[1]),
.Z(n_1836));
notech_reg output_l_reg_0(.CP(n_8231), .D(n_1843), .CD(n_8135), .Q(output_l
.Z(n_1838));
notech_reg output_l_reg_0(.CP(n_8225), .D(n_1845), .CD(n_8142), .Q(output_l
[0]));
notech_mux2 i_1425(.S(output_latched), .A(counter[0]), .B(output_l[0]),
.Z(n_1843));
notech_ao4 i_312(.A(n_7954), .B(n_2213), .C(n_408), .D(n_2263), .Z(n_459
.Z(n_1845));
notech_ao4 i_309(.A(n_7972), .B(n_2213), .C(n_408), .D(n_2262), .Z(n_459
));
notech_reg output_latched_reg(.CP(n_8231), .D(n_1851), .CD(n_8135), .Q(output_latched
notech_reg output_latched_reg(.CP(n_8225), .D(n_1852), .CD(n_8142), .Q(output_latched
));
notech_mux2 i_1434(.S(n_1972), .A(output_latched), .B(n_326), .Z(n_1851)
notech_mux2 i_1434(.S(n_2020), .A(output_latched), .B(n_326), .Z(n_1852)
);
notech_ao4 i_310(.A(n_424), .B(n_2240), .C(n_417), .D(n_177), .Z(n_460)
notech_ao4 i_307(.A(n_424), .B(n_2243), .C(n_417), .D(n_177), .Z(n_460)
);
notech_reg msb_read_reg(.CP(n_8231), .D(n_1858), .CD(n_8135), .Q(msb_read
notech_reg msb_read_reg(.CP(n_8225), .D(n_1860), .CD(n_8142), .Q(msb_read
));
notech_nand2 i_1442(.A(n_1860), .B(n_1861), .Z(n_1858));
notech_or4 i_1443(.A(msb_read), .B(n_344), .C(set_control_mode), .D(n_2265
), .Z(n_1860));
notech_nand3 i_1444(.A(msb_read), .B(n_7945), .C(n_170), .Z(n_1861));
notech_reg status_latched_reg(.CP(n_8231), .D(n_1865), .CD(n_8135), .Q(status_latched
notech_nand2 i_1442(.A(n_1862), .B(n_1863), .Z(n_1860));
notech_or4 i_1443(.A(msb_read), .B(n_344), .C(set_control_mode), .D(n_2264
), .Z(n_1862));
notech_nand3 i_1444(.A(msb_read), .B(n_7963), .C(n_171), .Z(n_1863));
notech_reg status_latched_reg(.CP(n_8225), .D(n_1867), .CD(n_8142), .Q(status_latched
));
notech_nand2 i_1451(.A(n_1869), .B(n_1867), .Z(n_1865));
notech_nand3 i_1452(.A(latch_status), .B(n_7945), .C(n_468), .Z(n_1867)
notech_nand2 i_1451(.A(n_1870), .B(n_1869), .Z(n_1867));
notech_nand3 i_1452(.A(latch_status), .B(n_7963), .C(n_465), .Z(n_1869)
);
notech_or4 i_1453(.A(latch_status), .B(read), .C(set_control_mode), .D(n_2207
), .Z(n_1869));
notech_ao4 i_308(.A(n_451), .B(n_395), .C(n_408), .D(n_2264), .Z(n_462)
notech_or4 i_1453(.A(latch_status), .B(read), .C(set_control_mode), .D(n_2206
), .Z(n_1870));
notech_ao4 i_305(.A(n_451), .B(n_395), .C(n_408), .D(n_2263), .Z(n_462)
);
notech_reg null_counter_reg(.CP(n_8231), .D(n_1872), .CD(n_8135), .Q(null_counter
notech_reg null_counter_reg(.CP(n_8225), .D(n_1874), .CD(n_8142), .Q(null_counter
));
notech_mux2 i_1459(.S(n_2158), .A(null_counter), .B(n_2340), .Z(n_1872)
notech_mux2 i_1459(.S(n_2232), .A(null_counter), .B(n_2341), .Z(n_1874)
);
notech_reg_set out_reg(.CP(n_8231), .D(n_1879), .SD(n_8135), .Q(out));
notech_mux2 i_1467(.S(n_2208), .A(out), .B(n_2327), .Z(n_1879));
notech_reg counter_reg_15(.CP(n_8230), .D(n_1887), .CD(n_8134), .Q(counter
notech_reg_set out_reg(.CP(n_8225), .D(n_1881), .SD(n_8142), .Q(out));
notech_mux2 i_1467(.S(n_2208), .A(out), .B(n_1960), .Z(n_1881));
notech_reg counter_reg_15(.CP(n_8224), .D(n_1888), .CD(n_8141), .Q(counter
[15]));
notech_mux2 i_1475(.S(\nbus_11[0] ), .A(counter[15]), .B(n_2209), .Z(n_1887
notech_mux2 i_1475(.S(\nbus_11[0] ), .A(counter[15]), .B(n_2209), .Z(n_1888
));
notech_ao4 i_263(.A(gate), .B(n_321), .C(n_7954), .D(n_176), .Z(n_465)
);
notech_reg counter_reg_14(.CP(n_8230), .D(n_1894), .CD(n_8134), .Q(counter
notech_or2 i_263(.A(latch_status), .B(read), .Z(n_465));
notech_reg counter_reg_14(.CP(n_8224), .D(n_1895), .CD(n_8141), .Q(counter
[14]));
notech_mux2 i_1483(.S(\nbus_11[0] ), .A(counter[14]), .B(n_1892), .Z(n_1894
notech_mux2 i_1483(.S(\nbus_11[0] ), .A(counter[14]), .B(n_1883), .Z(n_1895
));
notech_reg counter_reg_13(.CP(n_8230), .D(n_1901), .CD(n_8134), .Q(counter
notech_reg counter_reg_13(.CP(n_8224), .D(n_1901), .CD(n_8141), .Q(counter
[13]));
notech_mux2 i_1491(.S(\nbus_11[0] ), .A(counter[13]), .B(n_1886), .Z(n_1901
notech_mux2 i_1491(.S(\nbus_11[0] ), .A(counter[13]), .B(n_1877), .Z(n_1901
));
notech_reg counter_reg_12(.CP(n_8230), .D(n_1907), .CD(n_8134), .Q(counter
notech_ao4 i_241(.A(gate), .B(n_321), .C(n_7972), .D(n_165), .Z(n_467)
);
notech_reg counter_reg_12(.CP(n_8224), .D(n_1907), .CD(n_8141), .Q(counter
[12]));
notech_mux2 i_1499(.S(\nbus_11[0] ), .A(counter[12]), .B(n_1880), .Z(n_1907
notech_mux2 i_1499(.S(\nbus_11[0] ), .A(counter[12]), .B(n_1871), .Z(n_1907
));
notech_or2 i_260(.A(latch_status), .B(read), .Z(n_468));
notech_reg counter_reg_11(.CP(n_8230), .D(n_1913), .CD(n_8134), .Q(counter
notech_reg counter_reg_11(.CP(n_8224), .D(n_1913), .CD(n_8141), .Q(counter
[11]));
notech_mux2 i_1507(.S(\nbus_11[0] ), .A(counter[11]), .B(n_2210), .Z(n_1913
));
notech_reg counter_reg_10(.CP(n_8231), .D(n_1919), .CD(n_8135), .Q(counter
notech_reg counter_reg_10(.CP(n_8225), .D(n_1919), .CD(n_8142), .Q(counter
[10]));
notech_mux2 i_1515(.S(\nbus_11[0] ), .A(counter[10]), .B(n_1868), .Z(n_1919
notech_mux2 i_1515(.S(\nbus_11[0] ), .A(counter[10]), .B(n_1859), .Z(n_1919
));
notech_nand2 i_82023(.A(n_348), .B(n_229), .Z(data_out[7]));
notech_reg counter_reg_9(.CP(n_8231), .D(n_1925), .CD(n_8135), .Q(counter
notech_nand2 i_82066(.A(n_348), .B(n_229), .Z(data_out[7]));
notech_reg counter_reg_9(.CP(n_8225), .D(n_1925), .CD(n_8142), .Q(counter
[9]));
notech_mux2 i_1523(.S(\nbus_11[0] ), .A(counter[9]), .B(n_1862), .Z(n_1925
notech_mux2 i_1523(.S(\nbus_11[0] ), .A(counter[9]), .B(n_1853), .Z(n_1925
));
notech_nand2 i_72022(.A(n_349), .B(n_228), .Z(data_out[6]));
notech_reg counter_reg_8(.CP(n_8230), .D(n_1931), .CD(n_8134), .Q(counter
notech_nand2 i_72065(.A(n_349), .B(n_228), .Z(data_out[6]));
notech_reg counter_reg_8(.CP(n_8224), .D(n_1931), .CD(n_8141), .Q(counter
[8]));
notech_mux2 i_1531(.S(\nbus_11[0] ), .A(counter[8]), .B(n_2211), .Z(n_1931
));
notech_nand2 i_62021(.A(n_350), .B(n_227), .Z(data_out[5]));
notech_reg counter_reg_7(.CP(n_8231), .D(n_1937), .CD(n_8135), .Q(counter
notech_nand2 i_62064(.A(n_350), .B(n_227), .Z(data_out[5]));
notech_reg counter_reg_7(.CP(n_8225), .D(n_1937), .CD(n_8142), .Q(counter
[7]));
notech_mux2 i_1539(.S(\nbus_11[0] ), .A(counter[7]), .B(n_1850), .Z(n_1937
notech_mux2 i_1539(.S(\nbus_11[0] ), .A(counter[7]), .B(n_1841), .Z(n_1937
));
notech_nand2 i_52020(.A(n_351), .B(n_226), .Z(data_out[4]));
notech_reg counter_reg_6(.CP(n_8226), .D(n_1943), .CD(n_8130), .Q(counter
notech_nand2 i_52063(.A(n_351), .B(n_226), .Z(data_out[4]));
notech_reg counter_reg_6(.CP(n_8220), .D(n_1943), .CD(n_8137), .Q(counter
[6]));
notech_mux2 i_1547(.S(\nbus_11[0] ), .A(counter[6]), .B(n_1844), .Z(n_1943
notech_mux2 i_1547(.S(\nbus_11[0] ), .A(counter[6]), .B(n_1835), .Z(n_1943
));
notech_nand2 i_42019(.A(n_352), .B(n_225), .Z(data_out[3]));
notech_reg counter_reg_5(.CP(n_8226), .D(n_1949), .CD(n_8130), .Q(counter
notech_nand2 i_42062(.A(n_352), .B(n_225), .Z(data_out[3]));
notech_reg counter_reg_5(.CP(n_8220), .D(n_1949), .CD(n_8137), .Q(counter
[5]));
notech_mux2 i_1556(.S(\nbus_11[0] ), .A(counter[5]), .B(n_1838), .Z(n_1949
notech_mux2 i_1556(.S(\nbus_11[0] ), .A(counter[5]), .B(n_1829), .Z(n_1949
));
notech_nand2 i_32018(.A(n_353), .B(n_224), .Z(data_out[2]));
notech_reg counter_reg_4(.CP(n_8225), .D(n_1955), .CD(n_8129), .Q(counter
notech_nand2 i_32061(.A(n_353), .B(n_224), .Z(data_out[2]));
notech_reg counter_reg_4(.CP(n_8219), .D(n_1955), .CD(n_8136), .Q(counter
[4]));
notech_mux2 i_1566(.S(\nbus_11[0] ), .A(counter[4]), .B(n_1832), .Z(n_1955
notech_mux2 i_1566(.S(\nbus_11[0] ), .A(counter[4]), .B(n_1823), .Z(n_1955
));
notech_nand2 i_22017(.A(n_354), .B(n_223), .Z(data_out[1]));
notech_reg counter_reg_3(.CP(n_8225), .D(n_1961), .CD(n_8129), .Q(counter
notech_nand2 i_22060(.A(n_354), .B(n_223), .Z(data_out[1]));
notech_reg counter_reg_3(.CP(n_8219), .D(n_1963), .CD(n_8136), .Q(counter
[3]));
notech_mux2 i_1576(.S(\nbus_11[0] ), .A(counter[3]), .B(n_1826), .Z(n_1961
notech_mux2 i_1576(.S(\nbus_11[0] ), .A(counter[3]), .B(n_1817), .Z(n_1963
));
notech_nand2 i_12016(.A(n_355), .B(n_222), .Z(data_out[0]));
notech_reg counter_reg_2(.CP(n_8226), .D(n_1967), .CD(n_8130), .Q(counter
notech_nand2 i_12059(.A(n_355), .B(n_222), .Z(data_out[0]));
notech_reg counter_reg_2(.CP(n_8220), .D(n_1969), .CD(n_8137), .Q(counter
[2]));
notech_mux2 i_1585(.S(\nbus_11[0] ), .A(counter[2]), .B(n_1820), .Z(n_1967
notech_mux2 i_1585(.S(\nbus_11[0] ), .A(counter[2]), .B(n_1811), .Z(n_1969
));
notech_and4 i_1903(.A(n_232), .B(n_399), .C(n_465), .D(n_2180), .Z(n_2324
));
notech_reg counter_reg_1(.CP(n_8226), .D(n_1974), .CD(n_8130), .Q(counter
notech_reg counter_reg_1(.CP(n_8220), .D(n_1975), .CD(n_8137), .Q(counter
[1]));
notech_mux2 i_1593(.S(\nbus_11[0] ), .A(counter[1]), .B(n_1814), .Z(n_1974
notech_mux2 i_1593(.S(\nbus_11[0] ), .A(counter[1]), .B(n_1805), .Z(n_1975
));
notech_nand2 i_1856(.A(n_7945), .B(n_7954), .Z(n_2251));
notech_reg counter_reg_0(.CP(n_8226), .D(n_1981), .CD(n_8130), .Q(counter
notech_nand2 i_1898(.A(n_7963), .B(n_7972), .Z(n_2316));
notech_reg counter_reg_0(.CP(n_8220), .D(n_1981), .CD(n_8137), .Q(counter
[0]));
notech_mux2 i_1602(.S(\nbus_11[0] ), .A(counter[0]), .B(n_1808), .Z(n_1981
notech_mux2 i_1601(.S(\nbus_11[0] ), .A(counter[0]), .B(n_1799), .Z(n_1981
));
notech_reg bcd_reg(.CP(n_8226), .D(n_1987), .CD(n_8130), .Q(bcd));
notech_nand2 i_1863(.A(n_7963), .B(n_173), .Z(\nbus_14[0] ));
notech_reg bcd_reg(.CP(n_8220), .D(n_1987), .CD(n_8137), .Q(bcd));
notech_mux2 i_1610(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_1987
));
notech_nand2 i_1816(.A(n_7945), .B(n_172), .Z(\nbus_14[0] ));
notech_reg counter_m_reg_7(.CP(n_8226), .D(n_1994), .CD(n_8130), .Q(counter_m
notech_nand3 i_1856(.A(n_7963), .B(n_7972), .C(n_172), .Z(n_2232));
notech_reg counter_m_reg_7(.CP(n_8220), .D(n_1993), .CD(n_8137), .Q(counter_m
[7]));
notech_mux2 i_1619(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_240), .Z(n_1994
notech_mux2 i_1618(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_240), .Z(n_1993
));
notech_nand3 i_1809(.A(n_7945), .B(n_7954), .C(n_171), .Z(n_2158));
notech_reg counter_m_reg_6(.CP(n_8225), .D(n_2001), .CD(n_8129), .Q(counter_m
notech_reg counter_m_reg_6(.CP(n_8219), .D(n_1999), .CD(n_8136), .Q(counter_m
[6]));
notech_mux2 i_1627(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_241), .Z(n_2001
notech_mux2 i_1626(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_241), .Z(n_1999
));
notech_reg counter_m_reg_5(.CP(n_8225), .D(n_2008), .CD(n_8129), .Q(counter_m
notech_nand2 i_1840(.A(n_239), .B(n_238), .Z(n_2204));
notech_reg counter_m_reg_5(.CP(n_8219), .D(n_2005), .CD(n_8136), .Q(counter_m
[5]));
notech_mux2 i_1635(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_242), .Z(n_2008
notech_mux2 i_1634(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_242), .Z(n_2005
));
notech_reg counter_m_reg_4(.CP(n_8225), .D(n_2015), .CD(n_8129), .Q(counter_m
notech_reg counter_m_reg_4(.CP(n_8219), .D(n_2011), .CD(n_8136), .Q(counter_m
[4]));
notech_mux2 i_1643(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_243), .Z(n_2015
notech_mux2 i_1642(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_243), .Z(n_2011
));
notech_nand2 i_1735(.A(n_7945), .B(n_166), .Z(\nbus_12[0] ));
notech_reg counter_m_reg_3(.CP(n_8225), .D(n_2023), .CD(n_8129), .Q(counter_m
notech_nand2 i_1777(.A(n_7963), .B(n_167), .Z(\nbus_12[0] ));
notech_reg counter_m_reg_3(.CP(n_8219), .D(n_2017), .CD(n_8136), .Q(counter_m
[3]));
notech_mux2 i_1652(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_244), .Z(n_2023
notech_mux2 i_1651(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_244), .Z(n_2017
));
notech_nao3 i_1727(.A(n_231), .B(n_7945), .C(latch_count), .Z(n_1972));
notech_reg counter_m_reg_2(.CP(n_8225), .D(n_2030), .CD(n_8129), .Q(counter_m
notech_nao3 i_1769(.A(n_234), .B(n_7963), .C(latch_count), .Z(n_2020));
notech_reg counter_m_reg_2(.CP(n_8219), .D(n_2025), .CD(n_8136), .Q(counter_m
[2]));
notech_mux2 i_1660(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_245), .Z(n_2030
notech_mux2 i_1659(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_245), .Z(n_2025
));
notech_nand3 i_1651(.A(n_164), .B(n_7954), .C(n_2183), .Z(\nbus_11[0] )
);
notech_reg counter_m_reg_1(.CP(n_8225), .D(n_2037), .CD(n_8129), .Q(counter_m
notech_and4 i_1738(.A(n_231), .B(n_399), .C(n_467), .D(n_2178), .Z(n_1957
));
notech_reg counter_m_reg_1(.CP(n_8219), .D(n_2031), .CD(n_8136), .Q(counter_m
[1]));
notech_mux2 i_1668(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_246), .Z(n_2037
notech_mux2 i_1667(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_246), .Z(n_2031
));
notech_nand2 i_1601(.A(n_239), .B(n_238), .Z(n_1686));
notech_reg counter_m_reg_0(.CP(n_8225), .D(n_2043), .CD(n_8129), .Q(counter_m
notech_nand3 i_1646(.A(n_164), .B(n_7972), .C(n_2182), .Z(\nbus_11[0] )
);
notech_reg counter_m_reg_0(.CP(n_8219), .D(n_2037), .CD(n_8136), .Q(counter_m
[0]));
notech_mux2 i_1676(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_247), .Z(n_2043
notech_mux2 i_1675(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_247), .Z(n_2037
));
notech_and4 i_161418(.A(n_462), .B(n_460), .C(n_249), .D(n_252), .Z(n_1898
notech_and4 i_161430(.A(n_462), .B(n_460), .C(n_249), .D(n_252), .Z(n_1889
));
notech_reg counter_l_reg_7(.CP(n_8225), .D(n_2049), .CD(n_8129), .Q(counter_l
notech_reg counter_l_reg_7(.CP(n_8219), .D(n_2044), .CD(n_8136), .Q(counter_l
[7]));
notech_mux2 i_1684(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_240), .Z(n_2049
notech_mux2 i_1683(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_240), .Z(n_2044
));
notech_nand3 i_151417(.A(n_457), .B(n_459), .C(n_257), .Z(n_1892));
notech_reg counter_l_reg_6(.CP(n_8225), .D(n_2055), .CD(n_8129), .Q(counter_l
notech_nand3 i_151429(.A(n_457), .B(n_459), .C(n_257), .Z(n_1883));
notech_reg counter_l_reg_6(.CP(n_8219), .D(n_2052), .CD(n_8136), .Q(counter_l
[6]));
notech_mux2 i_1692(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_241), .Z(n_2055
notech_mux2 i_1691(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_241), .Z(n_2052
));
notech_nand3 i_141416(.A(n_454), .B(n_456), .C(n_262), .Z(n_1886));
notech_reg counter_l_reg_5(.CP(n_8225), .D(n_2061), .CD(n_8129), .Q(counter_l
notech_nand3 i_141428(.A(n_454), .B(n_456), .C(n_262), .Z(n_1877));
notech_reg counter_l_reg_5(.CP(n_8219), .D(n_2059), .CD(n_8136), .Q(counter_l
[5]));
notech_mux2 i_1700(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_242), .Z(n_2061
notech_mux2 i_1699(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_242), .Z(n_2059
));
notech_nand3 i_131415(.A(n_449), .B(n_452), .C(n_268), .Z(n_1880));
notech_reg counter_l_reg_4(.CP(n_8227), .D(n_2067), .CD(n_8131), .Q(counter_l
notech_nand3 i_131427(.A(n_449), .B(n_452), .C(n_268), .Z(n_1871));
notech_reg counter_l_reg_4(.CP(n_8221), .D(n_2066), .CD(n_8138), .Q(counter_l
[4]));
notech_mux2 i_1708(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_243), .Z(n_2067
notech_mux2 i_1707(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_243), .Z(n_2066
));
notech_and4 i_121414(.A(n_271), .B(n_448), .C(n_272), .D(n_273), .Z(n_1874
notech_and4 i_121426(.A(n_271), .B(n_448), .C(n_272), .D(n_273), .Z(n_1865
));
notech_reg counter_l_reg_3(.CP(n_8227), .D(n_2073), .CD(n_8131), .Q(counter_l
notech_reg counter_l_reg_3(.CP(n_8221), .D(n_2073), .CD(n_8138), .Q(counter_l
[3]));
notech_mux2 i_1716(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_244), .Z(n_2073
notech_mux2 i_1715(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_244), .Z(n_2073
));
notech_nand3 i_111413(.A(n_442), .B(n_444), .C(n_278), .Z(n_1868));
notech_reg counter_l_reg_2(.CP(n_8227), .D(n_2079), .CD(n_8131), .Q(counter_l
notech_nand3 i_111425(.A(n_442), .B(n_444), .C(n_278), .Z(n_1859));
notech_reg counter_l_reg_2(.CP(n_8221), .D(n_2080), .CD(n_8138), .Q(counter_l
[2]));
notech_mux2 i_1724(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_245), .Z(n_2079
notech_mux2 i_1723(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_245), .Z(n_2080
));
notech_nand3 i_101412(.A(n_439), .B(n_441), .C(n_283), .Z(n_1862));
notech_reg counter_l_reg_1(.CP(n_8227), .D(n_2085), .CD(n_8131), .Q(counter_l
notech_nand3 i_101424(.A(n_439), .B(n_441), .C(n_283), .Z(n_1853));
notech_reg counter_l_reg_1(.CP(n_8221), .D(n_2087), .CD(n_8138), .Q(counter_l
[1]));
notech_mux2 i_1733(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_246), .Z(n_2085
notech_mux2 i_1731(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_246), .Z(n_2087
));
notech_and4 i_91411(.A(n_287), .B(n_286), .C(n_437), .D(n_288), .Z(n_1856
notech_and4 i_91423(.A(n_287), .B(n_286), .C(n_437), .D(n_288), .Z(n_1847
));
notech_reg counter_l_reg_0(.CP(n_8227), .D(n_2091), .CD(n_8131), .Q(counter_l
notech_reg counter_l_reg_0(.CP(n_8221), .D(n_2093), .CD(n_8138), .Q(counter_l
[0]));
notech_mux2 i_1742(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_247), .Z(n_2091
notech_mux2 i_1740(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_247), .Z(n_2093
));
notech_or4 i_81410(.A(n_291), .B(n_290), .C(n_292), .D(n_433), .Z(n_1850
notech_or4 i_81422(.A(n_291), .B(n_290), .C(n_292), .D(n_433), .Z(n_1841
));
notech_reg gate_sampled_reg(.CP(n_8227), .D(n_2097), .CD(n_8131), .Q(gate_sampled
notech_reg gate_sampled_reg(.CP(n_8221), .D(n_2099), .CD(n_8138), .Q(gate_sampled
));
notech_mux2 i_1750(.S(n_239), .A(gate), .B(gate_sampled), .Z(n_2097));
notech_nand2 i_71409(.A(n_429), .B(n_428), .Z(n_1844));
notech_reg loaded_reg(.CP(n_8229), .D(n_2103), .CD(n_8133), .Q(loaded)
notech_mux2 i_1748(.S(n_239), .A(gate), .B(gate_sampled), .Z(n_2099));
notech_nand2 i_71421(.A(n_429), .B(n_428), .Z(n_1835));
notech_reg loaded_reg(.CP(n_8223), .D(n_2105), .CD(n_8140), .Q(loaded)
);
notech_mux2 i_1758(.S(n_2251), .A(loaded), .B(n_7945), .Z(n_2103));
notech_nand2 i_61408(.A(n_427), .B(n_426), .Z(n_1838));
notech_reg trigger_sampled_reg(.CP(n_8227), .D(n_2109), .CD(n_8131), .Q(trigger_sampled
notech_mux2 i_1756(.S(n_2316), .A(loaded), .B(n_7963), .Z(n_2105));
notech_nand2 i_61420(.A(n_427), .B(n_426), .Z(n_1829));
notech_reg trigger_sampled_reg(.CP(n_8221), .D(n_2111), .CD(n_8138), .Q(trigger_sampled
));
notech_mux2 i_1766(.S(n_239), .A(trigger), .B(trigger_sampled), .Z(n_2109
notech_mux2 i_1764(.S(n_239), .A(trigger), .B(trigger_sampled), .Z(n_2111
));
notech_nao3 i_51407(.A(n_419), .B(n_301), .C(n_304), .Z(n_1832));
notech_reg trigger_reg(.CP(n_8227), .D(n_2117), .CD(n_8131), .Q(trigger)
notech_nao3 i_51419(.A(n_419), .B(n_301), .C(n_304), .Z(n_1823));
notech_reg trigger_reg(.CP(n_8221), .D(n_2117), .CD(n_8138), .Q(trigger)
);
notech_mux2 i_1774(.S(n_1686), .A(trigger), .B(n_2190), .Z(n_2117));
notech_nand2 i_41406(.A(n_415), .B(n_305), .Z(n_1826));
notech_reg_set gate_last_reg(.CP(n_8227), .D(gate), .SD(n_8131), .Q(gate_last
notech_mux2 i_1773(.S(n_2204), .A(trigger), .B(n_2188), .Z(n_2117));
notech_nand2 i_41418(.A(n_415), .B(n_305), .Z(n_1817));
notech_reg_set gate_last_reg(.CP(n_8221), .D(gate), .SD(n_8138), .Q(gate_last
));
notech_reg written_reg(.CP(n_8226), .D(n_2125), .CD(n_8130), .Q(written)
notech_reg written_reg(.CP(n_8220), .D(n_2125), .CD(n_8137), .Q(written)
);
notech_mux2 i_1786(.S(n_2158), .A(written), .B(n_237), .Z(n_2125));
notech_nand2 i_31405(.A(n_414), .B(n_195), .Z(n_1820));
notech_reg mode_reg_2(.CP(n_8226), .D(n_2131), .CD(n_8130), .Q(mode[2])
notech_mux2 i_1786(.S(n_2232), .A(written), .B(n_237), .Z(n_2125));
notech_nand2 i_31417(.A(n_414), .B(n_195), .Z(n_1811));
notech_reg mode_reg_2(.CP(n_8220), .D(n_2131), .CD(n_8137), .Q(mode[2])
);
notech_mux2 i_1795(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z
notech_mux2 i_1794(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z
(n_2131));
notech_nand2 i_21404(.A(n_413), .B(n_196), .Z(n_1814));
notech_reg_set mode_reg_1(.CP(n_8226), .D(n_2137), .SD(n_8130), .Q(mode[
notech_nand2 i_21416(.A(n_413), .B(n_196), .Z(n_1805));
notech_reg_set mode_reg_1(.CP(n_8220), .D(n_2137), .SD(n_8137), .Q(mode[
1]));
notech_mux2 i_1804(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z
notech_mux2 i_1802(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z
(n_2137));
notech_nao3 i_11403(.A(n_313), .B(n_312), .C(n_198), .Z(n_1808));
notech_reg mode_reg_0(.CP(n_8226), .D(n_2144), .CD(n_8130), .Q(mode[0])
notech_nao3 i_11415(.A(n_313), .B(n_312), .C(n_198), .Z(n_1799));
notech_reg mode_reg_0(.CP(n_8220), .D(n_2143), .CD(n_8137), .Q(mode[0])
);
notech_mux2 i_1813(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z
(n_2144));
notech_nand2 i_1558(.A(n_171), .B(n_7945), .Z(n_2340));
notech_reg clock_pulse_reg(.CP(n_8226), .D(n_2151), .CD(n_8130), .Q(clock_pulse
notech_mux2 i_1810(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z
(n_2143));
notech_nand2 i_1558(.A(n_172), .B(n_7963), .Z(n_2341));
notech_reg clock_pulse_reg(.CP(n_8220), .D(n_2149), .CD(n_8137), .Q(clock_pulse
));
notech_ao3 i_1822(.A(clock_last), .B(1'b1), .C(clock), .Z(n_2151));
notech_reg clock_last_reg(.CP(n_8227), .D(clock), .CD(n_8131), .Q(clock_last
notech_ao3 i_1818(.A(clock_last), .B(1'b1), .C(clock), .Z(n_2149));
notech_reg clock_last_reg(.CP(n_8221), .D(clock), .CD(n_8138), .Q(clock_last
));
notech_reg msb_write_reg(.CP(n_8227), .D(n_2155), .CD(n_8131), .Q(msb_write
notech_reg msb_write_reg(.CP(n_8221), .D(n_2153), .CD(n_8138), .Q(msb_write
));
notech_nand2 i_1830(.A(n_2157), .B(n_2159), .Z(n_2155));
notech_or4 i_1831(.A(n_344), .B(set_control_mode), .C(msb_write), .D(n_2243
), .Z(n_2157));
notech_nand3 i_1832(.A(n_7945), .B(n_175), .C(msb_write), .Z(n_2159));
notech_nao3 i_1554(.A(n_397), .B(n_315), .C(n_314), .Z(n_2327));
notech_reg rw_mode_reg_1(.CP(n_8227), .D(n_2163), .CD(n_8131), .Q(rw_mode
notech_nand2 i_1826(.A(n_2155), .B(n_2156), .Z(n_2153));
notech_or4 i_1827(.A(n_344), .B(set_control_mode), .C(msb_write), .D(n_2245
), .Z(n_2155));
notech_nand3 i_1828(.A(n_7963), .B(n_176), .C(msb_write), .Z(n_2156));
notech_nao3 i_1554(.A(n_397), .B(n_315), .C(n_314), .Z(n_1960));
notech_reg rw_mode_reg_1(.CP(n_8221), .D(n_2159), .CD(n_8138), .Q(rw_mode
[1]));
notech_mux2 i_1838(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]),
.Z(n_2163));
notech_reg_set rw_mode_reg_0(.CP(n_8227), .D(n_2169), .SD(n_8131), .Q(rw_mode
notech_mux2 i_1835(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]),
.Z(n_2159));
notech_reg_set rw_mode_reg_0(.CP(n_8221), .D(n_2165), .SD(n_8138), .Q(rw_mode
[0]));
notech_mux2 i_1846(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]),
.Z(n_2169));
notech_inv i_2224(.A(n_383), .Z(n_2175));
notech_inv i_2225(.A(n_379), .Z(n_2176));
notech_inv i_2226(.A(n_362), .Z(n_2177));
notech_inv i_2227(.A(n_364), .Z(n_2178));
notech_inv i_2228(.A(n_388), .Z(n_2179));
notech_inv i_2229(.A(n_360), .Z(n_2180));
notech_inv i_2230(.A(n_395), .Z(n_2181));
notech_inv i_2231(.A(n_167), .Z(n_2182));
notech_inv i_2232(.A(n_406), .Z(n_2183));
notech_inv i_2233(.A(n_173), .Z(n_2184));
notech_inv i_2234(.A(n_358), .Z(n_2185));
notech_inv i_2235(.A(n_421), .Z(n_2186));
notech_inv i_2236(.A(n_318), .Z(n_2187));
notech_inv i_2237(.A(n_209), .Z(n_2188));
notech_inv i_2238(.A(n_219), .Z(n_2189));
notech_inv i_2239(.A(n_238), .Z(n_2190));
notech_inv i_2240(.A(output_m[7]), .Z(n_2191));
notech_inv i_2241(.A(output_m[6]), .Z(n_2192));
notech_inv i_2242(.A(output_m[5]), .Z(n_2193));
notech_inv i_2243(.A(output_m[4]), .Z(n_2194));
notech_inv i_2244(.A(output_m[3]), .Z(n_2195));
notech_inv i_2245(.A(output_m[2]), .Z(n_2196));
notech_inv i_2246(.A(output_m[1]), .Z(n_2197));
notech_inv i_2247(.A(output_m[0]), .Z(n_2198));
notech_inv i_2248(.A(output_l[7]), .Z(n_2199));
notech_inv i_2249(.A(output_l[6]), .Z(n_2200));
notech_inv i_2250(.A(output_l[5]), .Z(n_2201));
notech_inv i_2251(.A(output_l[4]), .Z(n_2202));
notech_inv i_2252(.A(output_l[3]), .Z(n_2203));
notech_inv i_2253(.A(output_l[2]), .Z(n_2204));
notech_inv i_2254(.A(output_l[1]), .Z(n_2205));
notech_inv i_2255(.A(output_l[0]), .Z(n_2206));
notech_inv i_2256(.A(status_latched), .Z(n_2207));
notech_inv i_2257(.A(n_2324), .Z(n_2208));
notech_inv i_2258(.A(n_1898), .Z(n_2209));
notech_inv i_2259(.A(n_1874), .Z(n_2210));
notech_inv i_2260(.A(n_1856), .Z(n_2211));
notech_mux2 i_1844(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]),
.Z(n_2165));
notech_inv i_2224(.A(n_383), .Z(n_2171));
notech_inv i_2225(.A(n_379), .Z(n_2173));
notech_inv i_2226(.A(n_362), .Z(n_2174));
notech_inv i_2227(.A(n_364), .Z(n_2176));
notech_inv i_2228(.A(n_388), .Z(n_2177));
notech_inv i_2229(.A(n_360), .Z(n_2178));
notech_inv i_2230(.A(n_395), .Z(n_2179));
notech_inv i_2231(.A(n_358), .Z(n_2180));
notech_inv i_2232(.A(n_168), .Z(n_2181));
notech_inv i_2233(.A(n_406), .Z(n_2182));
notech_inv i_2234(.A(n_174), .Z(n_2183));
notech_inv i_2235(.A(n_421), .Z(n_2184));
notech_inv i_2236(.A(n_318), .Z(n_2185));
notech_inv i_2237(.A(n_209), .Z(n_2186));
notech_inv i_2238(.A(n_219), .Z(n_2187));
notech_inv i_2239(.A(n_238), .Z(n_2188));
notech_inv i_2240(.A(output_m[7]), .Z(n_2189));
notech_inv i_2241(.A(output_m[6]), .Z(n_2190));
notech_inv i_2242(.A(output_m[5]), .Z(n_2191));
notech_inv i_2243(.A(output_m[4]), .Z(n_2192));
notech_inv i_2244(.A(output_m[3]), .Z(n_2193));
notech_inv i_2245(.A(output_m[2]), .Z(n_2194));
notech_inv i_2246(.A(output_m[1]), .Z(n_2195));
notech_inv i_2247(.A(output_m[0]), .Z(n_2196));
notech_inv i_2248(.A(output_l[7]), .Z(n_2197));
notech_inv i_2249(.A(output_l[6]), .Z(n_2198));
notech_inv i_2250(.A(output_l[5]), .Z(n_2199));
notech_inv i_2251(.A(output_l[4]), .Z(n_2200));
notech_inv i_2252(.A(output_l[3]), .Z(n_2201));
notech_inv i_2253(.A(output_l[2]), .Z(n_2202));
notech_inv i_2254(.A(output_l[1]), .Z(n_2203));
notech_inv i_2255(.A(output_l[0]), .Z(n_2205));
notech_inv i_2256(.A(status_latched), .Z(n_2206));
notech_inv i_2257(.A(n_1957), .Z(n_2208));
notech_inv i_2258(.A(n_1889), .Z(n_2209));
notech_inv i_2259(.A(n_1865), .Z(n_2210));
notech_inv i_2260(.A(n_1847), .Z(n_2211));
notech_inv i_2261(.A(bcd), .Z(n_2212));
notech_inv i_2262(.A(counter_m[6]), .Z(n_2213));
notech_inv i_2263(.A(counter_m[5]), .Z(n_2214));
notech_inv i_2264(.A(counter_m[4]), .Z(n_2215));
notech_inv i_2265(.A(counter_m[3]), .Z(n_2216));
notech_inv i_2266(.A(counter_m[2]), .Z(n_2217));
notech_inv i_2267(.A(counter_m[1]), .Z(n_2218));
notech_inv i_2268(.A(counter_m[0]), .Z(n_2219));
notech_inv i_2269(.A(counter_l[6]), .Z(n_2220));
notech_inv i_2270(.A(counter_l[5]), .Z(n_2221));
notech_inv i_2271(.A(gate_last), .Z(n_2222));
notech_inv i_2272(.A(mode[2]), .Z(n_2224));
notech_inv i_2273(.A(mode[1]), .Z(n_2225));
notech_inv i_2274(.A(clock_pulse), .Z(n_2226));
notech_inv i_2275(.A(clock_last), .Z(n_2227));
notech_inv i_2276(.A(msb_write), .Z(n_2228));
notech_inv i_2277(.A(rw_mode[1]), .Z(n_2229));
notech_inv i_2278(.A(rw_mode[0]), .Z(n_2230));
notech_inv i_2279(.A(data_in[2]), .Z(n_2231));
notech_inv i_2280(.A(data_in[3]), .Z(n_2232));
notech_inv i_2281(.A(counter[0]), .Z(n_2233));
notech_inv i_2282(.A(counter[1]), .Z(n_2234));
notech_inv i_2283(.A(counter[9]), .Z(n_2235));
notech_inv i_2284(.A(counter[10]), .Z(n_2236));
notech_inv i_2285(.A(counter[11]), .Z(n_2237));
notech_inv i_2286(.A(counter[13]), .Z(n_2238));
notech_inv i_2287(.A(counter[14]), .Z(n_2239));
notech_inv i_2288(.A(counter[15]), .Z(n_2240));
notech_inv i_2289(.A(set_control_mode), .Z(n_2241));
notech_inv i_2290(.A(write), .Z(n_2243));
notech_inv i_2291(.A(out), .Z(n_2244));
notech_inv i_2292(.A(n_1429), .Z(n_2246));
notech_inv i_2293(.A(n_1309), .Z(n_2247));
notech_inv i_2294(.A(n_1431), .Z(n_2248));
notech_inv i_2295(.A(n_1311), .Z(n_2249));
notech_inv i_2296(.A(n_1315), .Z(n_2250));
notech_inv i_2266(.A(counter_m[2]), .Z(n_2218));
notech_inv i_2267(.A(counter_m[1]), .Z(n_2219));
notech_inv i_2268(.A(counter_m[0]), .Z(n_2221));
notech_inv i_2269(.A(counter_l[6]), .Z(n_2222));
notech_inv i_2270(.A(counter_l[5]), .Z(n_2223));
notech_inv i_2271(.A(gate_last), .Z(n_2224));
notech_inv i_2272(.A(mode[2]), .Z(n_2225));
notech_inv i_2273(.A(mode[1]), .Z(n_2226));
notech_inv i_2274(.A(clock_pulse), .Z(n_2227));
notech_inv i_2275(.A(clock_last), .Z(n_2228));
notech_inv i_2276(.A(msb_write), .Z(n_2229));
notech_inv i_2277(.A(rw_mode[1]), .Z(n_2230));
notech_inv i_2278(.A(rw_mode[0]), .Z(n_2231));
notech_inv i_2279(.A(data_in[2]), .Z(n_2233));
notech_inv i_2280(.A(data_in[3]), .Z(n_2234));
notech_inv i_2281(.A(counter[0]), .Z(n_2236));
notech_inv i_2282(.A(counter[1]), .Z(n_2237));
notech_inv i_2283(.A(counter[9]), .Z(n_2238));
notech_inv i_2284(.A(counter[10]), .Z(n_2239));
notech_inv i_2285(.A(counter[11]), .Z(n_2240));
notech_inv i_2286(.A(counter[13]), .Z(n_2241));
notech_inv i_2287(.A(counter[14]), .Z(n_2242));
notech_inv i_2288(.A(counter[15]), .Z(n_2243));
notech_inv i_2289(.A(set_control_mode), .Z(n_2244));
notech_inv i_2290(.A(write), .Z(n_2245));
notech_inv i_2291(.A(out), .Z(n_2246));
notech_inv i_2292(.A(n_1429), .Z(n_2247));
notech_inv i_2293(.A(n_1309), .Z(n_2248));
notech_inv i_2294(.A(n_1431), .Z(n_2249));
notech_inv i_2295(.A(n_1311), .Z(n_2250));
notech_inv i_2296(.A(n_1315), .Z(n_2251));
notech_inv i_2297(.A(n_1317), .Z(n_2252));
notech_inv i_2298(.A(n_1435), .Z(n_2253));
notech_inv i_2299(.A(n_1319), .Z(n_2255));
notech_inv i_2300(.A(n_1436), .Z(n_2256));
notech_inv i_2301(.A(n_1438), .Z(n_2257));
notech_inv i_2302(.A(n_1439), .Z(n_2258));
notech_inv i_2303(.A(n_1440), .Z(n_2259));
notech_inv i_2304(.A(n_1441), .Z(n_2260));
notech_inv i_2305(.A(n_1442), .Z(n_2261));
notech_inv i_2306(.A(n_1443), .Z(n_2262));
notech_inv i_2307(.A(n_1444), .Z(n_2263));
notech_inv i_2308(.A(n_1445), .Z(n_2264));
notech_inv i_2309(.A(read), .Z(n_2265));
notech_inv i_2310(.A(n_1307), .Z(n_2266));
notech_inv i_2311(.A(n_1313), .Z(n_2267));
notech_inv i_2312(.A(n_1433), .Z(n_2268));
AWDP_DEC_36_2 i_1338(.O0({n_1329, n_1328, n_1327, n_1326, n_1325, n_1324
notech_inv i_2299(.A(n_1319), .Z(n_2254));
notech_inv i_2300(.A(n_1436), .Z(n_2255));
notech_inv i_2301(.A(n_1438), .Z(n_2256));
notech_inv i_2302(.A(n_1439), .Z(n_2257));
notech_inv i_2303(.A(n_1440), .Z(n_2258));
notech_inv i_2304(.A(n_1441), .Z(n_2259));
notech_inv i_2305(.A(n_1442), .Z(n_2260));
notech_inv i_2306(.A(n_1443), .Z(n_2261));
notech_inv i_2307(.A(n_1444), .Z(n_2262));
notech_inv i_2308(.A(n_1445), .Z(n_2263));
notech_inv i_2309(.A(read), .Z(n_2264));
notech_inv i_2310(.A(n_1307), .Z(n_2265));
notech_inv i_2311(.A(n_1313), .Z(n_2266));
notech_inv i_2312(.A(n_1433), .Z(n_2267));
AWDP_DEC_27_2 i_1338(.O0({n_1329, n_1328, n_1327, n_1326, n_1325, n_1324
, n_1323, n_1322, n_1321, n_1319, n_1317, n_1315, n_1313, n_1311
, n_1309, n_1307}), .counter(counter));
AWDP_SUB_39_2 i_1332(.O0({n_1445, n_1444, n_1443, n_1442, n_1441, n_1440
11750,97 → 11756,98
 
 
 
notech_inv i_1391(.A(n_8251), .Z(n_8257));
notech_inv i_1390(.A(n_8251), .Z(n_8256));
notech_inv i_1386(.A(n_8251), .Z(n_8252));
notech_inv i_1385(.A(clk), .Z(n_8251));
notech_inv i_1303(.A(n_8155), .Z(n_8161));
notech_inv i_1302(.A(n_8155), .Z(n_8160));
notech_inv i_1298(.A(n_8155), .Z(n_8156));
notech_inv i_1297(.A(rst_n), .Z(n_8155));
notech_inv i_151(.A(n_7931), .Z(n_7932));
notech_inv i_148(.A(\nbus_81[0] ), .Z(n_7931));
notech_nand2 i_66(.A(counter_0_readdata[7]), .B(n_4754), .Z(n_126));
notech_nand2 i_63(.A(n_4754), .B(counter_0_readdata[6]), .Z(n_125));
notech_nand2 i_60(.A(n_4754), .B(counter_0_readdata[5]), .Z(n_124));
notech_nand2 i_57(.A(n_4754), .B(counter_0_readdata[4]), .Z(n_123));
notech_nand2 i_54(.A(n_4754), .B(counter_0_readdata[3]), .Z(n_122));
notech_nand2 i_51(.A(n_4754), .B(counter_0_readdata[2]), .Z(n_121));
notech_nand2 i_48(.A(n_4754), .B(counter_0_readdata[1]), .Z(n_120));
notech_nand2 i_45(.A(n_4754), .B(counter_0_readdata[0]), .Z(n_119));
notech_inv i_1658(.A(n_8532), .Z(n_8533));
notech_inv i_1657(.A(rst_n), .Z(n_8532));
notech_inv i_1378(.A(n_8245), .Z(n_8251));
notech_inv i_1377(.A(n_8245), .Z(n_8250));
notech_inv i_1373(.A(n_8245), .Z(n_8246));
notech_inv i_1372(.A(clk), .Z(n_8245));
notech_inv i_1303(.A(n_8166), .Z(n_8168));
notech_inv i_1302(.A(n_8166), .Z(n_8167));
notech_inv i_1301(.A(n_8533), .Z(n_8166));
notech_inv i_155(.A(n_7949), .Z(n_7950));
notech_inv i_153(.A(\nbus_81[0] ), .Z(n_7949));
notech_nand2 i_66(.A(counter_0_readdata[7]), .B(n_4746), .Z(n_126));
notech_nand2 i_63(.A(n_4746), .B(counter_0_readdata[6]), .Z(n_125));
notech_nand2 i_60(.A(n_4746), .B(counter_0_readdata[5]), .Z(n_124));
notech_nand2 i_57(.A(n_4746), .B(counter_0_readdata[4]), .Z(n_123));
notech_nand2 i_54(.A(n_4746), .B(counter_0_readdata[3]), .Z(n_122));
notech_nand2 i_51(.A(n_4746), .B(counter_0_readdata[2]), .Z(n_121));
notech_nand2 i_48(.A(n_4746), .B(counter_0_readdata[1]), .Z(n_120));
notech_nand2 i_45(.A(n_4746), .B(counter_0_readdata[0]), .Z(n_119));
notech_xor2 i_40(.A(n_232), .B(counter_1_cnt[2]), .Z(n_118));
notech_xor2 i_38(.A(n_237), .B(counter_1_cnt[5]), .Z(n_117));
notech_xor2 i_37(.A(n_224), .B(system_counter[3]), .Z(n_116));
notech_xor2 i_36(.A(system_counter[4]), .B(n_225), .Z(n_115));
notech_xor2 i_35(.A(system_counter[5]), .B(n_226), .Z(n_114));
notech_xor2 i_343981(.A(n_227), .B(system_counter[6]), .Z(n_113));
notech_xor2 i_344035(.A(n_227), .B(system_counter[6]), .Z(n_113));
notech_xor2 i_32(.A(n_228), .B(system_counter[7]), .Z(n_112));
notech_or2 i_31(.A(hopping[2]), .B(n_218), .Z(n_111));
notech_and2 i_7(.A(system_counter[7]), .B(n_3522), .Z(n_156));
notech_ao4 i_41(.A(system_counter[6]), .B(n_3521), .C(n_161), .D(n_160),
notech_and2 i_7(.A(system_counter[7]), .B(n_3524), .Z(n_156));
notech_ao4 i_41(.A(system_counter[6]), .B(n_3523), .C(n_161), .D(n_160),
.Z(n_157));
notech_and2 i_10(.A(system_counter[6]), .B(n_3521), .Z(n_160));
notech_ao4 i_28(.A(system_counter[5]), .B(n_3520), .C(n_165), .D(n_164),
notech_and2 i_10(.A(system_counter[6]), .B(n_3523), .Z(n_160));
notech_ao4 i_28(.A(system_counter[5]), .B(n_3522), .C(n_165), .D(n_164),
.Z(n_161));
notech_and2 i_11(.A(system_counter[5]), .B(n_3520), .Z(n_164));
notech_ao4 i_25(.A(system_counter[4]), .B(n_3519), .C(n_169), .D(n_168),
notech_and2 i_11(.A(system_counter[5]), .B(n_3522), .Z(n_164));
notech_ao4 i_25(.A(system_counter[4]), .B(n_3521), .C(n_169), .D(n_168),
.Z(n_165));
notech_and2 i_12(.A(system_counter[4]), .B(n_3519), .Z(n_168));
notech_ao4 i_22(.A(system_counter[3]), .B(n_3518), .C(n_173), .D(n_172),
notech_and2 i_12(.A(system_counter[4]), .B(n_3521), .Z(n_168));
notech_ao4 i_22(.A(system_counter[3]), .B(n_3520), .C(n_173), .D(n_172),
.Z(n_169));
notech_and2 i_13(.A(system_counter[3]), .B(n_3518), .Z(n_172));
notech_ao4 i_20(.A(n_223), .B(n_3517), .C(system_counter[2]), .D(n_176),
notech_and2 i_13(.A(system_counter[3]), .B(n_3520), .Z(n_172));
notech_ao4 i_20(.A(n_223), .B(n_3519), .C(system_counter[2]), .D(n_176),
.Z(n_173));
notech_and2 i_18(.A(n_223), .B(n_3517), .Z(n_176));
notech_and2 i_27(.A(system_counter[1]), .B(n_3516), .Z(n_179));
notech_nand2 i_12494(.A(n_261), .B(n_119), .Z(n_183));
notech_nand2 i_22495(.A(n_260), .B(n_120), .Z(n_186));
notech_nand2 i_32496(.A(n_259), .B(n_121), .Z(n_189));
notech_nand2 i_42497(.A(n_258), .B(n_122), .Z(n_192));
notech_nand2 i_52498(.A(n_257), .B(n_123), .Z(n_195));
notech_nand2 i_62499(.A(n_256), .B(n_124), .Z(n_198));
notech_nand2 i_72500(.A(n_255), .B(n_125), .Z(n_201));
notech_nand2 i_82501(.A(n_254), .B(n_126), .Z(n_204));
notech_ao4 i_2162(.A(n_246), .B(n_3554), .C(n_243), .D(n_3511), .Z(n_207
notech_and2 i_18(.A(n_223), .B(n_3519), .Z(n_176));
notech_and2 i_27(.A(system_counter[1]), .B(n_3518), .Z(n_179));
notech_nand2 i_12537(.A(n_261), .B(n_119), .Z(n_183));
notech_nand2 i_22538(.A(n_260), .B(n_120), .Z(n_186));
notech_nand2 i_32539(.A(n_259), .B(n_121), .Z(n_189));
notech_nand2 i_42540(.A(n_258), .B(n_122), .Z(n_192));
notech_nand2 i_52541(.A(n_257), .B(n_123), .Z(n_195));
notech_nand2 i_62542(.A(n_256), .B(n_124), .Z(n_198));
notech_nand2 i_72543(.A(n_255), .B(n_125), .Z(n_201));
notech_nand2 i_82544(.A(n_254), .B(n_126), .Z(n_204));
notech_ao4 i_2165(.A(n_246), .B(n_3556), .C(n_243), .D(n_3513), .Z(n_207
));
notech_ao4 i_2147(.A(n_246), .B(n_3555), .C(n_240), .D(n_251), .Z(n_208)
notech_ao4 i_2150(.A(n_246), .B(n_3557), .C(n_240), .D(n_251), .Z(n_208)
);
notech_ao4 i_219(.A(n_246), .B(n_3556), .C(n_243), .D(n_240), .Z(n_209)
notech_ao4 i_222(.A(n_246), .B(n_3558), .C(n_243), .D(n_240), .Z(n_209)
);
notech_xor2 i_21968(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .Z(n_210
notech_xor2 i_22011(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .Z(n_210
));
notech_xor2 i_4(.A(counter_1_cnt[3]), .B(n_235), .Z(n_211));
notech_xor2 i_51969(.A(counter_1_cnt[4]), .B(n_236), .Z(n_212));
notech_ao4 i_32472(.A(n_3525), .B(n_3524), .C(\nbus_81[0] ), .D(n_229),
notech_xor2 i_52012(.A(counter_1_cnt[4]), .B(n_236), .Z(n_212));
notech_ao4 i_32515(.A(n_3527), .B(n_3526), .C(\nbus_81[0] ), .D(n_229),
.Z(n_213));
notech_ao4 i_22503(.A(n_3513), .B(n_3512), .C(n_4857), .D(n_221), .Z(n_214
notech_ao4 i_22546(.A(n_3515), .B(n_3514), .C(n_4845), .D(n_221), .Z(n_214
));
notech_nand3 i_19(.A(hopping[0]), .B(hopping[2]), .C(hopping[1]), .Z(n_215
));
notech_and2 i_14(.A(hopping[0]), .B(hopping[1]), .Z(n_218));
notech_nao3 i_154(.A(n_215), .B(n_3514), .C(hopping[7]), .Z(n_220));
notech_nand2 i_152(.A(hopping[0]), .B(n_3513), .Z(n_221));
notech_nand2 i_150(.A(cycles_in_1193181hz[0]), .B(n_3523), .Z(n_222));
notech_ao4 i_5(.A(system_counter[1]), .B(n_3516), .C(n_179), .D(n_222),
notech_nao3 i_154(.A(n_215), .B(n_3516), .C(hopping[7]), .Z(n_220));
notech_nand2 i_152(.A(hopping[0]), .B(n_3515), .Z(n_221));
notech_nand2 i_150(.A(cycles_in_1193181hz[0]), .B(n_3525), .Z(n_222));
notech_ao4 i_5(.A(system_counter[1]), .B(n_3518), .C(n_179), .D(n_222),
.Z(n_223));
notech_nand2 i_13186(.A(system_counter[1]), .B(system_counter[2]), .Z(n_224
notech_nand2 i_13228(.A(system_counter[1]), .B(system_counter[2]), .Z(n_224
));
notech_nand3 i_9(.A(system_counter[1]), .B(system_counter[3]), .C(system_counter
[2]), .Z(n_225));
notech_and4 i_103190(.A(system_counter[1]), .B(system_counter[3]), .C(system_counter
notech_and4 i_103232(.A(system_counter[1]), .B(system_counter[3]), .C(system_counter
[4]), .D(system_counter[2]), .Z(n_226));
notech_ao3 i_183193(.A(system_counter[4]), .B(system_counter[5]), .C(n_225
notech_ao3 i_183235(.A(system_counter[4]), .B(system_counter[5]), .C(n_225
), .Z(n_227));
notech_and3 i_23(.A(system_counter[5]), .B(n_226), .C(system_counter[6])
, .Z(n_228));
notech_nand2 i_149(.A(system_counter[1]), .B(n_3525), .Z(n_229));
notech_and2 i_13230(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .Z(n_232
notech_nand2 i_149(.A(system_counter[1]), .B(n_3527), .Z(n_229));
notech_and2 i_13272(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .Z(n_232
));
notech_nand3 i_145(.A(\nbus_81[0] ), .B(counter_1_cnt[5]), .C(n_232), .Z
(n_234));
notech_and3 i_83234(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .C(counter_1_cnt
notech_and3 i_83276(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .C(counter_1_cnt
[2]), .Z(n_235));
notech_and4 i_93235(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .C(counter_1_cnt
notech_and4 i_93277(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .C(counter_1_cnt
[2]), .D(counter_1_cnt[3]), .Z(n_236));
notech_and3 i_24(.A(counter_1_cnt[3]), .B(n_235), .C(counter_1_cnt[4]),
.Z(n_237));
11847,266 → 11854,266
notech_and2 i_140(.A(io_write), .B(io_address[1]), .Z(n_238));
notech_nao3 i_26(.A(io_address[0]), .B(n_238), .C(io_writedata[7]), .Z(n_240
));
notech_or2 i_33247(.A(io_writedata[5]), .B(io_writedata[4]), .Z(n_241)
notech_or2 i_33289(.A(io_writedata[5]), .B(io_writedata[4]), .Z(n_241)
);
notech_nao3 i_138(.A(n_3552), .B(n_3553), .C(io_writedata[5]), .Z(n_243)
notech_nao3 i_138(.A(n_3554), .B(n_3555), .C(io_writedata[5]), .Z(n_243)
);
notech_and4 i_16(.A(io_write), .B(io_address[0]), .C(io_writedata[7]), .D
(io_address[1]), .Z(n_244));
notech_nao3 i_30(.A(io_writedata[6]), .B(n_244), .C(io_writedata[5]), .Z
(n_246));
notech_nao3 i_133(.A(n_3552), .B(io_writedata[6]), .C(io_writedata[5]),
notech_nao3 i_133(.A(n_3554), .B(io_writedata[6]), .C(io_writedata[5]),
.Z(n_251));
notech_ao4 i_128(.A(n_3551), .B(n_3538), .C(n_3550), .D(n_3546), .Z(n_254
notech_ao4 i_128(.A(n_3553), .B(n_3540), .C(n_3552), .D(n_3548), .Z(n_254
));
notech_ao4 i_126(.A(n_3551), .B(n_3537), .C(n_3550), .D(n_3545), .Z(n_255
notech_ao4 i_126(.A(n_3553), .B(n_3539), .C(n_3552), .D(n_3547), .Z(n_255
));
notech_ao4 i_124(.A(n_3551), .B(n_3536), .C(n_3550), .D(n_3544), .Z(n_256
notech_ao4 i_124(.A(n_3553), .B(n_3538), .C(n_3552), .D(n_3546), .Z(n_256
));
notech_ao4 i_122(.A(n_3551), .B(n_3535), .C(n_3550), .D(n_3543), .Z(n_257
notech_ao4 i_122(.A(n_3553), .B(n_3537), .C(n_3552), .D(n_3545), .Z(n_257
));
notech_ao4 i_120(.A(n_3551), .B(n_3534), .C(n_3550), .D(n_3542), .Z(n_258
notech_ao4 i_120(.A(n_3553), .B(n_3536), .C(n_3552), .D(n_3544), .Z(n_258
));
notech_ao4 i_118(.A(n_3551), .B(n_3533), .C(n_3550), .D(n_3541), .Z(n_259
notech_ao4 i_118(.A(n_3553), .B(n_3535), .C(n_3552), .D(n_3543), .Z(n_259
));
notech_ao4 i_116(.A(n_3551), .B(n_3532), .C(n_3550), .D(n_3540), .Z(n_260
notech_ao4 i_116(.A(n_3553), .B(n_3534), .C(n_3552), .D(n_3542), .Z(n_260
));
notech_ao4 i_114(.A(n_3551), .B(n_3531), .C(n_3550), .D(n_3539), .Z(n_261
notech_ao4 i_114(.A(n_3553), .B(n_3533), .C(n_3552), .D(n_3541), .Z(n_261
));
notech_ao3 i_215(.A(n_241), .B(n_3553), .C(n_240), .Z(n_4750));
notech_and4 i_223(.A(io_writedata[6]), .B(n_244), .C(io_writedata[1]), .D
(n_3552), .Z(n_4752));
notech_ao3 i_224(.A(io_write), .B(n_3530), .C(io_address[0]), .Z(n_4753)
notech_ao3 i_218(.A(n_241), .B(n_3555), .C(n_240), .Z(n_4742));
notech_and4 i_226(.A(io_writedata[6]), .B(n_244), .C(io_writedata[1]), .D
(n_3554), .Z(n_4744));
notech_ao3 i_227(.A(io_write), .B(n_3532), .C(io_address[0]), .Z(n_4745)
);
notech_reg hopping_reg_0(.CP(n_8257), .D(n_3321), .CD(n_8161), .Q(hopping
notech_reg hopping_reg_0(.CP(n_8251), .D(n_3323), .CD(n_8168), .Q(hopping
[0]));
notech_mux2 i_4395(.S(\nbus_81[0] ), .A(hopping[0]), .B(n_4702), .Z(n_3321
notech_mux2 i_4395(.S(\nbus_81[0] ), .A(hopping[0]), .B(n_4697), .Z(n_3323
));
notech_ao3 i_2142(.A(io_writedata[6]), .B(n_241), .C(n_240), .Z(n_4908)
notech_ao3 i_2145(.A(io_writedata[6]), .B(n_241), .C(n_240), .Z(n_4907)
);
notech_reg hopping_reg_1(.CP(n_8257), .D(n_3327), .CD(n_8161), .Q(hopping
notech_reg hopping_reg_1(.CP(n_8251), .D(n_3329), .CD(n_8168), .Q(hopping
[1]));
notech_mux2 i_4403(.S(\nbus_81[0] ), .A(hopping[1]), .B(n_3549), .Z(n_3327
notech_mux2 i_4403(.S(\nbus_81[0] ), .A(hopping[1]), .B(n_3551), .Z(n_3329
));
notech_and4 i_2151(.A(io_writedata[6]), .B(n_244), .C(n_3552), .D(io_writedata
[2]), .Z(n_4910));
notech_reg hopping_reg_2(.CP(n_8257), .D(n_3333), .CD(n_8161), .Q(hopping
notech_and4 i_2154(.A(io_writedata[6]), .B(n_244), .C(n_3554), .D(io_writedata
[2]), .Z(n_4909));
notech_reg hopping_reg_2(.CP(n_8251), .D(n_3335), .CD(n_8168), .Q(hopping
[2]));
notech_mux2 i_4411(.S(\nbus_81[0] ), .A(hopping[2]), .B(n_4714), .Z(n_3333
notech_mux2 i_4411(.S(\nbus_81[0] ), .A(hopping[2]), .B(n_4709), .Z(n_3335
));
notech_and3 i_2152(.A(io_write), .B(io_address[0]), .C(n_3530), .Z(n_4911
notech_and3 i_2155(.A(io_write), .B(io_address[0]), .C(n_3532), .Z(n_4910
));
notech_reg hopping_reg_3(.CP(n_8257), .D(n_3343), .CD(n_8161), .Q(hopping
notech_reg hopping_reg_3(.CP(n_8251), .D(n_3345), .CD(n_8168), .Q(hopping
[3]));
notech_and3 i_2157(.A(n_241), .B(n_3553), .C(n_244), .Z(n_4686));
notech_ao3 i_4423(.A(hopping[3]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3343)
notech_and3 i_2160(.A(n_241), .B(n_3555), .C(n_244), .Z(n_4912));
notech_ao3 i_4423(.A(hopping[3]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3345)
);
notech_reg hopping_reg_4(.CP(n_8257), .D(n_3349), .CD(n_8161), .Q(hopping
notech_reg hopping_reg_4(.CP(n_8251), .D(n_3351), .CD(n_8168), .Q(hopping
[4]));
notech_and4 i_2166(.A(io_writedata[6]), .B(n_244), .C(n_3552), .D(io_writedata
[3]), .Z(n_4688));
notech_ao3 i_4431(.A(hopping[4]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3349)
notech_and4 i_2169(.A(io_writedata[6]), .B(n_244), .C(n_3554), .D(io_writedata
[3]), .Z(n_4914));
notech_ao3 i_4431(.A(hopping[4]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3351)
);
notech_reg hopping_reg_5(.CP(n_8257), .D(n_3355), .CD(n_8161), .Q(hopping
notech_reg hopping_reg_5(.CP(n_8251), .D(n_3357), .CD(n_8168), .Q(hopping
[5]));
notech_ao3 i_2167(.A(io_write), .B(io_address[1]), .C(io_address[0]), .Z
(n_4689));
notech_ao3 i_4439(.A(hopping[5]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3355)
notech_ao3 i_2170(.A(io_write), .B(io_address[1]), .C(io_address[0]), .Z
(n_4915));
notech_ao3 i_4439(.A(hopping[5]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3357)
);
notech_reg hopping_reg_6(.CP(n_8256), .D(n_3361), .CD(n_8160), .Q(hopping
notech_reg hopping_reg_6(.CP(n_8250), .D(n_3363), .CD(n_8167), .Q(hopping
[6]));
notech_or4 i_2(.A(counter_1_cnt[3]), .B(counter_1_cnt[2]), .C(counter_1_cnt
[4]), .D(n_234), .Z(n_4595));
notech_ao3 i_4447(.A(hopping[6]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3361)
[4]), .D(n_234), .Z(n_4555));
notech_ao3 i_4447(.A(hopping[6]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3363)
);
notech_reg hopping_reg_7(.CP(n_8256), .D(n_3367), .CD(n_8160), .Q(hopping
notech_reg hopping_reg_7(.CP(n_8250), .D(n_3369), .CD(n_8167), .Q(hopping
[7]));
notech_and2 i_32504(.A(n_111), .B(n_3515), .Z(n_4714));
notech_ao3 i_4455(.A(hopping[7]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3367)
notech_and2 i_32547(.A(n_111), .B(n_3517), .Z(n_4709));
notech_ao3 i_4455(.A(hopping[7]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3369)
);
notech_reg cycles_in_1193181hz_reg_0(.CP(n_8256), .D(n_3369), .CD(n_8160
notech_reg cycles_in_1193181hz_reg_0(.CP(n_8250), .D(n_3371), .CD(n_8167
), .Q(cycles_in_1193181hz[0]));
notech_or2 i_4459(.A(\nbus_81[0] ), .B(cycles_in_1193181hz[0]), .Z(n_3369
notech_or2 i_4459(.A(\nbus_81[0] ), .B(cycles_in_1193181hz[0]), .Z(n_3371
));
notech_nor2 i_12502(.A(hopping[0]), .B(n_4857), .Z(n_4702));
notech_reg_set cycles_in_1193181hz_reg_1(.CP(n_8257), .D(n_3375), .SD(n_8161
notech_nor2 i_12545(.A(hopping[0]), .B(n_4845), .Z(n_4697));
notech_reg_set cycles_in_1193181hz_reg_1(.CP(n_8251), .D(n_3377), .SD(n_8168
), .Q(cycles_in_1193181hz[1]));
notech_mux2 i_4467(.S(\nbus_81[0] ), .A(cycles_in_1193181hz[1]), .B(n_3515
), .Z(n_3375));
notech_mux2 i_4467(.S(\nbus_81[0] ), .A(cycles_in_1193181hz[1]), .B(n_3517
), .Z(n_3377));
notech_or4 i_43(.A(hopping[5]), .B(hopping[3]), .C(hopping[4]), .D(n_220
), .Z(n_4857));
notech_reg cycles_in_1193181hz_reg_2(.CP(n_8257), .D(n_3385), .CD(n_8161
), .Z(n_4845));
notech_reg cycles_in_1193181hz_reg_2(.CP(n_8251), .D(n_3387), .CD(n_8168
), .Q(cycles_in_1193181hz[2]));
notech_ao3 i_4479(.A(cycles_in_1193181hz[2]), .B(1'b1), .C(\nbus_81[0] )
, .Z(n_3385));
notech_reg_set cycles_in_1193181hz_reg_3(.CP(n_8257), .D(n_3391), .SD(n_8161
, .Z(n_3387));
notech_reg_set cycles_in_1193181hz_reg_3(.CP(n_8251), .D(n_3393), .SD(n_8168
), .Q(cycles_in_1193181hz[3]));
notech_ao4 i_433225(.A(system_counter[7]), .B(n_3522), .C(n_157), .D(n_156
notech_ao4 i_433267(.A(system_counter[7]), .B(n_3524), .C(n_157), .D(n_156
), .Z(\nbus_81[0] ));
notech_ao3 i_4487(.A(cycles_in_1193181hz[3]), .B(1'b1), .C(\nbus_81[0] )
, .Z(n_3391));
notech_reg cycles_in_1193181hz_reg_4(.CP(n_8257), .D(n_3393), .CD(n_8161
, .Z(n_3393));
notech_reg cycles_in_1193181hz_reg_4(.CP(n_8251), .D(n_3395), .CD(n_8168
), .Q(cycles_in_1193181hz[4]));
notech_or2 i_4491(.A(\nbus_81[0] ), .B(cycles_in_1193181hz[4]), .Z(n_3393
notech_or2 i_4491(.A(\nbus_81[0] ), .B(cycles_in_1193181hz[4]), .Z(n_3395
));
notech_reg_set cycles_in_1193181hz_reg_5(.CP(n_8257), .D(n_3403), .SD(n_8161
notech_reg_set cycles_in_1193181hz_reg_5(.CP(n_8251), .D(n_3405), .SD(n_8168
), .Q(cycles_in_1193181hz[5]));
notech_ao3 i_4503(.A(cycles_in_1193181hz[5]), .B(1'b1), .C(\nbus_81[0] )
, .Z(n_3403));
notech_reg cycles_in_1193181hz_reg_6(.CP(n_8257), .D(n_3405), .CD(n_8161
, .Z(n_3405));
notech_reg cycles_in_1193181hz_reg_6(.CP(n_8251), .D(n_3407), .CD(n_8168
), .Q(cycles_in_1193181hz[6]));
notech_or2 i_4507(.A(n_7932), .B(cycles_in_1193181hz[6]), .Z(n_3405));
notech_nor2 i_52474(.A(n_7932), .B(n_115), .Z(n_4658));
notech_reg cycles_in_1193181hz_reg_7(.CP(n_8257), .D(n_3415), .CD(n_8161
notech_or2 i_4507(.A(n_7950), .B(cycles_in_1193181hz[6]), .Z(n_3407));
notech_nor2 i_52517(.A(n_7950), .B(n_115), .Z(n_4668));
notech_reg cycles_in_1193181hz_reg_7(.CP(n_8251), .D(n_3417), .CD(n_8168
), .Q(cycles_in_1193181hz[7]));
notech_nor2 i_42473(.A(n_7932), .B(n_116), .Z(n_4651));
notech_ao3 i_4519(.A(cycles_in_1193181hz[7]), .B(1'b1), .C(n_7932), .Z(n_3415
notech_nor2 i_42516(.A(n_7950), .B(n_116), .Z(n_4661));
notech_ao3 i_4519(.A(cycles_in_1193181hz[7]), .B(1'b1), .C(n_7950), .Z(n_3417
));
notech_reg system_counter_reg_0(.CP(n_8257), .D(n_3417), .CD(n_8161), .Q
notech_reg system_counter_reg_0(.CP(n_8251), .D(n_3419), .CD(n_8168), .Q
(system_counter[0]));
notech_ao3 i_4523(.A(system_counter[0]), .B(1'b1), .C(n_7932), .Z(n_3417
notech_ao3 i_4523(.A(system_counter[0]), .B(1'b1), .C(n_7950), .Z(n_3419
));
notech_reg system_counter_reg_1(.CP(n_8257), .D(n_4637), .CD(n_8161), .Q
notech_reg system_counter_reg_1(.CP(n_8251), .D(n_4647), .CD(n_8168), .Q
(system_counter[1]));
notech_reg system_counter_reg_2(.CP(n_8257), .D(n_3548), .CD(n_8161), .Q
notech_reg system_counter_reg_2(.CP(n_8251), .D(n_3550), .CD(n_8168), .Q
(system_counter[2]));
notech_reg system_counter_reg_3(.CP(n_8257), .D(n_4651), .CD(n_8161), .Q
notech_reg system_counter_reg_3(.CP(n_8251), .D(n_4661), .CD(n_8168), .Q
(system_counter[3]));
notech_reg system_counter_reg_4(.CP(n_8257), .D(n_4658), .CD(n_8161), .Q
notech_reg system_counter_reg_4(.CP(n_8251), .D(n_4668), .CD(n_8168), .Q
(system_counter[4]));
notech_reg system_counter_reg_5(.CP(n_8257), .D(n_3427), .CD(n_8161), .Q
notech_reg system_counter_reg_5(.CP(n_8251), .D(n_3429), .CD(n_8168), .Q
(system_counter[5]));
notech_ao3 i_4544(.A(n_114), .B(1'b1), .C(n_7932), .Z(n_3427));
notech_reg system_counter_reg_6(.CP(n_8257), .D(n_3429), .CD(n_8161), .Q
notech_ao3 i_4544(.A(n_114), .B(1'b1), .C(n_7950), .Z(n_3429));
notech_reg system_counter_reg_6(.CP(n_8251), .D(n_3431), .CD(n_8168), .Q
(system_counter[6]));
notech_ao3 i_4548(.A(n_113), .B(1'b1), .C(n_7932), .Z(n_3429));
notech_reg system_counter_reg_7(.CP(n_8256), .D(n_3431), .CD(n_8160), .Q
notech_ao3 i_4548(.A(n_113), .B(1'b1), .C(n_7950), .Z(n_3431));
notech_reg system_counter_reg_7(.CP(n_8250), .D(n_3433), .CD(n_8533), .Q
(system_counter[7]));
notech_ao3 i_4552(.A(n_112), .B(1'b1), .C(n_7932), .Z(n_3431));
notech_reg counter_1_cnt_reg_0(.CP(n_8256), .D(n_3433), .CD(n_8160), .Q(counter_1_cnt
notech_ao3 i_4552(.A(n_112), .B(1'b1), .C(n_7950), .Z(n_3433));
notech_reg counter_1_cnt_reg_0(.CP(n_8250), .D(n_3435), .CD(n_8533), .Q(counter_1_cnt
[0]));
notech_xor2 i_4556(.A(counter_1_cnt[0]), .B(n_7932), .Z(n_3433));
notech_nor2 i_22471(.A(system_counter[1]), .B(n_7932), .Z(n_4637));
notech_reg counter_1_cnt_reg_1(.CP(n_8256), .D(n_3439), .CD(n_8160), .Q(counter_1_cnt
notech_xor2 i_4556(.A(counter_1_cnt[0]), .B(n_7950), .Z(n_3435));
notech_nor2 i_22514(.A(system_counter[1]), .B(n_7950), .Z(n_4647));
notech_reg counter_1_cnt_reg_1(.CP(n_8250), .D(n_3441), .CD(n_8533), .Q(counter_1_cnt
[1]));
notech_mux2 i_4564(.S(\nbus_81[0] ), .A(counter_1_cnt[1]), .B(n_210), .Z
(n_3439));
notech_reg counter_1_cnt_reg_2(.CP(n_8256), .D(n_3445), .CD(n_8160), .Q(counter_1_cnt
(n_3441));
notech_reg counter_1_cnt_reg_2(.CP(n_8250), .D(n_3447), .CD(n_8533), .Q(counter_1_cnt
[2]));
notech_mux2 i_4572(.S(n_7932), .A(counter_1_cnt[2]), .B(n_4932), .Z(n_3445
notech_mux2 i_4572(.S(n_7950), .A(counter_1_cnt[2]), .B(n_4936), .Z(n_3447
));
notech_and2 i_6(.A(n_4595), .B(n_117), .Z(n_4950));
notech_reg counter_1_cnt_reg_3(.CP(n_8256), .D(n_3451), .CD(n_8160), .Q(counter_1_cnt
notech_and2 i_6(.A(n_4555), .B(n_117), .Z(n_4954));
notech_reg counter_1_cnt_reg_3(.CP(n_8250), .D(n_3453), .CD(n_8533), .Q(counter_1_cnt
[3]));
notech_mux2 i_4580(.S(n_7932), .A(counter_1_cnt[3]), .B(n_211), .Z(n_3451
notech_mux2 i_4580(.S(n_7950), .A(counter_1_cnt[3]), .B(n_211), .Z(n_3453
));
notech_and2 i_3(.A(n_4595), .B(n_118), .Z(n_4932));
notech_reg counter_1_cnt_reg_4(.CP(n_8252), .D(n_3457), .CD(n_8156), .Q(counter_1_cnt
notech_and2 i_3(.A(n_4555), .B(n_118), .Z(n_4936));
notech_reg counter_1_cnt_reg_4(.CP(n_8246), .D(n_3459), .CD(n_8533), .Q(counter_1_cnt
[4]));
notech_mux2 i_4588(.S(n_7932), .A(counter_1_cnt[4]), .B(n_212), .Z(n_3457
notech_mux2 i_4588(.S(n_7950), .A(counter_1_cnt[4]), .B(n_212), .Z(n_3459
));
notech_and2 i_211(.A(io_read), .B(n_3526), .Z(n_4903));
notech_reg counter_1_cnt_reg_5(.CP(n_8252), .D(n_3463), .CD(n_8156), .Q(counter_1_cnt
notech_and2 i_214(.A(io_read), .B(n_3528), .Z(n_4891));
notech_reg counter_1_cnt_reg_5(.CP(n_8246), .D(n_3465), .CD(n_8533), .Q(counter_1_cnt
[5]));
notech_mux2 i_4596(.S(n_7932), .A(counter_1_cnt[5]), .B(n_4950), .Z(n_3463
notech_mux2 i_4596(.S(n_7950), .A(counter_1_cnt[5]), .B(n_4954), .Z(n_3465
));
notech_ao3 i_212(.A(n_4903), .B(n_3530), .C(io_address[0]), .Z(n_4754)
notech_ao3 i_215(.A(n_4891), .B(n_3532), .C(io_address[0]), .Z(n_4746)
);
notech_reg io_read_last_reg(.CP(n_8252), .D(n_4903), .CD(n_8156), .Q(io_read_last
notech_reg counter_1_toggle_reg(.CP(n_8246), .D(n_3471), .CD(n_8533), .Q
(port_61h_readdata[4]));
notech_xor2 i_4604(.A(n_3549), .B(n_4555), .Z(n_3471));
notech_and3 i_2142(.A(io_address[0]), .B(n_4891), .C(n_3532), .Z(n_4911)
);
notech_reg io_read_last_reg(.CP(n_8246), .D(n_4891), .CD(n_8533), .Q(io_read_last
));
notech_reg port_enable_reg(.CP(n_8252), .D(n_3471), .CD(n_8156), .Q(port_61h_readdata
notech_reg port_enable_reg(.CP(n_8246), .D(n_3479), .CD(n_8533), .Q(port_61h_readdata
[1]));
notech_mux2 i_4608(.S(port_61h_write), .A(port_61h_readdata[1]), .B(io_writedata
[1]), .Z(n_3471));
notech_and3 i_2139(.A(io_address[0]), .B(n_4903), .C(n_3530), .Z(n_4912)
);
notech_reg system_clock_reg(.CP(n_8252), .D(n_3477), .CD(n_8156), .Q(system_clock
notech_mux2 i_4616(.S(port_61h_write), .A(port_61h_readdata[1]), .B(io_writedata
[1]), .Z(n_3479));
notech_ao3 i_2157(.A(n_4891), .B(io_address[1]), .C(io_address[0]), .Z(n_4916
));
notech_xor2 i_4616(.A(system_clock), .B(n_7932), .Z(n_3477));
notech_ao3 i_2154(.A(n_4903), .B(io_address[1]), .C(io_address[0]), .Z(n_4690
notech_reg system_clock_reg(.CP(n_8250), .D(n_3485), .CD(n_8167), .Q(system_clock
));
notech_reg port_gate_reg(.CP(n_8256), .D(n_3483), .CD(n_8160), .Q(port_61h_readdata
notech_xor2 i_4624(.A(system_clock), .B(n_7950), .Z(n_3485));
notech_reg port_gate_reg(.CP(n_8250), .D(n_3491), .CD(n_8167), .Q(port_61h_readdata
[0]));
notech_mux2 i_4624(.S(port_61h_write), .A(port_61h_readdata[0]), .B(io_writedata
[0]), .Z(n_3483));
notech_reg io_readdata_reg_0(.CP(n_8256), .D(n_183), .CD(n_8160), .Q(io_readdata
notech_mux2 i_4632(.S(port_61h_write), .A(port_61h_readdata[0]), .B(io_writedata
[0]), .Z(n_3491));
notech_reg io_readdata_reg_0(.CP(n_8250), .D(n_183), .CD(n_8167), .Q(io_readdata
[0]));
notech_reg io_readdata_reg_1(.CP(n_8256), .D(n_186), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_1(.CP(n_8250), .D(n_186), .CD(n_8167), .Q(io_readdata
[1]));
notech_reg io_readdata_reg_2(.CP(n_8256), .D(n_189), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_2(.CP(n_8250), .D(n_189), .CD(n_8167), .Q(io_readdata
[2]));
notech_reg io_readdata_reg_3(.CP(n_8256), .D(n_192), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_3(.CP(n_8250), .D(n_192), .CD(n_8533), .Q(io_readdata
[3]));
notech_reg io_readdata_reg_4(.CP(n_8256), .D(n_195), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_4(.CP(n_8250), .D(n_195), .CD(n_8533), .Q(io_readdata
[4]));
notech_reg io_readdata_reg_5(.CP(n_8256), .D(n_198), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_5(.CP(n_8250), .D(n_198), .CD(n_8533), .Q(io_readdata
[5]));
notech_reg io_readdata_reg_6(.CP(n_8256), .D(n_201), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_6(.CP(n_8250), .D(n_201), .CD(n_8167), .Q(io_readdata
[6]));
notech_reg io_readdata_reg_7(.CP(n_8256), .D(n_204), .CD(n_8160), .Q(io_readdata
notech_reg io_readdata_reg_7(.CP(n_8250), .D(n_204), .CD(n_8533), .Q(io_readdata
[7]));
notech_reg counter_1_toggle_reg(.CP(n_8256), .D(n_3505), .CD(n_8160), .Q
(port_61h_readdata[4]));
notech_xor2 i_4664(.A(n_3547), .B(n_4595), .Z(n_3505));
notech_inv i_4844(.A(n_244), .Z(n_3511));
notech_inv i_4845(.A(n_4702), .Z(n_3512));
notech_inv i_4846(.A(hopping[1]), .Z(n_3513));
notech_inv i_4847(.A(hopping[6]), .Z(n_3514));
notech_inv i_4848(.A(n_4857), .Z(n_3515));
notech_inv i_4849(.A(cycles_in_1193181hz[1]), .Z(n_3516));
notech_inv i_4850(.A(cycles_in_1193181hz[2]), .Z(n_3517));
notech_inv i_4851(.A(cycles_in_1193181hz[3]), .Z(n_3518));
notech_inv i_4852(.A(cycles_in_1193181hz[4]), .Z(n_3519));
notech_inv i_4853(.A(cycles_in_1193181hz[5]), .Z(n_3520));
notech_inv i_4854(.A(cycles_in_1193181hz[6]), .Z(n_3521));
notech_inv i_4855(.A(cycles_in_1193181hz[7]), .Z(n_3522));
notech_inv i_4856(.A(system_counter[0]), .Z(n_3523));
notech_inv i_4857(.A(n_4637), .Z(n_3524));
notech_inv i_4858(.A(system_counter[2]), .Z(n_3525));
notech_inv i_4859(.A(io_read_last), .Z(n_3526));
notech_inv i_4860(.A(n_207), .Z(n_4687));
notech_inv i_4861(.A(n_208), .Z(n_4909));
notech_inv i_4862(.A(n_209), .Z(n_4751));
notech_inv i_4863(.A(io_address[1]), .Z(n_3530));
notech_inv i_4864(.A(counter_1_readdata[0]), .Z(n_3531));
notech_inv i_4865(.A(counter_1_readdata[1]), .Z(n_3532));
notech_inv i_4866(.A(counter_1_readdata[2]), .Z(n_3533));
notech_inv i_4867(.A(counter_1_readdata[3]), .Z(n_3534));
notech_inv i_4868(.A(counter_1_readdata[4]), .Z(n_3535));
notech_inv i_4869(.A(counter_1_readdata[5]), .Z(n_3536));
notech_inv i_4870(.A(counter_1_readdata[6]), .Z(n_3537));
notech_inv i_4871(.A(counter_1_readdata[7]), .Z(n_3538));
notech_inv i_4872(.A(counter_2_readdata[0]), .Z(n_3539));
notech_inv i_4873(.A(counter_2_readdata[1]), .Z(n_3540));
notech_inv i_4874(.A(counter_2_readdata[2]), .Z(n_3541));
notech_inv i_4875(.A(counter_2_readdata[3]), .Z(n_3542));
notech_inv i_4876(.A(counter_2_readdata[4]), .Z(n_3543));
notech_inv i_4877(.A(counter_2_readdata[5]), .Z(n_3544));
notech_inv i_4878(.A(counter_2_readdata[6]), .Z(n_3545));
notech_inv i_4879(.A(counter_2_readdata[7]), .Z(n_3546));
notech_inv i_4880(.A(port_61h_readdata[4]), .Z(n_3547));
notech_inv i_4881(.A(n_213), .Z(n_3548));
notech_inv i_4882(.A(n_214), .Z(n_3549));
notech_inv i_4883(.A(n_4690), .Z(n_3550));
notech_inv i_4884(.A(n_4912), .Z(n_3551));
notech_inv i_4885(.A(io_writedata[4]), .Z(n_3552));
notech_inv i_4886(.A(io_writedata[6]), .Z(n_3553));
notech_inv i_4887(.A(io_writedata[3]), .Z(n_3554));
notech_inv i_4888(.A(io_writedata[2]), .Z(n_3555));
notech_inv i_4889(.A(io_writedata[1]), .Z(n_3556));
v8253_counter_2 count3(.clk(n_8252), .rst_n(n_8156), .clock(system_clock
notech_inv i_4844(.A(n_244), .Z(n_3513));
notech_inv i_4845(.A(n_4697), .Z(n_3514));
notech_inv i_4846(.A(hopping[1]), .Z(n_3515));
notech_inv i_4847(.A(hopping[6]), .Z(n_3516));
notech_inv i_4848(.A(n_4845), .Z(n_3517));
notech_inv i_4849(.A(cycles_in_1193181hz[1]), .Z(n_3518));
notech_inv i_4850(.A(cycles_in_1193181hz[2]), .Z(n_3519));
notech_inv i_4851(.A(cycles_in_1193181hz[3]), .Z(n_3520));
notech_inv i_4852(.A(cycles_in_1193181hz[4]), .Z(n_3521));
notech_inv i_4853(.A(cycles_in_1193181hz[5]), .Z(n_3522));
notech_inv i_4854(.A(cycles_in_1193181hz[6]), .Z(n_3523));
notech_inv i_4855(.A(cycles_in_1193181hz[7]), .Z(n_3524));
notech_inv i_4856(.A(system_counter[0]), .Z(n_3525));
notech_inv i_4857(.A(n_4647), .Z(n_3526));
notech_inv i_4858(.A(system_counter[2]), .Z(n_3527));
notech_inv i_4859(.A(io_read_last), .Z(n_3528));
notech_inv i_4860(.A(n_207), .Z(n_4913));
notech_inv i_4861(.A(n_208), .Z(n_4908));
notech_inv i_4862(.A(n_209), .Z(n_4743));
notech_inv i_4863(.A(io_address[1]), .Z(n_3532));
notech_inv i_4864(.A(counter_1_readdata[0]), .Z(n_3533));
notech_inv i_4865(.A(counter_1_readdata[1]), .Z(n_3534));
notech_inv i_4866(.A(counter_1_readdata[2]), .Z(n_3535));
notech_inv i_4867(.A(counter_1_readdata[3]), .Z(n_3536));
notech_inv i_4868(.A(counter_1_readdata[4]), .Z(n_3537));
notech_inv i_4869(.A(counter_1_readdata[5]), .Z(n_3538));
notech_inv i_4870(.A(counter_1_readdata[6]), .Z(n_3539));
notech_inv i_4871(.A(counter_1_readdata[7]), .Z(n_3540));
notech_inv i_4872(.A(counter_2_readdata[0]), .Z(n_3541));
notech_inv i_4873(.A(counter_2_readdata[1]), .Z(n_3542));
notech_inv i_4874(.A(counter_2_readdata[2]), .Z(n_3543));
notech_inv i_4875(.A(counter_2_readdata[3]), .Z(n_3544));
notech_inv i_4876(.A(counter_2_readdata[4]), .Z(n_3545));
notech_inv i_4877(.A(counter_2_readdata[5]), .Z(n_3546));
notech_inv i_4878(.A(counter_2_readdata[6]), .Z(n_3547));
notech_inv i_4879(.A(counter_2_readdata[7]), .Z(n_3548));
notech_inv i_4880(.A(port_61h_readdata[4]), .Z(n_3549));
notech_inv i_4881(.A(n_213), .Z(n_3550));
notech_inv i_4882(.A(n_214), .Z(n_3551));
notech_inv i_4883(.A(n_4916), .Z(n_3552));
notech_inv i_4884(.A(n_4911), .Z(n_3553));
notech_inv i_4885(.A(io_writedata[4]), .Z(n_3554));
notech_inv i_4886(.A(io_writedata[6]), .Z(n_3555));
notech_inv i_4887(.A(io_writedata[3]), .Z(n_3556));
notech_inv i_4888(.A(io_writedata[2]), .Z(n_3557));
notech_inv i_4889(.A(io_writedata[1]), .Z(n_3558));
v8253_counter_2 count3(.clk(n_8246), .rst_n(n_8533), .clock(system_clock
), .gate(port_61h_readdata[0]), .out(port_61h_readdata[5]), .data_in
(io_writedata), .set_control_mode(n_4686), .latch_count(n_4687),
.latch_status(n_4688), .write(n_4689), .read(n_4690), .data_out
(io_writedata), .set_control_mode(n_4912), .latch_count(n_4913),
.latch_status(n_4914), .write(n_4915), .read(n_4916), .data_out
(counter_2_readdata));
v8253_counter_1 count2(.clk(n_8252), .rst_n(n_8156), .clock(system_clock
), .data_in(io_writedata), .set_control_mode(n_4908), .latch_count
(n_4909), .latch_status(n_4910), .write(n_4911), .read(n_4912),
v8253_counter_1 count2(.clk(n_8246), .rst_n(n_8533), .clock(system_clock
), .data_in(io_writedata), .set_control_mode(n_4907), .latch_count
(n_4908), .latch_status(n_4909), .write(n_4910), .read(n_4911),
.data_out(counter_1_readdata));
v8253_counter_0 ucount1(.clk(n_8252), .rst_n(n_8156), .clock(system_clock
), .out(irq), .data_in(io_writedata), .set_control_mode(n_4750),
.latch_count(n_4751), .latch_status(n_4752), .write(n_4753), .read
(n_4754), .data_out(counter_0_readdata));
v8253_counter_0 ucount1(.clk(n_8246), .rst_n(n_8533), .clock(system_clock
), .out(irq), .data_in(io_writedata), .set_control_mode(n_4742),
.latch_count(n_4743), .latch_status(n_4744), .write(n_4745), .read
(n_4746), .data_out(counter_0_readdata));
endmodule
module v8259(clk, rst_n, ms_address, ms_read, ms_readdata, ms_write, ms_writedata
, sl_address, sl_read, sl_readdata, sl_write, sl_writedata, inter_input
12144,114 → 12151,114
 
 
 
notech_inv i_1404(.A(n_8260), .Z(n_8271));
notech_inv i_1403(.A(n_8260), .Z(n_8270));
notech_inv i_1402(.A(n_8260), .Z(n_8269));
notech_inv i_1400(.A(n_8260), .Z(n_8267));
notech_inv i_1399(.A(n_8260), .Z(n_8266));
notech_inv i_1398(.A(n_8260), .Z(n_8265));
notech_inv i_1396(.A(n_8260), .Z(n_8263));
notech_inv i_1395(.A(n_8260), .Z(n_8262));
notech_inv i_1394(.A(n_8260), .Z(n_8261));
notech_inv i_1393(.A(clk), .Z(n_8260));
notech_inv i_1345(.A(n_8206), .Z(n_8207));
notech_inv i_1344(.A(sl_address), .Z(n_8206));
notech_inv i_1271(.A(n_8115), .Z(n_8126));
notech_inv i_1270(.A(n_8115), .Z(n_8125));
notech_inv i_1269(.A(n_8115), .Z(n_8124));
notech_inv i_1267(.A(n_8115), .Z(n_8122));
notech_inv i_1266(.A(n_8115), .Z(n_8121));
notech_inv i_1265(.A(n_8115), .Z(n_8120));
notech_inv i_1263(.A(n_8115), .Z(n_8118));
notech_inv i_1262(.A(n_8115), .Z(n_8117));
notech_inv i_1261(.A(n_8115), .Z(n_8116));
notech_inv i_1260(.A(rst_n), .Z(n_8115));
notech_inv i_225(.A(n_8005), .Z(n_8006));
notech_inv i_224(.A(n_1181), .Z(n_8005));
notech_inv i_129(.A(n_7912), .Z(n_7913));
notech_inv i_124(.A(n_932), .Z(n_7912));
notech_nand2 i_23(.A(n_1345), .B(n_4234), .Z(n_1054));
notech_ao3 i_2682(.A(n_1181), .B(n_4373), .C(n_895), .Z(n_1047));
notech_inv i_1391(.A(n_8254), .Z(n_8265));
notech_inv i_1390(.A(n_8254), .Z(n_8264));
notech_inv i_1389(.A(n_8254), .Z(n_8263));
notech_inv i_1387(.A(n_8254), .Z(n_8261));
notech_inv i_1386(.A(n_8254), .Z(n_8260));
notech_inv i_1385(.A(n_8254), .Z(n_8259));
notech_inv i_1383(.A(n_8254), .Z(n_8257));
notech_inv i_1382(.A(n_8254), .Z(n_8256));
notech_inv i_1381(.A(n_8254), .Z(n_8255));
notech_inv i_1380(.A(clk), .Z(n_8254));
notech_inv i_1336(.A(n_8204), .Z(n_8205));
notech_inv i_1335(.A(sl_address), .Z(n_8204));
notech_inv i_1316(.A(n_8171), .Z(n_8182));
notech_inv i_1315(.A(n_8171), .Z(n_8181));
notech_inv i_1314(.A(n_8171), .Z(n_8180));
notech_inv i_1312(.A(n_8171), .Z(n_8178));
notech_inv i_1311(.A(n_8171), .Z(n_8177));
notech_inv i_1310(.A(n_8171), .Z(n_8176));
notech_inv i_1308(.A(n_8171), .Z(n_8174));
notech_inv i_1307(.A(n_8171), .Z(n_8173));
notech_inv i_1306(.A(n_8171), .Z(n_8172));
notech_inv i_1305(.A(rst_n), .Z(n_8171));
notech_inv i_225(.A(n_8023), .Z(n_8024));
notech_inv i_224(.A(n_1181), .Z(n_8023));
notech_inv i_130(.A(n_7930), .Z(n_7931));
notech_inv i_129(.A(n_932), .Z(n_7930));
notech_nand2 i_23(.A(n_1345), .B(n_4235), .Z(n_1054));
notech_ao3 i_2682(.A(n_1181), .B(n_4367), .C(n_895), .Z(n_1047));
notech_and3 i_2361(.A(n_1370), .B(n_1047), .C(n_810), .Z(n_1046));
notech_nand2 i_24(.A(n_1510), .B(n_4219), .Z(n_933));
notech_nao3 i_2716(.A(sl_write), .B(sl_writedata[4]), .C(sl_address), .Z
notech_nand2 i_24(.A(n_1510), .B(n_4220), .Z(n_933));
notech_nao3 i_2718(.A(sl_write), .B(sl_writedata[4]), .C(sl_address), .Z
(n_932));
notech_nao3 i_37(.A(sl_read), .B(sla_polled), .C(sl_read_last), .Z(n_931
));
notech_and3 i_2554(.A(n_931), .B(n_1523), .C(n_932), .Z(n_930));
notech_and4 i_2371(.A(n_932), .B(sla_current_irq), .C(n_4373), .D(n_4222
notech_and4 i_2371(.A(n_932), .B(sla_current_irq), .C(n_4367), .D(n_4223
), .Z(n_929));
notech_nand2 i_2792(.A(n_1531), .B(n_4276), .Z(n_928));
notech_and2 i_22273(.A(sl_writedata[1]), .B(n_932), .Z(n_927));
notech_and2 i_82279(.A(sl_writedata[7]), .B(n_932), .Z(n_926));
notech_nand2 i_2805(.A(n_1531), .B(n_4273), .Z(n_928));
notech_and2 i_22316(.A(sl_writedata[1]), .B(n_932), .Z(n_927));
notech_and2 i_82322(.A(sl_writedata[7]), .B(n_932), .Z(n_926));
notech_and4 i_422(.A(sl_writedata[5]), .B(sl_writedata[7]), .C(n_1197),
.D(n_4250), .Z(n_921));
.D(n_4249), .Z(n_921));
notech_ao3 i_421(.A(sla_rotate_on_aeoi), .B(sla_auto_eoi), .C(n_785), .Z
(n_920));
notech_and3 i_12264(.A(inter_input[8]), .B(n_932), .C(n_572), .Z(n_913)
notech_and3 i_12307(.A(inter_input[8]), .B(n_932), .C(n_572), .Z(n_913)
);
notech_and2 i_72278(.A(sl_writedata[6]), .B(n_932), .Z(n_912));
notech_and2 i_62277(.A(sl_writedata[5]), .B(n_932), .Z(n_911));
notech_and2 i_52276(.A(n_1524), .B(sl_writedata[4]), .Z(n_910));
notech_and2 i_42275(.A(sl_writedata[3]), .B(n_932), .Z(n_909));
notech_and2 i_32274(.A(sl_writedata[2]), .B(n_932), .Z(n_908));
notech_and2 i_12272(.A(sl_writedata[0]), .B(n_932), .Z(n_907));
notech_and2 i_72318(.A(inter_input[6]), .B(n_575), .Z(n_906));
notech_and2 i_62317(.A(inter_input[5]), .B(n_576), .Z(n_905));
notech_and2 i_52316(.A(inter_input[4]), .B(n_577), .Z(n_904));
notech_and2 i_32314(.A(sla_current_irq), .B(n_578), .Z(n_903));
notech_and2 i_12312(.A(inter_input[0]), .B(n_579), .Z(n_902));
notech_and2 i_72326(.A(sl_writedata[6]), .B(n_1181), .Z(n_901));
notech_and2 i_62325(.A(sl_writedata[5]), .B(n_1181), .Z(n_900));
notech_and2 i_52324(.A(n_1187), .B(sl_writedata[4]), .Z(n_899));
notech_and2 i_42323(.A(sl_writedata[3]), .B(n_1181), .Z(n_898));
notech_and2 i_32322(.A(sl_writedata[2]), .B(n_1181), .Z(n_897));
notech_and2 i_12320(.A(sl_writedata[0]), .B(n_1181), .Z(n_896));
notech_and2 i_72321(.A(sl_writedata[6]), .B(n_932), .Z(n_912));
notech_and2 i_62320(.A(sl_writedata[5]), .B(n_932), .Z(n_911));
notech_and2 i_52319(.A(n_1524), .B(sl_writedata[4]), .Z(n_910));
notech_and2 i_42318(.A(sl_writedata[3]), .B(n_932), .Z(n_909));
notech_and2 i_32317(.A(sl_writedata[2]), .B(n_932), .Z(n_908));
notech_and2 i_12315(.A(sl_writedata[0]), .B(n_932), .Z(n_907));
notech_and2 i_72361(.A(inter_input[6]), .B(n_575), .Z(n_906));
notech_and2 i_62360(.A(inter_input[5]), .B(n_576), .Z(n_905));
notech_and2 i_52359(.A(inter_input[4]), .B(n_577), .Z(n_904));
notech_and2 i_32357(.A(sla_current_irq), .B(n_578), .Z(n_903));
notech_and2 i_12355(.A(inter_input[0]), .B(n_579), .Z(n_902));
notech_and2 i_72369(.A(sl_writedata[6]), .B(n_1181), .Z(n_901));
notech_and2 i_62368(.A(sl_writedata[5]), .B(n_1181), .Z(n_900));
notech_and2 i_52367(.A(n_1187), .B(sl_writedata[4]), .Z(n_899));
notech_and2 i_42366(.A(sl_writedata[3]), .B(n_1181), .Z(n_898));
notech_and2 i_32365(.A(sl_writedata[2]), .B(n_1181), .Z(n_897));
notech_and2 i_12363(.A(sl_writedata[0]), .B(n_1181), .Z(n_896));
notech_ao3 i_25(.A(ms_read), .B(mas_polled), .C(ms_read_last), .Z(n_895)
);
notech_and4 i_2650(.A(mas_current_irq), .B(n_1181), .C(n_4237), .D(n_4373
notech_and4 i_2650(.A(mas_current_irq), .B(n_1181), .C(n_4238), .D(n_4367
), .Z(n_892));
notech_nand2 i_704(.A(mas_init_requires_4), .B(n_1186), .Z(n_843));
notech_or4 i_703(.A(mas_init_byte_expected[1]), .B(n_4261), .C(n_1184),
notech_or4 i_703(.A(mas_init_byte_expected[1]), .B(n_4260), .C(n_1184),
.D(mas_init_byte_expected[0]), .Z(n_842));
notech_nao3 i_702(.A(mas_init_byte_expected[0]), .B(n_1186), .C(mas_init_requires_4
), .Z(n_841));
notech_nao3 i_701(.A(n_4241), .B(n_1197), .C(sl_writedata[5]), .Z(n_840)
notech_nao3 i_701(.A(n_4242), .B(n_1197), .C(sl_writedata[5]), .Z(n_840)
);
notech_xor2 i_187(.A(n_4268), .B(n_1203), .Z(n_838));
notech_xor2 i_187(.A(n_4266), .B(n_1203), .Z(n_838));
notech_xor2 i_188(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[1])
, .Z(n_836));
notech_ao4 i_5714(.A(n_4263), .B(n_1179), .C(mas_spurious), .D(n_4373),
notech_ao4 i_5716(.A(n_4262), .B(n_1179), .C(mas_spurious), .D(n_4367),
.Z(n_834));
notech_nand2 i_117(.A(n_1285), .B(n_4211), .Z(n_833));
notech_nand2 i_117(.A(n_1285), .B(n_4212), .Z(n_833));
notech_nand2 i_633(.A(n_1278), .B(n_833), .Z(n_832));
notech_nand2 i_158(.A(n_1271), .B(n_832), .Z(n_831));
notech_nand2 i_632(.A(n_1264), .B(n_831), .Z(n_830));
notech_nand2 i_631(.A(n_1285), .B(n_1278), .Z(n_829));
notech_nand2 i_123(.A(n_1337), .B(n_4214), .Z(n_828));
notech_nand2 i_123(.A(n_1337), .B(n_4215), .Z(n_828));
notech_nand2 i_574(.A(n_1330), .B(n_828), .Z(n_827));
notech_nand2 i_164(.A(n_1323), .B(n_827), .Z(n_826));
notech_nand2 i_573(.A(n_1316), .B(n_826), .Z(n_825));
notech_nand2 i_570(.A(n_1337), .B(n_1330), .Z(n_822));
notech_nand3 i_30(.A(n_581), .B(n_1250), .C(n_4235), .Z(n_821));
notech_nand3 i_568(.A(n_1054), .B(n_4233), .C(n_821), .Z(n_820));
notech_nand3 i_30(.A(n_581), .B(n_1250), .C(n_4236), .Z(n_821));
notech_nand3 i_568(.A(n_1054), .B(n_4234), .C(n_821), .Z(n_820));
notech_nand3 i_567(.A(n_1250), .B(mas_lowest_priority[0]), .C(n_581), .Z
(n_819));
notech_and2 i_108(.A(mas_lowest_priority[1]), .B(n_4235), .Z(n_816));
notech_and2 i_107(.A(n_1295), .B(n_4267), .Z(n_814));
notech_ao4 i_215(.A(n_816), .B(n_1361), .C(mas_lowest_priority[1]), .D(n_4235
notech_and2 i_108(.A(mas_lowest_priority[1]), .B(n_4236), .Z(n_816));
notech_and2 i_107(.A(n_1295), .B(n_4265), .Z(n_814));
notech_ao4 i_215(.A(n_816), .B(n_1361), .C(mas_lowest_priority[1]), .D(n_4236
), .Z(n_812));
notech_ao4 i_214(.A(n_4267), .B(n_1295), .C(n_814), .D(n_4239), .Z(n_811
notech_ao4 i_214(.A(n_4265), .B(n_1295), .C(n_814), .D(n_4240), .Z(n_811
));
notech_nand2 i_558(.A(n_1362), .B(n_1360), .Z(n_810));
notech_and3 i_61(.A(n_1364), .B(n_1361), .C(n_819), .Z(n_809));
notech_and2 i_186(.A(n_1369), .B(n_696), .Z(n_808));
notech_nand2 i_119(.A(n_1431), .B(n_4212), .Z(n_807));
notech_nand2 i_119(.A(n_1431), .B(n_4213), .Z(n_807));
notech_nand2 i_499(.A(n_1424), .B(n_807), .Z(n_806));
notech_nand2 i_160(.A(n_1417), .B(n_806), .Z(n_805));
notech_nand2 i_498(.A(n_1410), .B(n_805), .Z(n_804));
notech_nand2 i_497(.A(n_1431), .B(n_1424), .Z(n_803));
notech_nand2 i_121(.A(n_1499), .B(n_4213), .Z(n_802));
notech_nand2 i_121(.A(n_1499), .B(n_4214), .Z(n_802));
notech_nand2 i_440(.A(n_1492), .B(n_802), .Z(n_801));
notech_nand2 i_162(.A(n_1485), .B(n_801), .Z(n_800));
notech_nand2 i_439(.A(n_1478), .B(n_800), .Z(n_799));
12259,22 → 12266,22
notech_nand2 i_31(.A(n_1441), .B(n_1438), .Z(n_795));
notech_ao3 i_434(.A(n_933), .B(n_795), .C(n_1513), .Z(n_794));
notech_nand2 i_432(.A(sla_init_requires_4), .B(n_1531), .Z(n_793));
notech_or4 i_431(.A(sla_init_byte_expected[1]), .B(n_4279), .C(n_1529),
notech_or4 i_431(.A(sla_init_byte_expected[1]), .B(n_4275), .C(n_1529),
.D(sla_init_byte_expected[0]), .Z(n_792));
notech_nao3 i_430(.A(sla_init_byte_expected[0]), .B(n_1531), .C(sla_init_requires_4
), .Z(n_791));
notech_nao3 i_429(.A(n_4250), .B(n_1197), .C(sl_writedata[5]), .Z(n_790)
notech_nao3 i_429(.A(n_4249), .B(n_1197), .C(sl_writedata[5]), .Z(n_790)
);
notech_xor2 i_189(.A(sla_lowest_priority[2]), .B(n_1375), .Z(n_788));
notech_xor2 i_190(.A(sla_lowest_priority[0]), .B(sla_lowest_priority[1])
, .Z(n_786));
notech_ao4 i_84(.A(n_1177), .B(n_4265), .C(sla_spurious), .D(n_1523), .Z
notech_ao4 i_84(.A(n_1177), .B(n_4264), .C(sla_spurious), .D(n_1523), .Z
(n_785));
notech_and2 i_105(.A(sla_lowest_priority[1]), .B(n_4220), .Z(n_779));
notech_and2 i_109(.A(n_1441), .B(n_4281), .Z(n_777));
notech_ao4 i_221(.A(n_779), .B(n_1548), .C(sla_lowest_priority[1]), .D(n_4220
notech_and2 i_105(.A(sla_lowest_priority[1]), .B(n_4221), .Z(n_779));
notech_and2 i_109(.A(n_1441), .B(n_4277), .Z(n_777));
notech_ao4 i_221(.A(n_779), .B(n_1548), .C(sla_lowest_priority[1]), .D(n_4221
), .Z(n_775));
notech_ao4 i_220(.A(n_1441), .B(n_4281), .C(n_777), .D(n_4253), .Z(n_773
notech_ao4 i_220(.A(n_1441), .B(n_4277), .C(n_777), .D(n_4252), .Z(n_773
));
notech_nand3 i_407(.A(n_1396), .B(sla_lowest_priority[0]), .C(n_582), .Z
(n_771));
12282,18 → 12289,18
notech_ao3 i_170(.A(n_1550), .B(n_1557), .C(n_1552), .Z(n_765));
notech_ao4 i_191(.A(n_767), .B(n_558), .C(n_1546), .D(n_765), .Z(n_762)
);
notech_and3 i_96(.A(sl_writedata[2]), .B(sl_writedata[1]), .C(n_4367), .Z
notech_and3 i_96(.A(sl_writedata[2]), .B(sl_writedata[1]), .C(n_4361), .Z
(n_760));
notech_and4 i_154(.A(n_1548), .B(n_771), .C(n_1557), .D(n_1551), .Z(n_758
));
notech_ao4 i_192(.A(n_760), .B(n_558), .C(n_1546), .D(n_758), .Z(n_755)
);
notech_ao3 i_98(.A(sl_writedata[0]), .B(n_4368), .C(n_1564), .Z(n_753)
notech_ao3 i_98(.A(sl_writedata[0]), .B(n_4362), .C(n_1564), .Z(n_753)
);
notech_and3 i_173(.A(n_1550), .B(n_1552), .C(n_1557), .Z(n_751));
notech_ao4 i_193(.A(n_753), .B(n_558), .C(n_1546), .D(n_751), .Z(n_748)
);
notech_and4 i_155(.A(n_1548), .B(n_771), .C(n_4255), .D(n_1557), .Z(n_745
notech_and4 i_155(.A(n_1548), .B(n_771), .C(n_4254), .D(n_1557), .Z(n_745
));
notech_ao4 i_194(.A(n_1558), .B(n_558), .C(n_745), .D(n_1546), .Z(n_742)
);
12300,7 → 12307,7
notech_and3 i_150(.A(n_1550), .B(n_1549), .C(n_1555), .Z(n_739));
notech_ao4 i_195(.A(n_1580), .B(n_558), .C(n_739), .D(n_1546), .Z(n_737)
);
notech_ao3 i_65(.A(sl_writedata[1]), .B(n_4367), .C(sl_writedata[2]), .Z
notech_ao3 i_65(.A(sl_writedata[1]), .B(n_4361), .C(sl_writedata[2]), .Z
(n_734));
notech_and4 i_142(.A(n_1548), .B(n_771), .C(n_1549), .D(n_1555), .Z(n_732
));
12312,8 → 12319,8
notech_or2 i_374(.A(n_785), .B(sla_auto_eoi), .Z(n_722));
notech_and3 i_198(.A(n_1566), .B(n_1585), .C(n_726), .Z(n_720));
notech_and2 i_146(.A(n_1513), .B(sla_lowest_priority[1]), .Z(n_705));
notech_nor2 i_133(.A(n_1591), .B(n_4222), .Z(n_700));
notech_nand2 i_22618(.A(n_1364), .B(n_1366), .Z(n_696));
notech_nor2 i_133(.A(n_1591), .B(n_4223), .Z(n_700));
notech_nand2 i_22661(.A(n_1364), .B(n_1366), .Z(n_696));
notech_and2 i_134(.A(n_1522), .B(n_1593), .Z(n_694));
notech_nand3 i_347(.A(n_1464), .B(n_583), .C(sla_lowest_priority[0]), .Z
(n_692));
12323,17 → 12330,17
notech_nand2 i_344(.A(sla_irr[0]), .B(n_688), .Z(n_687));
notech_and4 i_200(.A(inter_vector[2]), .B(inter_vector[1]), .C(inter_vector
[0]), .D(n_1600), .Z(n_684));
notech_and2 i_199(.A(\inter_last[7] ), .B(n_4327), .Z(n_682));
notech_nand2 i_125(.A(n_1600), .B(n_4225), .Z(n_680));
notech_and2 i_199(.A(\inter_last[7] ), .B(n_4321), .Z(n_682));
notech_nand2 i_125(.A(n_1600), .B(n_4226), .Z(n_680));
notech_nand2 i_339(.A(mas_irr[6]), .B(n_680), .Z(n_679));
notech_nand2 i_166(.A(\inter_last[6] ), .B(n_679), .Z(n_678));
notech_nand2 i_126(.A(n_1600), .B(n_4226), .Z(n_676));
notech_nand2 i_126(.A(n_1600), .B(n_4227), .Z(n_676));
notech_nand2 i_337(.A(mas_irr[5]), .B(n_676), .Z(n_675));
notech_nand2 i_167(.A(\inter_last[5] ), .B(n_675), .Z(n_674));
notech_nand2 i_127(.A(n_1600), .B(n_4227), .Z(n_672));
notech_nand2 i_127(.A(n_1600), .B(n_4229), .Z(n_672));
notech_nand2 i_335(.A(mas_irr[4]), .B(n_672), .Z(n_671));
notech_nand2 i_168(.A(\inter_last[4] ), .B(n_671), .Z(n_670));
notech_and2 i_333(.A(n_1581), .B(n_4269), .Z(n_668));
notech_and2 i_333(.A(n_1581), .B(n_4267), .Z(n_668));
notech_or2 i_132(.A(n_834), .B(n_668), .Z(n_667));
notech_nand2 i_332(.A(mas_irr[2]), .B(n_667), .Z(n_666));
notech_nand2 i_172(.A(sla_current_irq_last), .B(n_666), .Z(n_665));
12341,17 → 12348,17
), .Z(n_663));
notech_nand2 i_330(.A(n_663), .B(mas_irr[0]), .Z(n_662));
notech_nand2 i_169(.A(\inter_last[0] ), .B(n_662), .Z(n_661));
notech_and2 i_106(.A(mas_lowest_priority[1]), .B(n_4233), .Z(n_656));
notech_and2 i_110(.A(n_1351), .B(n_4267), .Z(n_654));
notech_ao4 i_223(.A(n_656), .B(n_1604), .C(mas_lowest_priority[1]), .D(n_4233
notech_and2 i_106(.A(mas_lowest_priority[1]), .B(n_4234), .Z(n_656));
notech_and2 i_110(.A(n_1351), .B(n_4265), .Z(n_654));
notech_ao4 i_223(.A(n_656), .B(n_1604), .C(mas_lowest_priority[1]), .D(n_4234
), .Z(n_652));
notech_ao4 i_222(.A(n_4267), .B(n_1351), .C(n_654), .D(n_4245), .Z(n_650
notech_ao4 i_222(.A(n_4265), .B(n_1351), .C(n_654), .D(n_4245), .Z(n_650
));
notech_nand3 i_321(.A(n_1302), .B(mas_lowest_priority[0]), .C(n_584), .Z
(n_648));
notech_nor2 i_80(.A(n_1199), .B(n_563), .Z(n_645));
notech_or2 i_318(.A(n_895), .B(n_645), .Z(n_644));
notech_ao3 i_171(.A(n_1606), .B(n_1613), .C(n_4247), .Z(n_641));
notech_ao3 i_171(.A(n_1606), .B(n_1613), .C(n_4246), .Z(n_641));
notech_ao4 i_206(.A(n_559), .B(n_767), .C(n_1602), .D(n_641), .Z(n_638)
);
notech_and4 i_156(.A(n_1604), .B(n_648), .C(n_1613), .D(n_1607), .Z(n_635
12358,7 → 12365,7
));
notech_ao4 i_207(.A(n_559), .B(n_760), .C(n_1602), .D(n_635), .Z(n_632)
);
notech_and3 i_175(.A(n_1613), .B(n_1606), .C(n_4247), .Z(n_629));
notech_and3 i_175(.A(n_1613), .B(n_1606), .C(n_4246), .Z(n_629));
notech_ao4 i_208(.A(n_559), .B(n_753), .C(n_1602), .D(n_629), .Z(n_626)
);
notech_and4 i_157(.A(n_1604), .B(n_648), .C(n_4244), .D(n_1613), .Z(n_623
12372,7 → 12379,7
));
notech_ao4 i_211(.A(n_559), .B(n_734), .C(n_611), .D(n_1602), .Z(n_608)
);
notech_and4 i_176(.A(n_4247), .B(n_1605), .C(n_1606), .D(n_644), .Z(n_605
notech_and4 i_176(.A(n_4246), .B(n_1605), .C(n_1606), .D(n_644), .Z(n_605
));
notech_ao4 i_212(.A(n_559), .B(n_1561), .C(n_605), .D(n_1602), .Z(n_603)
);
12380,27 → 12387,27
notech_and4 i_153(.A(n_1604), .B(n_1605), .C(n_648), .D(n_4244), .Z(n_599
));
notech_and2 i_213(.A(n_1615), .B(n_1621), .Z(n_597));
notech_nand3 i_276(.A(n_1623), .B(mas_irr[6]), .C(n_4263), .Z(n_592));
notech_nand3 i_273(.A(n_1623), .B(mas_irr[5]), .C(n_4263), .Z(n_591));
notech_nand3 i_270(.A(n_1623), .B(mas_irr[4]), .C(n_4263), .Z(n_590));
notech_nand3 i_267(.A(mas_irr[3]), .B(n_4263), .C(n_1623), .Z(n_589));
notech_nand3 i_248(.A(n_1640), .B(sla_irr[6]), .C(n_4265), .Z(n_588));
notech_nand3 i_245(.A(n_1640), .B(sla_irr[5]), .C(n_4265), .Z(n_587));
notech_nand3 i_242(.A(n_1640), .B(sla_irr[4]), .C(n_4265), .Z(n_586));
notech_nand3 i_239(.A(sla_irr[3]), .B(n_4265), .C(n_1640), .Z(n_585));
notech_nand3 i_276(.A(n_1623), .B(mas_irr[6]), .C(n_4262), .Z(n_592));
notech_nand3 i_273(.A(n_1623), .B(mas_irr[5]), .C(n_4262), .Z(n_591));
notech_nand3 i_270(.A(n_1623), .B(mas_irr[4]), .C(n_4262), .Z(n_590));
notech_nand3 i_267(.A(mas_irr[3]), .B(n_4262), .C(n_1623), .Z(n_589));
notech_nand3 i_248(.A(n_1640), .B(sla_irr[6]), .C(n_4264), .Z(n_588));
notech_nand3 i_245(.A(n_1640), .B(sla_irr[5]), .C(n_4264), .Z(n_587));
notech_nand3 i_242(.A(n_1640), .B(sla_irr[4]), .C(n_4264), .Z(n_586));
notech_nand3 i_239(.A(sla_irr[3]), .B(n_4264), .C(n_1640), .Z(n_585));
notech_nand2 i_219(.A(n_1309), .B(n_825), .Z(n_584));
notech_nand2 i_218(.A(n_1471), .B(n_799), .Z(n_583));
notech_nand2 i_217(.A(n_1403), .B(n_804), .Z(n_582));
notech_nand2 i_216(.A(n_1257), .B(n_830), .Z(n_581));
notech_ao4 i_205(.A(n_1187), .B(n_4369), .C(mas_ltim), .D(n_661), .Z(n_579
notech_ao4 i_205(.A(n_1187), .B(n_4363), .C(mas_ltim), .D(n_661), .Z(n_579
));
notech_ao4 i_204(.A(n_1187), .B(n_4369), .C(mas_ltim), .D(n_665), .Z(n_578
notech_ao4 i_204(.A(n_1187), .B(n_4363), .C(mas_ltim), .D(n_665), .Z(n_578
));
notech_ao4 i_203(.A(n_1187), .B(n_4369), .C(mas_ltim), .D(n_670), .Z(n_577
notech_ao4 i_203(.A(n_1187), .B(n_4363), .C(mas_ltim), .D(n_670), .Z(n_577
));
notech_ao4 i_202(.A(n_1187), .B(n_4369), .C(mas_ltim), .D(n_674), .Z(n_576
notech_ao4 i_202(.A(n_1187), .B(n_4363), .C(mas_ltim), .D(n_674), .Z(n_576
));
notech_ao4 i_201(.A(n_1187), .B(n_4369), .C(mas_ltim), .D(n_678), .Z(n_575
notech_ao4 i_201(.A(n_1187), .B(n_4363), .C(mas_ltim), .D(n_678), .Z(n_575
));
notech_nao3 i_174(.A(\inter_last[8] ), .B(n_687), .C(sla_ltim), .Z(n_572
));
12408,99 → 12415,99
notech_nand3 i_163(.A(n_1485), .B(n_1478), .C(n_796), .Z(n_570));
notech_nand3 i_161(.A(n_1417), .B(n_1410), .C(n_803), .Z(n_569));
notech_nand3 i_159(.A(n_1271), .B(n_1264), .C(n_829), .Z(n_568));
notech_and4 i_72382(.A(n_1342), .B(n_1341), .C(n_1339), .D(n_1338), .Z(n_567
notech_and4 i_72425(.A(n_1342), .B(n_1341), .C(n_1339), .D(n_1338), .Z(n_567
));
notech_and4 i_72222(.A(n_1504), .B(n_1503), .C(n_1501), .D(n_1500), .Z(n_566
notech_and4 i_72265(.A(n_1504), .B(n_1503), .C(n_1501), .D(n_1500), .Z(n_566
));
notech_and4 i_72134(.A(n_1436), .B(n_1435), .C(n_1433), .D(n_1432), .Z(n_565
notech_and4 i_72177(.A(n_1436), .B(n_1435), .C(n_1433), .D(n_1432), .Z(n_565
));
notech_and4 i_72078(.A(n_1290), .B(n_1289), .C(n_1287), .D(n_1286), .Z(n_564
notech_and4 i_72121(.A(n_1290), .B(n_1289), .C(n_1287), .D(n_1286), .Z(n_564
));
notech_nao3 i_58(.A(n_1196), .B(sl_writedata[5]), .C(sl_writedata[6]), .Z
(n_563));
notech_nand3 i_21072(.A(sl_writedata[6]), .B(sl_writedata[5]), .C(n_4241
notech_nand3 i_21100(.A(sl_writedata[6]), .B(sl_writedata[5]), .C(n_4242
), .Z(n_559));
notech_nand3 i_2846(.A(sl_writedata[6]), .B(sl_writedata[5]), .C(n_4250)
notech_nand3 i_2822(.A(sl_writedata[6]), .B(sl_writedata[5]), .C(n_4249)
, .Z(n_558));
notech_ao3 i_692(.A(mas_rotate_on_aeoi), .B(mas_auto_eoi), .C(n_834), .Z
(n_1169));
notech_and4 i_693(.A(sl_writedata[5]), .B(sl_writedata[7]), .C(n_1197),
.D(n_4241), .Z(n_1170));
notech_and2 i_82327(.A(sl_writedata[7]), .B(n_1181), .Z(n_1175));
notech_nand2 i_2719(.A(sl_read), .B(n_4264), .Z(n_1177));
notech_nand2 i_2704(.A(ms_read), .B(n_4262), .Z(n_1179));
notech_and2 i_22321(.A(sl_writedata[1]), .B(n_1181), .Z(n_1180));
.D(n_4242), .Z(n_1170));
notech_and2 i_82370(.A(sl_writedata[7]), .B(n_1181), .Z(n_1175));
notech_nand2 i_2733(.A(sl_read), .B(n_4263), .Z(n_1177));
notech_nand2 i_2706(.A(ms_read), .B(n_4261), .Z(n_1179));
notech_and2 i_22364(.A(sl_writedata[1]), .B(n_1181), .Z(n_1180));
notech_nao3 i_2256(.A(ms_write), .B(sl_writedata[4]), .C(sl_address), .Z
(n_1181));
notech_nand2 i_2695(.A(n_1186), .B(n_4259), .Z(n_1182));
notech_nand2 i_2693(.A(n_1186), .B(n_4258), .Z(n_1182));
notech_nand2 i_112(.A(sl_address), .B(ms_write), .Z(n_1183));
notech_nand3 i_139(.A(ms_write), .B(sl_address), .C(mas_in_init), .Z(n_1184
));
notech_and4 i_180(.A(mas_in_init), .B(mas_init_byte_expected[1]), .C(n_4209
), .D(n_4261), .Z(n_1186));
notech_or2 i_1045(.A(sl_address), .B(n_4374), .Z(n_1187));
notech_ao3 i_100(.A(sl_writedata[3]), .B(n_4369), .C(sl_address), .Z(n_1192
notech_and4 i_180(.A(mas_in_init), .B(mas_init_byte_expected[1]), .C(n_4211
), .D(n_4260), .Z(n_1186));
notech_or2 i_1045(.A(sl_address), .B(n_4368), .Z(n_1187));
notech_ao3 i_100(.A(sl_writedata[3]), .B(n_4363), .C(sl_address), .Z(n_1192
));
notech_nand2 i_182(.A(ms_write), .B(n_1192), .Z(n_1193));
notech_nand2 i_181(.A(sl_write), .B(n_1192), .Z(n_1194));
notech_ao3 i_63510(.A(n_4368), .B(n_4367), .C(sl_writedata[2]), .Z(n_1196
notech_ao3 i_63552(.A(n_4362), .B(n_4361), .C(sl_writedata[2]), .Z(n_1196
));
notech_and2 i_48(.A(n_1196), .B(n_4370), .Z(n_1197));
notech_and2 i_48(.A(n_1196), .B(n_4364), .Z(n_1197));
notech_or4 i_2745(.A(sl_writedata[3]), .B(sl_address), .C(sl_writedata[4
]), .D(n_4374), .Z(n_1199));
notech_nand3 i_38(.A(sl_writedata[6]), .B(sl_writedata[7]), .C(n_4241),
]), .D(n_4368), .Z(n_1199));
notech_nand3 i_38(.A(sl_writedata[6]), .B(sl_writedata[7]), .C(n_4242),
.Z(n_1202));
notech_nand2 i_102(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[1]
), .Z(n_1203));
notech_nand3 i_63304(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[
1]), .C(n_4268), .Z(n_1204));
notech_nand3 i_63346(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[
1]), .C(n_4266), .Z(n_1204));
notech_mux2 i_1030(.S(n_1202), .A(sl_writedata[2]), .B(n_838), .Z(n_1205
));
notech_and2 i_59(.A(mas_lowest_priority[0]), .B(n_4267), .Z(n_1206));
notech_and2 i_59(.A(mas_lowest_priority[0]), .B(n_4265), .Z(n_1206));
notech_mux2 i_1029(.S(n_1202), .A(sl_writedata[1]), .B(n_836), .Z(n_1207
));
notech_mux2 i_1023(.S(n_1202), .A(n_4367), .B(mas_lowest_priority[0]), .Z
notech_mux2 i_1023(.S(n_1202), .A(n_4361), .B(mas_lowest_priority[0]), .Z
(n_1213));
notech_nand3 i_131167(.A(n_4358), .B(n_4341), .C(mas_irr[7]), .Z(n_1215)
notech_nand3 i_131187(.A(n_4352), .B(n_4335), .C(mas_irr[7]), .Z(n_1215)
);
notech_nao3 i_63301(.A(mas_lowest_priority[1]), .B(n_4268), .C(mas_lowest_priority
notech_nao3 i_63343(.A(mas_lowest_priority[1]), .B(n_4266), .C(mas_lowest_priority
[0]), .Z(n_1217));
notech_nand3 i_83293(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[
notech_nand3 i_83335(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[
1]), .C(mas_lowest_priority[2]), .Z(n_1218));
notech_nao3 i_63295(.A(n_4268), .B(n_4267), .C(mas_lowest_priority[0]),
notech_nao3 i_63337(.A(n_4266), .B(n_4265), .C(mas_lowest_priority[0]),
.Z(n_1220));
notech_nand3 i_1018(.A(n_1220), .B(n_1218), .C(n_1217), .Z(n_1222));
notech_nao3 i_63307(.A(mas_lowest_priority[2]), .B(n_4267), .C(mas_lowest_priority
notech_nao3 i_63349(.A(mas_lowest_priority[2]), .B(n_4265), .C(mas_lowest_priority
[0]), .Z(n_1224));
notech_or4 i_9(.A(n_4232), .B(n_4231), .C(n_1206), .D(n_1222), .Z(n_1227
notech_or4 i_9(.A(n_4233), .B(n_4232), .C(n_1206), .D(n_1222), .Z(n_1227
));
notech_nand3 i_121166(.A(mas_irr[6]), .B(n_4356), .C(n_4340), .Z(n_1229)
notech_nand3 i_121186(.A(mas_irr[6]), .B(n_4350), .C(n_4334), .Z(n_1229)
);
notech_nand3 i_8(.A(mas_lowest_priority[0]), .B(n_4267), .C(mas_lowest_priority
notech_nand3 i_8(.A(mas_lowest_priority[0]), .B(n_4265), .C(mas_lowest_priority
[2]), .Z(n_1230));
notech_ao4 i_1002(.A(n_1230), .B(n_1229), .C(n_1227), .D(n_1215), .Z(n_1231
));
notech_nand3 i_81162(.A(n_4348), .B(n_4336), .C(mas_irr[2]), .Z(n_1233)
notech_nand3 i_81182(.A(n_4342), .B(n_4330), .C(mas_irr[2]), .Z(n_1233)
);
notech_nand3 i_6(.A(mas_lowest_priority[0]), .B(n_4267), .C(n_4268), .Z(n_1234
notech_nand3 i_6(.A(mas_lowest_priority[0]), .B(n_4265), .C(n_4266), .Z(n_1234
));
notech_nand3 i_111165(.A(mas_irr[5]), .B(n_4354), .C(n_4339), .Z(n_1236)
notech_nand3 i_111185(.A(mas_irr[5]), .B(n_4348), .C(n_4333), .Z(n_1236)
);
notech_ao4 i_1001(.A(n_1236), .B(n_1224), .C(n_1233), .D(n_1234), .Z(n_1237
));
notech_nand3 i_101164(.A(mas_irr[4]), .B(n_4352), .C(n_4338), .Z(n_1240)
notech_nand3 i_101184(.A(mas_irr[4]), .B(n_4346), .C(n_4332), .Z(n_1240)
);
notech_nand3 i_91163(.A(mas_irr[3]), .B(n_4350), .C(n_4337), .Z(n_1242)
notech_nand3 i_91183(.A(mas_irr[3]), .B(n_4344), .C(n_4331), .Z(n_1242)
);
notech_ao4 i_999(.A(n_1242), .B(n_1217), .C(n_1240), .D(n_1204), .Z(n_1243
));
notech_nand3 i_71161(.A(n_4346), .B(n_4335), .C(mas_irr[1]), .Z(n_1245)
notech_nand3 i_71181(.A(n_4340), .B(n_4329), .C(mas_irr[1]), .Z(n_1245)
);
notech_nand3 i_61160(.A(n_4344), .B(n_4334), .C(mas_irr[0]), .Z(n_1247)
notech_nand3 i_61180(.A(n_4338), .B(n_4328), .C(mas_irr[0]), .Z(n_1247)
);
notech_ao4 i_998(.A(n_1247), .B(n_1218), .C(n_1245), .D(n_1220), .Z(n_1248
));
notech_and4 i_12072(.A(n_1248), .B(n_1243), .C(n_1237), .D(n_1231), .Z(n_1250
notech_and4 i_12115(.A(n_1248), .B(n_1243), .C(n_1237), .D(n_1231), .Z(n_1250
));
notech_ao4 i_966(.A(n_1215), .B(n_1230), .C(n_1247), .D(n_1227), .Z(n_1251
));
12510,7 → 12517,7
));
notech_ao4 i_962(.A(n_1245), .B(n_1218), .C(n_1233), .D(n_1220), .Z(n_1255
));
notech_and4 i_22073(.A(n_1255), .B(n_1254), .C(n_1252), .D(n_1251), .Z(n_1257
notech_and4 i_22116(.A(n_1255), .B(n_1254), .C(n_1252), .D(n_1251), .Z(n_1257
));
notech_ao4 i_996(.A(n_1230), .B(n_1247), .C(n_1227), .D(n_1245), .Z(n_1258
));
12520,7 → 12527,7
));
notech_ao4 i_992(.A(n_1233), .B(n_1218), .C(n_1242), .D(n_1220), .Z(n_1262
));
notech_and4 i_32074(.A(n_1262), .B(n_1261), .C(n_1259), .D(n_1258), .Z(n_1264
notech_and4 i_32117(.A(n_1262), .B(n_1261), .C(n_1259), .D(n_1258), .Z(n_1264
));
notech_ao4 i_972(.A(n_1245), .B(n_1230), .C(n_1233), .D(n_1227), .Z(n_1265
));
12530,7 → 12537,7
));
notech_ao4 i_968(.A(n_1242), .B(n_1218), .C(n_1240), .D(n_1220), .Z(n_1269
));
notech_and4 i_42075(.A(n_1269), .B(n_1268), .C(n_1266), .D(n_1265), .Z(n_1271
notech_and4 i_42118(.A(n_1269), .B(n_1268), .C(n_1266), .D(n_1265), .Z(n_1271
));
notech_ao4 i_990(.A(n_1230), .B(n_1233), .C(n_1227), .D(n_1242), .Z(n_1272
));
12540,7 → 12547,7
));
notech_ao4 i_986(.A(n_1240), .B(n_1218), .C(n_1236), .D(n_1220), .Z(n_1276
));
notech_and4 i_52076(.A(n_1276), .B(n_1275), .C(n_1273), .D(n_1272), .Z(n_1278
notech_and4 i_52119(.A(n_1276), .B(n_1275), .C(n_1273), .D(n_1272), .Z(n_1278
));
notech_ao4 i_984(.A(n_1242), .B(n_1230), .C(n_1227), .D(n_1240), .Z(n_1279
));
12550,7 → 12557,7
));
notech_ao4 i_980(.A(n_1236), .B(n_1218), .C(n_1229), .D(n_1220), .Z(n_1283
));
notech_and4 i_62077(.A(n_1283), .B(n_1282), .C(n_1280), .D(n_1279), .Z(n_1285
notech_and4 i_62120(.A(n_1283), .B(n_1282), .C(n_1280), .D(n_1279), .Z(n_1285
));
notech_ao4 i_978(.A(n_1240), .B(n_1230), .C(n_1227), .D(n_1236), .Z(n_1286
));
12560,219 → 12567,219
));
notech_ao4 i_974(.A(n_1229), .B(n_1218), .C(n_1215), .D(n_1220), .Z(n_1290
));
notech_and2 i_12614(.A(n_581), .B(n_1250), .Z(n_1292));
notech_nand3 i_22615(.A(n_1257), .B(n_1250), .C(n_568), .Z(n_1295));
notech_ao4 i_959(.A(n_1230), .B(n_4356), .C(n_1227), .D(n_4358), .Z(n_1296
notech_and2 i_12657(.A(n_581), .B(n_1250), .Z(n_1292));
notech_nand3 i_22658(.A(n_1257), .B(n_1250), .C(n_568), .Z(n_1295));
notech_ao4 i_959(.A(n_1230), .B(n_4350), .C(n_1227), .D(n_4352), .Z(n_1296
));
notech_ao4 i_958(.A(n_4354), .B(n_1224), .C(n_1234), .D(n_4348), .Z(n_1297
notech_ao4 i_958(.A(n_4348), .B(n_1224), .C(n_1234), .D(n_4342), .Z(n_1297
));
notech_ao4 i_956(.A(n_1217), .B(n_4350), .C(n_4352), .D(n_1204), .Z(n_1299
notech_ao4 i_956(.A(n_1217), .B(n_4344), .C(n_4346), .D(n_1204), .Z(n_1299
));
notech_ao4 i_955(.A(n_1218), .B(n_4344), .C(n_1220), .D(n_4346), .Z(n_1300
notech_ao4 i_955(.A(n_1218), .B(n_4338), .C(n_1220), .D(n_4340), .Z(n_1300
));
notech_and4 i_12376(.A(n_1300), .B(n_1299), .C(n_1297), .D(n_1296), .Z(n_1302
notech_and4 i_12419(.A(n_1300), .B(n_1299), .C(n_1297), .D(n_1296), .Z(n_1302
));
notech_ao4 i_923(.A(n_4358), .B(n_1230), .C(n_4344), .D(n_1227), .Z(n_1303
notech_ao4 i_923(.A(n_4352), .B(n_1230), .C(n_4338), .D(n_1227), .Z(n_1303
));
notech_ao4 i_922(.A(n_4356), .B(n_1224), .C(n_4350), .D(n_1234), .Z(n_1304
notech_ao4 i_922(.A(n_4350), .B(n_1224), .C(n_4344), .D(n_1234), .Z(n_1304
));
notech_ao4 i_920(.A(n_4352), .B(n_1217), .C(n_4354), .D(n_1204), .Z(n_1306
notech_ao4 i_920(.A(n_4346), .B(n_1217), .C(n_4348), .D(n_1204), .Z(n_1306
));
notech_ao4 i_919(.A(n_4346), .B(n_1218), .C(n_4348), .D(n_1220), .Z(n_1307
notech_ao4 i_919(.A(n_4340), .B(n_1218), .C(n_4342), .D(n_1220), .Z(n_1307
));
notech_and4 i_22377(.A(n_1307), .B(n_1306), .C(n_1304), .D(n_1303), .Z(n_1309
notech_and4 i_22420(.A(n_1307), .B(n_1306), .C(n_1304), .D(n_1303), .Z(n_1309
));
notech_ao4 i_953(.A(n_1230), .B(n_4344), .C(n_1227), .D(n_4346), .Z(n_1310
notech_ao4 i_953(.A(n_1230), .B(n_4338), .C(n_1227), .D(n_4340), .Z(n_1310
));
notech_ao4 i_952(.A(n_4358), .B(n_1224), .C(n_1234), .D(n_4352), .Z(n_1311
notech_ao4 i_952(.A(n_4352), .B(n_1224), .C(n_1234), .D(n_4346), .Z(n_1311
));
notech_ao4 i_950(.A(n_1217), .B(n_4354), .C(n_4356), .D(n_1204), .Z(n_1313
notech_ao4 i_950(.A(n_1217), .B(n_4348), .C(n_4350), .D(n_1204), .Z(n_1313
));
notech_ao4 i_949(.A(n_1218), .B(n_4348), .C(n_1220), .D(n_4350), .Z(n_1314
notech_ao4 i_949(.A(n_1218), .B(n_4342), .C(n_1220), .D(n_4344), .Z(n_1314
));
notech_and4 i_32378(.A(n_1314), .B(n_1313), .C(n_1311), .D(n_1310), .Z(n_1316
notech_and4 i_32421(.A(n_1314), .B(n_1313), .C(n_1311), .D(n_1310), .Z(n_1316
));
notech_ao4 i_929(.A(n_1230), .B(n_4346), .C(n_1227), .D(n_4348), .Z(n_1317
notech_ao4 i_929(.A(n_1230), .B(n_4340), .C(n_1227), .D(n_4342), .Z(n_1317
));
notech_ao4 i_928(.A(n_4344), .B(n_1224), .C(n_1234), .D(n_4354), .Z(n_1318
notech_ao4 i_928(.A(n_4338), .B(n_1224), .C(n_1234), .D(n_4348), .Z(n_1318
));
notech_ao4 i_926(.A(n_1217), .B(n_4356), .C(n_4358), .D(n_1204), .Z(n_1320
notech_ao4 i_926(.A(n_1217), .B(n_4350), .C(n_4352), .D(n_1204), .Z(n_1320
));
notech_ao4 i_925(.A(n_1218), .B(n_4350), .C(n_1220), .D(n_4352), .Z(n_1321
notech_ao4 i_925(.A(n_1218), .B(n_4344), .C(n_1220), .D(n_4346), .Z(n_1321
));
notech_and4 i_42379(.A(n_1321), .B(n_1320), .C(n_1318), .D(n_1317), .Z(n_1323
notech_and4 i_42422(.A(n_1321), .B(n_1320), .C(n_1318), .D(n_1317), .Z(n_1323
));
notech_ao4 i_947(.A(n_1230), .B(n_4348), .C(n_1227), .D(n_4350), .Z(n_1324
notech_ao4 i_947(.A(n_1230), .B(n_4342), .C(n_1227), .D(n_4344), .Z(n_1324
));
notech_ao4 i_946(.A(n_4346), .B(n_1224), .C(n_1234), .D(n_4356), .Z(n_1325
notech_ao4 i_946(.A(n_4340), .B(n_1224), .C(n_1234), .D(n_4350), .Z(n_1325
));
notech_ao4 i_944(.A(n_1217), .B(n_4358), .C(n_4344), .D(n_1204), .Z(n_1327
notech_ao4 i_944(.A(n_1217), .B(n_4352), .C(n_4338), .D(n_1204), .Z(n_1327
));
notech_ao4 i_943(.A(n_1218), .B(n_4352), .C(n_1220), .D(n_4354), .Z(n_1328
notech_ao4 i_943(.A(n_1218), .B(n_4346), .C(n_1220), .D(n_4348), .Z(n_1328
));
notech_and4 i_52380(.A(n_1328), .B(n_1327), .C(n_1325), .D(n_1324), .Z(n_1330
notech_and4 i_52423(.A(n_1328), .B(n_1327), .C(n_1325), .D(n_1324), .Z(n_1330
));
notech_ao4 i_941(.A(n_1230), .B(n_4350), .C(n_1227), .D(n_4352), .Z(n_1331
notech_ao4 i_941(.A(n_1230), .B(n_4344), .C(n_1227), .D(n_4346), .Z(n_1331
));
notech_ao4 i_940(.A(n_4348), .B(n_1224), .C(n_1234), .D(n_4358), .Z(n_1332
notech_ao4 i_940(.A(n_4342), .B(n_1224), .C(n_1234), .D(n_4352), .Z(n_1332
));
notech_ao4 i_938(.A(n_1217), .B(n_4344), .C(n_4346), .D(n_1204), .Z(n_1334
notech_ao4 i_938(.A(n_1217), .B(n_4338), .C(n_4340), .D(n_1204), .Z(n_1334
));
notech_ao4 i_937(.A(n_1218), .B(n_4354), .C(n_1220), .D(n_4356), .Z(n_1335
notech_ao4 i_937(.A(n_1218), .B(n_4348), .C(n_1220), .D(n_4350), .Z(n_1335
));
notech_and4 i_62381(.A(n_1335), .B(n_1334), .C(n_1332), .D(n_1331), .Z(n_1337
notech_and4 i_62424(.A(n_1335), .B(n_1334), .C(n_1332), .D(n_1331), .Z(n_1337
));
notech_ao4 i_935(.A(n_1230), .B(n_4352), .C(n_1227), .D(n_4354), .Z(n_1338
notech_ao4 i_935(.A(n_1230), .B(n_4346), .C(n_1227), .D(n_4348), .Z(n_1338
));
notech_ao4 i_934(.A(n_4350), .B(n_1224), .C(n_1234), .D(n_4344), .Z(n_1339
notech_ao4 i_934(.A(n_4344), .B(n_1224), .C(n_1234), .D(n_4338), .Z(n_1339
));
notech_ao4 i_932(.A(n_1217), .B(n_4346), .C(n_4348), .D(n_1204), .Z(n_1341
notech_ao4 i_932(.A(n_1217), .B(n_4340), .C(n_4342), .D(n_1204), .Z(n_1341
));
notech_ao4 i_931(.A(n_1218), .B(n_4356), .C(n_1220), .D(n_4358), .Z(n_1342
notech_ao4 i_931(.A(n_1218), .B(n_4350), .C(n_1220), .D(n_4352), .Z(n_1342
));
notech_and2 i_12674(.A(n_584), .B(n_1302), .Z(n_1344));
notech_and4 i_32616(.A(n_1257), .B(n_1250), .C(n_1271), .D(n_1264), .Z(n_1345
notech_and2 i_12717(.A(n_584), .B(n_1302), .Z(n_1344));
notech_and4 i_32659(.A(n_1257), .B(n_1250), .C(n_1271), .D(n_1264), .Z(n_1345
));
notech_and4 i_32676(.A(n_1309), .B(n_1302), .C(n_1323), .D(n_1316), .Z(n_1348
notech_and4 i_32719(.A(n_1309), .B(n_1302), .C(n_1323), .D(n_1316), .Z(n_1348
));
notech_nand3 i_916(.A(n_584), .B(n_1302), .C(n_1054), .Z(n_1349));
notech_ao4 i_26(.A(n_1345), .B(n_4234), .C(n_4235), .D(n_1349), .Z(n_1350
notech_ao4 i_26(.A(n_1345), .B(n_4235), .C(n_4236), .D(n_1349), .Z(n_1350
));
notech_nand3 i_22675(.A(n_1309), .B(n_1302), .C(n_571), .Z(n_1351));
notech_nand2 i_34(.A(n_820), .B(n_4359), .Z(n_1353));
notech_nand3 i_22718(.A(n_1309), .B(n_1302), .C(n_571), .Z(n_1351));
notech_nand2 i_34(.A(n_820), .B(n_4353), .Z(n_1353));
notech_and4 i_914(.A(n_1242), .B(n_1233), .C(n_1247), .D(n_1245), .Z(n_1356
));
notech_and4 i_911(.A(n_1229), .B(n_1215), .C(n_1240), .D(n_1236), .Z(n_1359
));
notech_ao4 i_21171(.A(n_4229), .B(n_4230), .C(n_1353), .D(n_4236), .Z(n_1360
notech_ao4 i_21193(.A(n_4230), .B(n_4231), .C(n_1353), .D(n_4237), .Z(n_1360
));
notech_or2 i_15(.A(mas_lowest_priority[0]), .B(n_1292), .Z(n_1361));
notech_nand2 i_49(.A(n_819), .B(n_1361), .Z(n_1362));
notech_and2 i_83(.A(n_4237), .B(n_4361), .Z(n_1363));
notech_nand2 i_138(.A(n_4237), .B(n_4373), .Z(n_1364));
notech_and2 i_83(.A(n_4238), .B(n_4355), .Z(n_1363));
notech_nand2 i_138(.A(n_4238), .B(n_4367), .Z(n_1364));
notech_xor2 i_89(.A(mas_lowest_priority[1]), .B(n_1295), .Z(n_1365));
notech_xor2 i_908(.A(n_1365), .B(n_1361), .Z(n_1366));
notech_xor2 i_36(.A(n_4268), .B(n_1345), .Z(n_1367));
notech_xor2 i_36(.A(n_4266), .B(n_1345), .Z(n_1367));
notech_mux2 i_907(.S(n_1367), .A(n_812), .B(n_811), .Z(n_1368));
notech_and2 i_32619(.A(n_1364), .B(n_1368), .Z(n_1369));
notech_ao4 i_906(.A(n_809), .B(n_4361), .C(n_1363), .D(n_808), .Z(n_1370
notech_and2 i_32662(.A(n_1364), .B(n_1368), .Z(n_1369));
notech_ao4 i_906(.A(n_809), .B(n_4355), .C(n_1363), .D(n_808), .Z(n_1370
));
notech_nand2 i_2770(.A(n_810), .B(n_1370), .Z(n_1371));
notech_nao3 i_63406(.A(sla_lowest_priority[1]), .B(n_4280), .C(sla_lowest_priority
notech_nao3 i_63448(.A(sla_lowest_priority[1]), .B(n_4276), .C(sla_lowest_priority
[2]), .Z(n_1374));
notech_and2 i_103(.A(sla_lowest_priority[1]), .B(sla_lowest_priority[0])
, .Z(n_1375));
notech_nand3 i_83368(.A(sla_lowest_priority[2]), .B(sla_lowest_priority[
notech_nand3 i_83410(.A(sla_lowest_priority[2]), .B(sla_lowest_priority[
1]), .C(sla_lowest_priority[0]), .Z(n_1376));
notech_nao3 i_63370(.A(n_4281), .B(n_4280), .C(sla_lowest_priority[2]),
notech_nao3 i_63412(.A(n_4277), .B(n_4276), .C(sla_lowest_priority[2]),
.Z(n_1378));
notech_nand3 i_899(.A(n_1378), .B(n_1376), .C(n_1374), .Z(n_1380));
notech_and2 i_60(.A(sla_lowest_priority[0]), .B(n_4281), .Z(n_1381));
notech_nao3 i_63409(.A(sla_lowest_priority[1]), .B(sla_lowest_priority[0
notech_and2 i_60(.A(sla_lowest_priority[0]), .B(n_4277), .Z(n_1381));
notech_nao3 i_63451(.A(sla_lowest_priority[1]), .B(sla_lowest_priority[0
]), .C(sla_lowest_priority[2]), .Z(n_1382));
notech_nand3 i_63412(.A(sla_lowest_priority[2]), .B(n_4281), .C(n_4280),
notech_nand3 i_63454(.A(sla_lowest_priority[2]), .B(n_4277), .C(n_4276),
.Z(n_1384));
notech_or4 i_11(.A(n_4217), .B(n_4215), .C(n_1381), .D(n_1380), .Z(n_1387
notech_or4 i_11(.A(n_4218), .B(n_4217), .C(n_1381), .D(n_1380), .Z(n_1387
));
notech_nand3 i_10(.A(sla_lowest_priority[2]), .B(sla_lowest_priority[0])
, .C(n_4281), .Z(n_1388));
notech_ao4 i_890(.A(n_1388), .B(n_4297), .C(n_1387), .D(n_4299), .Z(n_1389
, .C(n_4277), .Z(n_1388));
notech_ao4 i_890(.A(n_1388), .B(n_4291), .C(n_1387), .D(n_4293), .Z(n_1389
));
notech_nao3 i_7(.A(sla_lowest_priority[0]), .B(n_4281), .C(sla_lowest_priority
notech_nao3 i_7(.A(sla_lowest_priority[0]), .B(n_4277), .C(sla_lowest_priority
[2]), .Z(n_1390));
notech_ao4 i_889(.A(n_4294), .B(n_1384), .C(n_1390), .D(n_4287), .Z(n_1391
notech_ao4 i_889(.A(n_4289), .B(n_1384), .C(n_1390), .D(n_4283), .Z(n_1391
));
notech_ao4 i_887(.A(n_1374), .B(n_4289), .C(n_4292), .D(n_1382), .Z(n_1393
notech_ao4 i_887(.A(n_1374), .B(n_4285), .C(n_4287), .D(n_1382), .Z(n_1393
));
notech_ao4 i_886(.A(n_1376), .B(n_4283), .C(n_1378), .D(n_4285), .Z(n_1394
notech_ao4 i_886(.A(n_1376), .B(n_4279), .C(n_1378), .D(n_4281), .Z(n_1394
));
notech_and4 i_12128(.A(n_1394), .B(n_1393), .C(n_1391), .D(n_1389), .Z(n_1396
notech_and4 i_12171(.A(n_1394), .B(n_1393), .C(n_1391), .D(n_1389), .Z(n_1396
));
notech_ao4 i_854(.A(n_1388), .B(n_4299), .C(n_1387), .D(n_4283), .Z(n_1397
notech_ao4 i_854(.A(n_1388), .B(n_4293), .C(n_1387), .D(n_4279), .Z(n_1397
));
notech_ao4 i_853(.A(n_4297), .B(n_1384), .C(n_1390), .D(n_4289), .Z(n_1398
notech_ao4 i_853(.A(n_4291), .B(n_1384), .C(n_1390), .D(n_4285), .Z(n_1398
));
notech_ao4 i_851(.A(n_1374), .B(n_4292), .C(n_4294), .D(n_1382), .Z(n_1400
notech_ao4 i_851(.A(n_1374), .B(n_4287), .C(n_4289), .D(n_1382), .Z(n_1400
));
notech_ao4 i_850(.A(n_1376), .B(n_4285), .C(n_1378), .D(n_4287), .Z(n_1401
notech_ao4 i_850(.A(n_1376), .B(n_4281), .C(n_1378), .D(n_4283), .Z(n_1401
));
notech_and4 i_22129(.A(n_1401), .B(n_1400), .C(n_1398), .D(n_1397), .Z(n_1403
notech_and4 i_22172(.A(n_1401), .B(n_1400), .C(n_1398), .D(n_1397), .Z(n_1403
));
notech_ao4 i_884(.A(n_1388), .B(n_4283), .C(n_1387), .D(n_4285), .Z(n_1404
notech_ao4 i_884(.A(n_1388), .B(n_4279), .C(n_1387), .D(n_4281), .Z(n_1404
));
notech_ao4 i_883(.A(n_4299), .B(n_1384), .C(n_1390), .D(n_4292), .Z(n_1405
notech_ao4 i_883(.A(n_4293), .B(n_1384), .C(n_1390), .D(n_4287), .Z(n_1405
));
notech_ao4 i_881(.A(n_1374), .B(n_4294), .C(n_4297), .D(n_1382), .Z(n_1407
notech_ao4 i_881(.A(n_1374), .B(n_4289), .C(n_4291), .D(n_1382), .Z(n_1407
));
notech_ao4 i_880(.A(n_1376), .B(n_4287), .C(n_1378), .D(n_4289), .Z(n_1408
notech_ao4 i_880(.A(n_1376), .B(n_4283), .C(n_1378), .D(n_4285), .Z(n_1408
));
notech_and4 i_32130(.A(n_1408), .B(n_1407), .C(n_1405), .D(n_1404), .Z(n_1410
notech_and4 i_32173(.A(n_1408), .B(n_1407), .C(n_1405), .D(n_1404), .Z(n_1410
));
notech_ao4 i_860(.A(n_1388), .B(n_4285), .C(n_1387), .D(n_4287), .Z(n_1411
notech_ao4 i_860(.A(n_1388), .B(n_4281), .C(n_1387), .D(n_4283), .Z(n_1411
));
notech_ao4 i_859(.A(n_4283), .B(n_1384), .C(n_1390), .D(n_4294), .Z(n_1412
notech_ao4 i_859(.A(n_4279), .B(n_1384), .C(n_1390), .D(n_4289), .Z(n_1412
));
notech_ao4 i_857(.A(n_1374), .B(n_4297), .C(n_4299), .D(n_1382), .Z(n_1414
notech_ao4 i_857(.A(n_1374), .B(n_4291), .C(n_4293), .D(n_1382), .Z(n_1414
));
notech_ao4 i_856(.A(n_1376), .B(n_4289), .C(n_1378), .D(n_4292), .Z(n_1415
notech_ao4 i_856(.A(n_1376), .B(n_4285), .C(n_1378), .D(n_4287), .Z(n_1415
));
notech_and4 i_42131(.A(n_1415), .B(n_1414), .C(n_1412), .D(n_1411), .Z(n_1417
notech_and4 i_42174(.A(n_1415), .B(n_1414), .C(n_1412), .D(n_1411), .Z(n_1417
));
notech_ao4 i_878(.A(n_1388), .B(n_4287), .C(n_1387), .D(n_4289), .Z(n_1418
notech_ao4 i_878(.A(n_1388), .B(n_4283), .C(n_1387), .D(n_4285), .Z(n_1418
));
notech_ao4 i_877(.A(n_4285), .B(n_1384), .C(n_1390), .D(n_4297), .Z(n_1419
notech_ao4 i_877(.A(n_4281), .B(n_1384), .C(n_1390), .D(n_4291), .Z(n_1419
));
notech_ao4 i_875(.A(n_1374), .B(n_4299), .C(n_4283), .D(n_1382), .Z(n_1421
notech_ao4 i_875(.A(n_1374), .B(n_4293), .C(n_4279), .D(n_1382), .Z(n_1421
));
notech_ao4 i_874(.A(n_1376), .B(n_4292), .C(n_1378), .D(n_4294), .Z(n_1422
notech_ao4 i_874(.A(n_1376), .B(n_4287), .C(n_1378), .D(n_4289), .Z(n_1422
));
notech_and4 i_52132(.A(n_1422), .B(n_1421), .C(n_1419), .D(n_1418), .Z(n_1424
notech_and4 i_52175(.A(n_1422), .B(n_1421), .C(n_1419), .D(n_1418), .Z(n_1424
));
notech_ao4 i_872(.A(n_1388), .B(n_4289), .C(n_1387), .D(n_4292), .Z(n_1425
notech_ao4 i_872(.A(n_1388), .B(n_4285), .C(n_1387), .D(n_4287), .Z(n_1425
));
notech_ao4 i_871(.A(n_4287), .B(n_1384), .C(n_1390), .D(n_4299), .Z(n_1426
notech_ao4 i_871(.A(n_4283), .B(n_1384), .C(n_1390), .D(n_4293), .Z(n_1426
));
notech_ao4 i_869(.A(n_1374), .B(n_4283), .C(n_4285), .D(n_1382), .Z(n_1428
notech_ao4 i_869(.A(n_1374), .B(n_4279), .C(n_4281), .D(n_1382), .Z(n_1428
));
notech_ao4 i_868(.A(n_1376), .B(n_4294), .C(n_1378), .D(n_4297), .Z(n_1429
notech_ao4 i_868(.A(n_1376), .B(n_4289), .C(n_1378), .D(n_4291), .Z(n_1429
));
notech_and4 i_62133(.A(n_1429), .B(n_1428), .C(n_1426), .D(n_1425), .Z(n_1431
notech_and4 i_62176(.A(n_1429), .B(n_1428), .C(n_1426), .D(n_1425), .Z(n_1431
));
notech_ao4 i_866(.A(n_1388), .B(n_4292), .C(n_1387), .D(n_4294), .Z(n_1432
notech_ao4 i_866(.A(n_1388), .B(n_4287), .C(n_1387), .D(n_4289), .Z(n_1432
));
notech_ao4 i_865(.A(n_4289), .B(n_1384), .C(n_1390), .D(n_4283), .Z(n_1433
notech_ao4 i_865(.A(n_4285), .B(n_1384), .C(n_1390), .D(n_4279), .Z(n_1433
));
notech_ao4 i_863(.A(n_1374), .B(n_4285), .C(n_4287), .D(n_1382), .Z(n_1435
notech_ao4 i_863(.A(n_1374), .B(n_4281), .C(n_4283), .D(n_1382), .Z(n_1435
));
notech_ao4 i_862(.A(n_1376), .B(n_4297), .C(n_1378), .D(n_4299), .Z(n_1436
notech_ao4 i_862(.A(n_1376), .B(n_4291), .C(n_1378), .D(n_4293), .Z(n_1436
));
notech_nand2 i_12644(.A(n_582), .B(n_1396), .Z(n_1438));
notech_nand3 i_22645(.A(n_1403), .B(n_1396), .C(n_569), .Z(n_1441));
notech_nand3 i_13979(.A(n_4299), .B(n_4324), .C(sla_irr[7]), .Z(n_1443)
notech_nand2 i_12687(.A(n_582), .B(n_1396), .Z(n_1438));
notech_nand3 i_22688(.A(n_1403), .B(n_1396), .C(n_569), .Z(n_1441));
notech_nand3 i_13948(.A(n_4293), .B(n_4318), .C(sla_irr[7]), .Z(n_1443)
);
notech_nand3 i_12978(.A(sla_irr[6]), .B(n_4297), .C(n_4323), .Z(n_1445)
notech_nand3 i_12947(.A(sla_irr[6]), .B(n_4291), .C(n_4317), .Z(n_1445)
);
notech_ao4 i_839(.A(n_1388), .B(n_1445), .C(n_1443), .D(n_1387), .Z(n_1446
));
notech_nand3 i_8974(.A(n_4287), .B(n_4319), .C(sla_irr[2]), .Z(n_1448)
notech_nand3 i_8943(.A(n_4283), .B(n_4313), .C(sla_irr[2]), .Z(n_1448)
);
notech_nand3 i_11977(.A(sla_irr[5]), .B(n_4294), .C(n_4322), .Z(n_1450)
notech_nand3 i_11946(.A(sla_irr[5]), .B(n_4289), .C(n_4316), .Z(n_1450)
);
notech_ao4 i_838(.A(n_1450), .B(n_1384), .C(n_1448), .D(n_1390), .Z(n_1451
));
notech_nand3 i_10976(.A(sla_irr[4]), .B(n_4292), .C(n_4321), .Z(n_1454)
notech_nand3 i_10945(.A(sla_irr[4]), .B(n_4287), .C(n_4315), .Z(n_1454)
);
notech_nand3 i_9975(.A(sla_irr[3]), .B(n_4289), .C(n_4320), .Z(n_1456)
notech_nand3 i_9944(.A(sla_irr[3]), .B(n_4285), .C(n_4314), .Z(n_1456)
);
notech_ao4 i_836(.A(n_1456), .B(n_1374), .C(n_1454), .D(n_1382), .Z(n_1457
));
notech_nand3 i_7973(.A(n_4285), .B(n_4318), .C(sla_irr[1]), .Z(n_1459)
notech_nand3 i_7942(.A(n_4281), .B(n_4312), .C(sla_irr[1]), .Z(n_1459)
);
notech_nand3 i_6972(.A(n_4283), .B(n_4317), .C(sla_irr[0]), .Z(n_1461)
notech_nand3 i_6941(.A(n_4279), .B(n_4311), .C(sla_irr[0]), .Z(n_1461)
);
notech_ao4 i_835(.A(n_1461), .B(n_1376), .C(n_1459), .D(n_1378), .Z(n_1462
));
notech_and4 i_12216(.A(n_1462), .B(n_1457), .C(n_1451), .D(n_1446), .Z(n_1464
notech_and4 i_12259(.A(n_1462), .B(n_1457), .C(n_1451), .D(n_1446), .Z(n_1464
));
notech_ao4 i_803(.A(n_1443), .B(n_1388), .C(n_1461), .D(n_1387), .Z(n_1465
));
12782,7 → 12789,7
));
notech_ao4 i_799(.A(n_1459), .B(n_1376), .C(n_1448), .D(n_1378), .Z(n_1469
));
notech_and4 i_22217(.A(n_1469), .B(n_1468), .C(n_1466), .D(n_1465), .Z(n_1471
notech_and4 i_22260(.A(n_1469), .B(n_1468), .C(n_1466), .D(n_1465), .Z(n_1471
));
notech_ao4 i_833(.A(n_1461), .B(n_1388), .C(n_1387), .D(n_1459), .Z(n_1472
));
12792,7 → 12799,7
));
notech_ao4 i_829(.A(n_1448), .B(n_1376), .C(n_1456), .D(n_1378), .Z(n_1476
));
notech_and4 i_32218(.A(n_1476), .B(n_1475), .C(n_1473), .D(n_1472), .Z(n_1478
notech_and4 i_32261(.A(n_1476), .B(n_1475), .C(n_1473), .D(n_1472), .Z(n_1478
));
notech_ao4 i_809(.A(n_1459), .B(n_1388), .C(n_1448), .D(n_1387), .Z(n_1479
));
12802,7 → 12809,7
));
notech_ao4 i_805(.A(n_1456), .B(n_1376), .C(n_1454), .D(n_1378), .Z(n_1483
));
notech_and4 i_42219(.A(n_1483), .B(n_1482), .C(n_1480), .D(n_1479), .Z(n_1485
notech_and4 i_42262(.A(n_1483), .B(n_1482), .C(n_1480), .D(n_1479), .Z(n_1485
));
notech_ao4 i_827(.A(n_1388), .B(n_1448), .C(n_1387), .D(n_1456), .Z(n_1486
));
12812,7 → 12819,7
));
notech_ao4 i_823(.A(n_1454), .B(n_1376), .C(n_1450), .D(n_1378), .Z(n_1490
));
notech_and4 i_52220(.A(n_1490), .B(n_1489), .C(n_1487), .D(n_1486), .Z(n_1492
notech_and4 i_52263(.A(n_1490), .B(n_1489), .C(n_1487), .D(n_1486), .Z(n_1492
));
notech_ao4 i_821(.A(n_1456), .B(n_1388), .C(n_1387), .D(n_1454), .Z(n_1493
));
12822,7 → 12829,7
));
notech_ao4 i_817(.A(n_1450), .B(n_1376), .C(n_1445), .D(n_1378), .Z(n_1497
));
notech_and4 i_62221(.A(n_1497), .B(n_1496), .C(n_1494), .D(n_1493), .Z(n_1499
notech_and4 i_62264(.A(n_1497), .B(n_1496), .C(n_1494), .D(n_1493), .Z(n_1499
));
notech_ao4 i_815(.A(n_1454), .B(n_1388), .C(n_1387), .D(n_1450), .Z(n_1500
));
12832,851 → 12839,851
));
notech_ao4 i_811(.A(n_1445), .B(n_1376), .C(n_1443), .D(n_1378), .Z(n_1504
));
notech_nand2 i_12656(.A(n_583), .B(n_1464), .Z(n_1506));
notech_and4 i_32646(.A(n_1403), .B(n_1396), .C(n_1417), .D(n_1410), .Z(n_1507
notech_nand2 i_12699(.A(n_583), .B(n_1464), .Z(n_1506));
notech_and4 i_32689(.A(n_1403), .B(n_1396), .C(n_1417), .D(n_1410), .Z(n_1507
));
notech_and4 i_32658(.A(n_1471), .B(n_1464), .C(n_1485), .D(n_1478), .Z(n_1510
notech_and4 i_32701(.A(n_1471), .B(n_1464), .C(n_1485), .D(n_1478), .Z(n_1510
));
notech_nand2 i_796(.A(n_933), .B(n_1506), .Z(n_1511));
notech_ao4 i_27(.A(n_1510), .B(n_4219), .C(n_1441), .D(n_1511), .Z(n_1512
notech_ao4 i_27(.A(n_1510), .B(n_4220), .C(n_1441), .D(n_1511), .Z(n_1512
));
notech_and3 i_22657(.A(n_1471), .B(n_1464), .C(n_570), .Z(n_1513));
notech_and3 i_22700(.A(n_1471), .B(n_1464), .C(n_570), .Z(n_1513));
notech_or2 i_35(.A(sla_special_mask), .B(n_794), .Z(n_1515));
notech_and4 i_794(.A(n_1456), .B(n_1448), .C(n_1461), .D(n_1459), .Z(n_1518
));
notech_and4 i_791(.A(n_1445), .B(n_1443), .C(n_1454), .D(n_1450), .Z(n_1521
));
notech_ao4 i_21000(.A(n_4207), .B(n_4208), .C(n_1515), .D(n_4221), .Z(n_1522
notech_ao4 i_21000(.A(n_4208), .B(n_4209), .C(n_1515), .D(n_4222), .Z(n_1522
));
notech_nand2 i_57(.A(mas_sla_active), .B(inter_done), .Z(n_1523));
notech_or2 i_787(.A(sl_address), .B(n_4372), .Z(n_1524));
notech_nand2 i_788(.A(sla_current_irq), .B(n_4373), .Z(n_1526));
notech_or2 i_787(.A(sl_address), .B(n_4366), .Z(n_1524));
notech_nand2 i_788(.A(sla_current_irq), .B(n_4367), .Z(n_1526));
notech_nand2 i_114(.A(sl_address), .B(sl_write), .Z(n_1528));
notech_nand3 i_140(.A(sl_write), .B(n_8207), .C(sla_in_init), .Z(n_1529)
notech_nand3 i_140(.A(sl_write), .B(n_8205), .C(sla_in_init), .Z(n_1529)
);
notech_and4 i_178(.A(sla_in_init), .B(sla_init_byte_expected[1]), .C(n_4223
), .D(n_4279), .Z(n_1531));
notech_or4 i_2783(.A(n_8207), .B(sl_writedata[3]), .C(sl_writedata[4]),
.D(n_4372), .Z(n_1536));
notech_nand3 i_39(.A(sl_writedata[6]), .B(sl_writedata[7]), .C(n_4250),
notech_and4 i_178(.A(sla_in_init), .B(sla_init_byte_expected[1]), .C(n_4224
), .D(n_4275), .Z(n_1531));
notech_or4 i_2785(.A(n_8205), .B(sl_writedata[3]), .C(sl_writedata[4]),
.D(n_4366), .Z(n_1536));
notech_nand3 i_39(.A(sl_writedata[6]), .B(sl_writedata[7]), .C(n_4249),
.Z(n_1538));
notech_mux2 i_772(.S(n_1538), .A(sl_writedata[2]), .B(n_788), .Z(n_1539)
);
notech_mux2 i_771(.S(n_1538), .A(sl_writedata[1]), .B(n_786), .Z(n_1540)
);
notech_mux2 i_767(.S(n_1538), .A(n_4367), .B(sla_lowest_priority[0]), .Z
notech_mux2 i_767(.S(n_1538), .A(n_4361), .B(sla_lowest_priority[0]), .Z
(n_1544));
notech_nand2 i_21(.A(n_558), .B(n_7913), .Z(n_1546));
notech_xor2 i_28(.A(sla_lowest_priority[2]), .B(n_4219), .Z(n_1547));
notech_nand2 i_41(.A(n_1438), .B(n_4280), .Z(n_1548));
notech_mux2 i_233432(.S(n_1547), .A(n_775), .B(n_773), .Z(n_1549));
notech_nand2 i_213430(.A(n_771), .B(n_1548), .Z(n_1550));
notech_nand2 i_21(.A(n_558), .B(n_7931), .Z(n_1546));
notech_xor2 i_28(.A(sla_lowest_priority[2]), .B(n_4220), .Z(n_1547));
notech_nand2 i_41(.A(n_1438), .B(n_4276), .Z(n_1548));
notech_mux2 i_233474(.S(n_1547), .A(n_775), .B(n_773), .Z(n_1549));
notech_nand2 i_213472(.A(n_771), .B(n_1548), .Z(n_1550));
notech_xor2 i_90(.A(sla_lowest_priority[1]), .B(n_1441), .Z(n_1551));
notech_xor2 i_223431(.A(n_1551), .B(n_1548), .Z(n_1552));
notech_nand3 i_63440(.A(n_1548), .B(n_771), .C(n_1549), .Z(n_1553));
notech_ao4 i_5867(.A(n_4265), .B(n_1177), .C(n_1536), .D(n_563), .Z(n_1554
notech_xor2 i_223473(.A(n_1551), .B(n_1548), .Z(n_1552));
notech_nand3 i_63482(.A(n_1548), .B(n_771), .C(n_1549), .Z(n_1553));
notech_ao4 i_5843(.A(n_4264), .B(n_1177), .C(n_1536), .D(n_563), .Z(n_1554
));
notech_and2 i_0(.A(n_727), .B(n_4251), .Z(n_1555));
notech_and2 i_0(.A(n_727), .B(n_4250), .Z(n_1555));
notech_ao3 i_53(.A(n_1555), .B(n_1553), .C(n_1549), .Z(n_1557));
notech_and3 i_63522(.A(sl_writedata[2]), .B(n_4368), .C(n_4367), .Z(n_1558
notech_and3 i_63564(.A(sl_writedata[2]), .B(n_4362), .C(n_4361), .Z(n_1558
));
notech_or2 i_18(.A(sl_writedata[2]), .B(n_4368), .Z(n_1559));
notech_nand2 i_64(.A(sl_writedata[0]), .B(n_4368), .Z(n_1560));
notech_ao3 i_63513(.A(sl_writedata[0]), .B(n_4368), .C(sl_writedata[2]),
notech_or2 i_18(.A(sl_writedata[2]), .B(n_4362), .Z(n_1559));
notech_nand2 i_64(.A(sl_writedata[0]), .B(n_4362), .Z(n_1560));
notech_ao3 i_63555(.A(sl_writedata[0]), .B(n_4362), .C(sl_writedata[2]),
.Z(n_1561));
notech_or4 i_50(.A(n_1561), .B(n_1196), .C(n_1558), .D(n_4249), .Z(n_1564
notech_or4 i_50(.A(n_1561), .B(n_1196), .C(n_1558), .D(n_4248), .Z(n_1564
));
notech_nand2 i_74(.A(sl_writedata[1]), .B(n_4367), .Z(n_1565));
notech_nand3 i_55(.A(n_558), .B(n_7913), .C(n_1554), .Z(n_1566));
notech_nao3 i_63482(.A(inter_vector[2]), .B(n_4371), .C(inter_vector[1])
notech_nand2 i_74(.A(sl_writedata[1]), .B(n_4361), .Z(n_1565));
notech_nand3 i_55(.A(n_558), .B(n_7931), .C(n_1554), .Z(n_1566));
notech_nao3 i_63524(.A(inter_vector[2]), .B(n_4365), .C(inter_vector[1])
, .Z(n_1568));
notech_nao3 i_83485(.A(inter_vector[2]), .B(inter_vector[0]), .C(inter_vector
notech_nao3 i_83527(.A(inter_vector[2]), .B(inter_vector[0]), .C(inter_vector
[1]), .Z(n_1570));
notech_or2 i_66(.A(inter_vector[2]), .B(inter_vector[0]), .Z(n_1571));
notech_or2 i_63470(.A(inter_vector[1]), .B(n_1571), .Z(n_1572));
notech_nand3 i_83487(.A(inter_vector[1]), .B(inter_vector[2]), .C(n_4371
notech_or2 i_63512(.A(inter_vector[1]), .B(n_1571), .Z(n_1572));
notech_nand3 i_83529(.A(inter_vector[1]), .B(inter_vector[2]), .C(n_4365
), .Z(n_1574));
notech_nao3 i_63479(.A(inter_vector[1]), .B(inter_vector[0]), .C(inter_vector
notech_nao3 i_63521(.A(inter_vector[1]), .B(inter_vector[0]), .C(inter_vector
[2]), .Z(n_1576));
notech_nand3 i_136(.A(inter_vector[2]), .B(inter_vector[1]), .C(inter_vector
[0]), .Z(n_1577));
notech_ao3 i_86(.A(sl_writedata[1]), .B(sl_writedata[0]), .C(sl_writedata
[2]), .Z(n_1580));
notech_nao3 i_81(.A(inter_vector[1]), .B(n_4371), .C(inter_vector[2]), .Z
notech_nao3 i_81(.A(inter_vector[1]), .B(n_4365), .C(inter_vector[2]), .Z
(n_1581));
notech_or4 i_759(.A(inter_vector[2]), .B(n_4251), .C(n_1546), .D(n_4371)
notech_or4 i_759(.A(inter_vector[2]), .B(n_4250), .C(n_1546), .D(n_4365)
, .Z(n_1582));
notech_ao4 i_758(.A(n_1550), .B(n_1546), .C(n_1561), .D(n_558), .Z(n_1584
));
notech_ao4 i_757(.A(n_1546), .B(n_4254), .C(n_1196), .D(n_558), .Z(n_1585
notech_ao4 i_757(.A(n_1546), .B(n_4253), .C(n_1196), .D(n_558), .Z(n_1585
));
notech_nand2 i_71(.A(n_1371), .B(n_1181), .Z(n_1586));
notech_nand3 i_43(.A(n_810), .B(n_1370), .C(n_1181), .Z(n_1587));
notech_xor2 i_123460(.A(sla_lowest_priority[2]), .B(n_1510), .Z(n_1588)
notech_xor2 i_123502(.A(sla_lowest_priority[2]), .B(n_1510), .Z(n_1588)
);
notech_nand2 i_51(.A(n_1506), .B(n_4280), .Z(n_1589));
notech_ao4 i_193464(.A(n_1513), .B(sla_lowest_priority[1]), .C(n_705), .D
notech_nand2 i_51(.A(n_1506), .B(n_4276), .Z(n_1589));
notech_ao4 i_193506(.A(n_1513), .B(sla_lowest_priority[1]), .C(n_705), .D
(n_1589), .Z(n_1590));
notech_xor2 i_88(.A(n_1590), .B(n_1588), .Z(n_1591));
notech_xor2 i_103458(.A(n_1513), .B(n_4281), .Z(n_1592));
notech_xor2 i_103500(.A(n_1513), .B(n_4277), .Z(n_1592));
notech_xor2 i_93(.A(n_1592), .B(n_1589), .Z(n_1593));
notech_or2 i_748(.A(sl_writedata[2]), .B(n_4370), .Z(n_1597));
notech_nand2 i_70(.A(inter_input[7]), .B(n_8006), .Z(n_1598));
notech_nand3 i_99(.A(inter_input[7]), .B(n_8006), .C(mas_irr[7]), .Z(n_1599
notech_or2 i_748(.A(sl_writedata[2]), .B(n_4364), .Z(n_1597));
notech_nand2 i_70(.A(inter_input[7]), .B(n_8024), .Z(n_1598));
notech_nand3 i_99(.A(inter_input[7]), .B(n_8024), .C(mas_irr[7]), .Z(n_1599
));
notech_nor2 i_40(.A(n_834), .B(mas_sla_active), .Z(n_1600));
notech_nand2 i_22(.A(n_8006), .B(n_559), .Z(n_1602));
notech_xor2 i_29(.A(mas_lowest_priority[2]), .B(n_4234), .Z(n_1603));
notech_nand2 i_22(.A(n_8024), .B(n_559), .Z(n_1602));
notech_xor2 i_29(.A(mas_lowest_priority[2]), .B(n_4235), .Z(n_1603));
notech_or2 i_42(.A(mas_lowest_priority[0]), .B(n_1344), .Z(n_1604));
notech_mux2 i_233551(.S(n_1603), .A(n_652), .B(n_650), .Z(n_1605));
notech_nand2 i_213549(.A(n_648), .B(n_1604), .Z(n_1606));
notech_mux2 i_233593(.S(n_1603), .A(n_652), .B(n_650), .Z(n_1605));
notech_nand2 i_213591(.A(n_648), .B(n_1604), .Z(n_1606));
notech_xor2 i_91(.A(mas_lowest_priority[1]), .B(n_1351), .Z(n_1607));
notech_xor2 i_223550(.A(n_4244), .B(n_1604), .Z(n_1608));
notech_nand3 i_63559(.A(n_1604), .B(n_648), .C(n_1605), .Z(n_1609));
notech_ao4 i_1(.A(n_1608), .B(n_4248), .C(n_895), .D(n_645), .Z(n_1611)
notech_xor2 i_223592(.A(n_4244), .B(n_1604), .Z(n_1608));
notech_nand3 i_63601(.A(n_1604), .B(n_648), .C(n_1605), .Z(n_1609));
notech_ao4 i_1(.A(n_1608), .B(n_4247), .C(n_895), .D(n_645), .Z(n_1611)
);
notech_ao3 i_54(.A(n_1611), .B(n_1609), .C(n_1605), .Z(n_1613));
notech_or4 i_12(.A(n_895), .B(n_645), .C(n_4218), .D(n_4242), .Z(n_1615)
notech_or4 i_12(.A(n_895), .B(n_645), .C(n_4219), .D(n_4243), .Z(n_1615)
);
notech_or4 i_82(.A(n_895), .B(n_1602), .C(n_645), .D(mas_sla_active), .Z
(n_1616));
notech_or4 i_732(.A(mas_sla_active), .B(n_1615), .C(inter_vector[2]), .D
(n_4371), .Z(n_1619));
(n_4365), .Z(n_1619));
notech_ao4 i_731(.A(n_559), .B(n_1196), .C(n_1602), .D(n_599), .Z(n_1621
));
notech_nor2 i_149(.A(n_8207), .B(mas_read_reg_select), .Z(n_1623));
notech_nao3 i_73(.A(n_8207), .B(n_4263), .C(n_1623), .Z(n_1625));
notech_nao3 i_67(.A(mas_read_reg_select), .B(n_4263), .C(n_8207), .Z(n_1626
notech_nor2 i_149(.A(n_8205), .B(mas_read_reg_select), .Z(n_1623));
notech_nao3 i_73(.A(n_8205), .B(n_4262), .C(n_1623), .Z(n_1625));
notech_nao3 i_67(.A(mas_read_reg_select), .B(n_4262), .C(n_8205), .Z(n_1626
));
notech_ao4 i_728(.A(n_1626), .B(n_4358), .C(n_1625), .D(n_4341), .Z(n_1627
notech_ao4 i_728(.A(n_1626), .B(n_4352), .C(n_1625), .D(n_4335), .Z(n_1627
));
notech_nand2 i_13(.A(n_1623), .B(n_4263), .Z(n_1628));
notech_ao4 i_727(.A(n_4361), .B(n_4263), .C(n_1628), .D(n_4332), .Z(n_1629
notech_nand2 i_13(.A(n_1623), .B(n_4262), .Z(n_1628));
notech_ao4 i_727(.A(n_4355), .B(n_4262), .C(n_1628), .D(n_4326), .Z(n_1629
));
notech_ao4 i_726(.A(n_1626), .B(n_4356), .C(n_1625), .D(n_4340), .Z(n_1630
notech_ao4 i_726(.A(n_1626), .B(n_4350), .C(n_1625), .D(n_4334), .Z(n_1630
));
notech_ao4 i_725(.A(n_1626), .B(n_4354), .C(n_1625), .D(n_4339), .Z(n_1631
notech_ao4 i_725(.A(n_1626), .B(n_4348), .C(n_1625), .D(n_4333), .Z(n_1631
));
notech_ao4 i_724(.A(n_1626), .B(n_4352), .C(n_1625), .D(n_4338), .Z(n_1632
notech_ao4 i_724(.A(n_1626), .B(n_4346), .C(n_1625), .D(n_4332), .Z(n_1632
));
notech_ao4 i_723(.A(n_1626), .B(n_4350), .C(n_1625), .D(n_4337), .Z(n_1633
notech_ao4 i_723(.A(n_1626), .B(n_4344), .C(n_1625), .D(n_4331), .Z(n_1633
));
notech_ao4 i_722(.A(n_1626), .B(n_4348), .C(n_1625), .D(n_4336), .Z(n_1634
notech_ao4 i_722(.A(n_1626), .B(n_4342), .C(n_1625), .D(n_4330), .Z(n_1634
));
notech_ao4 i_721(.A(n_4263), .B(n_1369), .C(n_1628), .D(n_4331), .Z(n_1635
notech_ao4 i_721(.A(n_4262), .B(n_1369), .C(n_1628), .D(n_4325), .Z(n_1635
));
notech_ao4 i_720(.A(n_1626), .B(n_4346), .C(n_1625), .D(n_4335), .Z(n_1636
notech_ao4 i_720(.A(n_1626), .B(n_4340), .C(n_1625), .D(n_4329), .Z(n_1636
));
notech_ao4 i_719(.A(n_4263), .B(n_4224), .C(n_1628), .D(n_4330), .Z(n_1637
notech_ao4 i_719(.A(n_4262), .B(n_4225), .C(n_1628), .D(n_4324), .Z(n_1637
));
notech_ao4 i_718(.A(n_1626), .B(n_4344), .C(n_1625), .D(n_4334), .Z(n_1638
notech_ao4 i_718(.A(n_1626), .B(n_4338), .C(n_1625), .D(n_4328), .Z(n_1638
));
notech_ao4 i_717(.A(n_1628), .B(n_4329), .C(n_4263), .D(n_809), .Z(n_1639
notech_ao4 i_717(.A(n_1628), .B(n_4323), .C(n_4262), .D(n_809), .Z(n_1639
));
notech_nor2 i_148(.A(n_8207), .B(sla_read_reg_select), .Z(n_1640));
notech_nao3 i_72(.A(n_8207), .B(n_4265), .C(n_1640), .Z(n_1642));
notech_nao3 i_69(.A(sla_read_reg_select), .B(n_4265), .C(n_8207), .Z(n_1643
notech_nor2 i_148(.A(n_8205), .B(sla_read_reg_select), .Z(n_1640));
notech_nao3 i_72(.A(n_8205), .B(n_4264), .C(n_1640), .Z(n_1642));
notech_nao3 i_69(.A(sla_read_reg_select), .B(n_4264), .C(n_8205), .Z(n_1643
));
notech_ao4 i_716(.A(n_1643), .B(n_4299), .C(n_1642), .D(n_4324), .Z(n_1644
notech_ao4 i_716(.A(n_1643), .B(n_4293), .C(n_1642), .D(n_4318), .Z(n_1644
));
notech_nand2 i_143982(.A(n_1640), .B(n_4265), .Z(n_1645));
notech_ao4 i_715(.A(n_4265), .B(n_4328), .C(n_1645), .D(n_4316), .Z(n_1646
notech_nand2 i_144036(.A(n_1640), .B(n_4264), .Z(n_1645));
notech_ao4 i_715(.A(n_4264), .B(n_4322), .C(n_1645), .D(n_4310), .Z(n_1646
));
notech_ao4 i_714(.A(n_1643), .B(n_4297), .C(n_1642), .D(n_4323), .Z(n_1647
notech_ao4 i_714(.A(n_1643), .B(n_4291), .C(n_1642), .D(n_4317), .Z(n_1647
));
notech_ao4 i_713(.A(n_1643), .B(n_4294), .C(n_1642), .D(n_4322), .Z(n_1648
notech_ao4 i_713(.A(n_1643), .B(n_4289), .C(n_1642), .D(n_4316), .Z(n_1648
));
notech_ao4 i_712(.A(n_1643), .B(n_4292), .C(n_1642), .D(n_4321), .Z(n_1649
notech_ao4 i_712(.A(n_1643), .B(n_4287), .C(n_1642), .D(n_4315), .Z(n_1649
));
notech_reg mas_init_requires_4_reg(.CP(n_8269), .D(n_3557), .CD(n_8124),
notech_reg mas_init_requires_4_reg(.CP(n_8263), .D(n_3560), .CD(n_8180),
.Q(mas_init_requires_4));
notech_mux2 i_4892(.S(n_8006), .A(sl_writedata[0]), .B(mas_init_requires_4
), .Z(n_3557));
notech_ao4 i_711(.A(n_1643), .B(n_4289), .C(n_1642), .D(n_4320), .Z(n_1650
notech_mux2 i_4892(.S(n_8024), .A(sl_writedata[0]), .B(mas_init_requires_4
), .Z(n_3560));
notech_ao4 i_711(.A(n_1643), .B(n_4285), .C(n_1642), .D(n_4314), .Z(n_1650
));
notech_reg mas_init_byte_expected_reg_0(.CP(n_8269), .D(n_3564), .CD(n_8124
notech_reg mas_init_byte_expected_reg_0(.CP(n_8263), .D(n_3567), .CD(n_8180
), .Q(mas_init_byte_expected[0]));
notech_mux2 i_4900(.S(\nbus_47[0] ), .A(mas_init_byte_expected[0]), .B(n_4366
), .Z(n_3564));
notech_ao4 i_710(.A(n_1642), .B(n_4319), .C(n_4265), .D(n_700), .Z(n_1651
notech_mux2 i_4900(.S(\nbus_47[0] ), .A(mas_init_byte_expected[0]), .B(n_4360
), .Z(n_3567));
notech_ao4 i_710(.A(n_1642), .B(n_4313), .C(n_4264), .D(n_700), .Z(n_1651
));
notech_reg mas_init_byte_expected_reg_1(.CP(n_8269), .D(n_3571), .CD(n_8124
notech_reg mas_init_byte_expected_reg_1(.CP(n_8263), .D(n_3573), .CD(n_8180
), .Q(mas_init_byte_expected[1]));
notech_mux2 i_4908(.S(\nbus_47[0] ), .A(mas_init_byte_expected[1]), .B(n_3833
), .Z(n_3571));
notech_ao4 i_709(.A(n_1645), .B(n_4315), .C(n_1643), .D(n_4287), .Z(n_1652
notech_mux2 i_4908(.S(\nbus_47[0] ), .A(mas_init_byte_expected[1]), .B(n_3748
), .Z(n_3573));
notech_ao4 i_709(.A(n_1645), .B(n_4309), .C(n_1643), .D(n_4283), .Z(n_1652
));
notech_reg mas_init_byte_expected_reg_2(.CP(n_8267), .D(n_3578), .CD(n_8122
notech_reg mas_init_byte_expected_reg_2(.CP(n_8261), .D(n_3579), .CD(n_8178
), .Q(mas_init_byte_expected[2]));
notech_mux2 i_4916(.S(\nbus_47[0] ), .A(mas_init_byte_expected[2]), .B(n_4260
), .Z(n_3578));
notech_ao4 i_708(.A(n_1642), .B(n_4318), .C(n_4265), .D(n_694), .Z(n_1653
notech_mux2 i_4916(.S(\nbus_47[0] ), .A(mas_init_byte_expected[2]), .B(n_4259
), .Z(n_3579));
notech_ao4 i_708(.A(n_1642), .B(n_4312), .C(n_4264), .D(n_694), .Z(n_1653
));
notech_reg mas_in_init_reg(.CP(n_8267), .D(n_3586), .CD(n_8122), .Q(mas_in_init
notech_reg mas_in_init_reg(.CP(n_8261), .D(n_3587), .CD(n_8178), .Q(mas_in_init
));
notech_mux2 i_4924(.S(n_3458), .A(mas_in_init), .B(n_4218), .Z(n_3586)
notech_mux2 i_4924(.S(n_3463), .A(mas_in_init), .B(n_4219), .Z(n_3587)
);
notech_ao4 i_707(.A(n_1645), .B(n_4314), .C(n_1643), .D(n_4285), .Z(n_1654
notech_ao4 i_707(.A(n_1645), .B(n_4308), .C(n_1643), .D(n_4281), .Z(n_1654
));
notech_reg mas_auto_eoi_reg(.CP(n_8267), .D(n_3592), .CD(n_8122), .Q(mas_auto_eoi
notech_reg mas_auto_eoi_reg(.CP(n_8261), .D(n_3593), .CD(n_8178), .Q(mas_auto_eoi
));
notech_mux2 i_4932(.S(n_4493), .A(mas_auto_eoi), .B(n_1180), .Z(n_3592)
notech_mux2 i_4932(.S(n_4495), .A(mas_auto_eoi), .B(n_1180), .Z(n_3593)
);
notech_ao4 i_706(.A(n_1642), .B(n_4317), .C(n_4265), .D(n_690), .Z(n_1655
notech_ao4 i_706(.A(n_1642), .B(n_4311), .C(n_4264), .D(n_690), .Z(n_1655
));
notech_reg ms_read_last_reg(.CP(n_8267), .D(n_4365), .CD(n_8122), .Q(ms_read_last
notech_reg ms_read_last_reg(.CP(n_8261), .D(n_4359), .CD(n_8178), .Q(ms_read_last
));
notech_reg mas_polled_reg(.CP(n_8269), .D(n_3602), .CD(n_8124), .Q(mas_polled
notech_reg mas_polled_reg(.CP(n_8263), .D(n_3602), .CD(n_8180), .Q(mas_polled
));
notech_nand2 i_4944(.A(n_3604), .B(n_3605), .Z(n_3602));
notech_nao3 i_4945(.A(sl_writedata[2]), .B(n_4258), .C(n_895), .Z(n_3604
notech_nao3 i_4945(.A(sl_writedata[2]), .B(n_4257), .C(n_895), .Z(n_3604
));
notech_nao3 i_4946(.A(mas_polled), .B(n_1179), .C(n_4258), .Z(n_3605));
notech_ao4 i_705(.A(n_1645), .B(n_4313), .C(n_1643), .D(n_4283), .Z(n_1656
notech_nao3 i_4946(.A(mas_polled), .B(n_1179), .C(n_4257), .Z(n_3605));
notech_ao4 i_705(.A(n_1645), .B(n_4307), .C(n_1643), .D(n_4279), .Z(n_1656
));
notech_reg sl_read_last_reg(.CP(n_8269), .D(n_4363), .CD(n_8124), .Q(sl_read_last
notech_reg sl_read_last_reg(.CP(n_8263), .D(n_4357), .CD(n_8180), .Q(sl_read_last
));
notech_reg sla_polled_reg(.CP(n_8269), .D(n_3610), .CD(n_8124), .Q(sla_polled
notech_reg sla_polled_reg(.CP(n_8263), .D(n_3610), .CD(n_8180), .Q(sla_polled
));
notech_or2 i_4956(.A(n_3612), .B(n_3613), .Z(n_3610));
notech_and4 i_4957(.A(sl_write), .B(sl_writedata[2]), .C(n_1192), .D(n_931
), .Z(n_3612));
notech_and3 i_4958(.A(sla_polled), .B(n_1177), .C(n_1194), .Z(n_3613));
notech_nao3 i_2900(.A(n_8006), .B(n_843), .C(n_4366), .Z(\nbus_47[0] )
notech_nao3 i_2854(.A(n_8024), .B(n_843), .C(n_4360), .Z(\nbus_47[0] )
);
notech_reg mas_rotate_on_aeoi_reg(.CP(n_8269), .D(n_3616), .CD(n_8124),
notech_reg mas_rotate_on_aeoi_reg(.CP(n_8263), .D(n_3617), .CD(n_8180),
.Q(mas_rotate_on_aeoi));
notech_mux2 i_4964(.S(n_4094), .A(mas_rotate_on_aeoi), .B(n_1175), .Z(n_3616
notech_mux2 i_4964(.S(n_4091), .A(mas_rotate_on_aeoi), .B(n_1175), .Z(n_3617
));
notech_nao3 i_2723(.A(n_842), .B(n_841), .C(n_4218), .Z(n_3458));
notech_reg_set mas_lowest_priority_reg_0(.CP(n_8269), .D(n_3624), .SD(n_8124
notech_nao3 i_2725(.A(n_842), .B(n_841), .C(n_4219), .Z(n_3463));
notech_reg_set mas_lowest_priority_reg_0(.CP(n_8263), .D(n_3623), .SD(n_8180
), .Q(mas_lowest_priority[0]));
notech_mux2 i_4972(.S(\nbus_59[0] ), .A(mas_lowest_priority[0]), .B(n_4066
), .Z(n_3624));
notech_nand2 i_3212(.A(n_842), .B(n_8006), .Z(n_4493));
notech_reg_set mas_lowest_priority_reg_1(.CP(n_8269), .D(n_3630), .SD(n_8124
notech_mux2 i_4972(.S(\nbus_59[0] ), .A(mas_lowest_priority[0]), .B(n_4058
), .Z(n_3623));
notech_nand2 i_3212(.A(n_842), .B(n_8024), .Z(n_4495));
notech_reg_set mas_lowest_priority_reg_1(.CP(n_8263), .D(n_3630), .SD(n_8180
), .Q(mas_lowest_priority[1]));
notech_mux2 i_4980(.S(\nbus_59[0] ), .A(mas_lowest_priority[1]), .B(n_4072
notech_mux2 i_4980(.S(\nbus_59[0] ), .A(mas_lowest_priority[1]), .B(n_4064
), .Z(n_3630));
notech_reg_set mas_lowest_priority_reg_2(.CP(n_8269), .D(n_3637), .SD(n_8124
notech_reg_set mas_lowest_priority_reg_2(.CP(n_8263), .D(n_3636), .SD(n_8180
), .Q(mas_lowest_priority[2]));
notech_mux2 i_4988(.S(\nbus_59[0] ), .A(mas_lowest_priority[2]), .B(n_4078
), .Z(n_3637));
notech_reg mas_sla_active_reg(.CP(n_8269), .D(n_3644), .CD(n_8124), .Q(mas_sla_active
notech_mux2 i_4988(.S(\nbus_59[0] ), .A(mas_lowest_priority[2]), .B(n_4070
), .Z(n_3636));
notech_reg mas_sla_active_reg(.CP(n_8263), .D(n_3642), .CD(n_8180), .Q(mas_sla_active
));
notech_mux2 i_4996(.S(n_3636), .A(mas_sla_active), .B(n_1046), .Z(n_3644
notech_mux2 i_4996(.S(n_3580), .A(mas_sla_active), .B(n_1046), .Z(n_3642
));
notech_nand2 i_3019(.A(n_840), .B(n_8006), .Z(n_4094));
notech_reg sla_spurious_reg(.CP(n_8267), .D(n_3651), .CD(n_8122), .Q(sla_spurious
notech_nand2 i_3015(.A(n_840), .B(n_8024), .Z(n_4091));
notech_reg sla_spurious_reg(.CP(n_8261), .D(n_3649), .CD(n_8178), .Q(sla_spurious
));
notech_mux2 i_5004(.S(n_3376), .A(sla_spurious), .B(n_929), .Z(n_3651)
notech_mux2 i_5004(.S(n_3388), .A(sla_spurious), .B(n_929), .Z(n_3649)
);
notech_or4 i_3003(.A(n_4257), .B(n_4218), .C(n_1170), .D(n_1169), .Z(\nbus_59[0]
notech_or4 i_2999(.A(n_4256), .B(n_4219), .C(n_1170), .D(n_1169), .Z(\nbus_59[0]
));
notech_reg_set mas_inter_offset_reg_0(.CP(n_8266), .D(n_3658), .SD(n_8121
notech_reg_set mas_inter_offset_reg_0(.CP(n_8260), .D(n_3656), .SD(n_8177
), .Q(mas_inter_offset[0]));
notech_mux2 i_5012(.S(n_1182), .A(sl_writedata[3]), .B(mas_inter_offset[
0]), .Z(n_3658));
notech_nao3 i_2820(.A(n_1046), .B(n_4361), .C(n_1360), .Z(n_3636));
notech_reg mas_inter_offset_reg_1(.CP(n_8266), .D(n_3664), .CD(n_8121),
0]), .Z(n_3656));
notech_nao3 i_2791(.A(n_1046), .B(n_4355), .C(n_1360), .Z(n_3580));
notech_reg mas_inter_offset_reg_1(.CP(n_8260), .D(n_3663), .CD(n_8177),
.Q(mas_inter_offset[1]));
notech_mux2 i_5020(.S(n_1182), .A(sl_writedata[4]), .B(mas_inter_offset[
1]), .Z(n_3664));
notech_nand3 i_2687(.A(n_930), .B(n_4222), .C(n_1526), .Z(n_3376));
notech_reg mas_inter_offset_reg_2(.CP(n_8267), .D(n_3670), .CD(n_8122),
1]), .Z(n_3663));
notech_nand3 i_2690(.A(n_930), .B(n_4223), .C(n_1526), .Z(n_3388));
notech_reg mas_inter_offset_reg_2(.CP(n_8261), .D(n_3670), .CD(n_8178),
.Q(mas_inter_offset[2]));
notech_mux2 i_5028(.S(n_1182), .A(sl_writedata[5]), .B(mas_inter_offset[
2]), .Z(n_3670));
notech_nao3 i_3191(.A(n_7913), .B(n_793), .C(n_4240), .Z(\nbus_69[0] )
notech_nao3 i_3156(.A(n_7931), .B(n_793), .C(n_4241), .Z(\nbus_69[0] )
);
notech_reg mas_inter_offset_reg_3(.CP(n_8266), .D(n_3676), .CD(n_8121),
notech_reg mas_inter_offset_reg_3(.CP(n_8260), .D(n_3677), .CD(n_8177),
.Q(mas_inter_offset[3]));
notech_mux2 i_5036(.S(n_1182), .A(sl_writedata[6]), .B(mas_inter_offset[
3]), .Z(n_3676));
notech_nao3 i_2730(.A(n_792), .B(n_791), .C(n_4238), .Z(n_3470));
notech_reg mas_inter_offset_reg_4(.CP(n_8266), .D(n_3683), .CD(n_8121),
3]), .Z(n_3677));
notech_nao3 i_2732(.A(n_792), .B(n_791), .C(n_4239), .Z(n_3476));
notech_reg mas_inter_offset_reg_4(.CP(n_8260), .D(n_3683), .CD(n_8177),
.Q(mas_inter_offset[4]));
notech_mux2 i_5044(.S(n_1182), .A(sl_writedata[7]), .B(mas_inter_offset[
4]), .Z(n_3683));
notech_nand2 i_2811(.A(n_792), .B(n_7913), .Z(n_3617));
notech_reg sla_init_requires_4_reg(.CP(n_8266), .D(n_3690), .CD(n_8121),
notech_nand2 i_2782(.A(n_792), .B(n_7931), .Z(n_3559));
notech_reg sla_init_requires_4_reg(.CP(n_8260), .D(n_3689), .CD(n_8177),
.Q(sla_init_requires_4));
notech_mux2 i_5052(.S(n_7913), .A(sl_writedata[0]), .B(sla_init_requires_4
), .Z(n_3690));
notech_nand2 i_3176(.A(n_790), .B(n_7913), .Z(n_4431));
notech_reg sla_init_byte_expected_reg_0(.CP(n_8266), .D(n_3697), .CD(n_8121
notech_mux2 i_5052(.S(n_7931), .A(sl_writedata[0]), .B(sla_init_requires_4
), .Z(n_3689));
notech_nand2 i_2700(.A(n_790), .B(n_7931), .Z(n_3409));
notech_reg sla_init_byte_expected_reg_0(.CP(n_8260), .D(n_3695), .CD(n_8177
), .Q(sla_init_byte_expected[0]));
notech_mux2 i_5060(.S(\nbus_69[0] ), .A(sla_init_byte_expected[0]), .B(n_4240
), .Z(n_3697));
notech_or4 i_2836(.A(n_4256), .B(n_4238), .C(n_921), .D(n_920), .Z(\nbus_44[0]
notech_mux2 i_5060(.S(\nbus_69[0] ), .A(sla_init_byte_expected[0]), .B(n_4241
), .Z(n_3695));
notech_or4 i_2954(.A(n_4255), .B(n_4239), .C(n_921), .D(n_920), .Z(\nbus_53[0]
));
notech_reg sla_init_byte_expected_reg_1(.CP(n_8267), .D(n_3704), .CD(n_8122
notech_reg sla_init_byte_expected_reg_1(.CP(n_8261), .D(n_3701), .CD(n_8178
), .Q(sla_init_byte_expected[1]));
notech_mux2 i_5068(.S(\nbus_69[0] ), .A(sla_init_byte_expected[1]), .B(n_4454
), .Z(n_3704));
notech_nand3 i_3035(.A(n_1554), .B(n_4252), .C(n_722), .Z(\nbus_61[0] )
notech_mux2 i_5068(.S(\nbus_69[0] ), .A(sla_init_byte_expected[1]), .B(n_4390
), .Z(n_3701));
notech_nand3 i_3031(.A(n_1554), .B(n_4251), .C(n_722), .Z(\nbus_64[0] )
);
notech_reg sla_init_byte_expected_reg_2(.CP(n_8267), .D(n_3710), .CD(n_8122
notech_reg sla_init_byte_expected_reg_2(.CP(n_8261), .D(n_3707), .CD(n_8178
), .Q(sla_init_byte_expected[2]));
notech_mux2 i_5076(.S(\nbus_69[0] ), .A(sla_init_byte_expected[2]), .B(n_4277
), .Z(n_3710));
notech_nao3 i_2769(.A(n_4361), .B(n_4237), .C(n_1587), .Z(\nbus_39[0] )
notech_mux2 i_5076(.S(\nbus_69[0] ), .A(sla_init_byte_expected[2]), .B(n_4274
), .Z(n_3707));
notech_nao3 i_3169(.A(n_4355), .B(n_4238), .C(n_1587), .Z(\nbus_72[0] )
);
notech_reg sla_in_init_reg(.CP(n_8267), .D(n_3716), .CD(n_8122), .Q(sla_in_init
notech_reg sla_in_init_reg(.CP(n_8261), .D(n_3713), .CD(n_8178), .Q(sla_in_init
));
notech_mux2 i_5084(.S(n_3470), .A(sla_in_init), .B(n_4238), .Z(n_3716)
notech_mux2 i_5084(.S(n_3476), .A(sla_in_init), .B(n_4239), .Z(n_3713)
);
notech_ao4 i_3102(.A(n_4369), .B(n_1524), .C(sla_in_init), .D(n_1528), .Z
(\nbus_63[0] ));
notech_reg sla_auto_eoi_reg(.CP(n_8267), .D(n_3723), .CD(n_8122), .Q(sla_auto_eoi
notech_ao4 i_3072(.A(n_4363), .B(n_1524), .C(sla_in_init), .D(n_1528), .Z
(\nbus_65[0] ));
notech_reg sla_auto_eoi_reg(.CP(n_8261), .D(n_3719), .CD(n_8178), .Q(sla_auto_eoi
));
notech_mux2 i_5092(.S(n_3617), .A(sla_auto_eoi), .B(n_927), .Z(n_3723)
notech_mux2 i_5092(.S(n_3559), .A(sla_auto_eoi), .B(n_927), .Z(n_3719)
);
notech_ao4 i_3014(.A(n_1524), .B(n_4369), .C(n_1194), .D(n_1597), .Z(n_4085
notech_ao4 i_3010(.A(n_1524), .B(n_4363), .C(n_1194), .D(n_1597), .Z(n_4081
));
notech_reg sla_rotate_on_aeoi_reg(.CP(n_8267), .D(n_3729), .CD(n_8122),
notech_reg sla_rotate_on_aeoi_reg(.CP(n_8261), .D(n_3725), .CD(n_8178),
.Q(sla_rotate_on_aeoi));
notech_mux2 i_5100(.S(n_4431), .A(sla_rotate_on_aeoi), .B(n_926), .Z(n_3729
notech_mux2 i_5100(.S(n_3409), .A(sla_rotate_on_aeoi), .B(n_926), .Z(n_3725
));
notech_nand2 i_3097(.A(n_930), .B(n_4222), .Z(n_4243));
notech_reg_set sla_lowest_priority_reg_0(.CP(n_8267), .D(n_3736), .SD(n_8122
notech_nand2 i_3067(.A(n_930), .B(n_4223), .Z(n_4181));
notech_reg_set sla_lowest_priority_reg_0(.CP(n_8261), .D(n_3731), .SD(n_8178
), .Q(sla_lowest_priority[0]));
notech_mux2 i_5108(.S(\nbus_44[0] ), .A(sla_lowest_priority[0]), .B(n_3681
), .Z(n_3736));
notech_ao4 i_3061(.A(n_1187), .B(n_4369), .C(mas_in_init), .D(n_1183), .Z
(\nbus_62[0] ));
notech_reg_set sla_lowest_priority_reg_1(.CP(n_8267), .D(n_3743), .SD(n_8122
notech_mux2 i_5108(.S(\nbus_53[0] ), .A(sla_lowest_priority[0]), .B(n_3956
), .Z(n_3731));
notech_ao4 i_2748(.A(n_1187), .B(n_4363), .C(mas_in_init), .D(n_1183), .Z
(\nbus_40[0] ));
notech_reg_set sla_lowest_priority_reg_1(.CP(n_8261), .D(n_3737), .SD(n_8178
), .Q(sla_lowest_priority[1]));
notech_mux2 i_5116(.S(\nbus_44[0] ), .A(sla_lowest_priority[1]), .B(n_3687
), .Z(n_3743));
notech_or4 i_2741(.A(n_895), .B(n_1602), .C(n_600), .D(n_645), .Z(\nbus_38[0]
notech_mux2 i_5116(.S(\nbus_53[0] ), .A(sla_lowest_priority[1]), .B(n_3962
), .Z(n_3737));
notech_or4 i_2871(.A(n_895), .B(n_1602), .C(n_600), .D(n_645), .Z(\nbus_48[0]
));
notech_reg_set sla_lowest_priority_reg_2(.CP(n_8267), .D(n_3750), .SD(n_8122
notech_reg_set sla_lowest_priority_reg_2(.CP(n_8261), .D(n_3743), .SD(n_8178
), .Q(sla_lowest_priority[2]));
notech_mux2 i_5124(.S(\nbus_44[0] ), .A(sla_lowest_priority[2]), .B(n_3693
), .Z(n_3750));
notech_ao4 i_2967(.A(n_1187), .B(n_4369), .C(n_1193), .D(n_1597), .Z(n_3987
notech_mux2 i_5124(.S(\nbus_53[0] ), .A(sla_lowest_priority[2]), .B(n_3968
), .Z(n_3743));
notech_ao4 i_2970(.A(n_1187), .B(n_4363), .C(n_1193), .D(n_1597), .Z(n_3992
));
notech_reg sla_isr_reg_0(.CP(n_8271), .D(n_3757), .CD(n_8126), .Q(sla_isr
notech_reg sla_isr_reg_0(.CP(n_8265), .D(n_3750), .CD(n_8182), .Q(sla_isr
[0]));
notech_mux2 i_5132(.S(\nbus_61[0] ), .A(sla_isr[0]), .B(n_4282), .Z(n_3757
notech_mux2 i_5132(.S(\nbus_64[0] ), .A(sla_isr[0]), .B(n_4278), .Z(n_3750
));
notech_nand3 i_3207(.A(n_1047), .B(n_4237), .C(n_4361), .Z(n_4484));
notech_reg sla_isr_reg_1(.CP(n_8271), .D(n_3764), .CD(n_8126), .Q(sla_isr
notech_nand3 i_3207(.A(n_1047), .B(n_4238), .C(n_4355), .Z(n_4485));
notech_reg sla_isr_reg_1(.CP(n_8265), .D(n_3757), .CD(n_8182), .Q(sla_isr
[1]));
notech_mux2 i_5140(.S(\nbus_61[0] ), .A(sla_isr[1]), .B(n_4284), .Z(n_3764
notech_mux2 i_5140(.S(\nbus_64[0] ), .A(sla_isr[1]), .B(n_4280), .Z(n_3757
));
notech_ao4 i_3024(.A(n_1524), .B(n_4369), .C(n_1559), .D(n_1194), .Z(n_4107
notech_ao4 i_3020(.A(n_1524), .B(n_4363), .C(n_1559), .D(n_1194), .Z(n_4102
));
notech_reg sla_isr_reg_2(.CP(n_8271), .D(n_3770), .CD(n_8126), .Q(sla_isr
notech_reg sla_isr_reg_2(.CP(n_8265), .D(n_3763), .CD(n_8182), .Q(sla_isr
[2]));
notech_mux2 i_5148(.S(\nbus_61[0] ), .A(sla_isr[2]), .B(n_4286), .Z(n_3770
notech_mux2 i_5148(.S(\nbus_64[0] ), .A(sla_isr[2]), .B(n_4282), .Z(n_3763
));
notech_ao4 i_2825(.A(n_1187), .B(n_4369), .C(n_1559), .D(n_1193), .Z(n_3650
notech_ao4 i_2796(.A(n_1187), .B(n_4363), .C(n_1559), .D(n_1193), .Z(n_3598
));
notech_reg sla_isr_reg_3(.CP(n_8271), .D(n_3776), .CD(n_8126), .Q(sla_isr
notech_reg sla_isr_reg_3(.CP(n_8265), .D(n_3769), .CD(n_8182), .Q(sla_isr
[3]));
notech_mux2 i_5156(.S(\nbus_61[0] ), .A(sla_isr[3]), .B(n_4288), .Z(n_3776
notech_mux2 i_5156(.S(\nbus_64[0] ), .A(sla_isr[3]), .B(n_4284), .Z(n_3769
));
notech_or4 i_2797(.A(n_895), .B(n_4218), .C(inter_done), .D(n_1360), .Z(n_3595
notech_or4 i_2739(.A(n_895), .B(n_4219), .C(inter_done), .D(n_1360), .Z(n_3488
));
notech_reg sla_isr_reg_4(.CP(n_8270), .D(n_3782), .CD(n_8125), .Q(sla_isr
notech_reg sla_isr_reg_4(.CP(n_8264), .D(n_3776), .CD(n_8181), .Q(sla_isr
[4]));
notech_mux2 i_5164(.S(\nbus_61[0] ), .A(sla_isr[4]), .B(n_4291), .Z(n_3782
notech_mux2 i_5164(.S(\nbus_64[0] ), .A(sla_isr[4]), .B(n_4286), .Z(n_3776
));
notech_nand2 i_22594(.A(n_1182), .B(n_1181), .Z(n_3833));
notech_reg sla_isr_reg_5(.CP(n_8271), .D(n_3788), .CD(n_8126), .Q(sla_isr
notech_nand2 i_22637(.A(n_1182), .B(n_1181), .Z(n_3748));
notech_reg sla_isr_reg_5(.CP(n_8265), .D(n_3783), .CD(n_8182), .Q(sla_isr
[5]));
notech_mux2 i_5172(.S(\nbus_61[0] ), .A(sla_isr[5]), .B(n_4293), .Z(n_3788
notech_mux2 i_5172(.S(\nbus_64[0] ), .A(sla_isr[5]), .B(n_4288), .Z(n_3783
));
notech_or2 i_32607(.A(n_1205), .B(n_4218), .Z(n_4078));
notech_reg sla_isr_reg_6(.CP(n_8271), .D(n_3794), .CD(n_8126), .Q(sla_isr
notech_or2 i_32650(.A(n_1205), .B(n_4219), .Z(n_4070));
notech_reg sla_isr_reg_6(.CP(n_8265), .D(n_3790), .CD(n_8182), .Q(sla_isr
[6]));
notech_mux2 i_5180(.S(\nbus_61[0] ), .A(sla_isr[6]), .B(n_4295), .Z(n_3794
notech_mux2 i_5180(.S(\nbus_64[0] ), .A(sla_isr[6]), .B(n_4290), .Z(n_3790
));
notech_or2 i_22606(.A(n_1207), .B(n_4218), .Z(n_4072));
notech_reg sla_isr_reg_7(.CP(n_8271), .D(n_3800), .CD(n_8126), .Q(sla_isr
notech_or2 i_22649(.A(n_1207), .B(n_4219), .Z(n_4064));
notech_reg sla_isr_reg_7(.CP(n_8265), .D(n_3797), .CD(n_8182), .Q(sla_isr
[7]));
notech_mux2 i_5188(.S(\nbus_61[0] ), .A(sla_isr[7]), .B(n_4298), .Z(n_3800
notech_mux2 i_5188(.S(\nbus_64[0] ), .A(sla_isr[7]), .B(n_4292), .Z(n_3797
));
notech_nand2 i_12605(.A(n_8006), .B(n_1213), .Z(n_4066));
notech_reg sla_inter_offset_reg_0(.CP(n_8271), .D(n_3806), .CD(n_8126),
notech_nand2 i_12648(.A(n_8024), .B(n_1213), .Z(n_4058));
notech_reg sla_inter_offset_reg_0(.CP(n_8265), .D(n_3805), .CD(n_8182),
.Q(sla_inter_offset[0]));
notech_mux2 i_5196(.S(n_928), .A(sl_writedata[3]), .B(sla_inter_offset[0
]), .Z(n_3806));
notech_nand2 i_22621(.A(n_932), .B(n_928), .Z(n_4454));
notech_reg_set sla_inter_offset_reg_1(.CP(n_8271), .D(n_3812), .SD(n_8126
]), .Z(n_3805));
notech_nand2 i_22664(.A(n_932), .B(n_928), .Z(n_4390));
notech_reg_set sla_inter_offset_reg_1(.CP(n_8265), .D(n_3812), .SD(n_8182
), .Q(sla_inter_offset[1]));
notech_mux2 i_5204(.S(n_928), .A(sl_writedata[4]), .B(sla_inter_offset[1
]), .Z(n_3812));
notech_or2 i_32634(.A(n_1539), .B(n_4238), .Z(n_3693));
notech_reg_set sla_inter_offset_reg_2(.CP(n_8271), .D(n_3818), .SD(n_8126
notech_or2 i_32677(.A(n_1539), .B(n_4239), .Z(n_3968));
notech_reg_set sla_inter_offset_reg_2(.CP(n_8265), .D(n_3819), .SD(n_8182
), .Q(sla_inter_offset[2]));
notech_mux2 i_5212(.S(n_928), .A(sl_writedata[5]), .B(sla_inter_offset[2
]), .Z(n_3818));
notech_or2 i_22633(.A(n_1540), .B(n_4238), .Z(n_3687));
notech_reg_set sla_inter_offset_reg_3(.CP(n_8271), .D(n_3824), .SD(n_8126
]), .Z(n_3819));
notech_or2 i_22676(.A(n_1540), .B(n_4239), .Z(n_3962));
notech_reg_set sla_inter_offset_reg_3(.CP(n_8265), .D(n_3825), .SD(n_8182
), .Q(sla_inter_offset[3]));
notech_mux2 i_5220(.S(n_928), .A(sl_writedata[6]), .B(sla_inter_offset[3
]), .Z(n_3824));
notech_nand2 i_12632(.A(n_7913), .B(n_1544), .Z(n_3681));
notech_reg sla_inter_offset_reg_4(.CP(n_8271), .D(n_3830), .CD(n_8126),
]), .Z(n_3825));
notech_nand2 i_12675(.A(n_7931), .B(n_1544), .Z(n_3956));
notech_reg sla_inter_offset_reg_4(.CP(n_8265), .D(n_3831), .CD(n_8182),
.Q(sla_inter_offset[4]));
notech_mux2 i_5228(.S(n_928), .A(sl_writedata[7]), .B(sla_inter_offset[4
]), .Z(n_3830));
notech_ao4 i_82167(.A(n_1577), .B(n_1566), .C(n_762), .D(n_4299), .Z(n_4184
]), .Z(n_3831));
notech_ao4 i_82210(.A(n_1577), .B(n_1566), .C(n_762), .D(n_4293), .Z(n_4168
));
notech_reg inter_vector_reg_0(.CP(n_8271), .D(n_3837), .CD(n_8126), .Q(inter_vector
notech_reg inter_vector_reg_0(.CP(n_8265), .D(n_3838), .CD(n_8182), .Q(inter_vector
[0]));
notech_mux2 i_5236(.S(\nbus_39[0] ), .A(inter_vector[0]), .B(n_4305), .Z
(n_3837));
notech_ao4 i_72166(.A(n_1574), .B(n_1566), .C(n_755), .D(n_4297), .Z(n_4178
notech_mux2 i_5236(.S(\nbus_72[0] ), .A(inter_vector[0]), .B(n_4299), .Z
(n_3838));
notech_ao4 i_72209(.A(n_1574), .B(n_1566), .C(n_755), .D(n_4291), .Z(n_4162
));
notech_reg inter_vector_reg_1(.CP(n_8271), .D(n_3844), .CD(n_8126), .Q(inter_vector
notech_reg inter_vector_reg_1(.CP(n_8265), .D(n_3845), .CD(n_8182), .Q(inter_vector
[1]));
notech_mux2 i_5244(.S(\nbus_39[0] ), .A(inter_vector[1]), .B(n_4306), .Z
(n_3844));
notech_ao4 i_62165(.A(n_1570), .B(n_1566), .C(n_748), .D(n_4294), .Z(n_4172
notech_mux2 i_5244(.S(\nbus_72[0] ), .A(inter_vector[1]), .B(n_4300), .Z
(n_3845));
notech_ao4 i_62208(.A(n_1570), .B(n_1566), .C(n_748), .D(n_4289), .Z(n_4156
));
notech_reg inter_vector_reg_2(.CP(n_8270), .D(n_3850), .CD(n_8125), .Q(inter_vector
notech_reg inter_vector_reg_2(.CP(n_8264), .D(n_3852), .CD(n_8181), .Q(inter_vector
[2]));
notech_mux2 i_5252(.S(\nbus_39[0] ), .A(inter_vector[2]), .B(n_4307), .Z
(n_3850));
notech_ao4 i_52164(.A(n_1568), .B(n_1566), .C(n_742), .D(n_4292), .Z(n_4166
notech_mux2 i_5252(.S(\nbus_72[0] ), .A(inter_vector[2]), .B(n_4301), .Z
(n_3852));
notech_ao4 i_52207(.A(n_1568), .B(n_1566), .C(n_742), .D(n_4287), .Z(n_4150
));
notech_reg inter_vector_reg_3(.CP(n_8270), .D(n_3857), .CD(n_8125), .Q(inter_vector
notech_reg inter_vector_reg_3(.CP(n_8264), .D(n_3859), .CD(n_8181), .Q(inter_vector
[3]));
notech_mux2 i_5260(.S(\nbus_39[0] ), .A(inter_vector[3]), .B(n_4308), .Z
(n_3857));
notech_ao4 i_42163(.A(n_737), .B(n_4289), .C(n_1576), .D(n_1566), .Z(n_4160
notech_mux2 i_5260(.S(\nbus_72[0] ), .A(inter_vector[3]), .B(n_4302), .Z
(n_3859));
notech_ao4 i_42206(.A(n_737), .B(n_4285), .C(n_1576), .D(n_1566), .Z(n_4144
));
notech_reg inter_vector_reg_4(.CP(n_8270), .D(n_3864), .CD(n_8125), .Q(inter_vector
notech_reg inter_vector_reg_4(.CP(n_8264), .D(n_3866), .CD(n_8181), .Q(inter_vector
[4]));
notech_mux2 i_5268(.S(\nbus_39[0] ), .A(inter_vector[4]), .B(n_4309), .Z
(n_3864));
notech_ao4 i_32162(.A(n_1566), .B(n_1581), .C(n_729), .D(n_4287), .Z(n_4154
notech_mux2 i_5268(.S(\nbus_72[0] ), .A(inter_vector[4]), .B(n_4303), .Z
(n_3866));
notech_ao4 i_32205(.A(n_1566), .B(n_1581), .C(n_729), .D(n_4283), .Z(n_4138
));
notech_reg inter_vector_reg_5(.CP(n_8270), .D(n_3871), .CD(n_8125), .Q(inter_vector
notech_reg inter_vector_reg_5(.CP(n_8264), .D(n_3873), .CD(n_8181), .Q(inter_vector
[5]));
notech_mux2 i_5276(.S(\nbus_39[0] ), .A(inter_vector[5]), .B(n_4310), .Z
(n_3871));
notech_ao4 i_22161(.A(n_4285), .B(n_725), .C(inter_vector[1]), .D(n_1582
), .Z(n_4148));
notech_reg inter_vector_reg_6(.CP(n_8270), .D(n_3878), .CD(n_8125), .Q(inter_vector
notech_mux2 i_5276(.S(\nbus_72[0] ), .A(inter_vector[5]), .B(n_4304), .Z
(n_3873));
notech_ao4 i_22204(.A(n_4281), .B(n_725), .C(inter_vector[1]), .D(n_1582
), .Z(n_4132));
notech_reg inter_vector_reg_6(.CP(n_8264), .D(n_3880), .CD(n_8181), .Q(inter_vector
[6]));
notech_mux2 i_5284(.S(\nbus_39[0] ), .A(inter_vector[6]), .B(n_4311), .Z
(n_3878));
notech_ao4 i_12160(.A(n_1572), .B(n_1566), .C(n_4283), .D(n_720), .Z(n_4142
notech_mux2 i_5284(.S(\nbus_72[0] ), .A(inter_vector[6]), .B(n_4305), .Z
(n_3880));
notech_ao4 i_12203(.A(n_1572), .B(n_1566), .C(n_4279), .D(n_720), .Z(n_4126
));
notech_reg inter_vector_reg_7(.CP(n_8269), .D(n_3885), .CD(n_8124), .Q(inter_vector
notech_reg inter_vector_reg_7(.CP(n_8263), .D(n_3887), .CD(n_8180), .Q(inter_vector
[7]));
notech_mux2 i_5292(.S(\nbus_39[0] ), .A(inter_vector[7]), .B(n_4312), .Z
(n_3885));
notech_ao4 i_82239(.A(n_1587), .B(n_4304), .C(n_1586), .D(n_4275), .Z(n_3585
notech_mux2 i_5292(.S(\nbus_72[0] ), .A(inter_vector[7]), .B(n_4306), .Z
(n_3887));
notech_ao4 i_82282(.A(n_1587), .B(n_4298), .C(n_1586), .D(n_4272), .Z(n_4455
));
notech_reg sla_ltim_reg(.CP(n_8269), .D(n_3892), .CD(n_8124), .Q(sla_ltim
notech_reg sla_ltim_reg(.CP(n_8263), .D(n_3894), .CD(n_8180), .Q(sla_ltim
));
notech_mux2 i_5300(.S(n_7913), .A(sl_writedata[3]), .B(sla_ltim), .Z(n_3892
notech_mux2 i_5300(.S(n_7931), .A(sl_writedata[3]), .B(sla_ltim), .Z(n_3894
));
notech_ao4 i_72238(.A(n_1587), .B(n_4303), .C(n_1586), .D(n_4274), .Z(n_3579
notech_ao4 i_72281(.A(n_1587), .B(n_4297), .C(n_1586), .D(n_4271), .Z(n_4449
));
notech_reg inter_last_reg_0(.CP(n_8269), .D(inter_input[0]), .CD(n_8124)
notech_reg inter_last_reg_0(.CP(n_8263), .D(inter_input[0]), .CD(n_8180)
, .Q(\inter_last[0] ));
notech_reg inter_last_reg_4(.CP(n_8270), .D(inter_input[4]), .CD(n_8125)
notech_reg inter_last_reg_4(.CP(n_8264), .D(inter_input[4]), .CD(n_8181)
, .Q(\inter_last[4] ));
notech_reg inter_last_reg_5(.CP(n_8270), .D(inter_input[5]), .CD(n_8125)
notech_reg inter_last_reg_5(.CP(n_8264), .D(inter_input[5]), .CD(n_8181)
, .Q(\inter_last[5] ));
notech_reg inter_last_reg_6(.CP(n_8270), .D(inter_input[6]), .CD(n_8125)
notech_reg inter_last_reg_6(.CP(n_8264), .D(inter_input[6]), .CD(n_8181)
, .Q(\inter_last[6] ));
notech_reg inter_last_reg_7(.CP(n_8270), .D(inter_input[7]), .CD(n_8125)
notech_reg inter_last_reg_7(.CP(n_8264), .D(inter_input[7]), .CD(n_8181)
, .Q(\inter_last[7] ));
notech_reg inter_last_reg_8(.CP(n_8270), .D(inter_input[8]), .CD(n_8125)
notech_reg inter_last_reg_8(.CP(n_8264), .D(inter_input[8]), .CD(n_8181)
, .Q(\inter_last[8] ));
notech_reg sla_irr_reg_0(.CP(n_8270), .D(n_913), .CD(n_8125), .Q(sla_irr
notech_reg sla_irr_reg_0(.CP(n_8264), .D(n_913), .CD(n_8181), .Q(sla_irr
[0]));
notech_reg sla_irr_reg_1(.CP(n_8270), .D(1'b0), .CD(n_8125), .Q(sla_irr[
notech_reg sla_irr_reg_1(.CP(n_8264), .D(1'b0), .CD(n_8181), .Q(sla_irr[
1]));
notech_reg sla_irr_reg_2(.CP(n_8270), .D(1'b0), .CD(n_8125), .Q(sla_irr[
notech_reg sla_irr_reg_2(.CP(n_8264), .D(1'b0), .CD(n_8181), .Q(sla_irr[
2]));
notech_reg sla_irr_reg_3(.CP(n_8266), .D(1'b0), .CD(n_8121), .Q(sla_irr[
notech_reg sla_irr_reg_3(.CP(n_8260), .D(1'b0), .CD(n_8177), .Q(sla_irr[
3]));
notech_reg sla_irr_reg_4(.CP(n_8262), .D(1'b0), .CD(n_8117), .Q(sla_irr[
notech_reg sla_irr_reg_4(.CP(n_8256), .D(1'b0), .CD(n_8173), .Q(sla_irr[
4]));
notech_reg sla_irr_reg_5(.CP(n_8262), .D(1'b0), .CD(n_8117), .Q(sla_irr[
notech_reg sla_irr_reg_5(.CP(n_8256), .D(1'b0), .CD(n_8173), .Q(sla_irr[
5]));
notech_reg sla_irr_reg_6(.CP(n_8262), .D(1'b0), .CD(n_8117), .Q(sla_irr[
notech_reg sla_irr_reg_6(.CP(n_8256), .D(1'b0), .CD(n_8173), .Q(sla_irr[
6]));
notech_reg sla_irr_reg_7(.CP(n_8262), .D(1'b0), .CD(n_8117), .Q(sla_irr[
notech_reg sla_irr_reg_7(.CP(n_8256), .D(1'b0), .CD(n_8173), .Q(sla_irr[
7]));
notech_reg_set sla_imr_reg_0(.CP(n_8262), .D(n_3931), .SD(n_8117), .Q(sla_imr
notech_reg_set sla_imr_reg_0(.CP(n_8256), .D(n_3934), .SD(n_8173), .Q(sla_imr
[0]));
notech_mux2 i_5364(.S(n_4325), .A(sla_imr[0]), .B(n_907), .Z(n_3931));
notech_ao4 i_62237(.A(n_1587), .B(n_4302), .C(n_1586), .D(n_4273), .Z(n_3573
notech_mux2 i_5364(.S(n_4319), .A(sla_imr[0]), .B(n_907), .Z(n_3934));
notech_ao4 i_62280(.A(n_1587), .B(n_4296), .C(n_1586), .D(n_4270), .Z(n_4443
));
notech_reg_set sla_imr_reg_1(.CP(n_8262), .D(n_3938), .SD(n_8117), .Q(sla_imr
notech_reg_set sla_imr_reg_1(.CP(n_8256), .D(n_3941), .SD(n_8173), .Q(sla_imr
[1]));
notech_mux2 i_5372(.S(n_4325), .A(sla_imr[1]), .B(n_927), .Z(n_3938));
notech_ao4 i_52236(.A(n_1587), .B(n_4301), .C(n_1586), .D(n_4271), .Z(n_3567
notech_mux2 i_5372(.S(n_4319), .A(sla_imr[1]), .B(n_927), .Z(n_3941));
notech_ao4 i_52279(.A(n_1587), .B(n_4295), .C(n_1586), .D(n_4269), .Z(n_4437
));
notech_reg_set sla_imr_reg_2(.CP(n_8262), .D(n_3945), .SD(n_8117), .Q(sla_imr
notech_reg_set sla_imr_reg_2(.CP(n_8256), .D(n_3947), .SD(n_8173), .Q(sla_imr
[2]));
notech_mux2 i_5380(.S(n_4325), .A(sla_imr[2]), .B(n_908), .Z(n_3945));
notech_ao4 i_42235(.A(n_1587), .B(n_4300), .C(n_1586), .D(n_4270), .Z(n_3561
notech_mux2 i_5380(.S(n_4319), .A(sla_imr[2]), .B(n_908), .Z(n_3947));
notech_ao4 i_42278(.A(n_1587), .B(n_4294), .C(n_1586), .D(n_4268), .Z(n_4431
));
notech_reg_set sla_imr_reg_3(.CP(n_8262), .D(n_3952), .SD(n_8117), .Q(sla_imr
notech_reg_set sla_imr_reg_3(.CP(n_8256), .D(n_3953), .SD(n_8173), .Q(sla_imr
[3]));
notech_mux2 i_5388(.S(n_4325), .A(sla_imr[3]), .B(n_909), .Z(n_3952));
notech_ao4 i_32234(.A(n_1369), .B(n_1586), .C(n_700), .D(n_1587), .Z(n_3555
notech_mux2 i_5388(.S(n_4319), .A(sla_imr[3]), .B(n_909), .Z(n_3953));
notech_ao4 i_32277(.A(n_1369), .B(n_1586), .C(n_700), .D(n_1587), .Z(n_4425
));
notech_reg_set sla_imr_reg_4(.CP(n_8263), .D(n_3959), .SD(n_8118), .Q(sla_imr
notech_reg_set sla_imr_reg_4(.CP(n_8257), .D(n_3960), .SD(n_8174), .Q(sla_imr
[4]));
notech_mux2 i_5396(.S(n_4325), .A(sla_imr[4]), .B(n_910), .Z(n_3959));
notech_ao4 i_22233(.A(n_4224), .B(n_1586), .C(n_694), .D(n_1587), .Z(n_3549
notech_mux2 i_5396(.S(n_4319), .A(sla_imr[4]), .B(n_910), .Z(n_3960));
notech_ao4 i_22276(.A(n_4225), .B(n_1586), .C(n_694), .D(n_1587), .Z(n_4419
));
notech_reg_set sla_imr_reg_5(.CP(n_8263), .D(n_3966), .SD(n_8118), .Q(sla_imr
notech_reg_set sla_imr_reg_5(.CP(n_8257), .D(n_3967), .SD(n_8174), .Q(sla_imr
[5]));
notech_mux2 i_5404(.S(n_4325), .A(sla_imr[5]), .B(n_911), .Z(n_3966));
notech_ao4 i_12232(.A(n_809), .B(n_1586), .C(n_690), .D(n_1587), .Z(n_3543
notech_mux2 i_5404(.S(n_4319), .A(sla_imr[5]), .B(n_911), .Z(n_3967));
notech_ao4 i_12275(.A(n_809), .B(n_1586), .C(n_690), .D(n_1587), .Z(n_4413
));
notech_reg_set sla_imr_reg_6(.CP(n_8263), .D(n_3973), .SD(n_8118), .Q(sla_imr
notech_reg_set sla_imr_reg_6(.CP(n_8257), .D(n_3974), .SD(n_8174), .Q(sla_imr
[6]));
notech_mux2 i_5412(.S(n_4325), .A(sla_imr[6]), .B(n_912), .Z(n_3973));
notech_ao4 i_82319(.A(n_684), .B(n_1599), .C(n_682), .D(n_1598), .Z(n_3752
notech_mux2 i_5412(.S(n_4319), .A(sla_imr[6]), .B(n_912), .Z(n_3974));
notech_ao4 i_82362(.A(n_684), .B(n_1599), .C(n_682), .D(n_1598), .Z(n_3664
));
notech_reg_set sla_imr_reg_7(.CP(n_8263), .D(n_3980), .SD(n_8118), .Q(sla_imr
notech_reg_set sla_imr_reg_7(.CP(n_8257), .D(n_3982), .SD(n_8174), .Q(sla_imr
[7]));
notech_mux2 i_5420(.S(n_4325), .A(sla_imr[7]), .B(n_926), .Z(n_3980));
notech_ao4 i_82415(.A(n_1616), .B(n_1577), .C(n_638), .D(n_4358), .Z(n_3532
notech_mux2 i_5420(.S(n_4319), .A(sla_imr[7]), .B(n_926), .Z(n_3982));
notech_ao4 i_82458(.A(n_1616), .B(n_1577), .C(n_638), .D(n_4352), .Z(n_3816
));
notech_reg sla_special_mask_reg(.CP(n_8262), .D(n_3986), .CD(n_8117), .Q
notech_reg sla_special_mask_reg(.CP(n_8256), .D(n_3988), .CD(n_8173), .Q
(sla_special_mask));
notech_mux2 i_5428(.S(n_4326), .A(sla_special_mask), .B(n_911), .Z(n_3986
notech_mux2 i_5428(.S(n_4320), .A(sla_special_mask), .B(n_911), .Z(n_3988
));
notech_ao4 i_72414(.A(n_1616), .B(n_1574), .C(n_632), .D(n_4356), .Z(n_3526
notech_ao4 i_72457(.A(n_1616), .B(n_1574), .C(n_632), .D(n_4350), .Z(n_3810
));
notech_reg sla_current_irq_reg(.CP(n_8262), .D(n_3994), .CD(n_8117), .Q(sla_current_irq
notech_reg sla_current_irq_reg(.CP(n_8256), .D(n_3995), .CD(n_8173), .Q(sla_current_irq
));
notech_mux2 i_5436(.S(n_4243), .A(sla_current_irq), .B(n_930), .Z(n_3994
notech_mux2 i_5436(.S(n_4181), .A(sla_current_irq), .B(n_930), .Z(n_3995
));
notech_ao4 i_62413(.A(n_1616), .B(n_1570), .C(n_626), .D(n_4354), .Z(n_3520
notech_ao4 i_62456(.A(n_1616), .B(n_1570), .C(n_626), .D(n_4348), .Z(n_3804
));
notech_reg mas_ltim_reg(.CP(n_8262), .D(n_4000), .CD(n_8117), .Q(mas_ltim
notech_reg mas_ltim_reg(.CP(n_8256), .D(n_4001), .CD(n_8173), .Q(mas_ltim
));
notech_mux2 i_5444(.S(n_8006), .A(sl_writedata[3]), .B(mas_ltim), .Z(n_4000
notech_mux2 i_5444(.S(n_8024), .A(sl_writedata[3]), .B(mas_ltim), .Z(n_4001
));
notech_ao4 i_52412(.A(n_1616), .B(n_1568), .C(n_620), .D(n_4352), .Z(n_3514
notech_ao4 i_52455(.A(n_1616), .B(n_1568), .C(n_620), .D(n_4346), .Z(n_3798
));
notech_reg sla_current_irq_last_reg(.CP(n_8262), .D(sla_current_irq), .CD
(n_8117), .Q(sla_current_irq_last));
notech_reg mas_irr_reg_0(.CP(n_8261), .D(n_902), .CD(n_8116), .Q(mas_irr
notech_reg sla_current_irq_last_reg(.CP(n_8256), .D(sla_current_irq), .CD
(n_8173), .Q(sla_current_irq_last));
notech_reg mas_irr_reg_0(.CP(n_8255), .D(n_902), .CD(n_8172), .Q(mas_irr
[0]));
notech_reg mas_irr_reg_1(.CP(n_8261), .D(1'b0), .CD(n_8116), .Q(mas_irr[
notech_reg mas_irr_reg_1(.CP(n_8255), .D(1'b0), .CD(n_8172), .Q(mas_irr[
1]));
notech_reg mas_irr_reg_2(.CP(n_8261), .D(n_903), .CD(n_8116), .Q(mas_irr
notech_reg mas_irr_reg_2(.CP(n_8255), .D(n_903), .CD(n_8172), .Q(mas_irr
[2]));
notech_reg mas_irr_reg_3(.CP(n_8261), .D(1'b0), .CD(n_8116), .Q(mas_irr[
notech_reg mas_irr_reg_3(.CP(n_8255), .D(1'b0), .CD(n_8172), .Q(mas_irr[
3]));
notech_reg mas_irr_reg_4(.CP(n_8261), .D(n_904), .CD(n_8116), .Q(mas_irr
notech_reg mas_irr_reg_4(.CP(n_8255), .D(n_904), .CD(n_8172), .Q(mas_irr
[4]));
notech_reg mas_irr_reg_5(.CP(n_8261), .D(n_905), .CD(n_8116), .Q(mas_irr
notech_reg mas_irr_reg_5(.CP(n_8255), .D(n_905), .CD(n_8172), .Q(mas_irr
[5]));
notech_reg mas_irr_reg_6(.CP(n_8261), .D(n_906), .CD(n_8116), .Q(mas_irr
notech_reg mas_irr_reg_6(.CP(n_8255), .D(n_906), .CD(n_8172), .Q(mas_irr
[6]));
notech_reg mas_irr_reg_7(.CP(n_8261), .D(n_4333), .CD(n_8116), .Q(mas_irr
notech_reg mas_irr_reg_7(.CP(n_8255), .D(n_4327), .CD(n_8172), .Q(mas_irr
[7]));
notech_reg_set mas_imr_reg_0(.CP(n_8261), .D(n_4024), .SD(n_8116), .Q(mas_imr
notech_reg_set mas_imr_reg_0(.CP(n_8255), .D(n_4025), .SD(n_8172), .Q(mas_imr
[0]));
notech_mux2 i_5488(.S(n_4342), .A(mas_imr[0]), .B(n_896), .Z(n_4024));
notech_ao4 i_42411(.A(n_615), .B(n_4350), .C(n_1616), .D(n_1576), .Z(n_3508
notech_mux2 i_5488(.S(n_4336), .A(mas_imr[0]), .B(n_896), .Z(n_4025));
notech_ao4 i_42454(.A(n_615), .B(n_4344), .C(n_1616), .D(n_1576), .Z(n_3792
));
notech_reg_set mas_imr_reg_1(.CP(n_8262), .D(n_4030), .SD(n_8117), .Q(mas_imr
notech_reg_set mas_imr_reg_1(.CP(n_8256), .D(n_4031), .SD(n_8173), .Q(mas_imr
[1]));
notech_mux2 i_5496(.S(n_4342), .A(mas_imr[1]), .B(n_1180), .Z(n_4030));
notech_ao4 i_32410(.A(n_1615), .B(n_668), .C(n_608), .D(n_4348), .Z(n_3502
notech_mux2 i_5496(.S(n_4336), .A(mas_imr[1]), .B(n_1180), .Z(n_4031));
notech_ao4 i_32453(.A(n_1615), .B(n_668), .C(n_608), .D(n_4342), .Z(n_3786
));
notech_reg_set mas_imr_reg_2(.CP(n_8262), .D(n_4036), .SD(n_8117), .Q(mas_imr
notech_reg_set mas_imr_reg_2(.CP(n_8256), .D(n_4037), .SD(n_8173), .Q(mas_imr
[2]));
notech_mux2 i_5504(.S(n_4342), .A(mas_imr[2]), .B(n_897), .Z(n_4036));
notech_ao4 i_22409(.A(n_603), .B(n_4346), .C(inter_vector[1]), .D(n_1619
), .Z(n_3496));
notech_reg_set mas_imr_reg_3(.CP(n_8261), .D(n_4042), .SD(n_8116), .Q(mas_imr
notech_mux2 i_5504(.S(n_4336), .A(mas_imr[2]), .B(n_897), .Z(n_4037));
notech_ao4 i_22452(.A(n_603), .B(n_4340), .C(inter_vector[1]), .D(n_1619
), .Z(n_3780));
notech_reg_set mas_imr_reg_3(.CP(n_8255), .D(n_4043), .SD(n_8172), .Q(mas_imr
[3]));
notech_mux2 i_5512(.S(n_4342), .A(mas_imr[3]), .B(n_898), .Z(n_4042));
notech_ao4 i_12408(.A(n_1616), .B(n_1572), .C(n_4344), .D(n_597), .Z(n_3490
notech_mux2 i_5512(.S(n_4336), .A(mas_imr[3]), .B(n_898), .Z(n_4043));
notech_ao4 i_12451(.A(n_1616), .B(n_1572), .C(n_4338), .D(n_597), .Z(n_3774
));
notech_reg_set mas_imr_reg_4(.CP(n_8261), .D(n_4048), .SD(n_8116), .Q(mas_imr
notech_reg_set mas_imr_reg_4(.CP(n_8255), .D(n_4049), .SD(n_8172), .Q(mas_imr
[4]));
notech_mux2 i_5520(.S(n_4342), .A(mas_imr[4]), .B(n_899), .Z(n_4048));
notech_nand2 i_82439(.A(n_1629), .B(n_1627), .Z(n_3963));
notech_reg_set mas_imr_reg_5(.CP(n_8261), .D(n_4054), .SD(n_8116), .Q(mas_imr
notech_mux2 i_5520(.S(n_4336), .A(mas_imr[4]), .B(n_899), .Z(n_4049));
notech_nand2 i_82482(.A(n_1629), .B(n_1627), .Z(n_3938));
notech_reg_set mas_imr_reg_5(.CP(n_8255), .D(n_4055), .SD(n_8172), .Q(mas_imr
[5]));
notech_mux2 i_5528(.S(n_4342), .A(mas_imr[5]), .B(n_900), .Z(n_4054));
notech_nand2 i_72438(.A(n_1630), .B(n_592), .Z(n_3956));
notech_reg_set mas_imr_reg_6(.CP(n_8261), .D(n_4060), .SD(n_8116), .Q(mas_imr
notech_mux2 i_5528(.S(n_4336), .A(mas_imr[5]), .B(n_900), .Z(n_4055));
notech_nand2 i_72481(.A(n_1630), .B(n_592), .Z(n_3931));
notech_reg_set mas_imr_reg_6(.CP(n_8255), .D(n_4062), .SD(n_8172), .Q(mas_imr
[6]));
notech_mux2 i_5536(.S(n_4342), .A(mas_imr[6]), .B(n_901), .Z(n_4060));
notech_nand2 i_62437(.A(n_1631), .B(n_591), .Z(n_3949));
notech_reg_set mas_imr_reg_7(.CP(n_8265), .D(n_4067), .SD(n_8120), .Q(mas_imr
notech_mux2 i_5536(.S(n_4336), .A(mas_imr[6]), .B(n_901), .Z(n_4062));
notech_nand2 i_62480(.A(n_1631), .B(n_591), .Z(n_3924));
notech_reg_set mas_imr_reg_7(.CP(n_8259), .D(n_4069), .SD(n_8176), .Q(mas_imr
[7]));
notech_mux2 i_5544(.S(n_4342), .A(mas_imr[7]), .B(n_1175), .Z(n_4067));
notech_nand2 i_52436(.A(n_1632), .B(n_590), .Z(n_3942));
notech_reg mas_isr_reg_0(.CP(n_8265), .D(n_4074), .CD(n_8120), .Q(mas_isr
notech_mux2 i_5544(.S(n_4336), .A(mas_imr[7]), .B(n_1175), .Z(n_4069));
notech_nand2 i_52479(.A(n_1632), .B(n_590), .Z(n_3917));
notech_reg mas_isr_reg_0(.CP(n_8259), .D(n_4076), .CD(n_8176), .Q(mas_isr
[0]));
notech_mux2 i_5552(.S(\nbus_38[0] ), .A(mas_isr[0]), .B(n_4343), .Z(n_4074
notech_mux2 i_5552(.S(\nbus_48[0] ), .A(mas_isr[0]), .B(n_4337), .Z(n_4076
));
notech_nand2 i_42435(.A(n_1633), .B(n_589), .Z(n_3935));
notech_reg mas_isr_reg_1(.CP(n_8265), .D(n_4081), .CD(n_8120), .Q(mas_isr
notech_nand2 i_42478(.A(n_1633), .B(n_589), .Z(n_3910));
notech_reg mas_isr_reg_1(.CP(n_8259), .D(n_4083), .CD(n_8176), .Q(mas_isr
[1]));
notech_mux2 i_5560(.S(\nbus_38[0] ), .A(mas_isr[1]), .B(n_4345), .Z(n_4081
notech_mux2 i_5560(.S(\nbus_48[0] ), .A(mas_isr[1]), .B(n_4339), .Z(n_4083
));
notech_nand2 i_32434(.A(n_1635), .B(n_1634), .Z(n_3928));
notech_reg mas_isr_reg_2(.CP(n_8265), .D(n_4089), .CD(n_8120), .Q(mas_isr
notech_nand2 i_32477(.A(n_1635), .B(n_1634), .Z(n_3903));
notech_reg mas_isr_reg_2(.CP(n_8259), .D(n_4090), .CD(n_8176), .Q(mas_isr
[2]));
notech_mux2 i_5568(.S(\nbus_38[0] ), .A(mas_isr[2]), .B(n_4347), .Z(n_4089
notech_mux2 i_5568(.S(\nbus_48[0] ), .A(mas_isr[2]), .B(n_4341), .Z(n_4090
));
notech_nand2 i_22433(.A(n_1637), .B(n_1636), .Z(n_3921));
notech_reg mas_isr_reg_3(.CP(n_8265), .D(n_4096), .CD(n_8120), .Q(mas_isr
notech_nand2 i_22476(.A(n_1637), .B(n_1636), .Z(n_3896));
notech_reg mas_isr_reg_3(.CP(n_8259), .D(n_4097), .CD(n_8176), .Q(mas_isr
[3]));
notech_mux2 i_5576(.S(\nbus_38[0] ), .A(mas_isr[3]), .B(n_4349), .Z(n_4096
notech_mux2 i_5576(.S(\nbus_48[0] ), .A(mas_isr[3]), .B(n_4343), .Z(n_4097
));
notech_nand2 i_12432(.A(n_1639), .B(n_1638), .Z(n_3914));
notech_reg mas_isr_reg_4(.CP(n_8265), .D(n_4103), .CD(n_8120), .Q(mas_isr
notech_nand2 i_12475(.A(n_1639), .B(n_1638), .Z(n_3889));
notech_reg mas_isr_reg_4(.CP(n_8259), .D(n_4104), .CD(n_8176), .Q(mas_isr
[4]));
notech_mux2 i_5584(.S(\nbus_38[0] ), .A(mas_isr[4]), .B(n_4351), .Z(n_4103
notech_mux2 i_5584(.S(\nbus_48[0] ), .A(mas_isr[4]), .B(n_4345), .Z(n_4104
));
notech_nand2 i_82463(.A(n_1646), .B(n_1644), .Z(n_3905));
notech_reg mas_isr_reg_5(.CP(n_8265), .D(n_4111), .CD(n_8120), .Q(mas_isr
notech_nand2 i_82506(.A(n_1646), .B(n_1644), .Z(n_3882));
notech_reg mas_isr_reg_5(.CP(n_8259), .D(n_4111), .CD(n_8176), .Q(mas_isr
[5]));
notech_mux2 i_5592(.S(\nbus_38[0] ), .A(mas_isr[5]), .B(n_4353), .Z(n_4111
notech_mux2 i_5592(.S(\nbus_48[0] ), .A(mas_isr[5]), .B(n_4347), .Z(n_4111
));
notech_nand2 i_72462(.A(n_1647), .B(n_588), .Z(n_3898));
notech_reg mas_isr_reg_6(.CP(n_8265), .D(n_4117), .CD(n_8120), .Q(mas_isr
notech_nand2 i_72505(.A(n_1647), .B(n_588), .Z(n_3875));
notech_reg mas_isr_reg_6(.CP(n_8259), .D(n_4117), .CD(n_8176), .Q(mas_isr
[6]));
notech_mux2 i_5600(.S(\nbus_38[0] ), .A(mas_isr[6]), .B(n_4355), .Z(n_4117
notech_mux2 i_5600(.S(\nbus_48[0] ), .A(mas_isr[6]), .B(n_4349), .Z(n_4117
));
notech_nand2 i_62461(.A(n_1648), .B(n_587), .Z(n_3891));
notech_reg mas_isr_reg_7(.CP(n_8266), .D(n_4123), .CD(n_8121), .Q(mas_isr
notech_nand2 i_62504(.A(n_1648), .B(n_587), .Z(n_3868));
notech_reg mas_isr_reg_7(.CP(n_8260), .D(n_4123), .CD(n_8177), .Q(mas_isr
[7]));
notech_mux2 i_5608(.S(\nbus_38[0] ), .A(mas_isr[7]), .B(n_4357), .Z(n_4123
notech_mux2 i_5608(.S(\nbus_48[0] ), .A(mas_isr[7]), .B(n_4351), .Z(n_4123
));
notech_nand2 i_52460(.A(n_1649), .B(n_586), .Z(n_3884));
notech_reg mas_special_mask_reg(.CP(n_8266), .D(n_4129), .CD(n_8121), .Q
notech_nand2 i_52503(.A(n_1649), .B(n_586), .Z(n_3861));
notech_reg mas_special_mask_reg(.CP(n_8260), .D(n_4130), .CD(n_8177), .Q
(mas_special_mask));
notech_mux2 i_5616(.S(n_4360), .A(mas_special_mask), .B(n_900), .Z(n_4129
notech_mux2 i_5616(.S(n_4354), .A(mas_special_mask), .B(n_900), .Z(n_4130
));
notech_nand2 i_42459(.A(n_1650), .B(n_585), .Z(n_3877));
notech_reg mas_current_irq_reg(.CP(n_8266), .D(n_4135), .CD(n_8121), .Q(mas_current_irq
notech_nand2 i_42502(.A(n_1650), .B(n_585), .Z(n_3854));
notech_reg mas_current_irq_reg(.CP(n_8260), .D(n_4137), .CD(n_8177), .Q(mas_current_irq
));
notech_mux2 i_5624(.S(n_3595), .A(mas_current_irq), .B(n_1047), .Z(n_4135
notech_mux2 i_5624(.S(n_3488), .A(mas_current_irq), .B(n_1047), .Z(n_4137
));
notech_nand2 i_32458(.A(n_1652), .B(n_1651), .Z(n_3870));
notech_reg mas_spurious_reg(.CP(n_8266), .D(n_4141), .CD(n_8121), .Q(mas_spurious
notech_nand2 i_32501(.A(n_1652), .B(n_1651), .Z(n_3847));
notech_reg mas_spurious_reg(.CP(n_8260), .D(n_4145), .CD(n_8177), .Q(mas_spurious
));
notech_mux2 i_5632(.S(n_4484), .A(mas_spurious), .B(n_892), .Z(n_4141)
notech_mux2 i_5632(.S(n_4485), .A(mas_spurious), .B(n_892), .Z(n_4145)
);
notech_nand2 i_22457(.A(n_1654), .B(n_1653), .Z(n_3863));
notech_reg sla_read_reg_select_reg(.CP(n_8266), .D(n_4149), .CD(n_8121),
notech_nand2 i_22500(.A(n_1654), .B(n_1653), .Z(n_3840));
notech_reg sla_read_reg_select_reg(.CP(n_8260), .D(n_4152), .CD(n_8177),
.Q(sla_read_reg_select));
notech_mux2 i_5640(.S(n_4362), .A(sla_read_reg_select), .B(n_907), .Z(n_4149
notech_mux2 i_5640(.S(n_4356), .A(sla_read_reg_select), .B(n_907), .Z(n_4152
));
notech_nand2 i_12456(.A(n_1656), .B(n_1655), .Z(n_3856));
notech_reg mas_read_reg_select_reg(.CP(n_8266), .D(n_4156), .CD(n_8121),
notech_nand2 i_12499(.A(n_1656), .B(n_1655), .Z(n_3833));
notech_reg mas_read_reg_select_reg(.CP(n_8260), .D(n_4159), .CD(n_8177),
.Q(mas_read_reg_select));
notech_mux2 i_5648(.S(n_4364), .A(mas_read_reg_select), .B(n_896), .Z(n_4156
notech_mux2 i_5648(.S(n_4358), .A(mas_read_reg_select), .B(n_896), .Z(n_4159
));
notech_reg ms_readdata_reg_0(.CP(n_8266), .D(n_3914), .CD(n_8121), .Q(ms_readdata
notech_reg ms_readdata_reg_0(.CP(n_8260), .D(n_3889), .CD(n_8177), .Q(ms_readdata
[0]));
notech_reg ms_readdata_reg_1(.CP(n_8265), .D(n_3921), .CD(n_8120), .Q(ms_readdata
notech_reg ms_readdata_reg_1(.CP(n_8259), .D(n_3896), .CD(n_8176), .Q(ms_readdata
[1]));
notech_reg ms_readdata_reg_2(.CP(n_8263), .D(n_3928), .CD(n_8118), .Q(ms_readdata
notech_reg ms_readdata_reg_2(.CP(n_8257), .D(n_3903), .CD(n_8174), .Q(ms_readdata
[2]));
notech_reg ms_readdata_reg_3(.CP(n_8263), .D(n_3935), .CD(n_8118), .Q(ms_readdata
notech_reg ms_readdata_reg_3(.CP(n_8257), .D(n_3910), .CD(n_8174), .Q(ms_readdata
[3]));
notech_reg ms_readdata_reg_4(.CP(n_8263), .D(n_3942), .CD(n_8118), .Q(ms_readdata
notech_reg ms_readdata_reg_4(.CP(n_8257), .D(n_3917), .CD(n_8174), .Q(ms_readdata
[4]));
notech_reg ms_readdata_reg_5(.CP(n_8263), .D(n_3949), .CD(n_8118), .Q(ms_readdata
notech_reg ms_readdata_reg_5(.CP(n_8257), .D(n_3924), .CD(n_8174), .Q(ms_readdata
[5]));
notech_reg ms_readdata_reg_6(.CP(n_8263), .D(n_3956), .CD(n_8118), .Q(ms_readdata
notech_reg ms_readdata_reg_6(.CP(n_8257), .D(n_3931), .CD(n_8174), .Q(ms_readdata
[6]));
notech_reg ms_readdata_reg_7(.CP(n_8263), .D(n_3963), .CD(n_8118), .Q(ms_readdata
notech_reg ms_readdata_reg_7(.CP(n_8257), .D(n_3938), .CD(n_8174), .Q(ms_readdata
[7]));
notech_reg sl_readdata_reg_0(.CP(n_8263), .D(n_3856), .CD(n_8118), .Q(sl_readdata
notech_reg sl_readdata_reg_0(.CP(n_8257), .D(n_3833), .CD(n_8174), .Q(sl_readdata
[0]));
notech_reg sl_readdata_reg_1(.CP(n_8263), .D(n_3863), .CD(n_8118), .Q(sl_readdata
notech_reg sl_readdata_reg_1(.CP(n_8257), .D(n_3840), .CD(n_8174), .Q(sl_readdata
[1]));
notech_reg sl_readdata_reg_2(.CP(n_8265), .D(n_3870), .CD(n_8120), .Q(sl_readdata
notech_reg sl_readdata_reg_2(.CP(n_8259), .D(n_3847), .CD(n_8176), .Q(sl_readdata
[2]));
notech_reg sl_readdata_reg_3(.CP(n_8265), .D(n_3877), .CD(n_8120), .Q(sl_readdata
notech_reg sl_readdata_reg_3(.CP(n_8259), .D(n_3854), .CD(n_8176), .Q(sl_readdata
[3]));
notech_reg sl_readdata_reg_4(.CP(n_8265), .D(n_3884), .CD(n_8120), .Q(sl_readdata
notech_reg sl_readdata_reg_4(.CP(n_8259), .D(n_3861), .CD(n_8176), .Q(sl_readdata
[4]));
notech_reg sl_readdata_reg_5(.CP(n_8265), .D(n_3891), .CD(n_8120), .Q(sl_readdata
notech_reg sl_readdata_reg_5(.CP(n_8259), .D(n_3868), .CD(n_8176), .Q(sl_readdata
[5]));
notech_reg sl_readdata_reg_6(.CP(n_8263), .D(n_3898), .CD(n_8118), .Q(sl_readdata
notech_reg sl_readdata_reg_6(.CP(n_8257), .D(n_3875), .CD(n_8174), .Q(sl_readdata
[6]));
notech_reg sl_readdata_reg_7(.CP(n_8263), .D(n_3905), .CD(n_8118), .Q(sl_readdata
notech_reg sl_readdata_reg_7(.CP(n_8257), .D(n_3882), .CD(n_8174), .Q(sl_readdata
[7]));
notech_reg inter_do_reg(.CP(n_8265), .D(n_4200), .CD(n_8120), .Q(inter_do
notech_reg inter_do_reg(.CP(n_8259), .D(n_4201), .CD(n_8176), .Q(inter_do
));
notech_mux2 i_5721(.S(n_3595), .A(inter_do), .B(n_1047), .Z(n_4200));
notech_inv i_6538(.A(n_1521), .Z(n_4207));
notech_inv i_6539(.A(n_1518), .Z(n_4208));
notech_inv i_6540(.A(n_1183), .Z(n_4209));
notech_inv i_6541(.A(n_564), .Z(n_4211));
notech_inv i_6542(.A(n_565), .Z(n_4212));
notech_inv i_6543(.A(n_566), .Z(n_4213));
notech_inv i_6544(.A(n_567), .Z(n_4214));
notech_inv i_6545(.A(n_1382), .Z(n_4215));
notech_inv i_6546(.A(n_1384), .Z(n_4217));
notech_inv i_6547(.A(n_8006), .Z(n_4218));
notech_inv i_6548(.A(n_1507), .Z(n_4219));
notech_inv i_6549(.A(n_1441), .Z(n_4220));
notech_inv i_6550(.A(n_1512), .Z(n_4221));
notech_inv i_6551(.A(n_1522), .Z(n_4222));
notech_inv i_6552(.A(n_1528), .Z(n_4223));
notech_inv i_6553(.A(n_696), .Z(n_4224));
notech_inv i_6554(.A(n_1574), .Z(n_4225));
notech_inv i_6555(.A(n_1570), .Z(n_4226));
notech_inv i_6556(.A(n_1568), .Z(n_4227));
notech_inv i_6557(.A(n_1359), .Z(n_4229));
notech_inv i_6558(.A(n_1356), .Z(n_4230));
notech_inv i_6559(.A(n_1204), .Z(n_4231));
notech_inv i_6560(.A(n_1224), .Z(n_4232));
notech_inv i_6561(.A(n_1351), .Z(n_4233));
notech_inv i_6562(.A(n_1348), .Z(n_4234));
notech_inv i_6563(.A(n_1295), .Z(n_4235));
notech_inv i_6564(.A(n_1350), .Z(n_4236));
notech_inv i_6565(.A(n_1360), .Z(n_4237));
notech_inv i_6566(.A(n_7913), .Z(n_4238));
notech_inv i_6567(.A(n_1361), .Z(n_4239));
notech_inv i_6568(.A(n_928), .Z(n_4240));
notech_inv i_6569(.A(n_1199), .Z(n_4241));
notech_inv i_6570(.A(n_559), .Z(n_4242));
notech_mux2 i_5721(.S(n_3488), .A(inter_do), .B(n_1047), .Z(n_4201));
notech_inv i_6538(.A(n_1521), .Z(n_4208));
notech_inv i_6539(.A(n_1518), .Z(n_4209));
notech_inv i_6540(.A(n_1183), .Z(n_4211));
notech_inv i_6541(.A(n_564), .Z(n_4212));
notech_inv i_6542(.A(n_565), .Z(n_4213));
notech_inv i_6543(.A(n_566), .Z(n_4214));
notech_inv i_6544(.A(n_567), .Z(n_4215));
notech_inv i_6545(.A(n_1382), .Z(n_4217));
notech_inv i_6546(.A(n_1384), .Z(n_4218));
notech_inv i_6547(.A(n_8024), .Z(n_4219));
notech_inv i_6548(.A(n_1507), .Z(n_4220));
notech_inv i_6549(.A(n_1441), .Z(n_4221));
notech_inv i_6550(.A(n_1512), .Z(n_4222));
notech_inv i_6551(.A(n_1522), .Z(n_4223));
notech_inv i_6552(.A(n_1528), .Z(n_4224));
notech_inv i_6553(.A(n_696), .Z(n_4225));
notech_inv i_6554(.A(n_1574), .Z(n_4226));
notech_inv i_6555(.A(n_1570), .Z(n_4227));
notech_inv i_6556(.A(n_1568), .Z(n_4229));
notech_inv i_6557(.A(n_1359), .Z(n_4230));
notech_inv i_6558(.A(n_1356), .Z(n_4231));
notech_inv i_6559(.A(n_1204), .Z(n_4232));
notech_inv i_6560(.A(n_1224), .Z(n_4233));
notech_inv i_6561(.A(n_1351), .Z(n_4234));
notech_inv i_6562(.A(n_1348), .Z(n_4235));
notech_inv i_6563(.A(n_1295), .Z(n_4236));
notech_inv i_6564(.A(n_1350), .Z(n_4237));
notech_inv i_6565(.A(n_1360), .Z(n_4238));
notech_inv i_6566(.A(n_7931), .Z(n_4239));
notech_inv i_6567(.A(n_1361), .Z(n_4240));
notech_inv i_6568(.A(n_928), .Z(n_4241));
notech_inv i_6569(.A(n_1199), .Z(n_4242));
notech_inv i_6570(.A(n_559), .Z(n_4243));
notech_inv i_6571(.A(n_1607), .Z(n_4244));
notech_inv i_6572(.A(n_1604), .Z(n_4245));
notech_inv i_6573(.A(n_1608), .Z(n_4247));
notech_inv i_6574(.A(n_1605), .Z(n_4248));
notech_inv i_6575(.A(n_1559), .Z(n_4249));
notech_inv i_6576(.A(n_1536), .Z(n_4250));
notech_inv i_6577(.A(n_1554), .Z(n_4251));
notech_inv i_6578(.A(n_1546), .Z(n_4252));
notech_inv i_6579(.A(n_1548), .Z(n_4253));
notech_inv i_6580(.A(n_1550), .Z(n_4254));
notech_inv i_6581(.A(n_1551), .Z(n_4255));
notech_inv i_6582(.A(n_1538), .Z(n_4256));
notech_inv i_6583(.A(n_1202), .Z(n_4257));
notech_inv i_6584(.A(n_1193), .Z(n_4258));
notech_inv i_6585(.A(mas_init_byte_expected[0]), .Z(n_4259));
notech_inv i_6586(.A(n_3833), .Z(n_4260));
notech_inv i_6587(.A(mas_init_byte_expected[2]), .Z(n_4261));
notech_inv i_6588(.A(ms_read_last), .Z(n_4262));
notech_inv i_6589(.A(mas_polled), .Z(n_4263));
notech_inv i_6590(.A(sl_read_last), .Z(n_4264));
notech_inv i_6591(.A(sla_polled), .Z(n_4265));
notech_inv i_6592(.A(mas_lowest_priority[1]), .Z(n_4267));
notech_inv i_6593(.A(mas_lowest_priority[2]), .Z(n_4268));
notech_inv i_6594(.A(mas_sla_active), .Z(n_4269));
notech_inv i_6595(.A(mas_inter_offset[0]), .Z(n_4270));
notech_inv i_6596(.A(mas_inter_offset[1]), .Z(n_4271));
notech_inv i_6597(.A(mas_inter_offset[2]), .Z(n_4273));
notech_inv i_6598(.A(mas_inter_offset[3]), .Z(n_4274));
notech_inv i_6599(.A(mas_inter_offset[4]), .Z(n_4275));
notech_inv i_6600(.A(sla_init_byte_expected[0]), .Z(n_4276));
notech_inv i_6601(.A(n_4454), .Z(n_4277));
notech_inv i_6602(.A(sla_init_byte_expected[2]), .Z(n_4279));
notech_inv i_6603(.A(sla_lowest_priority[0]), .Z(n_4280));
notech_inv i_6604(.A(sla_lowest_priority[1]), .Z(n_4281));
notech_inv i_6605(.A(n_4142), .Z(n_4282));
notech_inv i_6606(.A(sla_isr[0]), .Z(n_4283));
notech_inv i_6607(.A(n_4148), .Z(n_4284));
notech_inv i_6608(.A(sla_isr[1]), .Z(n_4285));
notech_inv i_6609(.A(n_4154), .Z(n_4286));
notech_inv i_6610(.A(sla_isr[2]), .Z(n_4287));
notech_inv i_6611(.A(n_4160), .Z(n_4288));
notech_inv i_6612(.A(sla_isr[3]), .Z(n_4289));
notech_inv i_6613(.A(n_4166), .Z(n_4291));
notech_inv i_6614(.A(sla_isr[4]), .Z(n_4292));
notech_inv i_6615(.A(n_4172), .Z(n_4293));
notech_inv i_6616(.A(sla_isr[5]), .Z(n_4294));
notech_inv i_6617(.A(n_4178), .Z(n_4295));
notech_inv i_6618(.A(sla_isr[6]), .Z(n_4297));
notech_inv i_6619(.A(n_4184), .Z(n_4298));
notech_inv i_6620(.A(sla_isr[7]), .Z(n_4299));
notech_inv i_6621(.A(sla_inter_offset[0]), .Z(n_4300));
notech_inv i_6622(.A(sla_inter_offset[1]), .Z(n_4301));
notech_inv i_6623(.A(sla_inter_offset[2]), .Z(n_4302));
notech_inv i_6624(.A(sla_inter_offset[3]), .Z(n_4303));
notech_inv i_6625(.A(sla_inter_offset[4]), .Z(n_4304));
notech_inv i_6626(.A(n_3543), .Z(n_4305));
notech_inv i_6627(.A(n_3549), .Z(n_4306));
notech_inv i_6628(.A(n_3555), .Z(n_4307));
notech_inv i_6629(.A(n_3561), .Z(n_4308));
notech_inv i_6630(.A(n_3567), .Z(n_4309));
notech_inv i_6631(.A(n_3573), .Z(n_4310));
notech_inv i_6632(.A(n_3579), .Z(n_4311));
notech_inv i_6633(.A(n_3585), .Z(n_4312));
notech_inv i_6634(.A(sla_irr[0]), .Z(n_4313));
notech_inv i_6635(.A(sla_irr[1]), .Z(n_4314));
notech_inv i_6636(.A(sla_irr[2]), .Z(n_4315));
notech_inv i_6637(.A(sla_irr[7]), .Z(n_4316));
notech_inv i_6638(.A(sla_imr[0]), .Z(n_4317));
notech_inv i_6639(.A(sla_imr[1]), .Z(n_4318));
notech_inv i_6640(.A(sla_imr[2]), .Z(n_4319));
notech_inv i_6641(.A(sla_imr[3]), .Z(n_4320));
notech_inv i_6642(.A(sla_imr[4]), .Z(n_4321));
notech_inv i_6643(.A(sla_imr[5]), .Z(n_4322));
notech_inv i_6644(.A(sla_imr[6]), .Z(n_4323));
notech_inv i_6645(.A(sla_imr[7]), .Z(n_4324));
notech_inv i_6646(.A(\nbus_63[0] ), .Z(n_4325));
notech_inv i_6647(.A(n_4085), .Z(n_4326));
notech_inv i_6648(.A(mas_ltim), .Z(n_4327));
notech_inv i_6649(.A(sla_current_irq), .Z(n_4328));
notech_inv i_6650(.A(mas_irr[0]), .Z(n_4329));
notech_inv i_6651(.A(mas_irr[1]), .Z(n_4330));
notech_inv i_6652(.A(mas_irr[2]), .Z(n_4331));
notech_inv i_6653(.A(mas_irr[7]), .Z(n_4332));
notech_inv i_6654(.A(n_3752), .Z(n_4333));
notech_inv i_6655(.A(mas_imr[0]), .Z(n_4334));
notech_inv i_6656(.A(mas_imr[1]), .Z(n_4335));
notech_inv i_6657(.A(mas_imr[2]), .Z(n_4336));
notech_inv i_6658(.A(mas_imr[3]), .Z(n_4337));
notech_inv i_6659(.A(mas_imr[4]), .Z(n_4338));
notech_inv i_6660(.A(mas_imr[5]), .Z(n_4339));
notech_inv i_6661(.A(mas_imr[6]), .Z(n_4340));
notech_inv i_6662(.A(mas_imr[7]), .Z(n_4341));
notech_inv i_6663(.A(\nbus_62[0] ), .Z(n_4342));
notech_inv i_6664(.A(n_3490), .Z(n_4343));
notech_inv i_6665(.A(mas_isr[0]), .Z(n_4344));
notech_inv i_6666(.A(n_3496), .Z(n_4345));
notech_inv i_6667(.A(mas_isr[1]), .Z(n_4346));
notech_inv i_6668(.A(n_3502), .Z(n_4347));
notech_inv i_6669(.A(mas_isr[2]), .Z(n_4348));
notech_inv i_6670(.A(n_3508), .Z(n_4349));
notech_inv i_6671(.A(mas_isr[3]), .Z(n_4350));
notech_inv i_6672(.A(n_3514), .Z(n_4351));
notech_inv i_6673(.A(mas_isr[4]), .Z(n_4352));
notech_inv i_6674(.A(n_3520), .Z(n_4353));
notech_inv i_6675(.A(mas_isr[5]), .Z(n_4354));
notech_inv i_6676(.A(n_3526), .Z(n_4355));
notech_inv i_6677(.A(mas_isr[6]), .Z(n_4356));
notech_inv i_6678(.A(n_3532), .Z(n_4357));
notech_inv i_6679(.A(mas_isr[7]), .Z(n_4358));
notech_inv i_6680(.A(mas_special_mask), .Z(n_4359));
notech_inv i_6681(.A(n_3987), .Z(n_4360));
notech_inv i_6682(.A(mas_current_irq), .Z(n_4361));
notech_inv i_6683(.A(n_4107), .Z(n_4362));
notech_inv i_6684(.A(n_1177), .Z(n_4363));
notech_inv i_6685(.A(n_3650), .Z(n_4364));
notech_inv i_6686(.A(n_1179), .Z(n_4365));
notech_inv i_6687(.A(n_1182), .Z(n_4366));
notech_inv i_6688(.A(sl_writedata[0]), .Z(n_4367));
notech_inv i_6689(.A(sl_writedata[1]), .Z(n_4368));
notech_inv i_6690(.A(sl_writedata[4]), .Z(n_4369));
notech_inv i_6691(.A(sl_writedata[6]), .Z(n_4370));
notech_inv i_6692(.A(inter_vector[0]), .Z(n_4371));
notech_inv i_6693(.A(sl_write), .Z(n_4372));
notech_inv i_6694(.A(inter_done), .Z(n_4373));
notech_inv i_6695(.A(ms_write), .Z(n_4374));
notech_inv i_6573(.A(n_1608), .Z(n_4246));
notech_inv i_6574(.A(n_1605), .Z(n_4247));
notech_inv i_6575(.A(n_1559), .Z(n_4248));
notech_inv i_6576(.A(n_1536), .Z(n_4249));
notech_inv i_6577(.A(n_1554), .Z(n_4250));
notech_inv i_6578(.A(n_1546), .Z(n_4251));
notech_inv i_6579(.A(n_1548), .Z(n_4252));
notech_inv i_6580(.A(n_1550), .Z(n_4253));
notech_inv i_6581(.A(n_1551), .Z(n_4254));
notech_inv i_6582(.A(n_1538), .Z(n_4255));
notech_inv i_6583(.A(n_1202), .Z(n_4256));
notech_inv i_6584(.A(n_1193), .Z(n_4257));
notech_inv i_6585(.A(mas_init_byte_expected[0]), .Z(n_4258));
notech_inv i_6586(.A(n_3748), .Z(n_4259));
notech_inv i_6587(.A(mas_init_byte_expected[2]), .Z(n_4260));
notech_inv i_6588(.A(ms_read_last), .Z(n_4261));
notech_inv i_6589(.A(mas_polled), .Z(n_4262));
notech_inv i_6590(.A(sl_read_last), .Z(n_4263));
notech_inv i_6591(.A(sla_polled), .Z(n_4264));
notech_inv i_6592(.A(mas_lowest_priority[1]), .Z(n_4265));
notech_inv i_6593(.A(mas_lowest_priority[2]), .Z(n_4266));
notech_inv i_6594(.A(mas_sla_active), .Z(n_4267));
notech_inv i_6595(.A(mas_inter_offset[0]), .Z(n_4268));
notech_inv i_6596(.A(mas_inter_offset[1]), .Z(n_4269));
notech_inv i_6597(.A(mas_inter_offset[2]), .Z(n_4270));
notech_inv i_6598(.A(mas_inter_offset[3]), .Z(n_4271));
notech_inv i_6599(.A(mas_inter_offset[4]), .Z(n_4272));
notech_inv i_6600(.A(sla_init_byte_expected[0]), .Z(n_4273));
notech_inv i_6601(.A(n_4390), .Z(n_4274));
notech_inv i_6602(.A(sla_init_byte_expected[2]), .Z(n_4275));
notech_inv i_6603(.A(sla_lowest_priority[0]), .Z(n_4276));
notech_inv i_6604(.A(sla_lowest_priority[1]), .Z(n_4277));
notech_inv i_6605(.A(n_4126), .Z(n_4278));
notech_inv i_6606(.A(sla_isr[0]), .Z(n_4279));
notech_inv i_6607(.A(n_4132), .Z(n_4280));
notech_inv i_6608(.A(sla_isr[1]), .Z(n_4281));
notech_inv i_6609(.A(n_4138), .Z(n_4282));
notech_inv i_6610(.A(sla_isr[2]), .Z(n_4283));
notech_inv i_6611(.A(n_4144), .Z(n_4284));
notech_inv i_6612(.A(sla_isr[3]), .Z(n_4285));
notech_inv i_6613(.A(n_4150), .Z(n_4286));
notech_inv i_6614(.A(sla_isr[4]), .Z(n_4287));
notech_inv i_6615(.A(n_4156), .Z(n_4288));
notech_inv i_6616(.A(sla_isr[5]), .Z(n_4289));
notech_inv i_6617(.A(n_4162), .Z(n_4290));
notech_inv i_6618(.A(sla_isr[6]), .Z(n_4291));
notech_inv i_6619(.A(n_4168), .Z(n_4292));
notech_inv i_6620(.A(sla_isr[7]), .Z(n_4293));
notech_inv i_6621(.A(sla_inter_offset[0]), .Z(n_4294));
notech_inv i_6622(.A(sla_inter_offset[1]), .Z(n_4295));
notech_inv i_6623(.A(sla_inter_offset[2]), .Z(n_4296));
notech_inv i_6624(.A(sla_inter_offset[3]), .Z(n_4297));
notech_inv i_6625(.A(sla_inter_offset[4]), .Z(n_4298));
notech_inv i_6626(.A(n_4413), .Z(n_4299));
notech_inv i_6627(.A(n_4419), .Z(n_4300));
notech_inv i_6628(.A(n_4425), .Z(n_4301));
notech_inv i_6629(.A(n_4431), .Z(n_4302));
notech_inv i_6630(.A(n_4437), .Z(n_4303));
notech_inv i_6631(.A(n_4443), .Z(n_4304));
notech_inv i_6632(.A(n_4449), .Z(n_4305));
notech_inv i_6633(.A(n_4455), .Z(n_4306));
notech_inv i_6634(.A(sla_irr[0]), .Z(n_4307));
notech_inv i_6635(.A(sla_irr[1]), .Z(n_4308));
notech_inv i_6636(.A(sla_irr[2]), .Z(n_4309));
notech_inv i_6637(.A(sla_irr[7]), .Z(n_4310));
notech_inv i_6638(.A(sla_imr[0]), .Z(n_4311));
notech_inv i_6639(.A(sla_imr[1]), .Z(n_4312));
notech_inv i_6640(.A(sla_imr[2]), .Z(n_4313));
notech_inv i_6641(.A(sla_imr[3]), .Z(n_4314));
notech_inv i_6642(.A(sla_imr[4]), .Z(n_4315));
notech_inv i_6643(.A(sla_imr[5]), .Z(n_4316));
notech_inv i_6644(.A(sla_imr[6]), .Z(n_4317));
notech_inv i_6645(.A(sla_imr[7]), .Z(n_4318));
notech_inv i_6646(.A(\nbus_65[0] ), .Z(n_4319));
notech_inv i_6647(.A(n_4081), .Z(n_4320));
notech_inv i_6648(.A(mas_ltim), .Z(n_4321));
notech_inv i_6649(.A(sla_current_irq), .Z(n_4322));
notech_inv i_6650(.A(mas_irr[0]), .Z(n_4323));
notech_inv i_6651(.A(mas_irr[1]), .Z(n_4324));
notech_inv i_6652(.A(mas_irr[2]), .Z(n_4325));
notech_inv i_6653(.A(mas_irr[7]), .Z(n_4326));
notech_inv i_6654(.A(n_3664), .Z(n_4327));
notech_inv i_6655(.A(mas_imr[0]), .Z(n_4328));
notech_inv i_6656(.A(mas_imr[1]), .Z(n_4329));
notech_inv i_6657(.A(mas_imr[2]), .Z(n_4330));
notech_inv i_6658(.A(mas_imr[3]), .Z(n_4331));
notech_inv i_6659(.A(mas_imr[4]), .Z(n_4332));
notech_inv i_6660(.A(mas_imr[5]), .Z(n_4333));
notech_inv i_6661(.A(mas_imr[6]), .Z(n_4334));
notech_inv i_6662(.A(mas_imr[7]), .Z(n_4335));
notech_inv i_6663(.A(\nbus_40[0] ), .Z(n_4336));
notech_inv i_6664(.A(n_3774), .Z(n_4337));
notech_inv i_6665(.A(mas_isr[0]), .Z(n_4338));
notech_inv i_6666(.A(n_3780), .Z(n_4339));
notech_inv i_6667(.A(mas_isr[1]), .Z(n_4340));
notech_inv i_6668(.A(n_3786), .Z(n_4341));
notech_inv i_6669(.A(mas_isr[2]), .Z(n_4342));
notech_inv i_6670(.A(n_3792), .Z(n_4343));
notech_inv i_6671(.A(mas_isr[3]), .Z(n_4344));
notech_inv i_6672(.A(n_3798), .Z(n_4345));
notech_inv i_6673(.A(mas_isr[4]), .Z(n_4346));
notech_inv i_6674(.A(n_3804), .Z(n_4347));
notech_inv i_6675(.A(mas_isr[5]), .Z(n_4348));
notech_inv i_6676(.A(n_3810), .Z(n_4349));
notech_inv i_6677(.A(mas_isr[6]), .Z(n_4350));
notech_inv i_6678(.A(n_3816), .Z(n_4351));
notech_inv i_6679(.A(mas_isr[7]), .Z(n_4352));
notech_inv i_6680(.A(mas_special_mask), .Z(n_4353));
notech_inv i_6681(.A(n_3992), .Z(n_4354));
notech_inv i_6682(.A(mas_current_irq), .Z(n_4355));
notech_inv i_6683(.A(n_4102), .Z(n_4356));
notech_inv i_6684(.A(n_1177), .Z(n_4357));
notech_inv i_6685(.A(n_3598), .Z(n_4358));
notech_inv i_6686(.A(n_1179), .Z(n_4359));
notech_inv i_6687(.A(n_1182), .Z(n_4360));
notech_inv i_6688(.A(sl_writedata[0]), .Z(n_4361));
notech_inv i_6689(.A(sl_writedata[1]), .Z(n_4362));
notech_inv i_6690(.A(sl_writedata[4]), .Z(n_4363));
notech_inv i_6691(.A(sl_writedata[6]), .Z(n_4364));
notech_inv i_6692(.A(inter_vector[0]), .Z(n_4365));
notech_inv i_6693(.A(sl_write), .Z(n_4366));
notech_inv i_6694(.A(inter_done), .Z(n_4367));
notech_inv i_6695(.A(ms_write), .Z(n_4368));
endmodule
module periph(s00_AXI_RSTN, s00_AXI_CLK, cfg, spi_mosi, spi_miso, spi_clk, spi_cs
, mosi, miso, sclk, s00_AXI_AWADDR, s00_AXI_AWVALID, s00_AXI_AWREADY
13686,7 → 13693,7
s00_AXI_WSTRB, s00_AXI_WLAST, s00_AXI_RDATA, s00_AXI_RVALID, s00_AXI_RREADY
, s00_AXI_RLAST, s00_AXI_BVALID, s00_AXI_BREADY, int_pic, ivect,
iack, int_bus, gpioA_in, gpioB_in, gpioA_dir, gpioB_dir, gpioA_out
, gpioB_out, TXD, RXD);
, gpioB_out, TXD, RXD, ps2data, ps2clk);
 
input s00_AXI_RSTN;
input s00_AXI_CLK;
13733,6 → 13740,8
output [7:0] gpioB_out;
output TXD;
input RXD;
input ps2data;
output ps2clk;
 
wire [31:0] writeio_data;
wire [5:0] div_clke;
13745,1430 → 13754,1483
wire [7:0] rdio_pic1;
wire [7:0] rdio_pic2;
wire [31:0] dat_o_spi_0;
wire [7:0] rdio_8042;
wire [3:0] int_reg;
wire [8:0] bit_bang;
 
assign s00_AXI_RLAST = 1'b0;
assign s00_AXI_BVALID = 1'b1;
supply0 AMBIT_GND;
supply1 AMBIT_VDD;
supply0 s00_AXI_RLAST;
supply1 s00_AXI_BVALID;
 
 
notech_inv i_1639(.A(n_8506), .Z(n_8507));
notech_inv i_1638(.A(n_8493), .Z(n_8506));
notech_inv i_1637(.A(n_8504), .Z(n_8505));
notech_inv i_1636(.A(n_8489), .Z(n_8504));
notech_inv i_1629(.A(n_8496), .Z(n_8497));
notech_inv i_1628(.A(n_8479), .Z(n_8496));
notech_inv i_1627(.A(n_8494), .Z(n_8495));
notech_inv i_1626(.A(n_8477), .Z(n_8494));
notech_inv i_1625(.A(n_8492), .Z(n_8493));
notech_inv i_1624(.A(n_8495), .Z(n_8492));
notech_inv i_1623(.A(n_8490), .Z(n_8491));
notech_inv i_1622(.A(n_8475), .Z(n_8490));
notech_inv i_1621(.A(n_8488), .Z(n_8489));
notech_inv i_1620(.A(n_8491), .Z(n_8488));
notech_inv i_1613(.A(n_8480), .Z(n_8481));
notech_inv i_1612(.A(s00_AXI_CLK), .Z(n_8480));
notech_inv i_1611(.A(n_8478), .Z(n_8479));
notech_inv i_1610(.A(n_8481), .Z(n_8478));
notech_inv i_1609(.A(n_8476), .Z(n_8477));
notech_inv i_1608(.A(n_8497), .Z(n_8476));
notech_inv i_1607(.A(n_8474), .Z(n_8475));
notech_inv i_1606(.A(n_8507), .Z(n_8474));
notech_inv i_1354(.A(n_5467), .Z(n_8217));
notech_inv i_1353(.A(n_5467), .Z(n_8216));
notech_inv i_1340(.A(s00_AXI_WREADY), .Z(n_8201));
notech_inv i_1335(.A(s00_AXI_WREADY), .Z(n_8196));
notech_inv i_1327(.A(n_8186), .Z(n_8187));
notech_inv i_1326(.A(writeio_data[0]), .Z(n_8186));
notech_inv i_1325(.A(n_8164), .Z(n_8184));
notech_inv i_1324(.A(n_8164), .Z(n_8183));
notech_inv i_1323(.A(n_8164), .Z(n_8182));
notech_inv i_1321(.A(n_8164), .Z(n_8180));
notech_inv i_1320(.A(n_8164), .Z(n_8179));
notech_inv i_1316(.A(n_8164), .Z(n_8175));
notech_inv i_1315(.A(n_8164), .Z(n_8174));
notech_inv i_1314(.A(n_8164), .Z(n_8173));
notech_inv i_1313(.A(n_8164), .Z(n_8172));
notech_inv i_1310(.A(n_8164), .Z(n_8169));
notech_inv i_1309(.A(n_8164), .Z(n_8168));
notech_inv i_1308(.A(n_8164), .Z(n_8167));
notech_inv i_1307(.A(n_8164), .Z(n_8166));
notech_inv i_1306(.A(n_8164), .Z(n_8165));
notech_inv i_1305(.A(s00_AXI_RSTN), .Z(n_8164));
notech_inv i_1254(.A(n_8106), .Z(n_8108));
notech_inv i_1253(.A(n_8106), .Z(n_8107));
notech_inv i_1252(.A(writeio_data[1]), .Z(n_8106));
notech_inv i_1246(.A(n_8097), .Z(n_8099));
notech_inv i_1245(.A(n_8097), .Z(n_8098));
notech_inv i_1244(.A(writeio_data[2]), .Z(n_8097));
notech_inv i_292(.A(n_8079), .Z(n_8081));
notech_inv i_291(.A(n_8079), .Z(n_8080));
notech_inv i_290(.A(writeio_data[6]), .Z(n_8079));
notech_inv i_284(.A(n_8070), .Z(n_8072));
notech_inv i_283(.A(n_8070), .Z(n_8071));
notech_inv i_282(.A(writeio_data[5]), .Z(n_8070));
notech_inv i_275(.A(n_8061), .Z(n_8062));
notech_inv i_274(.A(writeio_data[4]), .Z(n_8061));
notech_inv i_268(.A(n_8052), .Z(n_8054));
notech_inv i_267(.A(n_8052), .Z(n_8053));
notech_inv i_266(.A(writeio_data[3]), .Z(n_8052));
notech_inv i_259(.A(n_8043), .Z(n_8044));
notech_inv i_258(.A(s00_AXI_WVALID), .Z(n_8043));
notech_inv i_249(.A(n_8032), .Z(n_8033));
notech_inv i_248(.A(n_648), .Z(n_8032));
notech_inv i_241(.A(n_8023), .Z(n_8024));
notech_inv i_240(.A(n_707), .Z(n_8023));
notech_inv i_233(.A(n_8014), .Z(n_8015));
notech_inv i_232(.A(n_486), .Z(n_8014));
notech_inv i_186(.A(n_7962), .Z(n_7963));
notech_inv i_185(.A(n_546), .Z(n_7962));
notech_nand2 i_169(.A(gpioA_out[6]), .B(n_5322), .Z(n_480));
notech_nao3 i_172(.A(n_625), .B(rdio_pic1[6]), .C(n_612), .Z(n_477));
notech_nand2 i_175(.A(cfg[6]), .B(n_5325), .Z(n_474));
notech_nand2 i_157(.A(\rdio_spk[5] ), .B(n_628), .Z(n_468));
notech_nao3 i_160(.A(n_625), .B(rdio_pic1[5]), .C(n_612), .Z(n_465));
notech_nand2 i_163(.A(cfg[5]), .B(n_5325), .Z(n_462));
notech_nao3 i_140(.A(dat_o_spi_0[4]), .B(n_699), .C(n_706), .Z(n_459));
notech_nao3 i_141(.A(n_655), .B(gpioB_out[4]), .C(n_659), .Z(n_458));
notech_nand2 i_144(.A(rdio_pic2[4]), .B(n_5328), .Z(n_457));
notech_nand2 i_147(.A(rdio_pit[4]), .B(n_5330), .Z(n_454));
notech_nao3 i_129(.A(n_655), .B(gpioB_out[3]), .C(n_659), .Z(n_449));
notech_nao3 i_128(.A(dat_o_spi_0[3]), .B(n_699), .C(n_706), .Z(n_448));
notech_and2 i_132(.A(n_5299), .B(n_5054), .Z(n_447));
notech_and4 i_135(.A(bit_bang_shift[3]), .B(n_623), .C(n_642), .D(n_647)
, .Z(n_444));
notech_nao3 i_117(.A(n_655), .B(gpioB_out[2]), .C(n_659), .Z(n_440));
notech_nao3 i_116(.A(dat_o_spi_0[2]), .B(n_699), .C(n_706), .Z(n_439));
notech_nand2 i_120(.A(n_5297), .B(n_5054), .Z(n_438));
notech_nand3 i_123(.A(n_647), .B(bit_bang_shift[2]), .C(n_643), .Z(n_435
notech_inv i_1666(.A(n_8540), .Z(n_8541));
notech_inv i_1665(.A(n_8527), .Z(n_8540));
notech_inv i_1664(.A(n_8538), .Z(n_8539));
notech_inv i_1663(.A(n_8523), .Z(n_8538));
notech_inv i_1656(.A(n_8530), .Z(n_8531));
notech_inv i_1655(.A(n_8513), .Z(n_8530));
notech_inv i_1654(.A(n_8528), .Z(n_8529));
notech_inv i_1653(.A(n_8511), .Z(n_8528));
notech_inv i_1652(.A(n_8526), .Z(n_8527));
notech_inv i_1651(.A(n_8529), .Z(n_8526));
notech_inv i_1650(.A(n_8524), .Z(n_8525));
notech_inv i_1649(.A(n_8509), .Z(n_8524));
notech_inv i_1648(.A(n_8522), .Z(n_8523));
notech_inv i_1647(.A(n_8525), .Z(n_8522));
notech_inv i_1646(.A(n_8520), .Z(n_8521));
notech_inv i_1645(.A(n_8507), .Z(n_8520));
notech_inv i_1640(.A(n_8514), .Z(n_8515));
notech_inv i_1639(.A(s00_AXI_RSTN), .Z(n_8514));
notech_inv i_1638(.A(n_8512), .Z(n_8513));
notech_inv i_1637(.A(n_8515), .Z(n_8512));
notech_inv i_1636(.A(n_8510), .Z(n_8511));
notech_inv i_1635(.A(n_8531), .Z(n_8510));
notech_inv i_1634(.A(n_8508), .Z(n_8509));
notech_inv i_1633(.A(n_8541), .Z(n_8508));
notech_inv i_1632(.A(n_8506), .Z(n_8507));
notech_inv i_1631(.A(n_8539), .Z(n_8506));
notech_inv i_1626(.A(n_8500), .Z(n_8501));
notech_inv i_1625(.A(n_8487), .Z(n_8500));
notech_inv i_1624(.A(n_8498), .Z(n_8499));
notech_inv i_1623(.A(n_8483), .Z(n_8498));
notech_inv i_1616(.A(n_8490), .Z(n_8491));
notech_inv i_1615(.A(n_8473), .Z(n_8490));
notech_inv i_1614(.A(n_8488), .Z(n_8489));
notech_inv i_1613(.A(n_8471), .Z(n_8488));
notech_inv i_1612(.A(n_8486), .Z(n_8487));
notech_inv i_1611(.A(n_8489), .Z(n_8486));
notech_inv i_1610(.A(n_8484), .Z(n_8485));
notech_inv i_1609(.A(n_8469), .Z(n_8484));
notech_inv i_1608(.A(n_8482), .Z(n_8483));
notech_inv i_1607(.A(n_8485), .Z(n_8482));
notech_inv i_1600(.A(n_8474), .Z(n_8475));
notech_inv i_1599(.A(s00_AXI_CLK), .Z(n_8474));
notech_inv i_1598(.A(n_8472), .Z(n_8473));
notech_inv i_1597(.A(n_8475), .Z(n_8472));
notech_inv i_1596(.A(n_8470), .Z(n_8471));
notech_inv i_1595(.A(n_8491), .Z(n_8470));
notech_inv i_1594(.A(n_8468), .Z(n_8469));
notech_inv i_1593(.A(n_8501), .Z(n_8468));
notech_inv i_1345(.A(n_8213), .Z(n_8215));
notech_inv i_1344(.A(n_8213), .Z(n_8214));
notech_inv i_1343(.A(\io_add[0] ), .Z(n_8213));
notech_inv i_1333(.A(s00_AXI_WREADY), .Z(n_8201));
notech_inv i_1332(.A(s00_AXI_WREADY), .Z(n_8200));
notech_inv i_1328(.A(s00_AXI_WREADY), .Z(n_8196));
notech_inv i_1318(.A(n_8184), .Z(n_8185));
notech_inv i_1317(.A(writeio_data[0]), .Z(n_8184));
notech_inv i_1265(.A(n_8126), .Z(n_8127));
notech_inv i_1264(.A(n_675), .Z(n_8126));
notech_inv i_1256(.A(n_8115), .Z(n_8117));
notech_inv i_1255(.A(n_8115), .Z(n_8116));
notech_inv i_1254(.A(writeio_data[1]), .Z(n_8115));
notech_inv i_1246(.A(n_8104), .Z(n_8106));
notech_inv i_1245(.A(n_8104), .Z(n_8105));
notech_inv i_1244(.A(writeio_data[2]), .Z(n_8104));
notech_inv i_282(.A(n_8086), .Z(n_8088));
notech_inv i_281(.A(n_8086), .Z(n_8087));
notech_inv i_280(.A(writeio_data[6]), .Z(n_8086));
notech_inv i_274(.A(n_8077), .Z(n_8079));
notech_inv i_273(.A(n_8077), .Z(n_8078));
notech_inv i_272(.A(writeio_data[5]), .Z(n_8077));
notech_inv i_265(.A(n_8068), .Z(n_8069));
notech_inv i_264(.A(writeio_data[4]), .Z(n_8068));
notech_inv i_258(.A(n_8059), .Z(n_8061));
notech_inv i_257(.A(n_8059), .Z(n_8060));
notech_inv i_256(.A(writeio_data[3]), .Z(n_8059));
notech_inv i_249(.A(n_8050), .Z(n_8051));
notech_inv i_248(.A(s00_AXI_WVALID), .Z(n_8050));
notech_inv i_241(.A(n_8041), .Z(n_8042));
notech_inv i_240(.A(n_5327), .Z(n_8041));
notech_inv i_233(.A(n_8032), .Z(n_8033));
notech_inv i_232(.A(n_474), .Z(n_8032));
notech_inv i_188(.A(n_7980), .Z(n_7981));
notech_inv i_187(.A(n_570), .Z(n_7980));
notech_nand2 i_180(.A(dat_o_spi_0[6]), .B(n_736), .Z(n_507));
notech_nand2 i_183(.A(rdio_pic2[6]), .B(n_5319), .Z(n_504));
notech_nand2 i_186(.A(rdio_pit[6]), .B(n_5322), .Z(n_501));
notech_nand2 i_170(.A(rdio_pic2[5]), .B(n_5319), .Z(n_492));
notech_nand2 i_173(.A(rdio_pit[5]), .B(n_5322), .Z(n_489));
notech_nand2 i_155(.A(\rdio_spk[4] ), .B(n_5320), .Z(n_481));
notech_nand2 i_10(.A(n_299), .B(n_736), .Z(n_474));
notech_ao4 i_40(.A(n_5413), .B(n_5315), .C(n_5421), .D(n_5312), .Z(n_471
));
notech_nao3 i_101(.A(gpioB_out[1]), .B(n_655), .C(n_659), .Z(n_431));
notech_nand2 i_104(.A(rdio_pic2[1]), .B(n_5328), .Z(n_428));
notech_nand2 i_107(.A(rdio_pit[1]), .B(n_5330), .Z(n_425));
notech_nao3 i_88(.A(n_655), .B(gpioB_out[0]), .C(n_659), .Z(n_418));
notech_nand2 i_91(.A(rdio_pic2[0]), .B(n_5328), .Z(n_415));
notech_nand2 i_94(.A(rdio_pit[0]), .B(n_5330), .Z(n_412));
notech_and4 i_133753(.A(n_634), .B(n_5327), .C(n_5350), .D(n_5351), .Z(clke
notech_mux2 i_53(.S(n_5313), .A(n_5336), .B(n_315), .Z(n_470));
notech_nao3 i_135(.A(rdio_pic1[3]), .B(n_654), .C(n_635), .Z(n_469));
notech_nand2 i_138(.A(cfg[3]), .B(n_5314), .Z(n_466));
notech_and2 i_122(.A(dat_o_spi_0[2]), .B(n_736), .Z(n_463));
notech_nao3 i_121(.A(n_734), .B(rdio_8042[2]), .C(n_725), .Z(n_462));
notech_nand2 i_125(.A(rdio_pic2[2]), .B(n_5319), .Z(n_461));
notech_nand2 i_128(.A(rdio_pit[2]), .B(n_5322), .Z(n_458));
notech_or4 i_104(.A(n_764), .B(n_5313), .C(superIO_idx[0]), .D(n_5340),
.Z(n_453));
notech_nand2 i_110(.A(\rdio_spk[1] ), .B(n_5320), .Z(n_450));
notech_nand2 i_97(.A(\rdio_spk[0] ), .B(n_5320), .Z(n_435));
notech_and4 i_133794(.A(n_660), .B(n_5318), .C(n_5345), .D(n_5346), .Z(clke
));
notech_and4 i_143734(.A(div_clke[4]), .B(div_clke[5]), .C(n_634), .D(n_5327
), .Z(n_365));
notech_or4 i_68(.A(bit_bang[3]), .B(bit_bang[8]), .C(n_691), .D(n_686),
.Z(n_351));
notech_and4 i_34(.A(n_607), .B(\io_add[8] ), .C(n_5333), .D(n_5340), .Z(n_7233
notech_and4 i_143775(.A(div_clke[4]), .B(div_clke[5]), .C(n_660), .D(n_5318
), .Z(n_386));
notech_or4 i_65(.A(bit_bang[3]), .B(bit_bang[8]), .C(n_719), .D(n_714),
.Z(n_372));
notech_or4 i_205(.A(superIO_idx[6]), .B(n_764), .C(superIO_idx[0]), .D(n_5313
), .Z(n_338));
notech_or4 i_191(.A(superIO_idx[6]), .B(n_764), .C(n_5337), .D(n_5313),
.Z(n_337));
notech_ao4 i_84(.A(n_5315), .B(n_5416), .C(n_5312), .D(n_5424), .Z(n_334
));
notech_ao4 i_71(.A(n_679), .B(n_5458), .C(n_676), .D(n_5450), .Z(n_312)
notech_ao4 i_85(.A(n_5315), .B(n_5415), .C(n_5312), .D(n_5423), .Z(n_331
));
notech_ao4 i_67(.A(n_5315), .B(n_5414), .C(n_5312), .D(n_5422), .Z(n_328
));
notech_nor2 i_33(.A(dat_o_spi_0[3]), .B(n_299), .Z(n_324));
notech_ao4 i_42(.A(n_725), .B(n_5428), .C(n_324), .D(n_726), .Z(n_320)
);
notech_ao4 i_80(.A(n_679), .B(n_5457), .C(n_676), .D(n_5449), .Z(n_309)
notech_nand2 i_143(.A(n_685), .B(n_5330), .Z(n_319));
notech_nand2 i_45(.A(n_818), .B(n_319), .Z(n_317));
notech_mux2 i_49(.S(n_682), .A(gpioA_out[3]), .B(n_317), .Z(n_315));
notech_ao4 i_86(.A(n_697), .B(n_5420), .C(n_708), .D(n_5412), .Z(n_311)
);
notech_ao4 i_81(.A(n_679), .B(n_5456), .C(n_676), .D(n_5448), .Z(n_306)
notech_ao4 i_74(.A(n_697), .B(n_5419), .C(n_708), .D(n_5411), .Z(n_308)
);
notech_ao4 i_15(.A(n_5447), .B(n_5319), .C(n_5455), .D(n_5318), .Z(n_303
));
notech_nand3 i_110(.A(n_669), .B(n_5343), .C(n_5332), .Z(n_301));
notech_and3 i_72(.A(n_746), .B(n_303), .C(n_301), .Z(n_300));
notech_and3 i_82(.A(n_754), .B(n_815), .C(n_484), .Z(n_299));
notech_and4 i_83(.A(\io_add[6] ), .B(\io_add[4] ), .C(n_625), .D(n_607),
.Z(n_296));
notech_xor2 i_79(.A(div_clke[2]), .B(n_638), .Z(n_295));
notech_xor2 i_78(.A(div_clke[4]), .B(n_640), .Z(n_294));
notech_xor2 i_77(.A(div_clke[5]), .B(n_641), .Z(n_293));
notech_nand2 i_14(.A(s00_AXI_WREADY), .B(n_5322), .Z(n_292));
notech_and4 i_343765(.A(\io_add[8] ), .B(n_5333), .C(n_5324), .D(n_702),
.Z(n_5054));
notech_nand3 i_166(.A(gpioB_dir[6]), .B(n_5321), .C(n_678), .Z(n_483));
notech_or2 i_76(.A(n_746), .B(n_675), .Z(n_484));
notech_or2 i_9(.A(n_7233), .B(n_707), .Z(n_486));
notech_nand2 i_184(.A(rdio_pic2[7]), .B(n_5328), .Z(n_493));
notech_nao3 i_178(.A(dat_o_spi_0[7]), .B(n_699), .C(n_706), .Z(n_496));
notech_and4 i_179(.A(superIO_idx[0]), .B(n_669), .C(n_5332), .D(n_5321),
.Z(n_497));
notech_or4 i_4033(.A(bit_bang[1]), .B(bit_bang[0]), .C(bit_bang[2]), .D(n_547
), .Z(n_546));
notech_nao3 i_4022(.A(n_649), .B(n_351), .C(n_684), .Z(n_547));
notech_and2 i_12558(.A(bit_bang_0[0]), .B(n_649), .Z(n_548));
notech_nand3 i_21203(.A(n_5321), .B(n_678), .C(s00_AXI_WREADY), .Z(n_549
));
notech_nao3 i_21201(.A(n_5321), .B(s00_AXI_WREADY), .C(n_5319), .Z(n_550
));
notech_nao3 i_21205(.A(n_655), .B(s00_AXI_WREADY), .C(n_659), .Z(n_551)
notech_xor2 i_83(.A(div_clke[2]), .B(n_664), .Z(n_304));
notech_xor2 i_82(.A(div_clke[4]), .B(n_666), .Z(n_303));
notech_xor2 i_81(.A(div_clke[5]), .B(n_667), .Z(n_302));
notech_nand3 i_343806(.A(\io_add[3] ), .B(n_680), .C(n_722), .Z(n_301)
);
notech_or2 i_24(.A(n_653), .B(n_8201), .Z(n_552));
notech_and2 i_22559(.A(bit_bang_0[1]), .B(n_649), .Z(n_553));
notech_and2 i_32560(.A(bit_bang_0[2]), .B(n_649), .Z(n_554));
notech_nor2 i_31972(.A(n_365), .B(n_295), .Z(n_555));
notech_and2 i_2173(.A(s00_AXI_WREADY), .B(n_5328), .Z(wr_pic2));
notech_and2 i_2172(.A(n_8201), .B(n_5328), .Z(rd_pic2));
notech_nor2 i_2171(.A(n_629), .B(n_8201), .Z(wr_pic1));
notech_nor2 i_2170(.A(n_629), .B(s00_AXI_WREADY), .Z(rd_pic1));
notech_and2 i_210(.A(s00_AXI_WREADY), .B(n_628), .Z(wr_spk));
notech_and2 i_28(.A(s00_AXI_WREADY), .B(n_5330), .Z(wr_pit));
notech_and2 i_27(.A(n_8201), .B(n_5330), .Z(rd_pit));
notech_and4 i_26(.A(\io_add[3] ), .B(n_615), .C(n_613), .D(n_610), .Z(n_565
notech_nand2 i_12(.A(s00_AXI_WREADY), .B(n_5317), .Z(n_300));
notech_or4 i_34(.A(\io_add[9] ), .B(n_625), .C(n_630), .D(\io_add[6] ),
.Z(n_299));
notech_nand2 i_198(.A(gpioA_out[7]), .B(n_5317), .Z(n_516));
notech_or4 i_62(.A(n_639), .B(n_649), .C(n_5333), .D(n_5484), .Z(n_569)
);
notech_or4 i_3806(.A(bit_bang[1]), .B(bit_bang[0]), .C(bit_bang[2]), .D(n_571
), .Z(n_570));
notech_nao3 i_4047(.A(n_676), .B(n_372), .C(n_712), .Z(n_571));
notech_and2 i_12601(.A(bit_bang_0[0]), .B(n_676), .Z(n_572));
notech_nand3 i_21213(.A(n_696), .B(n_707), .C(s00_AXI_WREADY), .Z(n_573)
);
notech_or2 i_26(.A(n_704), .B(n_8201), .Z(n_574));
notech_nand3 i_21215(.A(n_696), .B(n_692), .C(s00_AXI_WREADY), .Z(n_575)
);
notech_or2 i_21217(.A(n_685), .B(n_8200), .Z(n_576));
notech_and2 i_22602(.A(bit_bang_0[1]), .B(n_676), .Z(n_577));
notech_and2 i_32603(.A(bit_bang_0[2]), .B(n_676), .Z(n_578));
notech_nor2 i_32015(.A(n_386), .B(n_304), .Z(n_579));
notech_nor2 i_2175(.A(n_659), .B(n_8201), .Z(wr_pic2));
notech_nor2 i_2174(.A(n_659), .B(s00_AXI_WREADY), .Z(rd_pic2));
notech_nor2 i_2173(.A(n_655), .B(n_8201), .Z(wr_pic1));
notech_nor2 i_2172(.A(n_655), .B(s00_AXI_WREADY), .Z(rd_pic1));
notech_and2 i_212(.A(s00_AXI_WREADY), .B(n_5320), .Z(wr_spk));
notech_nor2 i_210(.A(n_647), .B(n_8201), .Z(wr_pit));
notech_nor2 i_29(.A(n_647), .B(s00_AXI_WREADY), .Z(rd_pit));
notech_or4 i_28(.A(n_641), .B(n_8200), .C(n_8215), .D(n_5482), .Z(n_589)
);
notech_and2 i_25(.A(s00_AXI_WREADY), .B(n_6808), .Z(we_spi_0));
notech_and3 i_11443(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[0]), .C(n_8200)
, .Z(n_591));
notech_and3 i_21444(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[1]), .C(n_8200)
, .Z(n_592));
notech_and3 i_31445(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[2]), .C(n_8200)
, .Z(n_593));
notech_and3 i_41446(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[3]), .C(n_8200)
, .Z(n_594));
notech_and3 i_51447(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[4]), .C(n_8201)
, .Z(n_595));
notech_and3 i_61448(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[5]), .C(n_8201)
, .Z(n_596));
notech_and3 i_71449(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[6]), .C(n_8201)
, .Z(n_597));
notech_and3 i_81450(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[7]), .C(n_8201)
, .Z(n_598));
notech_and3 i_91451(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[8]), .C(n_8201)
, .Z(n_599));
notech_and3 i_101452(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[9]), .C(n_8201
), .Z(n_600));
notech_and3 i_111453(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[10]), .C(n_8201
), .Z(n_601));
notech_and3 i_121454(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[11]), .C(n_8201
), .Z(n_602));
notech_and3 i_131455(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[12]), .C(n_8201
), .Z(n_603));
notech_and3 i_141456(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[13]), .C(n_8201
), .Z(n_604));
notech_and3 i_151457(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[14]), .C(n_8200
), .Z(n_605));
notech_and3 i_161458(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[15]), .C(n_8196
), .Z(n_606));
notech_and3 i_171459(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[16]), .C(n_8196
), .Z(n_607));
notech_and3 i_181460(.A(n_8051), .B(s00_AXI_WDATA[17]), .C(n_8196), .Z(n_608
));
notech_and3 i_11431(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[0]), .C(n_8201)
, .Z(n_566));
notech_and3 i_21432(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[1]), .C(n_8201)
, .Z(n_567));
notech_and3 i_31433(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[2]), .C(n_8201)
, .Z(n_568));
notech_and3 i_41434(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[3]), .C(n_8201)
, .Z(n_569));
notech_and3 i_51435(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[4]), .C(n_8201)
, .Z(n_570));
notech_and3 i_61436(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[5]), .C(n_8201)
, .Z(n_571));
notech_and3 i_71437(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[6]), .C(n_8201)
, .Z(n_572));
notech_and3 i_81438(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[7]), .C(n_8201)
, .Z(n_573));
notech_and3 i_91439(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[8]), .C(n_8201)
, .Z(n_574));
notech_and3 i_101440(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[9]), .C(n_8201
), .Z(n_575));
notech_and3 i_111441(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[10]), .C(n_8201
), .Z(n_576));
notech_and3 i_121442(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[11]), .C(n_8201
), .Z(n_577));
notech_and3 i_131443(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[12]), .C(n_8201
), .Z(n_578));
notech_and3 i_141444(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[13]), .C(n_8201
), .Z(n_579));
notech_and3 i_151445(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[14]), .C(n_8201
), .Z(n_580));
notech_and3 i_161446(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[15]), .C(n_8196
), .Z(n_581));
notech_and3 i_171447(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[16]), .C(n_8196
), .Z(n_582));
notech_and3 i_181448(.A(n_8044), .B(s00_AXI_WDATA[17]), .C(n_8196), .Z(n_583
notech_and3 i_191461(.A(n_8051), .B(s00_AXI_WDATA[18]), .C(n_8196), .Z(n_609
));
notech_and3 i_191449(.A(n_8044), .B(s00_AXI_WDATA[18]), .C(n_8196), .Z(n_584
notech_and3 i_201462(.A(n_8051), .B(s00_AXI_WDATA[19]), .C(n_8196), .Z(n_610
));
notech_and3 i_201450(.A(n_8044), .B(s00_AXI_WDATA[19]), .C(n_8196), .Z(n_585
notech_and3 i_211463(.A(n_8051), .B(s00_AXI_WDATA[20]), .C(n_8196), .Z(n_611
));
notech_and3 i_211451(.A(n_8044), .B(s00_AXI_WDATA[20]), .C(n_8196), .Z(n_586
notech_and3 i_221464(.A(n_8051), .B(s00_AXI_WDATA[21]), .C(n_8196), .Z(n_612
));
notech_and3 i_221452(.A(n_8044), .B(s00_AXI_WDATA[21]), .C(n_8196), .Z(n_587
notech_and3 i_231465(.A(n_8051), .B(s00_AXI_WDATA[22]), .C(n_8196), .Z(n_613
));
notech_and3 i_231453(.A(n_8044), .B(s00_AXI_WDATA[22]), .C(n_8196), .Z(n_588
notech_and3 i_241466(.A(n_8051), .B(s00_AXI_WDATA[23]), .C(n_8196), .Z(n_614
));
notech_and3 i_241454(.A(n_8044), .B(s00_AXI_WDATA[23]), .C(n_8196), .Z(n_589
notech_and3 i_251467(.A(n_8051), .B(s00_AXI_WDATA[24]), .C(n_8196), .Z(n_615
));
notech_and3 i_251455(.A(n_8044), .B(s00_AXI_WDATA[24]), .C(n_8196), .Z(n_590
notech_and3 i_261468(.A(n_8051), .B(s00_AXI_WDATA[25]), .C(n_8200), .Z(n_616
));
notech_and3 i_261456(.A(n_8044), .B(s00_AXI_WDATA[25]), .C(n_8196), .Z(n_591
notech_and3 i_271469(.A(n_8051), .B(s00_AXI_WDATA[26]), .C(n_8200), .Z(n_617
));
notech_and3 i_271457(.A(n_8044), .B(s00_AXI_WDATA[26]), .C(n_8196), .Z(n_592
notech_and3 i_281470(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[27]), .C(n_8200
), .Z(n_618));
notech_and3 i_291471(.A(n_8051), .B(s00_AXI_WDATA[28]), .C(n_8200), .Z(n_619
));
notech_and3 i_281458(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[27]), .C(n_8201
), .Z(n_593));
notech_and3 i_291459(.A(n_8044), .B(s00_AXI_WDATA[28]), .C(n_8196), .Z(n_594
notech_and3 i_30(.A(n_8051), .B(s00_AXI_WDATA[29]), .C(n_8200), .Z(n_620
));
notech_and3 i_30(.A(n_8044), .B(s00_AXI_WDATA[29]), .C(n_8196), .Z(n_595
notech_and3 i_31(.A(n_8051), .B(s00_AXI_WDATA[30]), .C(n_8196), .Z(n_621
));
notech_and3 i_31(.A(n_8044), .B(s00_AXI_WDATA[30]), .C(n_8196), .Z(n_596
notech_and3 i_32(.A(n_8051), .B(s00_AXI_WDATA[31]), .C(n_8196), .Z(n_622
));
notech_and3 i_32(.A(n_8044), .B(s00_AXI_WDATA[31]), .C(n_8196), .Z(n_597
notech_and2 i_21(.A(n_8051), .B(n_8196), .Z(n_623));
notech_and2 i_20(.A(s00_AXI_ARVALID), .B(n_5497), .Z(n_624));
notech_nand2 i_68(.A(\io_add[8] ), .B(n_5334), .Z(n_625));
notech_or2 i_573(.A(\io_add[12] ), .B(\io_add[13] ), .Z(n_626));
notech_or4 i_37(.A(\io_add[14] ), .B(\io_add[15] ), .C(\io_add[11] ), .D
(n_626), .Z(n_629));
notech_or2 i_44(.A(n_629), .B(\io_add[10] ), .Z(n_630));
notech_or2 i_61(.A(\io_add[9] ), .B(n_630), .Z(n_631));
notech_nand2 i_47(.A(n_5333), .B(n_5484), .Z(n_635));
notech_or2 i_23(.A(\io_add[8] ), .B(\io_add[7] ), .Z(n_637));
notech_or4 i_38(.A(\io_add[9] ), .B(n_630), .C(n_637), .D(n_5481), .Z(n_639
));
notech_and2 i_23(.A(n_7233), .B(s00_AXI_WREADY), .Z(we_spi_0));
notech_and2 i_21(.A(n_8044), .B(n_8196), .Z(n_599));
notech_and2 i_20(.A(s00_AXI_ARVALID), .B(n_5480), .Z(n_600));
notech_or4 i_10(.A(\io_add[14] ), .B(\io_add[15] ), .C(\io_add[12] ), .D
(\io_add[13] ), .Z(n_604));
notech_nao3 i_40(.A(n_5342), .B(n_5341), .C(n_604), .Z(n_606));
notech_nor2 i_41(.A(\io_add[9] ), .B(\io_add[7] ), .Z(n_607));
notech_and3 i_508(.A(\io_add[1] ), .B(s00_AXI_WREADY), .C(n_5467), .Z(n_610
));
notech_and2 i_48(.A(n_607), .B(n_5466), .Z(n_611));
notech_or4 i_59(.A(\io_add[9] ), .B(\io_add[7] ), .C(\io_add[4] ), .D(\io_add[6]
), .Z(n_612));
notech_and3 i_73(.A(n_611), .B(n_5340), .C(\io_add[2] ), .Z(n_613));
notech_nor2 i_43(.A(\io_add[8] ), .B(n_606), .Z(n_614));
notech_ao3 i_50(.A(\io_add[5] ), .B(n_5333), .C(\io_add[8] ), .Z(n_615)
notech_or4 i_532(.A(n_639), .B(n_635), .C(n_5486), .D(n_5480), .Z(n_641)
);
notech_nand3 i_501(.A(\io_add[6] ), .B(n_611), .C(n_614), .Z(n_621));
notech_or4 i_293667(.A(\io_add[3] ), .B(\io_add[2] ), .C(\io_add[5] ), .D
(n_621), .Z(n_622));
notech_nor2 i_497(.A(\io_add[3] ), .B(\io_add[1] ), .Z(n_623));
notech_nand2 i_13(.A(n_623), .B(n_5469), .Z(n_624));
notech_ao3 i_54(.A(n_623), .B(n_615), .C(\io_add[2] ), .Z(n_625));
notech_and4 i_343874(.A(\io_add[0] ), .B(\io_add[6] ), .C(n_625), .D(n_611
), .Z(n_628));
notech_nao3 i_303712(.A(n_611), .B(n_625), .C(\io_add[6] ), .Z(n_629));
notech_ao3 i_492(.A(\io_add[7] ), .B(n_5466), .C(\io_add[9] ), .Z(n_631)
notech_or4 i_529(.A(n_5333), .B(\io_add[4] ), .C(\io_add[5] ), .D(\io_add[2]
), .Z(n_644));
notech_or4 i_293708(.A(n_644), .B(\io_add[3] ), .C(n_637), .D(n_631), .Z
(n_647));
notech_nao3 i_6(.A(n_5486), .B(n_5482), .C(\io_add[3] ), .Z(n_649));
notech_ao3 i_52(.A(\io_add[6] ), .B(n_5321), .C(n_639), .Z(n_651));
notech_nand3 i_343914(.A(n_8215), .B(n_5484), .C(n_651), .Z(n_653));
notech_nor2 i_519(.A(n_639), .B(n_649), .Z(n_654));
notech_or4 i_303753(.A(n_639), .B(\io_add[6] ), .C(\io_add[4] ), .D(n_649
), .Z(n_655));
notech_nao3 i_516(.A(\io_add[7] ), .B(\io_add[5] ), .C(n_631), .Z(n_656)
);
notech_nao3 i_303779(.A(n_625), .B(n_631), .C(\io_add[6] ), .Z(n_633));
notech_and2 i_486(.A(div_clke[2]), .B(n_5349), .Z(n_634));
notech_nand2 i_75(.A(div_clke[0]), .B(n_5347), .Z(n_636));
notech_nand2 i_39(.A(div_clke[1]), .B(div_clke[0]), .Z(n_638));
notech_and3 i_42(.A(div_clke[0]), .B(div_clke[2]), .C(div_clke[1]), .Z(n_639
notech_or4 i_70(.A(\io_add[2] ), .B(\io_add[1] ), .C(\io_add[3] ), .D(\io_add[8]
), .Z(n_657));
notech_or4 i_303820(.A(\io_add[8] ), .B(n_649), .C(n_635), .D(n_656), .Z
(n_659));
notech_and2 i_511(.A(div_clke[2]), .B(n_5344), .Z(n_660));
notech_nand2 i_80(.A(div_clke[0]), .B(n_5342), .Z(n_662));
notech_nand2 i_19(.A(div_clke[1]), .B(div_clke[0]), .Z(n_664));
notech_and3 i_24(.A(div_clke[0]), .B(div_clke[2]), .C(div_clke[1]), .Z(n_665
));
notech_and4 i_49(.A(div_clke[0]), .B(div_clke[2]), .C(div_clke[3]), .D(div_clke
[1]), .Z(n_640));
notech_and3 i_64(.A(div_clke[3]), .B(n_639), .C(div_clke[4]), .Z(n_641)
notech_and4 i_41(.A(div_clke[0]), .B(div_clke[2]), .C(div_clke[3]), .D(div_clke
[1]), .Z(n_666));
notech_and3 i_60(.A(div_clke[3]), .B(n_665), .C(div_clke[4]), .Z(n_667)
);
notech_and2 i_480(.A(\io_add[8] ), .B(n_5342), .Z(n_642));
notech_and3 i_481(.A(\io_add[8] ), .B(n_623), .C(n_5342), .Z(n_643));
notech_or2 i_69(.A(\io_add[5] ), .B(\io_add[0] ), .Z(n_645));
notech_and4 i_479(.A(n_613), .B(\io_add[10] ), .C(n_5326), .D(n_5334), .Z
(n_647));
notech_nand3 i_343625(.A(n_623), .B(n_642), .C(n_647), .Z(n_648));
notech_nand3 i_25(.A(n_647), .B(n_643), .C(s00_AXI_WREADY), .Z(n_649));
notech_nao3 i_474(.A(n_642), .B(\io_add[10] ), .C(n_604), .Z(n_650));
notech_or4 i_343610(.A(n_612), .B(n_624), .C(n_645), .D(n_650), .Z(n_653
notech_or4 i_506(.A(\io_add[3] ), .B(\io_add[9] ), .C(n_5335), .D(\io_add[1]
), .Z(n_670));
notech_nand2 i_69(.A(n_5481), .B(n_5483), .Z(n_672));
notech_or4 i_501(.A(n_672), .B(\io_add[6] ), .C(\io_add[4] ), .D(n_5486)
, .Z(n_673));
notech_or4 i_343666(.A(n_629), .B(n_625), .C(n_670), .D(n_673), .Z(n_675
));
notech_ao3 i_470(.A(\io_add[0] ), .B(n_5340), .C(\io_add[5] ), .Z(n_655)
);
notech_nand3 i_74(.A(\io_add[7] ), .B(\io_add[4] ), .C(\io_add[9] ), .Z(n_657
notech_or2 i_27(.A(n_675), .B(n_8200), .Z(n_676));
notech_and4 i_75(.A(\io_add[9] ), .B(\io_add[7] ), .C(\io_add[4] ), .D(n_5326
), .Z(n_680));
notech_nao3 i_497(.A(n_5321), .B(n_680), .C(\io_add[8] ), .Z(n_681));
notech_or4 i_343958(.A(n_672), .B(n_657), .C(\io_add[6] ), .D(n_5316), .Z
(n_682));
notech_or4 i_343975(.A(\io_add[5] ), .B(\io_add[6] ), .C(n_681), .D(n_5483
), .Z(n_685));
notech_nao3 i_77(.A(superIO_idx[5]), .B(n_5338), .C(superIO_idx[3]), .Z(n_689
));
notech_or4 i_468(.A(\io_add[8] ), .B(n_624), .C(n_657), .D(n_606), .Z(n_659
notech_ao3 i_491(.A(superIO_idx[6]), .B(n_5339), .C(n_689), .Z(n_691));
notech_and4 i_183943(.A(superIO_idx[4]), .B(superIO_idx[7]), .C(n_691),
.D(superIO_idx[0]), .Z(n_692));
notech_and4 i_488(.A(n_5333), .B(n_5484), .C(\io_add[2] ), .D(n_5324), .Z
(n_695));
notech_and4 i_343929(.A(\io_add[1] ), .B(\io_add[3] ), .C(n_8215), .D(n_695
), .Z(n_696));
notech_nand2 i_55(.A(n_696), .B(n_692), .Z(n_697));
notech_or4 i_486(.A(\io_add[9] ), .B(n_629), .C(n_649), .D(n_5335), .Z(n_701
));
notech_or4 i_343933(.A(\io_add[5] ), .B(\io_add[6] ), .C(n_659), .D(n_5467
), .Z(n_660));
notech_or4 i_465(.A(\io_add[8] ), .B(n_624), .C(n_606), .D(\io_add[6] ),
.Z(n_662));
notech_or4 i_343918(.A(\io_add[5] ), .B(n_662), .C(\io_add[0] ), .D(n_657
), .Z(n_664));
notech_or4 i_12(.A(superIO_idx[2]), .B(superIO_idx[3]), .C(superIO_idx[1
]), .D(n_5344), .Z(n_668));
notech_and2 i_46(.A(superIO_idx[6]), .B(n_5320), .Z(n_669));
notech_and4 i_183896(.A(superIO_idx[7]), .B(n_669), .C(superIO_idx[4]),
.D(n_5343), .Z(n_671));
notech_and3 i_458(.A(\io_add[1] ), .B(\io_add[3] ), .C(\io_add[0] ), .Z(n_673
notech_or4 i_343651(.A(n_701), .B(n_625), .C(n_635), .D(n_672), .Z(n_704
));
notech_nand3 i_343889(.A(n_615), .B(n_613), .C(n_673), .Z(n_675));
notech_or2 i_52(.A(n_5319), .B(n_675), .Z(n_676));
notech_and4 i_183903(.A(superIO_idx[7]), .B(n_669), .C(superIO_idx[4]),
.D(superIO_idx[0]), .Z(n_678));
notech_nand2 i_51(.A(n_5321), .B(n_678), .Z(n_679));
notech_and4 i_35(.A(n_550), .B(n_549), .C(n_292), .D(n_551), .Z(n_682)
notech_and4 i_183936(.A(superIO_idx[4]), .B(superIO_idx[7]), .C(n_691),
.D(n_5337), .Z(n_707));
notech_nand2 i_56(.A(n_696), .B(n_707), .Z(n_708));
notech_and4 i_16(.A(n_574), .B(n_573), .C(n_575), .D(n_589), .Z(n_710)
);
notech_nao3 i_37(.A(n_682), .B(n_552), .C(n_565), .Z(n_684));
notech_nao3 i_60(.A(n_5462), .B(n_5461), .C(bit_bang[2]), .Z(n_686));
notech_or4 i_67(.A(bit_bang[6]), .B(bit_bang[7]), .C(bit_bang[4]), .D(bit_bang
[5]), .Z(n_691));
notech_and4 i_22(.A(n_633), .B(n_648), .C(n_5329), .D(n_5336), .Z(n_697)
notech_nand3 i_18(.A(n_576), .B(n_710), .C(n_300), .Z(n_712));
notech_nao3 i_54(.A(n_5448), .B(n_5447), .C(bit_bang[2]), .Z(n_714));
notech_or4 i_64(.A(bit_bang[6]), .B(bit_bang[7]), .C(bit_bang[4]), .D(bit_bang
[5]), .Z(n_719));
notech_and3 i_468(.A(\io_add[8] ), .B(\io_add[6] ), .C(\io_add[5] ), .Z(n_722
));
notech_or4 i_344027(.A(n_639), .B(n_5333), .C(\io_add[4] ), .D(\io_add[3]
), .Z(n_725));
notech_nand2 i_79(.A(n_301), .B(n_725), .Z(n_726));
notech_nand3 i_472(.A(n_704), .B(n_675), .C(n_653), .Z(n_728));
notech_and4 i_8(.A(n_659), .B(n_655), .C(n_647), .D(n_569), .Z(n_731));
notech_and4 i_9(.A(n_731), .B(n_5313), .C(n_682), .D(n_5323), .Z(n_734)
);
notech_and4 i_33(.A(n_653), .B(n_697), .C(n_629), .D(n_622), .Z(n_699)
notech_and4 i_11(.A(n_685), .B(n_725), .C(n_734), .D(n_301), .Z(n_736)
);
notech_and3 i_448(.A(\io_add[3] ), .B(\io_add[5] ), .C(\io_add[6] ), .Z(n_702
notech_ao4 i_463(.A(n_675), .B(n_5379), .C(n_5327), .D(n_5477), .Z(n_737
));
notech_or4 i_38(.A(n_5054), .B(n_5321), .C(n_5322), .D(n_5323), .Z(n_706
notech_ao4 i_462(.A(n_675), .B(n_5378), .C(n_5327), .D(n_5476), .Z(n_738
));
notech_or2 i_56(.A(n_706), .B(n_5331), .Z(n_707));
notech_ao4 i_444(.A(n_648), .B(n_5382), .C(n_707), .D(n_5418), .Z(n_708)
);
notech_ao4 i_443(.A(n_648), .B(n_5381), .C(n_707), .D(n_5417), .Z(n_709)
);
notech_ao4 i_442(.A(n_648), .B(n_5380), .C(n_707), .D(n_5416), .Z(n_710)
);
notech_ao4 i_441(.A(n_648), .B(n_5379), .C(n_707), .D(n_5415), .Z(n_711)
);
notech_ao4 i_440(.A(n_648), .B(n_5378), .C(n_707), .D(n_5414), .Z(n_712)
);
notech_ao4 i_439(.A(n_648), .B(n_5377), .C(n_707), .D(n_5413), .Z(n_713)
);
notech_ao4 i_438(.A(n_648), .B(n_5376), .C(n_707), .D(n_5412), .Z(n_714)
);
notech_ao4 i_437(.A(n_648), .B(n_5375), .C(n_707), .D(n_5411), .Z(n_715)
);
notech_ao4 i_436(.A(n_648), .B(n_5374), .C(n_707), .D(n_5410), .Z(n_716)
);
notech_ao4 i_435(.A(n_648), .B(n_5373), .C(n_707), .D(n_5409), .Z(n_717)
);
notech_ao4 i_434(.A(n_648), .B(n_5372), .C(n_707), .D(n_5408), .Z(n_718)
);
notech_ao4 i_433(.A(n_648), .B(n_5371), .C(n_707), .D(n_5407), .Z(n_719)
);
notech_ao4 i_432(.A(n_648), .B(n_5370), .C(n_707), .D(n_5406), .Z(n_720)
);
notech_ao4 i_431(.A(n_648), .B(n_5369), .C(n_707), .D(n_5405), .Z(n_721)
);
notech_ao4 i_430(.A(n_648), .B(n_5368), .C(n_8024), .D(n_5404), .Z(n_722
notech_ao4 i_461(.A(n_675), .B(n_5377), .C(n_5327), .D(n_5475), .Z(n_739
));
notech_ao4 i_429(.A(n_8033), .B(n_5367), .C(n_8024), .D(n_5403), .Z(n_723
notech_ao4 i_460(.A(n_675), .B(n_5376), .C(n_5327), .D(n_5474), .Z(n_740
));
notech_ao4 i_428(.A(n_8033), .B(n_5366), .C(n_8024), .D(n_5402), .Z(n_724
notech_ao4 i_459(.A(n_675), .B(n_5375), .C(n_5327), .D(n_5473), .Z(n_741
));
notech_ao4 i_427(.A(n_8033), .B(n_5365), .C(n_8024), .D(n_5401), .Z(n_725
notech_ao4 i_458(.A(n_675), .B(n_5374), .C(n_5327), .D(n_5472), .Z(n_742
));
notech_ao4 i_426(.A(n_8033), .B(n_5364), .C(n_8024), .D(n_5400), .Z(n_726
notech_ao4 i_457(.A(n_675), .B(n_5373), .C(n_5327), .D(n_5471), .Z(n_743
));
notech_ao4 i_425(.A(n_8033), .B(n_5363), .C(n_8024), .D(n_5399), .Z(n_727
notech_ao4 i_456(.A(n_675), .B(n_5372), .C(n_5327), .D(n_5470), .Z(n_744
));
notech_ao4 i_424(.A(n_8033), .B(n_5362), .C(n_8024), .D(n_5398), .Z(n_728
notech_ao4 i_455(.A(n_675), .B(n_5371), .C(n_5327), .D(n_5469), .Z(n_745
));
notech_ao4 i_423(.A(n_8033), .B(n_5361), .C(n_8024), .D(n_5397), .Z(n_729
notech_ao4 i_454(.A(n_675), .B(n_5370), .C(n_5327), .D(n_5468), .Z(n_746
));
notech_ao4 i_422(.A(n_8033), .B(n_5360), .C(n_8024), .D(n_5396), .Z(n_730
notech_ao4 i_453(.A(n_675), .B(n_5369), .C(n_5327), .D(n_5467), .Z(n_747
));
notech_ao4 i_421(.A(n_8033), .B(n_5359), .C(n_8024), .D(n_5395), .Z(n_731
notech_ao4 i_452(.A(n_675), .B(n_5368), .C(n_5327), .D(n_5466), .Z(n_748
));
notech_or2 i_45(.A(superIO_idx[7]), .B(superIO_idx[4]), .Z(n_732));
notech_ao4 i_415(.A(n_679), .B(n_5460), .C(n_676), .D(n_5453), .Z(n_736)
notech_ao4 i_451(.A(n_675), .B(n_5367), .C(n_5327), .D(n_5465), .Z(n_749
));
notech_ao4 i_450(.A(n_675), .B(n_5366), .C(n_5327), .D(n_5464), .Z(n_750
));
notech_ao4 i_449(.A(n_675), .B(n_5365), .C(n_5327), .D(n_5463), .Z(n_751
));
notech_ao4 i_448(.A(n_675), .B(n_5364), .C(n_8042), .D(n_5462), .Z(n_752
));
notech_ao4 i_447(.A(n_8127), .B(n_5363), .C(n_8042), .D(n_5461), .Z(n_753
));
notech_ao4 i_446(.A(n_8127), .B(n_5362), .C(n_8042), .D(n_5460), .Z(n_754
));
notech_ao4 i_445(.A(n_8127), .B(n_5361), .C(n_8042), .D(n_5459), .Z(n_755
));
notech_ao4 i_444(.A(n_8127), .B(n_5360), .C(n_8042), .D(n_5458), .Z(n_756
));
notech_ao4 i_443(.A(n_8127), .B(n_5359), .C(n_8042), .D(n_5457), .Z(n_757
));
notech_ao4 i_442(.A(n_8127), .B(n_5358), .C(n_8042), .D(n_5456), .Z(n_758
));
notech_ao4 i_441(.A(n_8127), .B(n_5357), .C(n_8042), .D(n_5455), .Z(n_759
));
notech_ao4 i_440(.A(n_8127), .B(n_5356), .C(n_8042), .D(n_5454), .Z(n_760
));
notech_ao4 i_435(.A(n_697), .B(n_5425), .C(n_708), .D(n_5417), .Z(n_761)
);
notech_and3 i_417(.A(n_736), .B(n_5346), .C(n_496), .Z(n_737));
notech_ao4 i_413(.A(n_664), .B(n_5429), .C(n_660), .D(n_5390), .Z(n_738)
notech_nand2 i_46(.A(n_734), .B(n_5325), .Z(n_762));
notech_or4 i_7(.A(superIO_idx[2]), .B(superIO_idx[7]), .C(superIO_idx[4]
), .D(n_689), .Z(n_764));
notech_nao3 i_22(.A(superIO_idx[6]), .B(superIO_idx[0]), .C(n_764), .Z(n_766
));
notech_ao4 i_434(.A(n_5313), .B(n_766), .C(n_762), .D(n_5432), .Z(n_767)
);
notech_ao4 i_410(.A(n_629), .B(n_5440), .C(n_5335), .D(n_5470), .Z(n_741
notech_ao4 i_432(.A(n_685), .B(n_5440), .C(n_8042), .D(n_5453), .Z(n_769
));
notech_ao4 i_409(.A(n_8033), .B(n_5358), .C(n_622), .D(n_5434), .Z(n_742
));
notech_or4 i_173966(.A(n_668), .B(superIO_idx[6]), .C(n_732), .D(superIO_idx
[0]), .Z(n_746));
notech_ao4 i_407(.A(n_653), .B(n_5471), .C(n_746), .D(n_675), .Z(n_747)
notech_and4 i_437(.A(n_769), .B(n_767), .C(n_761), .D(n_516), .Z(n_771)
);
notech_and4 i_412(.A(n_486), .B(n_747), .C(n_742), .D(n_741), .Z(n_749)
notech_ao4 i_429(.A(n_301), .B(n_5487), .C(n_659), .D(n_5391), .Z(n_772)
);
notech_ao4 i_403(.A(n_676), .B(n_5452), .C(n_8024), .D(n_5394), .Z(n_750
notech_ao4 i_428(.A(n_647), .B(n_5396), .C(n_655), .D(n_5403), .Z(n_773)
);
notech_and2 i_50(.A(n_474), .B(n_338), .Z(n_777));
notech_ao4 i_426(.A(n_704), .B(n_5488), .C(n_8127), .D(n_5355), .Z(n_778
));
notech_or4 i_173973(.A(superIO_idx[6]), .B(n_668), .C(n_5343), .D(n_732)
, .Z(n_753));
notech_ao4 i_44(.A(n_753), .B(n_675), .C(n_7233), .D(n_706), .Z(n_754)
notech_and3 i_427(.A(n_474), .B(n_338), .C(n_778), .Z(n_779));
notech_ao4 i_422(.A(n_762), .B(n_5431), .C(n_334), .D(n_5313), .Z(n_781)
);
notech_ao4 i_401(.A(n_660), .B(n_5389), .C(n_754), .D(n_5331), .Z(n_755)
notech_ao4 i_420(.A(n_682), .B(n_5446), .C(n_685), .D(n_5439), .Z(n_783)
);
notech_and4 i_405(.A(n_755), .B(n_750), .C(n_480), .D(n_483), .Z(n_757)
notech_and4 i_424(.A(n_783), .B(n_781), .C(n_504), .D(n_507), .Z(n_785)
);
notech_ao4 i_398(.A(n_5472), .B(n_5335), .C(n_633), .D(n_5422), .Z(n_758
notech_ao4 i_417(.A(n_655), .B(n_5402), .C(n_301), .D(n_5489), .Z(n_786)
);
notech_ao4 i_415(.A(n_704), .B(n_5409), .C(n_8127), .D(n_5354), .Z(n_791
));
notech_ao4 i_396(.A(n_8033), .B(n_5357), .C(n_622), .D(n_5433), .Z(n_760
));
notech_and4 i_400(.A(n_760), .B(n_758), .C(n_474), .D(n_477), .Z(n_762)
notech_and3 i_416(.A(n_474), .B(n_337), .C(n_791), .Z(n_792));
notech_ao4 i_412(.A(n_762), .B(n_5430), .C(n_331), .D(n_5313), .Z(n_794)
);
notech_ao4 i_393(.A(n_676), .B(n_5451), .C(n_8024), .D(n_5393), .Z(n_763
notech_ao4 i_411(.A(n_685), .B(n_5438), .C(n_5452), .D(n_8042), .Z(n_795
));
notech_ao4 i_392(.A(n_754), .B(n_5331), .C(n_679), .D(n_5459), .Z(n_764)
notech_ao4 i_409(.A(n_653), .B(n_5490), .C(n_682), .D(n_5445), .Z(n_797)
);
notech_ao4 i_390(.A(n_664), .B(n_5428), .C(n_660), .D(n_5388), .Z(n_766)
notech_and4 i_414(.A(n_797), .B(n_795), .C(n_794), .D(n_492), .Z(n_799)
);
notech_and4 i_395(.A(n_766), .B(n_764), .C(n_763), .D(n_468), .Z(n_768)
notech_ao4 i_406(.A(n_655), .B(n_5401), .C(n_301), .D(n_5491), .Z(n_800)
);
notech_ao4 i_387(.A(n_5335), .B(n_5473), .C(n_633), .D(n_5421), .Z(n_769
notech_ao4 i_404(.A(n_704), .B(n_5408), .C(n_8127), .D(n_5353), .Z(n_802
));
notech_ao4 i_385(.A(n_8033), .B(n_5356), .C(n_622), .D(n_5432), .Z(n_771
));
notech_and4 i_389(.A(n_771), .B(n_769), .C(n_462), .D(n_465), .Z(n_773)
notech_and3 i_405(.A(n_474), .B(n_337), .C(n_802), .Z(n_803));
notech_ao4 i_400(.A(n_762), .B(n_5429), .C(n_328), .D(n_5313), .Z(n_805)
);
notech_reg s00_AXI_ARREADY_reg(.CP(n_8475), .D(n_4377), .CD(n_8179), .Q(s00_AXI_ARREADY
notech_ao4 i_399(.A(n_766), .B(n_5313), .C(n_8042), .D(n_5451), .Z(n_806
));
notech_mux2 i_6699(.S(n_6223), .A(s00_AXI_ARREADY), .B(n_600), .Z(n_4377
notech_reg s00_AXI_ARREADY_reg(.CP(n_8469), .D(n_4371), .CD(n_8509), .Q(s00_AXI_ARREADY
));
notech_reg io_add_reg_0(.CP(s00_AXI_CLK), .D(n_4383), .CD(n_8179), .Q(\io_add[0]
notech_mux2 i_6699(.S(n_6224), .A(s00_AXI_ARREADY), .B(n_624), .Z(n_4371
));
notech_mux2 i_6707(.S(\nbus_105[0] ), .A(\io_add[0] ), .B(n_6230), .Z(n_4383
notech_reg io_add_reg_0(.CP(s00_AXI_CLK), .D(n_4377), .CD(s00_AXI_RSTN),
.Q(\io_add[0] ));
notech_mux2 i_6707(.S(\nbus_104[0] ), .A(n_8215), .B(n_6231), .Z(n_4377)
);
notech_ao4 i_397(.A(n_682), .B(n_5444), .C(n_685), .D(n_5437), .Z(n_808)
);
notech_reg io_add_reg_1(.CP(s00_AXI_CLK), .D(n_4383), .CD(s00_AXI_RSTN),
.Q(\io_add[1] ));
notech_mux2 i_6715(.S(\nbus_104[0] ), .A(\io_add[1] ), .B(n_6237), .Z(n_4383
));
notech_reg io_add_reg_1(.CP(s00_AXI_CLK), .D(n_4389), .CD(n_8179), .Q(\io_add[1]
notech_reg io_add_reg_2(.CP(s00_AXI_CLK), .D(n_4389), .CD(s00_AXI_RSTN),
.Q(\io_add[2] ));
notech_mux2 i_6723(.S(\nbus_104[0] ), .A(\io_add[2] ), .B(n_6243), .Z(n_4389
));
notech_mux2 i_6715(.S(\nbus_105[0] ), .A(\io_add[1] ), .B(n_6236), .Z(n_4389
notech_and4 i_402(.A(n_808), .B(n_806), .C(n_805), .D(n_481), .Z(n_810)
);
notech_reg io_add_reg_3(.CP(n_8469), .D(n_4395), .CD(n_8509), .Q(\io_add[3]
));
notech_and4 i_382(.A(n_312), .B(n_458), .C(n_459), .D(n_5346), .Z(n_776)
notech_mux2 i_6731(.S(\nbus_104[0] ), .A(\io_add[3] ), .B(n_6249), .Z(n_4395
));
notech_ao4 i_394(.A(n_301), .B(n_5492), .C(n_659), .D(n_5390), .Z(n_811)
);
notech_reg io_add_reg_2(.CP(s00_AXI_CLK), .D(n_4395), .CD(n_8180), .Q(\io_add[2]
notech_reg io_add_reg_4(.CP(n_8469), .D(n_4401), .CD(n_8509), .Q(\io_add[4]
));
notech_mux2 i_6723(.S(\nbus_105[0] ), .A(\io_add[2] ), .B(n_6242), .Z(n_4395
notech_mux2 i_6739(.S(\nbus_104[0] ), .A(\io_add[4] ), .B(n_6255), .Z(n_4401
));
notech_ao4 i_378(.A(n_5329), .B(n_5474), .C(n_664), .D(n_5427), .Z(n_777
notech_ao4 i_393(.A(n_647), .B(n_5395), .C(n_655), .D(n_5400), .Z(n_812)
);
notech_reg io_add_reg_5(.CP(n_8469), .D(n_4407), .CD(n_8509), .Q(\io_add[5]
));
notech_reg io_add_reg_3(.CP(n_8475), .D(n_4401), .CD(n_8179), .Q(\io_add[3]
notech_mux2 i_6747(.S(\nbus_104[0] ), .A(\io_add[5] ), .B(n_6261), .Z(n_4407
));
notech_mux2 i_6731(.S(\nbus_105[0] ), .A(\io_add[3] ), .B(n_6248), .Z(n_4401
notech_reg io_add_reg_6(.CP(n_8469), .D(n_4413), .CD(n_8509), .Q(\io_add[6]
));
notech_reg io_add_reg_4(.CP(n_8475), .D(n_4407), .CD(n_8179), .Q(\io_add[4]
notech_mux2 i_6755(.S(\nbus_104[0] ), .A(\io_add[6] ), .B(n_6267), .Z(n_4413
));
notech_mux2 i_6739(.S(\nbus_105[0] ), .A(\io_add[4] ), .B(n_6254), .Z(n_4407
notech_ao4 i_391(.A(n_704), .B(n_5407), .C(n_8127), .D(n_5352), .Z(n_814
));
notech_reg io_add_reg_5(.CP(n_8475), .D(n_4413), .CD(n_8179), .Q(\io_add[5]
notech_reg io_add_reg_7(.CP(n_8469), .D(n_4419), .CD(n_8509), .Q(\io_add[7]
));
notech_mux2 i_6747(.S(\nbus_105[0] ), .A(\io_add[5] ), .B(n_6260), .Z(n_4413
notech_mux2 i_6763(.S(\nbus_104[0] ), .A(\io_add[7] ), .B(n_6273), .Z(n_4419
));
notech_ao4 i_375(.A(n_629), .B(n_5439), .C(n_5335), .D(n_5475), .Z(n_780
notech_reg io_add_reg_8(.CP(n_8469), .D(n_4425), .CD(n_8509), .Q(\io_add[8]
));
notech_reg io_add_reg_6(.CP(n_8475), .D(n_4419), .CD(n_8179), .Q(\io_add[6]
notech_mux2 i_6771(.S(\nbus_104[0] ), .A(\io_add[8] ), .B(n_6279), .Z(n_4425
));
notech_mux2 i_6755(.S(\nbus_105[0] ), .A(\io_add[6] ), .B(n_6266), .Z(n_4419
notech_and4 i_396(.A(n_474), .B(n_814), .C(n_812), .D(n_811), .Z(n_816)
);
notech_reg io_add_reg_9(.CP(n_8469), .D(n_4431), .CD(n_8509), .Q(\io_add[9]
));
notech_reg io_add_reg_7(.CP(n_8475), .D(n_4425), .CD(n_8179), .Q(\io_add[7]
notech_mux2 i_6779(.S(\nbus_104[0] ), .A(\io_add[9] ), .B(n_6285), .Z(n_4431
));
notech_mux2 i_6763(.S(\nbus_105[0] ), .A(\io_add[7] ), .B(n_6272), .Z(n_4425
notech_reg io_add_reg_10(.CP(n_8469), .D(n_4437), .CD(n_8509), .Q(\io_add[10]
));
notech_ao4 i_373(.A(n_653), .B(n_5445), .C(n_8033), .D(n_5355), .Z(n_782
notech_mux2 i_6787(.S(\nbus_104[0] ), .A(\io_add[10] ), .B(n_6291), .Z(n_4437
));
notech_reg io_add_reg_8(.CP(n_8475), .D(n_4431), .CD(n_8179), .Q(\io_add[8]
notech_ao4 i_43(.A(n_5496), .B(n_301), .C(n_685), .D(n_5436), .Z(n_818)
);
notech_reg io_add_reg_11(.CP(n_8485), .D(n_4443), .CD(n_8509), .Q(\io_add[11]
));
notech_mux2 i_6771(.S(\nbus_105[0] ), .A(\io_add[8] ), .B(n_6278), .Z(n_4431
notech_mux2 i_6795(.S(\nbus_104[0] ), .A(\io_add[11] ), .B(n_6297), .Z(n_4443
));
notech_reg io_add_reg_9(.CP(n_8475), .D(n_4437), .CD(n_8179), .Q(\io_add[9]
notech_nand2 i_388(.A(n_731), .B(n_470), .Z(n_819));
notech_reg io_add_reg_12(.CP(n_8485), .D(n_4449), .CD(n_8509), .Q(\io_add[12]
));
notech_mux2 i_6779(.S(\nbus_105[0] ), .A(\io_add[9] ), .B(n_6284), .Z(n_4437
notech_mux2 i_6803(.S(\nbus_104[0] ), .A(\io_add[12] ), .B(n_6303), .Z(n_4449
));
notech_and4 i_377(.A(n_486), .B(n_782), .C(n_780), .D(n_454), .Z(n_784)
notech_ao4 i_386(.A(n_659), .B(n_5389), .C(n_728), .D(n_819), .Z(n_820)
);
notech_reg io_add_reg_10(.CP(n_8475), .D(n_4443), .CD(n_8179), .Q(\io_add[10]
notech_reg io_add_reg_13(.CP(n_8485), .D(n_4455), .CD(n_8509), .Q(\io_add[13]
));
notech_mux2 i_6787(.S(\nbus_105[0] ), .A(\io_add[10] ), .B(n_6290), .Z(n_4443
notech_mux2 i_6811(.S(\nbus_104[0] ), .A(\io_add[13] ), .B(n_6309), .Z(n_4455
));
notech_reg io_add_reg_11(.CP(n_8491), .D(n_4449), .CD(n_8180), .Q(\io_add[11]
notech_reg io_add_reg_14(.CP(n_8485), .D(n_4461), .CD(n_8509), .Q(\io_add[14]
));
notech_mux2 i_6795(.S(\nbus_105[0] ), .A(\io_add[11] ), .B(n_6296), .Z(n_4449
notech_mux2 i_6819(.S(\nbus_104[0] ), .A(\io_add[14] ), .B(n_6315), .Z(n_4461
));
notech_nand3 i_371(.A(n_309), .B(n_448), .C(n_449), .Z(n_786));
notech_reg io_add_reg_12(.CP(n_8491), .D(n_4455), .CD(n_8180), .Q(\io_add[12]
notech_ao4 i_384(.A(n_8127), .B(n_5351), .C(n_647), .D(n_5394), .Z(n_822
));
notech_mux2 i_6803(.S(\nbus_105[0] ), .A(\io_add[12] ), .B(n_6302), .Z(n_4455
notech_reg io_add_reg_15(.CP(n_8485), .D(n_4467), .CD(n_8539), .Q(\io_add[15]
));
notech_ao4 i_368(.A(n_633), .B(n_5420), .C(n_664), .D(n_5426), .Z(n_787)
);
notech_reg io_add_reg_13(.CP(n_8491), .D(n_4461), .CD(n_8180), .Q(\io_add[13]
notech_mux2 i_6827(.S(\nbus_104[0] ), .A(\io_add[15] ), .B(n_6321), .Z(n_4467
));
notech_mux2 i_6811(.S(\nbus_105[0] ), .A(\io_add[13] ), .B(n_6308), .Z(n_4461
notech_reg s00_AXI_WREADY_reg(.CP(n_8485), .D(n_623), .CD(n_8507), .Q(s00_AXI_WREADY
));
notech_reg io_add_reg_14(.CP(n_8491), .D(n_4467), .CD(n_8180), .Q(\io_add[14]
notech_reg_set writeio_data_reg_0(.CP(n_8485), .D(n_4475), .SD(AMBIT_VDD
), .Q(writeio_data[0]));
notech_mux2 i_6839(.S(n_8521), .A(writeio_data[0]), .B(n_591), .Z(n_4475
));
notech_mux2 i_6819(.S(\nbus_105[0] ), .A(\io_add[14] ), .B(n_6314), .Z(n_4467
notech_reg_set writeio_data_reg_1(.CP(n_8485), .D(n_4481), .SD(AMBIT_VDD
), .Q(writeio_data[1]));
notech_mux2 i_6847(.S(n_8521), .A(writeio_data[1]), .B(n_592), .Z(n_4481
));
notech_reg io_add_reg_15(.CP(n_8491), .D(n_4473), .CD(n_8180), .Q(\io_add[15]
notech_ao3 i_382(.A(n_311), .B(n_462), .C(n_463), .Z(n_825));
notech_reg_set writeio_data_reg_2(.CP(n_8485), .D(n_4487), .SD(AMBIT_VDD
), .Q(writeio_data[2]));
notech_mux2 i_6855(.S(n_8521), .A(writeio_data[2]), .B(n_593), .Z(n_4487
));
notech_mux2 i_6827(.S(\nbus_105[0] ), .A(\io_add[15] ), .B(n_6320), .Z(n_4473
));
notech_ao4 i_365(.A(n_622), .B(n_5431), .C(n_629), .D(n_5438), .Z(n_790)
notech_ao4 i_379(.A(n_682), .B(n_5443), .C(n_685), .D(n_5435), .Z(n_826)
);
notech_reg s00_AXI_WREADY_reg(.CP(n_8491), .D(n_599), .CD(n_8180), .Q(s00_AXI_WREADY
notech_reg_set writeio_data_reg_3(.CP(n_8485), .D(n_4493), .SD(AMBIT_VDD
), .Q(writeio_data[3]));
notech_mux2 i_6863(.S(n_8521), .A(writeio_data[3]), .B(n_594), .Z(n_4493
));
notech_reg_set writeio_data_reg_0(.CP(n_8491), .D(n_4481), .SD(1'b1), .Q
(writeio_data[0]));
notech_mux2 i_6839(.S(n_8180), .A(writeio_data[0]), .B(n_566), .Z(n_4481
notech_reg_set writeio_data_reg_4(.CP(n_8485), .D(n_4499), .SD(AMBIT_VDD
), .Q(writeio_data[4]));
notech_mux2 i_6871(.S(n_8521), .A(writeio_data[4]), .B(n_595), .Z(n_4499
));
notech_reg_set writeio_data_reg_1(.CP(n_8491), .D(n_4487), .SD(1'b1), .Q
(writeio_data[1]));
notech_mux2 i_6847(.S(n_8180), .A(writeio_data[1]), .B(n_567), .Z(n_4487
notech_reg_set writeio_data_reg_5(.CP(n_8485), .D(n_4505), .SD(AMBIT_VDD
), .Q(writeio_data[5]));
notech_mux2 i_6879(.S(n_8521), .A(writeio_data[5]), .B(n_596), .Z(n_4505
));
notech_ao4 i_364(.A(n_7233), .B(n_8024), .C(n_653), .D(n_5444), .Z(n_792
notech_ao4 i_376(.A(n_655), .B(n_5399), .C(n_301), .D(n_5493), .Z(n_829)
);
notech_reg_set writeio_data_reg_6(.CP(n_8485), .D(n_4511), .SD(AMBIT_VDD
), .Q(writeio_data[6]));
notech_mux2 i_6887(.S(n_8521), .A(writeio_data[6]), .B(n_597), .Z(n_4511
));
notech_reg_set writeio_data_reg_2(.CP(n_8491), .D(n_4493), .SD(1'b1), .Q
(writeio_data[2]));
notech_mux2 i_6855(.S(n_8180), .A(writeio_data[2]), .B(n_568), .Z(n_4493
notech_reg_set writeio_data_reg_7(.CP(n_8485), .D(n_4517), .SD(AMBIT_VDD
), .Q(writeio_data[7]));
notech_mux2 i_6895(.S(n_8521), .A(writeio_data[7]), .B(n_598), .Z(n_4517
));
notech_nao3 i_367(.A(n_790), .B(n_792), .C(n_444), .Z(n_793));
notech_reg_set writeio_data_reg_3(.CP(n_8491), .D(n_4499), .SD(1'b1), .Q
(writeio_data[3]));
notech_mux2 i_6863(.S(n_8180), .A(writeio_data[3]), .B(n_569), .Z(n_4499
notech_ao4 i_374(.A(n_704), .B(n_5406), .C(n_8127), .D(n_5350), .Z(n_831
));
notech_reg_set writeio_data_reg_4(.CP(n_8491), .D(n_4505), .SD(1'b1), .Q
(writeio_data[4]));
notech_mux2 i_6871(.S(n_8180), .A(writeio_data[4]), .B(n_570), .Z(n_4505
notech_reg_set writeio_data_reg_8(.CP(n_8485), .D(n_4523), .SD(AMBIT_VDD
), .Q(writeio_data[8]));
notech_mux2 i_6903(.S(n_8507), .A(writeio_data[8]), .B(n_599), .Z(n_4523
));
notech_and3 i_362(.A(n_306), .B(n_439), .C(n_440), .Z(n_795));
notech_reg_set writeio_data_reg_5(.CP(n_8491), .D(n_4511), .SD(1'b1), .Q
(writeio_data[5]));
notech_mux2 i_6879(.S(n_8180), .A(writeio_data[5]), .B(n_571), .Z(n_4511
notech_reg_set writeio_data_reg_9(.CP(n_8485), .D(n_4529), .SD(AMBIT_VDD
), .Q(writeio_data[9]));
notech_mux2 i_6911(.S(n_8521), .A(writeio_data[9]), .B(n_600), .Z(n_4529
));
notech_ao4 i_359(.A(n_633), .B(n_5419), .C(n_664), .D(n_5425), .Z(n_796)
notech_and4 i_378(.A(n_831), .B(n_829), .C(n_777), .D(n_458), .Z(n_833)
);
notech_reg_set writeio_data_reg_6(.CP(n_8491), .D(n_4517), .SD(1'b1), .Q
(writeio_data[6]));
notech_mux2 i_6887(.S(n_8179), .A(writeio_data[6]), .B(n_572), .Z(n_4517
notech_reg_set writeio_data_reg_10(.CP(n_8485), .D(n_4535), .SD(
AMBIT_VDD), .Q(writeio_data[10]));
notech_mux2 i_6919(.S(n_8521), .A(writeio_data[10]), .B(n_601), .Z(n_4535
));
notech_reg_set writeio_data_reg_7(.CP(n_8491), .D(n_4523), .SD(1'b1), .Q
(writeio_data[7]));
notech_mux2 i_6895(.S(n_8175), .A(writeio_data[7]), .B(n_573), .Z(n_4523
notech_reg_set writeio_data_reg_11(.CP(n_8485), .D(n_4541), .SD(
AMBIT_VDD), .Q(writeio_data[11]));
notech_mux2 i_6927(.S(n_8521), .A(writeio_data[11]), .B(n_602), .Z(n_4541
));
notech_reg_set writeio_data_reg_8(.CP(n_8491), .D(n_4529), .SD(1'b1), .Q
(writeio_data[8]));
notech_mux2 i_6903(.S(n_8175), .A(writeio_data[8]), .B(n_574), .Z(n_4529
notech_reg_set writeio_data_reg_12(.CP(n_8485), .D(n_4547), .SD(
AMBIT_VDD), .Q(writeio_data[12]));
notech_mux2 i_6935(.S(n_8521), .A(writeio_data[12]), .B(n_603), .Z(n_4547
));
notech_ao4 i_356(.A(n_622), .B(n_5430), .C(n_629), .D(n_5437), .Z(n_799)
);
notech_reg_set writeio_data_reg_9(.CP(n_8491), .D(n_4535), .SD(1'b1), .Q
(writeio_data[9]));
notech_mux2 i_6911(.S(n_8175), .A(writeio_data[9]), .B(n_575), .Z(n_4535
notech_ao4 i_369(.A(n_8042), .B(n_5450), .C(n_762), .D(n_5427), .Z(n_836
));
notech_reg_set writeio_data_reg_10(.CP(n_8491), .D(n_4541), .SD(1'b1), .Q
(writeio_data[10]));
notech_mux2 i_6919(.S(n_8175), .A(writeio_data[10]), .B(n_576), .Z(n_4541
notech_reg_set writeio_data_reg_13(.CP(n_8499), .D(n_4553), .SD(
AMBIT_VDD), .Q(writeio_data[13]));
notech_mux2 i_6943(.S(n_8521), .A(writeio_data[13]), .B(n_604), .Z(n_4553
));
notech_ao4 i_354(.A(n_746), .B(n_675), .C(n_653), .D(n_5443), .Z(n_801)
notech_and4 i_371(.A(n_338), .B(n_308), .C(n_453), .D(n_836), .Z(n_837)
);
notech_reg_set writeio_data_reg_11(.CP(n_8491), .D(n_4547), .SD(1'b1), .Q
(writeio_data[11]));
notech_mux2 i_6927(.S(n_8175), .A(writeio_data[11]), .B(n_577), .Z(n_4547
notech_reg_set writeio_data_reg_14(.CP(n_8483), .D(n_4559), .SD(
AMBIT_VDD), .Q(writeio_data[14]));
notech_mux2 i_6951(.S(n_8521), .A(writeio_data[14]), .B(n_605), .Z(n_4559
));
notech_reg_set writeio_data_reg_12(.CP(n_8491), .D(n_4553), .SD(1'b1), .Q
(writeio_data[12]));
notech_mux2 i_6935(.S(n_8175), .A(writeio_data[12]), .B(n_578), .Z(n_4553
));
notech_and4 i_358(.A(n_486), .B(n_801), .C(n_799), .D(n_435), .Z(n_803)
notech_ao4 i_367(.A(n_682), .B(n_5442), .C(n_685), .D(n_5434), .Z(n_838)
);
notech_reg_set writeio_data_reg_13(.CP(n_8505), .D(n_4559), .SD(1'b1), .Q
(writeio_data[13]));
notech_mux2 i_6943(.S(n_8174), .A(writeio_data[13]), .B(n_579), .Z(n_4559
notech_reg_set writeio_data_reg_15(.CP(n_8483), .D(n_4565), .SD(
AMBIT_VDD), .Q(writeio_data[15]));
notech_mux2 i_6959(.S(n_8507), .A(writeio_data[15]), .B(n_606), .Z(n_4565
));
notech_reg_set writeio_data_reg_14(.CP(n_8489), .D(n_4565), .SD(1'b1), .Q
(writeio_data[14]));
notech_mux2 i_6951(.S(n_8174), .A(writeio_data[14]), .B(n_580), .Z(n_4565
notech_reg_set writeio_data_reg_16(.CP(n_8483), .D(n_4571), .SD(
AMBIT_VDD), .Q(writeio_data[16]));
notech_mux2 i_6967(.S(n_8521), .A(writeio_data[16]), .B(n_607), .Z(n_4571
));
notech_ao4 i_349(.A(n_5392), .B(n_8024), .C(n_300), .D(n_675), .Z(n_805)
notech_reg_set writeio_data_reg_17(.CP(n_8499), .D(n_4577), .SD(
AMBIT_VDD), .Q(writeio_data[17]));
notech_mux2 i_6975(.S(n_8507), .A(writeio_data[17]), .B(n_608), .Z(n_4577
));
notech_ao4 i_364(.A(n_301), .B(n_5494), .C(n_659), .D(n_5388), .Z(n_841)
);
notech_reg_set writeio_data_reg_15(.CP(n_8489), .D(n_4571), .SD(1'b1), .Q
(writeio_data[15]));
notech_mux2 i_6959(.S(n_8174), .A(writeio_data[15]), .B(n_581), .Z(n_4571
notech_reg_set writeio_data_reg_18(.CP(n_8499), .D(n_4583), .SD(
AMBIT_VDD), .Q(writeio_data[18]));
notech_mux2 i_6983(.S(n_8507), .A(writeio_data[18]), .B(n_609), .Z(n_4583
));
notech_reg_set writeio_data_reg_16(.CP(n_8489), .D(n_4577), .SD(1'b1), .Q
(writeio_data[16]));
notech_mux2 i_6967(.S(n_8175), .A(writeio_data[16]), .B(n_582), .Z(n_4577
));
notech_ao4 i_347(.A(n_5476), .B(n_5329), .C(n_664), .D(n_5424), .Z(n_807
));
notech_reg_set writeio_data_reg_17(.CP(n_8505), .D(n_4583), .SD(1'b1), .Q
(writeio_data[17]));
notech_mux2 i_6975(.S(n_8175), .A(writeio_data[17]), .B(n_583), .Z(n_4583
));
notech_reg_set writeio_data_reg_18(.CP(n_8505), .D(n_4589), .SD(1'b1), .Q
(writeio_data[18]));
notech_mux2 i_6983(.S(n_8175), .A(writeio_data[18]), .B(n_584), .Z(n_4589
));
notech_and4 i_351(.A(n_807), .B(n_805), .C(n_428), .D(n_431), .Z(n_809)
notech_ao4 i_363(.A(n_647), .B(n_5393), .C(n_655), .D(n_5398), .Z(n_842)
);
notech_reg_set writeio_data_reg_19(.CP(n_8505), .D(n_4595), .SD(1'b1), .Q
(writeio_data[19]));
notech_mux2 i_6991(.S(n_8179), .A(writeio_data[19]), .B(n_585), .Z(n_4595
notech_reg_set writeio_data_reg_19(.CP(n_8499), .D(n_4589), .SD(
AMBIT_VDD), .Q(writeio_data[19]));
notech_mux2 i_6991(.S(n_8507), .A(writeio_data[19]), .B(n_610), .Z(n_4589
));
notech_ao4 i_344(.A(n_629), .B(n_5436), .C(n_5335), .D(n_5477), .Z(n_810
notech_reg_set writeio_data_reg_20(.CP(n_8499), .D(n_4595), .SD(
AMBIT_VDD), .Q(writeio_data[20]));
notech_mux2 i_6999(.S(n_8507), .A(writeio_data[20]), .B(n_611), .Z(n_4595
));
notech_reg_set writeio_data_reg_20(.CP(n_8505), .D(n_4601), .SD(1'b1), .Q
(writeio_data[20]));
notech_mux2 i_6999(.S(n_8179), .A(writeio_data[20]), .B(n_586), .Z(n_4601
notech_ao4 i_361(.A(n_704), .B(n_5405), .C(n_8127), .D(n_5349), .Z(n_844
));
notech_reg_set writeio_data_reg_21(.CP(n_8505), .D(n_4607), .SD(1'b1), .Q
(writeio_data[21]));
notech_mux2 i_7007(.S(n_8179), .A(writeio_data[21]), .B(n_587), .Z(n_4607
notech_reg_set writeio_data_reg_21(.CP(n_8499), .D(n_4601), .SD(
AMBIT_VDD), .Q(writeio_data[21]));
notech_mux2 i_7007(.S(n_8507), .A(writeio_data[21]), .B(n_612), .Z(n_4601
));
notech_ao4 i_342(.A(n_653), .B(n_5442), .C(n_8033), .D(n_5354), .Z(n_812
notech_reg_set writeio_data_reg_22(.CP(n_8499), .D(n_4607), .SD(
AMBIT_VDD), .Q(writeio_data[22]));
notech_mux2 i_7015(.S(n_8507), .A(writeio_data[22]), .B(n_613), .Z(n_4607
));
notech_reg_set writeio_data_reg_22(.CP(n_8505), .D(n_4613), .SD(1'b1), .Q
(writeio_data[22]));
notech_mux2 i_7015(.S(n_8179), .A(writeio_data[22]), .B(n_588), .Z(n_4613
));
notech_reg_set writeio_data_reg_23(.CP(n_8505), .D(n_4619), .SD(1'b1), .Q
(writeio_data[23]));
notech_mux2 i_7023(.S(n_8179), .A(writeio_data[23]), .B(n_589), .Z(n_4619
));
notech_and4 i_346(.A(n_486), .B(n_812), .C(n_810), .D(n_425), .Z(n_814)
notech_and4 i_366(.A(n_474), .B(n_844), .C(n_842), .D(n_841), .Z(n_846)
);
notech_reg_set writeio_data_reg_24(.CP(n_8505), .D(n_4625), .SD(1'b1), .Q
(writeio_data[24]));
notech_mux2 i_7031(.S(n_8179), .A(writeio_data[24]), .B(n_590), .Z(n_4625
notech_reg_set writeio_data_reg_23(.CP(n_8499), .D(n_4613), .SD(
AMBIT_VDD), .Q(writeio_data[23]));
notech_mux2 i_7023(.S(n_8507), .A(writeio_data[23]), .B(n_614), .Z(n_4613
));
notech_ao4 i_341(.A(n_679), .B(n_5454), .C(n_676), .D(n_5446), .Z(n_815)
notech_ao4 i_358(.A(n_697), .B(n_5418), .C(n_708), .D(n_5410), .Z(n_847)
);
notech_reg_set writeio_data_reg_25(.CP(n_8505), .D(n_4631), .SD(1'b1), .Q
(writeio_data[25]));
notech_mux2 i_7039(.S(n_8175), .A(writeio_data[25]), .B(n_591), .Z(n_4631
notech_reg_set writeio_data_reg_24(.CP(n_8499), .D(n_4619), .SD(
AMBIT_VDD), .Q(writeio_data[24]));
notech_mux2 i_7031(.S(n_8507), .A(writeio_data[24]), .B(n_615), .Z(n_4619
));
notech_reg_set writeio_data_reg_26(.CP(n_8505), .D(n_4637), .SD(1'b1), .Q
(writeio_data[26]));
notech_mux2 i_7047(.S(n_8175), .A(writeio_data[26]), .B(n_592), .Z(n_4637
notech_ao4 i_357(.A(n_8042), .B(n_5449), .C(n_762), .D(n_5426), .Z(n_848
));
notech_ao4 i_337(.A(n_8024), .B(n_5391), .C(n_299), .D(n_5331), .Z(n_817
notech_reg_set writeio_data_reg_25(.CP(n_8499), .D(n_4625), .SD(
AMBIT_VDD), .Q(writeio_data[25]));
notech_mux2 i_7039(.S(n_8507), .A(writeio_data[25]), .B(n_616), .Z(n_4625
));
notech_reg_set writeio_data_reg_27(.CP(n_8505), .D(n_4643), .SD(1'b1), .Q
(writeio_data[27]));
notech_mux2 i_7055(.S(n_8175), .A(writeio_data[27]), .B(n_593), .Z(n_4643
notech_reg_set writeio_data_reg_26(.CP(n_8499), .D(n_4631), .SD(
AMBIT_VDD), .Q(writeio_data[26]));
notech_mux2 i_7047(.S(n_8507), .A(writeio_data[26]), .B(n_617), .Z(n_4631
));
notech_reg_set writeio_data_reg_28(.CP(n_8489), .D(n_4649), .SD(1'b1), .Q
(writeio_data[28]));
notech_mux2 i_7063(.S(n_8179), .A(writeio_data[28]), .B(n_594), .Z(n_4649
notech_ao4 i_355(.A(n_682), .B(n_5441), .C(n_685), .D(n_5433), .Z(n_850)
);
notech_reg_set writeio_data_reg_27(.CP(n_8499), .D(n_4637), .SD(
AMBIT_VDD), .Q(writeio_data[27]));
notech_mux2 i_7055(.S(n_8507), .A(writeio_data[27]), .B(n_618), .Z(n_4637
));
notech_ao4 i_335(.A(n_5329), .B(n_5478), .C(n_664), .D(n_5423), .Z(n_819
notech_reg_set writeio_data_reg_28(.CP(n_8483), .D(n_4643), .SD(
AMBIT_VDD), .Q(writeio_data[28]));
notech_mux2 i_7063(.S(n_8507), .A(writeio_data[28]), .B(n_619), .Z(n_4643
));
notech_reg_set writeio_data_reg_29(.CP(n_8489), .D(n_4655), .SD(1'b1), .Q
(writeio_data[29]));
notech_mux2 i_7071(.S(n_8175), .A(writeio_data[29]), .B(n_595), .Z(n_4655
notech_and3 i_356(.A(n_337), .B(n_850), .C(n_435), .Z(n_852));
notech_reg_set writeio_data_reg_29(.CP(n_8483), .D(n_4649), .SD(
AMBIT_VDD), .Q(writeio_data[29]));
notech_mux2 i_7071(.S(n_8507), .A(writeio_data[29]), .B(n_620), .Z(n_4649
));
notech_reg_set writeio_data_reg_30(.CP(n_8489), .D(n_4661), .SD(1'b1), .Q
(writeio_data[30]));
notech_mux2 i_7079(.S(n_8175), .A(writeio_data[30]), .B(n_596), .Z(n_4661
notech_reg_set writeio_data_reg_30(.CP(n_8483), .D(n_4655), .SD(
AMBIT_VDD), .Q(writeio_data[30]));
notech_mux2 i_7079(.S(n_8507), .A(writeio_data[30]), .B(n_621), .Z(n_4655
));
notech_and4 i_339(.A(n_819), .B(n_817), .C(n_415), .D(n_418), .Z(n_821)
notech_ao4 i_351(.A(n_301), .B(n_5495), .C(n_659), .D(n_5387), .Z(n_854)
);
notech_reg_set writeio_data_reg_31(.CP(n_8489), .D(n_4667), .SD(1'b1), .Q
(writeio_data[31]));
notech_mux2 i_7087(.S(n_8180), .A(writeio_data[31]), .B(n_597), .Z(n_4667
notech_reg_set writeio_data_reg_31(.CP(n_8483), .D(n_4661), .SD(
AMBIT_VDD), .Q(writeio_data[31]));
notech_mux2 i_7087(.S(n_8507), .A(writeio_data[31]), .B(n_622), .Z(n_4661
));
notech_ao4 i_332(.A(n_629), .B(n_5435), .C(n_5335), .D(n_5479), .Z(n_822
notech_ao4 i_350(.A(n_647), .B(n_5392), .C(n_655), .D(n_5397), .Z(n_855)
);
notech_reg s00_AXI_AWREADY_reg(.CP(n_8483), .D(n_4667), .CD(n_8507), .Q(s00_AXI_AWREADY
));
notech_reg s00_AXI_AWREADY_reg(.CP(n_8489), .D(n_4673), .CD(n_8183), .Q(s00_AXI_AWREADY
notech_mux2 i_7095(.S(n_7628), .A(s00_AXI_AWREADY), .B(n_5332), .Z(n_4667
));
notech_mux2 i_7095(.S(n_7569), .A(s00_AXI_AWREADY), .B(n_5339), .Z(n_4673
));
notech_reg superIO_idx_reg_0(.CP(n_8489), .D(n_4679), .CD(n_8183), .Q(superIO_idx
notech_reg int_reg_reg_0(.CP(n_8483), .D(int_bus[0]), .CD(n_8509), .Q(int_reg
[0]));
notech_mux2 i_7103(.S(n_5383), .A(writeio_data[0]), .B(superIO_idx[0]),
.Z(n_4679));
notech_ao4 i_331(.A(n_653), .B(n_5441), .C(n_8033), .D(n_5353), .Z(n_824
notech_reg int_reg_reg_1(.CP(n_8483), .D(int_bus[1]), .CD(n_8525), .Q(int_reg
[1]));
notech_reg int_reg_reg_2(.CP(n_8483), .D(int_bus[2]), .CD(n_8525), .Q(int_reg
[2]));
notech_reg int_reg_reg_3(.CP(n_8469), .D(int_bus[3]), .CD(n_8525), .Q(int_reg
[3]));
notech_reg superIO_idx_reg_0(.CP(n_8469), .D(n_4681), .CD(n_8525), .Q(superIO_idx
[0]));
notech_mux2 i_7119(.S(n_589), .A(writeio_data[0]), .B(superIO_idx[0]), .Z
(n_4681));
notech_ao4 i_348(.A(n_704), .B(n_5404), .C(n_8127), .D(n_5348), .Z(n_857
));
notech_reg superIO_idx_reg_1(.CP(n_8489), .D(n_4685), .CD(n_8183), .Q(superIO_idx
notech_reg superIO_idx_reg_1(.CP(n_8469), .D(n_4687), .CD(n_8525), .Q(superIO_idx
[1]));
notech_mux2 i_7111(.S(n_5383), .A(writeio_data[1]), .B(superIO_idx[1]),
.Z(n_4685));
notech_reg superIO_idx_reg_2(.CP(n_8489), .D(n_4691), .CD(n_8184), .Q(superIO_idx
notech_mux2 i_7127(.S(n_589), .A(writeio_data[1]), .B(superIO_idx[1]), .Z
(n_4687));
notech_reg superIO_idx_reg_2(.CP(n_8483), .D(n_4693), .CD(n_8525), .Q(superIO_idx
[2]));
notech_mux2 i_7119(.S(n_5383), .A(writeio_data[2]), .B(superIO_idx[2]),
.Z(n_4691));
notech_and2 i_330(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_826));
notech_reg superIO_idx_reg_3(.CP(n_8475), .D(n_4697), .CD(n_8184), .Q(superIO_idx
notech_mux2 i_7135(.S(n_589), .A(writeio_data[2]), .B(superIO_idx[2]), .Z
(n_4693));
notech_and4 i_353(.A(n_857), .B(n_777), .C(n_855), .D(n_854), .Z(n_859)
);
notech_reg superIO_idx_reg_3(.CP(n_8487), .D(n_4699), .CD(n_8525), .Q(superIO_idx
[3]));
notech_mux2 i_7127(.S(n_5383), .A(writeio_data[3]), .B(superIO_idx[3]),
.Z(n_4697));
notech_reg superIO_idx_reg_4(.CP(n_8475), .D(n_4703), .CD(n_8184), .Q(superIO_idx
notech_mux2 i_7143(.S(n_589), .A(writeio_data[3]), .B(superIO_idx[3]), .Z
(n_4699));
notech_and2 i_347(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_860));
notech_reg superIO_idx_reg_4(.CP(n_8471), .D(n_4705), .CD(n_8525), .Q(superIO_idx
[4]));
notech_mux2 i_7135(.S(n_5383), .A(writeio_data[4]), .B(superIO_idx[4]),
.Z(n_4703));
notech_reg superIO_idx_reg_5(.CP(n_8475), .D(n_4709), .CD(n_8183), .Q(superIO_idx
notech_mux2 i_7151(.S(n_589), .A(writeio_data[4]), .B(superIO_idx[4]), .Z
(n_4705));
notech_reg superIO_idx_reg_5(.CP(n_8471), .D(n_4711), .CD(n_8525), .Q(superIO_idx
[5]));
notech_mux2 i_7143(.S(n_5383), .A(writeio_data[5]), .B(superIO_idx[5]),
.Z(n_4709));
notech_mux2 i_7159(.S(n_589), .A(writeio_data[5]), .B(superIO_idx[5]), .Z
(n_4711));
notech_reg superIO_idx_reg_6(.CP(n_8471), .D(n_4717), .CD(n_8525), .Q(superIO_idx
[6]));
notech_mux2 i_7167(.S(n_589), .A(writeio_data[6]), .B(superIO_idx[6]), .Z
(n_4717));
notech_or2 i_3482(.A(bit_bang_sclk), .B(\gpio_out[1] ), .Z(spi_clk));
notech_reg superIO_idx_reg_6(.CP(n_8489), .D(n_4715), .CD(n_8183), .Q(superIO_idx
[6]));
notech_mux2 i_7151(.S(n_5383), .A(writeio_data[6]), .B(superIO_idx[6]),
.Z(n_4715));
notech_or2 i_3719(.A(n_600), .B(n_5339), .Z(\nbus_105[0] ));
notech_reg superIO_idx_reg_7(.CP(n_8493), .D(n_4721), .CD(n_8183), .Q(superIO_idx
notech_reg superIO_idx_reg_7(.CP(n_8471), .D(n_4723), .CD(n_8525), .Q(superIO_idx
[7]));
notech_mux2 i_7159(.S(n_5383), .A(writeio_data[7]), .B(superIO_idx[7]),
.Z(n_4721));
notech_nand2 i_2(.A(s00_AXI_AWVALID), .B(n_5481), .Z(n_6223));
notech_reg div_clke_reg_0(.CP(n_8477), .D(n_5345), .CD(n_8183), .Q(div_clke
notech_mux2 i_7175(.S(n_589), .A(writeio_data[7]), .B(superIO_idx[7]), .Z
(n_4723));
notech_or2 i_3701(.A(n_624), .B(n_5332), .Z(\nbus_104[0] ));
notech_reg div_clke_reg_0(.CP(n_8471), .D(n_5341), .CD(n_8525), .Q(div_clke
[0]));
notech_reg div_clke_reg_1(.CP(n_8477), .D(n_5348), .CD(n_8183), .Q(div_clke
notech_reg div_clke_reg_1(.CP(n_8471), .D(n_5343), .CD(n_8525), .Q(div_clke
[1]));
notech_reg div_clke_reg_2(.CP(n_8477), .D(n_555), .CD(n_8183), .Q(div_clke
notech_reg div_clke_reg_2(.CP(n_8471), .D(n_579), .CD(n_8525), .Q(div_clke
[2]));
notech_reg div_clke_reg_3(.CP(n_8477), .D(n_6732), .CD(n_8184), .Q(div_clke
notech_reg div_clke_reg_3(.CP(n_8471), .D(n_6836), .CD(n_8525), .Q(div_clke
[3]));
notech_reg div_clke_reg_4(.CP(n_8477), .D(n_4735), .CD(n_8184), .Q(div_clke
notech_reg div_clke_reg_4(.CP(n_8471), .D(n_4737), .CD(n_8525), .Q(div_clke
[4]));
notech_ao3 i_7183(.A(n_294), .B(n_5463), .C(n_365), .Z(n_4735));
notech_reg div_clke_reg_5(.CP(n_8477), .D(n_4737), .CD(n_8184), .Q(div_clke
notech_ao3 i_7199(.A(n_303), .B(n_5499), .C(n_386), .Z(n_4737));
notech_reg div_clke_reg_5(.CP(n_8471), .D(n_4739), .CD(n_8525), .Q(div_clke
[5]));
notech_ao3 i_7187(.A(n_293), .B(n_5463), .C(n_365), .Z(n_4737));
notech_reg int_reg_reg_0(.CP(n_8477), .D(int_bus[0]), .CD(n_8184), .Q(int_reg
notech_ao3 i_7203(.A(n_302), .B(n_5499), .C(n_386), .Z(n_4739));
notech_reg bit_bang_reg_0(.CP(n_8471), .D(n_4741), .CD(n_8525), .Q(bit_bang
[0]));
notech_reg int_reg_reg_1(.CP(n_8477), .D(int_bus[1]), .CD(n_8184), .Q(int_reg
notech_mux2 i_7207(.S(n_5347), .A(bit_bang[0]), .B(n_572), .Z(n_4741));
notech_nand2 i_2(.A(s00_AXI_AWVALID), .B(n_5498), .Z(n_6224));
notech_reg bit_bang_reg_1(.CP(n_8471), .D(n_4747), .CD(n_8525), .Q(bit_bang
[1]));
notech_reg int_reg_reg_2(.CP(n_8477), .D(int_bus[2]), .CD(n_8184), .Q(int_reg
notech_mux2 i_7215(.S(n_5347), .A(bit_bang[1]), .B(n_577), .Z(n_4747));
notech_nao3 i_4400(.A(s00_AXI_ARVALID), .B(n_6224), .C(s00_AXI_ARREADY),
.Z(n_7628));
notech_reg bit_bang_reg_2(.CP(n_8471), .D(n_4753), .CD(n_8539), .Q(bit_bang
[2]));
notech_reg int_reg_reg_3(.CP(n_8477), .D(int_bus[3]), .CD(n_8184), .Q(int_reg
[3]));
notech_reg bit_bang_reg_0(.CP(n_8477), .D(n_4747), .CD(n_8184), .Q(bit_bang
[0]));
notech_mux2 i_7207(.S(n_5352), .A(bit_bang[0]), .B(n_548), .Z(n_4747));
notech_nao3 i_4387(.A(s00_AXI_ARVALID), .B(n_6223), .C(s00_AXI_ARREADY),
.Z(n_7569));
notech_reg bit_bang_reg_1(.CP(n_8477), .D(n_4753), .CD(n_8184), .Q(bit_bang
[1]));
notech_mux2 i_7215(.S(n_5352), .A(bit_bang[1]), .B(n_553), .Z(n_4753));
notech_ao4 i_4208(.A(n_8033), .B(n_8196), .C(n_684), .D(n_5338), .Z(\nbus_119[0]
notech_mux2 i_7223(.S(n_5347), .A(bit_bang[2]), .B(n_578), .Z(n_4753));
notech_ao4 i_4158(.A(n_8127), .B(n_8200), .C(n_712), .D(n_5331), .Z(\nbus_117[0]
));
notech_reg bit_bang_reg_2(.CP(n_8477), .D(n_4759), .CD(n_8184), .Q(bit_bang
[2]));
notech_mux2 i_7223(.S(n_5352), .A(bit_bang[2]), .B(n_554), .Z(n_4759));
notech_mux2 i_161430(.S(n_6223), .A(s00_AXI_AWADDR[17]), .B(s00_AXI_ARADDR
[17]), .Z(n_6320));
notech_reg bit_bang_reg_3(.CP(n_8477), .D(n_4765), .CD(n_8184), .Q(bit_bang
notech_reg bit_bang_reg_3(.CP(n_8471), .D(n_4759), .CD(n_8523), .Q(bit_bang
[3]));
notech_mux2 i_7231(.S(n_5352), .A(bit_bang[3]), .B(n_7202), .Z(n_4765)
notech_mux2 i_7231(.S(n_5347), .A(bit_bang[3]), .B(n_7128), .Z(n_4759)
);
notech_mux2 i_151429(.S(n_6223), .A(s00_AXI_AWADDR[16]), .B(s00_AXI_ARADDR
[16]), .Z(n_6314));
notech_reg bit_bang_reg_4(.CP(n_8495), .D(n_4771), .CD(n_8184), .Q(bit_bang
notech_mux2 i_161442(.S(n_6224), .A(s00_AXI_AWADDR[17]), .B(s00_AXI_ARADDR
[17]), .Z(n_6321));
notech_reg bit_bang_reg_4(.CP(n_8489), .D(n_4765), .CD(n_8539), .Q(bit_bang
[4]));
notech_mux2 i_7239(.S(n_5352), .A(bit_bang[4]), .B(n_7208), .Z(n_4771)
notech_mux2 i_7239(.S(n_5347), .A(bit_bang[4]), .B(n_7134), .Z(n_4765)
);
notech_mux2 i_141428(.S(n_6223), .A(s00_AXI_AWADDR[15]), .B(s00_AXI_ARADDR
[15]), .Z(n_6308));
notech_reg bit_bang_reg_5(.CP(n_8495), .D(n_4777), .CD(n_8183), .Q(bit_bang
notech_mux2 i_151441(.S(n_6224), .A(s00_AXI_AWADDR[16]), .B(s00_AXI_ARADDR
[16]), .Z(n_6315));
notech_reg bit_bang_reg_5(.CP(n_8489), .D(n_4771), .CD(n_8539), .Q(bit_bang
[5]));
notech_mux2 i_7247(.S(n_5352), .A(bit_bang[5]), .B(n_7214), .Z(n_4777)
notech_mux2 i_7247(.S(n_5347), .A(bit_bang[5]), .B(n_7140), .Z(n_4771)
);
notech_mux2 i_131427(.S(n_6223), .A(s00_AXI_AWADDR[14]), .B(s00_AXI_ARADDR
[14]), .Z(n_6302));
notech_reg bit_bang_reg_6(.CP(n_8495), .D(n_4783), .CD(n_8182), .Q(bit_bang
notech_mux2 i_141440(.S(n_6224), .A(s00_AXI_AWADDR[15]), .B(s00_AXI_ARADDR
[15]), .Z(n_6309));
notech_reg bit_bang_reg_6(.CP(n_8489), .D(n_4777), .CD(n_8539), .Q(bit_bang
[6]));
notech_mux2 i_7255(.S(n_5352), .A(bit_bang[6]), .B(n_7220), .Z(n_4783)
notech_mux2 i_7255(.S(n_5347), .A(bit_bang[6]), .B(n_7146), .Z(n_4777)
);
notech_mux2 i_121426(.S(n_6223), .A(s00_AXI_AWADDR[13]), .B(s00_AXI_ARADDR
[13]), .Z(n_6296));
notech_reg bit_bang_reg_7(.CP(n_8495), .D(n_4789), .CD(n_8182), .Q(bit_bang
notech_mux2 i_131439(.S(n_6224), .A(s00_AXI_AWADDR[14]), .B(s00_AXI_ARADDR
[14]), .Z(n_6303));
notech_reg bit_bang_reg_7(.CP(n_8489), .D(n_4783), .CD(n_8509), .Q(bit_bang
[7]));
notech_mux2 i_7263(.S(n_5352), .A(bit_bang[7]), .B(n_7226), .Z(n_4789)
notech_mux2 i_7263(.S(n_5347), .A(bit_bang[7]), .B(n_7152), .Z(n_4783)
);
notech_mux2 i_111425(.S(n_6223), .A(s00_AXI_AWADDR[12]), .B(s00_AXI_ARADDR
[12]), .Z(n_6290));
notech_reg bit_bang_reg_8(.CP(n_8495), .D(n_4795), .CD(n_8182), .Q(bit_bang
notech_mux2 i_121438(.S(n_6224), .A(s00_AXI_AWADDR[13]), .B(s00_AXI_ARADDR
[13]), .Z(n_6297));
notech_reg bit_bang_reg_8(.CP(n_8489), .D(n_4789), .CD(n_8539), .Q(bit_bang
[8]));
notech_mux2 i_7271(.S(n_5352), .A(bit_bang[8]), .B(n_7232), .Z(n_4795)
notech_mux2 i_7271(.S(n_5347), .A(bit_bang[8]), .B(n_7158), .Z(n_4789)
);
notech_mux2 i_101424(.S(n_6223), .A(s00_AXI_AWADDR[11]), .B(s00_AXI_ARADDR
[11]), .Z(n_6284));
notech_reg bit_bang_shift_reg_0(.CP(n_8495), .D(n_4801), .CD(n_8182), .Q
notech_mux2 i_111437(.S(n_6224), .A(s00_AXI_AWADDR[12]), .B(s00_AXI_ARADDR
[12]), .Z(n_6291));
notech_reg bit_bang_shift_reg_0(.CP(n_8489), .D(n_4795), .CD(n_8539), .Q
(bit_bang_shift[0]));
notech_mux2 i_7279(.S(n_546), .A(spi_miso), .B(bit_bang_shift[0]), .Z(n_4801
notech_mux2 i_7279(.S(n_570), .A(spi_miso), .B(bit_bang_shift[0]), .Z(n_4795
));
notech_mux2 i_91423(.S(n_6223), .A(s00_AXI_AWADDR[10]), .B(s00_AXI_ARADDR
[10]), .Z(n_6278));
notech_reg bit_bang_shift_reg_1(.CP(n_8495), .D(n_4807), .CD(n_8182), .Q
notech_mux2 i_101436(.S(n_6224), .A(s00_AXI_AWADDR[11]), .B(s00_AXI_ARADDR
[11]), .Z(n_6285));
notech_reg bit_bang_shift_reg_1(.CP(n_8489), .D(n_4801), .CD(n_8539), .Q
(bit_bang_shift[1]));
notech_mux2 i_7287(.S(n_546), .A(bit_bang_shift[0]), .B(bit_bang_shift[1
notech_mux2 i_7287(.S(n_570), .A(bit_bang_shift[0]), .B(bit_bang_shift[1
]), .Z(n_4801));
notech_mux2 i_91435(.S(n_6224), .A(s00_AXI_AWADDR[10]), .B(s00_AXI_ARADDR
[10]), .Z(n_6279));
notech_reg bit_bang_shift_reg_2(.CP(n_8489), .D(n_4807), .CD(n_8539), .Q
(bit_bang_shift[2]));
notech_mux2 i_7295(.S(n_570), .A(bit_bang_shift[1]), .B(bit_bang_shift[2
]), .Z(n_4807));
notech_mux2 i_81422(.S(n_6223), .A(s00_AXI_AWADDR[9]), .B(s00_AXI_ARADDR
[9]), .Z(n_6272));
notech_reg bit_bang_shift_reg_2(.CP(n_8495), .D(n_4813), .CD(n_8182), .Q
(bit_bang_shift[2]));
notech_mux2 i_7295(.S(n_546), .A(bit_bang_shift[1]), .B(bit_bang_shift[2
notech_mux2 i_81434(.S(n_6224), .A(s00_AXI_AWADDR[9]), .B(s00_AXI_ARADDR
[9]), .Z(n_6273));
notech_reg bit_bang_shift_reg_3(.CP(n_8489), .D(n_4813), .CD(n_8539), .Q
(bit_bang_shift[3]));
notech_mux2 i_7303(.S(n_570), .A(bit_bang_shift[2]), .B(bit_bang_shift[3
]), .Z(n_4813));
notech_mux2 i_71421(.S(n_6223), .A(s00_AXI_AWADDR[8]), .B(s00_AXI_ARADDR
[8]), .Z(n_6266));
notech_reg bit_bang_shift_reg_3(.CP(n_8495), .D(n_4819), .CD(n_8180), .Q
(bit_bang_shift[3]));
notech_mux2 i_7303(.S(n_546), .A(bit_bang_shift[2]), .B(bit_bang_shift[3
notech_mux2 i_71433(.S(n_6224), .A(s00_AXI_AWADDR[8]), .B(s00_AXI_ARADDR
[8]), .Z(n_6267));
notech_reg bit_bang_shift_reg_4(.CP(n_8489), .D(n_4819), .CD(n_8539), .Q
(bit_bang_shift[4]));
notech_mux2 i_7311(.S(n_570), .A(bit_bang_shift[3]), .B(bit_bang_shift[4
]), .Z(n_4819));
notech_mux2 i_61420(.S(n_6223), .A(s00_AXI_AWADDR[7]), .B(s00_AXI_ARADDR
[7]), .Z(n_6260));
notech_reg bit_bang_shift_reg_4(.CP(n_8495), .D(n_4825), .CD(n_8180), .Q
(bit_bang_shift[4]));
notech_mux2 i_7311(.S(n_546), .A(bit_bang_shift[3]), .B(bit_bang_shift[4
notech_mux2 i_61432(.S(n_6224), .A(s00_AXI_AWADDR[7]), .B(s00_AXI_ARADDR
[7]), .Z(n_6261));
notech_reg bit_bang_shift_reg_5(.CP(n_8489), .D(n_4825), .CD(n_8539), .Q
(bit_bang_shift[5]));
notech_mux2 i_7319(.S(n_570), .A(bit_bang_shift[4]), .B(bit_bang_shift[5
]), .Z(n_4825));
notech_mux2 i_5(.S(n_6223), .A(s00_AXI_AWADDR[6]), .B(s00_AXI_ARADDR[6])
, .Z(n_6254));
notech_reg bit_bang_shift_reg_5(.CP(n_8495), .D(n_4831), .CD(n_8180), .Q
(bit_bang_shift[5]));
notech_mux2 i_7319(.S(n_546), .A(bit_bang_shift[4]), .B(bit_bang_shift[5
notech_mux2 i_5(.S(n_6224), .A(s00_AXI_AWADDR[6]), .B(s00_AXI_ARADDR[6])
, .Z(n_6255));
notech_reg bit_bang_shift_reg_6(.CP(n_8489), .D(n_4831), .CD(n_8539), .Q
(bit_bang_shift[6]));
notech_mux2 i_7327(.S(n_570), .A(bit_bang_shift[5]), .B(bit_bang_shift[6
]), .Z(n_4831));
notech_mux2 i_4(.S(n_6223), .A(s00_AXI_AWADDR[5]), .B(s00_AXI_ARADDR[5])
, .Z(n_6248));
notech_reg bit_bang_shift_reg_6(.CP(n_8495), .D(n_4837), .CD(n_8180), .Q
(bit_bang_shift[6]));
notech_mux2 i_7327(.S(n_546), .A(bit_bang_shift[5]), .B(bit_bang_shift[6
notech_mux2 i_4(.S(n_6224), .A(s00_AXI_AWADDR[5]), .B(s00_AXI_ARADDR[5])
, .Z(n_6249));
notech_reg bit_bang_shift_reg_7(.CP(n_8489), .D(n_4837), .CD(n_8539), .Q
(bit_bang_shift[7]));
notech_mux2 i_7335(.S(n_570), .A(bit_bang_shift[6]), .B(bit_bang_shift[7
]), .Z(n_4837));
notech_mux2 i_3(.S(n_6223), .A(s00_AXI_AWADDR[4]), .B(s00_AXI_ARADDR[4])
, .Z(n_6242));
notech_reg bit_bang_shift_reg_7(.CP(n_8495), .D(n_4843), .CD(n_8180), .Q
(bit_bang_shift[7]));
notech_mux2 i_7335(.S(n_546), .A(bit_bang_shift[6]), .B(bit_bang_shift[7
notech_mux2 i_3(.S(n_6224), .A(s00_AXI_AWADDR[4]), .B(s00_AXI_ARADDR[4])
, .Z(n_6243));
notech_reg bit_bang_shift_reg_8(.CP(n_8489), .D(n_4843), .CD(n_8539), .Q
(bit_bang_shift[8]));
notech_mux2 i_7343(.S(n_570), .A(bit_bang_shift[7]), .B(bit_bang_shift[8
]), .Z(n_4843));
notech_mux2 i_21419(.S(n_6223), .A(s00_AXI_AWADDR[3]), .B(s00_AXI_ARADDR
[3]), .Z(n_6236));
notech_reg bit_bang_shift_reg_8(.CP(n_8495), .D(n_4849), .CD(n_8180), .Q
(bit_bang_shift[8]));
notech_mux2 i_7343(.S(n_546), .A(bit_bang_shift[7]), .B(bit_bang_shift[8
notech_mux2 i_21431(.S(n_6224), .A(s00_AXI_AWADDR[3]), .B(s00_AXI_ARADDR
[3]), .Z(n_6237));
notech_reg bit_bang_shift_reg_9(.CP(n_8489), .D(n_4849), .CD(n_8539), .Q
(bit_bang_shift[9]));
notech_mux2 i_7351(.S(n_570), .A(bit_bang_shift[8]), .B(bit_bang_shift[9
]), .Z(n_4849));
notech_mux2 i_1(.S(n_6223), .A(s00_AXI_AWADDR[2]), .B(s00_AXI_ARADDR[2])
, .Z(n_6230));
notech_reg bit_bang_shift_reg_9(.CP(n_8495), .D(n_4855), .CD(n_8183), .Q
(bit_bang_shift[9]));
notech_mux2 i_7351(.S(n_546), .A(bit_bang_shift[8]), .B(bit_bang_shift[9
]), .Z(n_4855));
notech_xor2 i_41973(.A(div_clke[3]), .B(n_639), .Z(n_6732));
notech_reg bit_bang_shift_reg_10(.CP(n_8495), .D(n_4861), .CD(n_8182), .Q
notech_mux2 i_1(.S(n_6224), .A(s00_AXI_AWADDR[2]), .B(s00_AXI_ARADDR[2])
, .Z(n_6231));
notech_reg bit_bang_shift_reg_10(.CP(n_8489), .D(n_4855), .CD(n_8539), .Q
(bit_bang_shift[10]));
notech_mux2 i_7359(.S(n_546), .A(bit_bang_shift[9]), .B(bit_bang_shift[
10]), .Z(n_4861));
notech_ao4 i_21971(.A(div_clke[0]), .B(n_5347), .C(n_365), .D(n_636), .Z
(n_6718));
notech_reg bit_bang_shift_reg_11(.CP(n_8495), .D(n_4867), .CD(n_8182), .Q
notech_mux2 i_7359(.S(n_570), .A(bit_bang_shift[9]), .B(bit_bang_shift[
10]), .Z(n_4855));
notech_xor2 i_42016(.A(div_clke[3]), .B(n_665), .Z(n_6836));
notech_reg bit_bang_shift_reg_11(.CP(n_8489), .D(n_4861), .CD(n_8539), .Q
(bit_bang_shift[11]));
notech_mux2 i_7367(.S(n_546), .A(bit_bang_shift[10]), .B(bit_bang_shift[
11]), .Z(n_4867));
notech_mux2 i_92566(.S(n_649), .A(writeio_data[5]), .B(bit_bang_0[8]), .Z
(n_7232));
notech_reg bit_bang_shift_reg_12(.CP(n_8495), .D(n_4873), .CD(n_8183), .Q
notech_mux2 i_7367(.S(n_570), .A(bit_bang_shift[10]), .B(bit_bang_shift[
11]), .Z(n_4861));
notech_ao4 i_22014(.A(div_clke[0]), .B(n_5342), .C(n_386), .D(n_662), .Z
(n_6822));
notech_reg bit_bang_shift_reg_12(.CP(n_8489), .D(n_4867), .CD(n_8539), .Q
(bit_bang_shift[12]));
notech_mux2 i_7375(.S(n_546), .A(bit_bang_shift[11]), .B(bit_bang_shift[
12]), .Z(n_4873));
notech_mux2 i_82565(.S(n_649), .A(writeio_data[4]), .B(bit_bang_0[7]), .Z
(n_7226));
notech_reg bit_bang_shift_reg_13(.CP(n_8495), .D(n_4879), .CD(n_8183), .Q
notech_mux2 i_7375(.S(n_570), .A(bit_bang_shift[11]), .B(bit_bang_shift[
12]), .Z(n_4867));
notech_mux2 i_92609(.S(n_676), .A(writeio_data[5]), .B(bit_bang_0[8]), .Z
(n_7158));
notech_reg bit_bang_shift_reg_13(.CP(n_8489), .D(n_4873), .CD(n_8523), .Q
(bit_bang_shift[13]));
notech_mux2 i_7383(.S(n_546), .A(bit_bang_shift[12]), .B(bit_bang_shift[
13]), .Z(n_4879));
notech_mux2 i_72564(.S(n_649), .A(writeio_data[3]), .B(bit_bang_0[6]), .Z
(n_7220));
notech_reg bit_bang_shift_reg_14(.CP(n_8507), .D(n_4885), .CD(n_8183), .Q
notech_mux2 i_7383(.S(n_570), .A(bit_bang_shift[12]), .B(bit_bang_shift[
13]), .Z(n_4873));
notech_mux2 i_82608(.S(n_676), .A(writeio_data[4]), .B(bit_bang_0[7]), .Z
(n_7152));
notech_reg bit_bang_shift_reg_14(.CP(n_8501), .D(n_4879), .CD(n_8523), .Q
(bit_bang_shift[14]));
notech_mux2 i_7391(.S(n_546), .A(bit_bang_shift[13]), .B(bit_bang_shift[
14]), .Z(n_4885));
notech_mux2 i_62563(.S(n_649), .A(writeio_data[2]), .B(bit_bang_0[5]), .Z
(n_7214));
notech_reg bit_bang_shift_reg_15(.CP(n_8493), .D(n_4891), .CD(n_8182), .Q
notech_mux2 i_7391(.S(n_570), .A(bit_bang_shift[13]), .B(bit_bang_shift[
14]), .Z(n_4879));
notech_mux2 i_72607(.S(n_676), .A(writeio_data[3]), .B(bit_bang_0[6]), .Z
(n_7146));
notech_reg bit_bang_shift_reg_15(.CP(n_8487), .D(n_4885), .CD(n_8523), .Q
(bit_bang_shift[15]));
notech_mux2 i_7399(.S(n_546), .A(bit_bang_shift[14]), .B(bit_bang_shift[
15]), .Z(n_4891));
notech_mux2 i_52562(.S(n_649), .A(writeio_data[1]), .B(bit_bang_0[4]), .Z
(n_7208));
notech_reg bit_bang_shift_reg_16(.CP(n_8507), .D(n_4897), .CD(n_8182), .Q
notech_mux2 i_7399(.S(n_570), .A(bit_bang_shift[14]), .B(bit_bang_shift[
15]), .Z(n_4885));
notech_mux2 i_62606(.S(n_676), .A(writeio_data[2]), .B(bit_bang_0[5]), .Z
(n_7140));
notech_reg bit_bang_shift_reg_16(.CP(n_8501), .D(n_4891), .CD(n_8523), .Q
(bit_bang_shift[16]));
notech_mux2 i_7407(.S(n_7963), .A(bit_bang_shift[15]), .B(bit_bang_shift
[16]), .Z(n_4897));
notech_mux2 i_42561(.S(n_649), .A(writeio_data[0]), .B(bit_bang_0[3]), .Z
(n_7202));
notech_reg bit_bang_shift_reg_17(.CP(n_8507), .D(n_4903), .CD(n_8182), .Q
notech_mux2 i_7407(.S(n_7981), .A(bit_bang_shift[15]), .B(bit_bang_shift
[16]), .Z(n_4891));
notech_mux2 i_52605(.S(n_676), .A(writeio_data[1]), .B(bit_bang_0[4]), .Z
(n_7134));
notech_reg bit_bang_shift_reg_17(.CP(n_8501), .D(n_4897), .CD(n_8523), .Q
(bit_bang_shift[17]));
notech_mux2 i_7415(.S(n_7963), .A(bit_bang_shift[16]), .B(bit_bang_shift
[17]), .Z(n_4903));
notech_mux2 i_221216(.S(gpioA_dir[0]), .A(gpioA_in[0]), .B(superIOa[0]),
.Z(n_6762));
notech_reg bit_bang_shift_reg_18(.CP(n_8507), .D(n_4909), .CD(n_8182), .Q
notech_mux2 i_7415(.S(n_7981), .A(bit_bang_shift[16]), .B(bit_bang_shift
[17]), .Z(n_4897));
notech_mux2 i_42604(.S(n_676), .A(writeio_data[0]), .B(bit_bang_0[3]), .Z
(n_7128));
notech_reg bit_bang_shift_reg_18(.CP(n_8501), .D(n_4903), .CD(n_8523), .Q
(bit_bang_shift[18]));
notech_mux2 i_7423(.S(n_7963), .A(bit_bang_shift[17]), .B(bit_bang_shift
[18]), .Z(n_4909));
notech_mux2 i_231217(.S(gpioA_dir[1]), .A(gpioA_in[1]), .B(superIOa[1]),
.Z(n_6769));
notech_reg bit_bang_shift_reg_19(.CP(n_8507), .D(n_4915), .CD(n_8182), .Q
notech_mux2 i_7423(.S(n_7981), .A(bit_bang_shift[17]), .B(bit_bang_shift
[18]), .Z(n_4903));
notech_mux2 i_221228(.S(gpioA_dir[0]), .A(gpioA_in[0]), .B(superIOa[0]),
.Z(n_7165));
notech_reg bit_bang_shift_reg_19(.CP(n_8501), .D(n_4909), .CD(n_8523), .Q
(bit_bang_shift[19]));
notech_mux2 i_7431(.S(n_7963), .A(bit_bang_shift[18]), .B(bit_bang_shift
[19]), .Z(n_4915));
notech_mux2 i_241218(.S(gpioA_dir[2]), .A(gpioA_in[2]), .B(superIOa[2]),
.Z(n_6776));
notech_reg bit_bang_shift_reg_20(.CP(n_8507), .D(n_4921), .CD(n_8182), .Q
notech_mux2 i_7431(.S(n_7981), .A(bit_bang_shift[18]), .B(bit_bang_shift
[19]), .Z(n_4909));
notech_mux2 i_231229(.S(gpioA_dir[1]), .A(gpioA_in[1]), .B(superIOa[1]),
.Z(n_7172));
notech_reg bit_bang_shift_reg_20(.CP(n_8501), .D(n_4915), .CD(n_8523), .Q
(bit_bang_shift[20]));
notech_mux2 i_7439(.S(n_7963), .A(bit_bang_shift[19]), .B(bit_bang_shift
[20]), .Z(n_4921));
notech_mux2 i_251219(.S(gpioA_dir[3]), .A(gpioA_in[3]), .B(superIOa[3]),
.Z(n_6783));
notech_reg bit_bang_shift_reg_21(.CP(n_8507), .D(n_4927), .CD(n_8168), .Q
notech_mux2 i_7439(.S(n_7981), .A(bit_bang_shift[19]), .B(bit_bang_shift
[20]), .Z(n_4915));
notech_mux2 i_241230(.S(gpioA_dir[2]), .A(gpioA_in[2]), .B(superIOa[2]),
.Z(n_7179));
notech_reg bit_bang_shift_reg_21(.CP(n_8501), .D(n_4921), .CD(n_8523), .Q
(bit_bang_shift[21]));
notech_mux2 i_7447(.S(n_7963), .A(bit_bang_shift[20]), .B(bit_bang_shift
[21]), .Z(n_4927));
notech_mux2 i_261220(.S(gpioA_dir[4]), .A(gpioA_in[4]), .B(superIOa[4]),
.Z(n_6790));
notech_reg bit_bang_shift_reg_22(.CP(n_8507), .D(n_4933), .CD(n_8168), .Q
notech_mux2 i_7447(.S(n_7981), .A(bit_bang_shift[20]), .B(bit_bang_shift
[21]), .Z(n_4921));
notech_mux2 i_251231(.S(gpioA_dir[3]), .A(gpioA_in[3]), .B(superIOa[3]),
.Z(n_7186));
notech_reg bit_bang_shift_reg_22(.CP(n_8501), .D(n_4927), .CD(n_8523), .Q
(bit_bang_shift[22]));
notech_mux2 i_7455(.S(n_7963), .A(bit_bang_shift[21]), .B(bit_bang_shift
[22]), .Z(n_4933));
notech_mux2 i_271221(.S(gpioA_dir[5]), .A(gpioA_in[5]), .B(superIOa[5]),
.Z(n_6797));
notech_reg bit_bang_shift_reg_23(.CP(n_8507), .D(n_4939), .CD(n_8168), .Q
notech_mux2 i_7455(.S(n_7981), .A(bit_bang_shift[21]), .B(bit_bang_shift
[22]), .Z(n_4927));
notech_mux2 i_261232(.S(gpioA_dir[4]), .A(gpioA_in[4]), .B(superIOa[4]),
.Z(n_7193));
notech_reg bit_bang_shift_reg_23(.CP(n_8501), .D(n_4933), .CD(n_8523), .Q
(bit_bang_shift[23]));
notech_mux2 i_7463(.S(n_7963), .A(bit_bang_shift[22]), .B(bit_bang_shift
[23]), .Z(n_4939));
notech_mux2 i_281222(.S(gpioA_dir[6]), .A(gpioA_in[6]), .B(superIOa[6]),
.Z(n_6804));
notech_reg bit_bang_shift_reg_24(.CP(n_8507), .D(n_4945), .CD(n_8168), .Q
notech_mux2 i_7463(.S(n_7981), .A(bit_bang_shift[22]), .B(bit_bang_shift
[23]), .Z(n_4933));
notech_mux2 i_271233(.S(gpioA_dir[5]), .A(gpioA_in[5]), .B(superIOa[5]),
.Z(n_7200));
notech_reg bit_bang_shift_reg_24(.CP(n_8501), .D(n_4939), .CD(n_8523), .Q
(bit_bang_shift[24]));
notech_mux2 i_7471(.S(n_7963), .A(bit_bang_shift[23]), .B(bit_bang_shift
[24]), .Z(n_4945));
notech_mux2 i_291223(.S(gpioA_dir[7]), .A(gpioA_in[7]), .B(superIOa[7]),
.Z(n_6811));
notech_reg bit_bang_shift_reg_25(.CP(n_8507), .D(n_4951), .CD(n_8168), .Q
notech_mux2 i_7471(.S(n_7981), .A(bit_bang_shift[23]), .B(bit_bang_shift
[24]), .Z(n_4939));
notech_mux2 i_281234(.S(gpioA_dir[6]), .A(gpioA_in[6]), .B(superIOa[6]),
.Z(n_7207));
notech_reg bit_bang_shift_reg_25(.CP(n_8501), .D(n_4945), .CD(n_8523), .Q
(bit_bang_shift[25]));
notech_mux2 i_7479(.S(n_7963), .A(bit_bang_shift[24]), .B(bit_bang_shift
[25]), .Z(n_4951));
notech_mux2 i_221248(.S(gpioB_dir[0]), .A(gpioB_in[0]), .B(superIOb[0]),
.Z(n_7122));
notech_reg bit_bang_shift_reg_26(.CP(n_8507), .D(n_4958), .CD(n_8168), .Q
notech_mux2 i_7479(.S(n_7981), .A(bit_bang_shift[24]), .B(bit_bang_shift
[25]), .Z(n_4945));
notech_mux2 i_291235(.S(gpioA_dir[7]), .A(gpioA_in[7]), .B(superIOa[7]),
.Z(n_7214));
notech_reg bit_bang_shift_reg_26(.CP(n_8501), .D(n_4951), .CD(n_8523), .Q
(bit_bang_shift[26]));
notech_mux2 i_7487(.S(n_7963), .A(bit_bang_shift[25]), .B(bit_bang_shift
[26]), .Z(n_4958));
notech_mux2 i_231249(.S(gpioB_dir[1]), .A(gpioB_in[1]), .B(superIOb[1]),
.Z(n_7129));
notech_reg bit_bang_shift_reg_27(.CP(n_8507), .D(n_4964), .CD(n_8167), .Q
notech_mux2 i_7487(.S(n_7981), .A(bit_bang_shift[25]), .B(bit_bang_shift
[26]), .Z(n_4951));
notech_mux2 i_221260(.S(gpioB_dir[0]), .A(gpioB_in[0]), .B(superIOb[0]),
.Z(n_7047));
notech_reg bit_bang_shift_reg_27(.CP(n_8501), .D(n_4958), .CD(n_8523), .Q
(bit_bang_shift[27]));
notech_mux2 i_7495(.S(n_7963), .A(bit_bang_shift[26]), .B(bit_bang_shift
[27]), .Z(n_4964));
notech_mux2 i_241250(.S(gpioB_dir[2]), .A(gpioB_in[2]), .B(superIOb[2]),
.Z(n_7136));
notech_reg bit_bang_shift_reg_28(.CP(n_8507), .D(n_4970), .CD(n_8167), .Q
notech_mux2 i_7495(.S(n_7981), .A(bit_bang_shift[26]), .B(bit_bang_shift
[27]), .Z(n_4958));
notech_mux2 i_231261(.S(gpioB_dir[1]), .A(gpioB_in[1]), .B(superIOb[1]),
.Z(n_7054));
notech_reg bit_bang_shift_reg_28(.CP(n_8501), .D(n_4964), .CD(n_8509), .Q
(bit_bang_shift[28]));
notech_mux2 i_7503(.S(n_7963), .A(bit_bang_shift[27]), .B(bit_bang_shift
[28]), .Z(n_4970));
notech_mux2 i_251251(.S(gpioB_dir[3]), .A(gpioB_in[3]), .B(superIOb[3]),
.Z(n_7143));
notech_reg bit_bang_shift_reg_29(.CP(n_8507), .D(n_4976), .CD(n_8167), .Q
notech_mux2 i_7503(.S(n_7981), .A(bit_bang_shift[27]), .B(bit_bang_shift
[28]), .Z(n_4964));
notech_mux2 i_241262(.S(gpioB_dir[2]), .A(gpioB_in[2]), .B(superIOb[2]),
.Z(n_7061));
notech_reg bit_bang_shift_reg_29(.CP(n_8501), .D(n_4970), .CD(n_8523), .Q
(bit_bang_shift[29]));
notech_mux2 i_7511(.S(n_7963), .A(bit_bang_shift[28]), .B(bit_bang_shift
[29]), .Z(n_4976));
notech_mux2 i_261252(.S(gpioB_dir[4]), .A(gpioB_in[4]), .B(superIOb[4]),
.Z(n_7150));
notech_reg bit_bang_shift_reg_30(.CP(n_8507), .D(n_4982), .CD(n_8168), .Q
notech_mux2 i_7511(.S(n_7981), .A(bit_bang_shift[28]), .B(bit_bang_shift
[29]), .Z(n_4970));
notech_mux2 i_251263(.S(gpioB_dir[3]), .A(gpioB_in[3]), .B(superIOb[3]),
.Z(n_7068));
notech_reg bit_bang_shift_reg_30(.CP(n_8501), .D(n_4976), .CD(n_8527), .Q
(bit_bang_shift[30]));
notech_mux2 i_7519(.S(n_7963), .A(bit_bang_shift[29]), .B(bit_bang_shift
[30]), .Z(n_4982));
notech_mux2 i_271253(.S(gpioB_dir[5]), .A(gpioB_in[5]), .B(superIOb[5]),
.Z(n_7157));
notech_reg bit_bang_shift_reg_31(.CP(n_8507), .D(n_4988), .CD(n_8168), .Q
notech_mux2 i_7519(.S(n_7981), .A(bit_bang_shift[29]), .B(bit_bang_shift
[30]), .Z(n_4976));
notech_mux2 i_261264(.S(gpioB_dir[4]), .A(gpioB_in[4]), .B(superIOb[4]),
.Z(n_7075));
notech_reg bit_bang_shift_reg_31(.CP(n_8501), .D(n_4982), .CD(n_8511), .Q
(bit_bang_shift[31]));
notech_mux2 i_7527(.S(n_7963), .A(bit_bang_shift[30]), .B(bit_bang_shift
[31]), .Z(n_4988));
notech_mux2 i_281254(.S(gpioB_dir[6]), .A(gpioB_in[6]), .B(superIOb[6]),
.Z(n_7164));
notech_reg superIOa_dir_reg_0(.CP(n_8507), .D(n_4994), .CD(n_8167), .Q(gpioA_dir
notech_mux2 i_7527(.S(n_7981), .A(bit_bang_shift[30]), .B(bit_bang_shift
[31]), .Z(n_4982));
notech_mux2 i_271265(.S(gpioB_dir[5]), .A(gpioB_in[5]), .B(superIOb[5]),
.Z(n_7082));
notech_reg superIOa_dir_reg_0(.CP(n_8501), .D(n_4988), .CD(n_8529), .Q(gpioA_dir
[0]));
notech_mux2 i_7535(.S(n_550), .A(writeio_data[0]), .B(gpioA_dir[0]), .Z(n_4994
notech_mux2 i_7535(.S(n_573), .A(writeio_data[0]), .B(gpioA_dir[0]), .Z(n_4988
));
notech_mux2 i_291255(.S(gpioB_dir[7]), .A(gpioB_in[7]), .B(superIOb[7]),
.Z(n_7171));
notech_reg superIOa_dir_reg_1(.CP(n_8507), .D(n_5000), .CD(n_8169), .Q(gpioA_dir
notech_mux2 i_281266(.S(gpioB_dir[6]), .A(gpioB_in[6]), .B(superIOb[6]),
.Z(n_7089));
notech_reg superIOa_dir_reg_1(.CP(n_8501), .D(n_4994), .CD(n_8529), .Q(gpioA_dir
[1]));
notech_mux2 i_7543(.S(n_550), .A(writeio_data[1]), .B(gpioA_dir[1]), .Z(n_5000
notech_mux2 i_7543(.S(n_573), .A(writeio_data[1]), .B(gpioA_dir[1]), .Z(n_4994
));
notech_nand2 i_321939(.A(n_708), .B(n_486), .Z(n_7507));
notech_reg superIOa_dir_reg_2(.CP(n_8493), .D(n_5006), .CD(n_8169), .Q(gpioA_dir
notech_mux2 i_291267(.S(gpioB_dir[7]), .A(gpioB_in[7]), .B(superIOb[7]),
.Z(n_7096));
notech_reg superIOa_dir_reg_2(.CP(n_8487), .D(n_5000), .CD(n_8529), .Q(gpioA_dir
[2]));
notech_mux2 i_7551(.S(n_550), .A(writeio_data[2]), .B(gpioA_dir[2]), .Z(n_5006
notech_mux2 i_7551(.S(n_573), .A(writeio_data[2]), .B(gpioA_dir[2]), .Z(n_5000
));
notech_nand2 i_311938(.A(n_486), .B(n_709), .Z(n_7500));
notech_reg superIOa_dir_reg_3(.CP(n_8493), .D(n_5012), .CD(n_8169), .Q(gpioA_dir
notech_nand2 i_321983(.A(n_737), .B(n_474), .Z(n_7536));
notech_reg superIOa_dir_reg_3(.CP(n_8487), .D(n_5006), .CD(n_8529), .Q(gpioA_dir
[3]));
notech_mux2 i_7559(.S(n_550), .A(writeio_data[3]), .B(gpioA_dir[3]), .Z(n_5012
notech_mux2 i_7559(.S(n_573), .A(writeio_data[3]), .B(gpioA_dir[3]), .Z(n_5006
));
notech_nand2 i_301937(.A(n_486), .B(n_710), .Z(n_7493));
notech_reg superIOa_dir_reg_4(.CP(n_8493), .D(n_5019), .CD(n_8169), .Q(gpioA_dir
notech_nand2 i_311982(.A(n_474), .B(n_738), .Z(n_7529));
notech_reg superIOa_dir_reg_4(.CP(n_8487), .D(n_5012), .CD(n_8529), .Q(gpioA_dir
[4]));
notech_mux2 i_7567(.S(n_550), .A(writeio_data[4]), .B(gpioA_dir[4]), .Z(n_5019
notech_mux2 i_7567(.S(n_573), .A(writeio_data[4]), .B(gpioA_dir[4]), .Z(n_5012
));
notech_nand2 i_291936(.A(n_486), .B(n_711), .Z(n_7486));
notech_reg superIOa_dir_reg_5(.CP(n_8493), .D(n_5025), .CD(n_8169), .Q(gpioA_dir
notech_nand2 i_301981(.A(n_474), .B(n_739), .Z(n_7522));
notech_reg superIOa_dir_reg_5(.CP(n_8487), .D(n_5018), .CD(n_8529), .Q(gpioA_dir
[5]));
notech_mux2 i_7575(.S(n_550), .A(writeio_data[5]), .B(gpioA_dir[5]), .Z(n_5025
notech_mux2 i_7575(.S(n_573), .A(writeio_data[5]), .B(gpioA_dir[5]), .Z(n_5018
));
notech_nand2 i_281935(.A(n_486), .B(n_712), .Z(n_7479));
notech_reg superIOa_dir_reg_6(.CP(n_8493), .D(n_5031), .CD(n_8169), .Q(gpioA_dir
notech_nand2 i_291980(.A(n_474), .B(n_740), .Z(n_7515));
notech_reg superIOa_dir_reg_6(.CP(n_8487), .D(n_5025), .CD(n_8529), .Q(gpioA_dir
[6]));
notech_mux2 i_7583(.S(n_550), .A(writeio_data[6]), .B(gpioA_dir[6]), .Z(n_5031
notech_mux2 i_7583(.S(n_573), .A(writeio_data[6]), .B(gpioA_dir[6]), .Z(n_5025
));
notech_nand2 i_271934(.A(n_486), .B(n_713), .Z(n_7472));
notech_reg superIOa_dir_reg_7(.CP(n_8493), .D(n_5037), .CD(n_8168), .Q(gpioA_dir
notech_nand2 i_281979(.A(n_474), .B(n_741), .Z(n_7508));
notech_reg superIOa_dir_reg_7(.CP(n_8487), .D(n_5031), .CD(n_8529), .Q(gpioA_dir
[7]));
notech_mux2 i_7591(.S(n_550), .A(writeio_data[7]), .B(gpioA_dir[7]), .Z(n_5037
notech_mux2 i_7591(.S(n_573), .A(writeio_data[7]), .B(gpioA_dir[7]), .Z(n_5031
));
notech_nand2 i_261933(.A(n_486), .B(n_714), .Z(n_7465));
notech_reg superIOb_dir_reg_0(.CP(n_8493), .D(n_5043), .CD(n_8168), .Q(gpioB_dir
notech_nand2 i_271978(.A(n_474), .B(n_742), .Z(n_7501));
notech_reg superIOb_dir_reg_0(.CP(n_8487), .D(n_5037), .CD(n_8529), .Q(gpioB_dir
[0]));
notech_mux2 i_7599(.S(n_549), .A(writeio_data[0]), .B(gpioB_dir[0]), .Z(n_5043
notech_mux2 i_7599(.S(n_575), .A(writeio_data[0]), .B(gpioB_dir[0]), .Z(n_5037
));
notech_nand2 i_251932(.A(n_486), .B(n_715), .Z(n_7458));
notech_reg superIOb_dir_reg_1(.CP(n_8493), .D(n_5049), .CD(n_8168), .Q(gpioB_dir
notech_nand2 i_261977(.A(n_474), .B(n_743), .Z(n_7494));
notech_reg superIOb_dir_reg_1(.CP(n_8487), .D(n_5043), .CD(n_8529), .Q(gpioB_dir
[1]));
notech_mux2 i_7607(.S(n_549), .A(writeio_data[1]), .B(gpioB_dir[1]), .Z(n_5049
notech_mux2 i_7607(.S(n_575), .A(writeio_data[1]), .B(gpioB_dir[1]), .Z(n_5043
));
notech_nand2 i_241931(.A(n_486), .B(n_716), .Z(n_7451));
notech_reg superIOb_dir_reg_2(.CP(n_8493), .D(n_5056), .CD(n_8169), .Q(gpioB_dir
notech_nand2 i_251976(.A(n_474), .B(n_744), .Z(n_7487));
notech_reg superIOb_dir_reg_2(.CP(n_8487), .D(n_5049), .CD(n_8529), .Q(gpioB_dir
[2]));
notech_mux2 i_7615(.S(n_549), .A(writeio_data[2]), .B(gpioB_dir[2]), .Z(n_5056
notech_mux2 i_7615(.S(n_575), .A(writeio_data[2]), .B(gpioB_dir[2]), .Z(n_5049
));
notech_nand2 i_231930(.A(n_486), .B(n_717), .Z(n_7444));
notech_reg superIOb_dir_reg_3(.CP(n_8493), .D(n_5062), .CD(n_8168), .Q(gpioB_dir
notech_nand2 i_241975(.A(n_474), .B(n_745), .Z(n_7480));
notech_reg superIOb_dir_reg_3(.CP(n_8487), .D(n_5055), .CD(n_8529), .Q(gpioB_dir
[3]));
notech_mux2 i_7623(.S(n_549), .A(writeio_data[3]), .B(gpioB_dir[3]), .Z(n_5062
notech_mux2 i_7623(.S(n_575), .A(writeio_data[3]), .B(gpioB_dir[3]), .Z(n_5055
));
notech_nand2 i_221929(.A(n_8015), .B(n_718), .Z(n_7437));
notech_reg superIOb_dir_reg_4(.CP(n_8493), .D(n_5068), .CD(n_8168), .Q(gpioB_dir
notech_nand2 i_231974(.A(n_8033), .B(n_746), .Z(n_7473));
notech_reg superIOb_dir_reg_4(.CP(n_8487), .D(n_5062), .CD(n_8529), .Q(gpioB_dir
[4]));
notech_mux2 i_7631(.S(n_549), .A(writeio_data[4]), .B(gpioB_dir[4]), .Z(n_5068
notech_mux2 i_7631(.S(n_575), .A(writeio_data[4]), .B(gpioB_dir[4]), .Z(n_5062
));
notech_nand2 i_211928(.A(n_8015), .B(n_719), .Z(n_7430));
notech_reg superIOb_dir_reg_5(.CP(n_8493), .D(n_5074), .CD(n_8166), .Q(gpioB_dir
notech_nand2 i_221973(.A(n_8033), .B(n_747), .Z(n_7466));
notech_reg superIOb_dir_reg_5(.CP(n_8487), .D(n_5068), .CD(n_8529), .Q(gpioB_dir
[5]));
notech_mux2 i_7639(.S(n_549), .A(writeio_data[5]), .B(gpioB_dir[5]), .Z(n_5074
notech_mux2 i_7639(.S(n_575), .A(writeio_data[5]), .B(gpioB_dir[5]), .Z(n_5068
));
notech_nand2 i_201927(.A(n_8015), .B(n_720), .Z(n_7423));
notech_reg superIOb_dir_reg_6(.CP(n_8493), .D(n_5080), .CD(n_8166), .Q(gpioB_dir
notech_nand2 i_211972(.A(n_8033), .B(n_748), .Z(n_7459));
notech_reg superIOb_dir_reg_6(.CP(n_8487), .D(n_5074), .CD(n_8529), .Q(gpioB_dir
[6]));
notech_mux2 i_7647(.S(n_549), .A(writeio_data[6]), .B(gpioB_dir[6]), .Z(n_5080
notech_mux2 i_7647(.S(n_575), .A(writeio_data[6]), .B(gpioB_dir[6]), .Z(n_5074
));
notech_nand2 i_191926(.A(n_8015), .B(n_721), .Z(n_7416));
notech_reg superIOb_dir_reg_7(.CP(n_8493), .D(n_5086), .CD(n_8166), .Q(gpioB_dir
notech_nand2 i_201971(.A(n_8033), .B(n_749), .Z(n_7452));
notech_reg superIOb_dir_reg_7(.CP(n_8487), .D(n_5080), .CD(n_8529), .Q(gpioB_dir
[7]));
notech_mux2 i_7655(.S(n_549), .A(writeio_data[7]), .B(gpioB_dir[7]), .Z(n_5086
notech_mux2 i_7655(.S(n_575), .A(writeio_data[7]), .B(gpioB_dir[7]), .Z(n_5080
));
notech_nand2 i_181925(.A(n_8015), .B(n_722), .Z(n_7409));
notech_reg superIOa_reg_0(.CP(n_8477), .D(n_5092), .CD(n_8166), .Q(superIOa
notech_nand2 i_191970(.A(n_8033), .B(n_750), .Z(n_7445));
notech_reg superIOa_reg_0(.CP(n_8471), .D(n_5086), .CD(n_8529), .Q(superIOa
[0]));
notech_mux2 i_7663(.S(n_292), .A(writeio_data[0]), .B(superIOa[0]), .Z(n_5092
notech_mux2 i_7663(.S(n_300), .A(writeio_data[0]), .B(superIOa[0]), .Z(n_5086
));
notech_nand2 i_171924(.A(n_8015), .B(n_723), .Z(n_7402));
notech_reg superIOa_reg_1(.CP(n_8477), .D(n_5098), .CD(n_8166), .Q(superIOa
notech_nand2 i_181969(.A(n_8033), .B(n_751), .Z(n_7438));
notech_reg superIOa_reg_1(.CP(n_8471), .D(n_5092), .CD(n_8529), .Q(superIOa
[1]));
notech_mux2 i_7671(.S(n_292), .A(writeio_data[1]), .B(superIOa[1]), .Z(n_5098
notech_mux2 i_7671(.S(n_300), .A(writeio_data[1]), .B(superIOa[1]), .Z(n_5092
));
notech_nand2 i_161923(.A(n_8015), .B(n_724), .Z(n_7395));
notech_reg superIOa_reg_2(.CP(n_8497), .D(n_5104), .CD(n_8166), .Q(superIOa
notech_nand2 i_171968(.A(n_8033), .B(n_752), .Z(n_7431));
notech_reg superIOa_reg_2(.CP(n_8491), .D(n_5098), .CD(n_8529), .Q(superIOa
[2]));
notech_mux2 i_7679(.S(n_292), .A(writeio_data[2]), .B(superIOa[2]), .Z(n_5104
notech_mux2 i_7679(.S(n_300), .A(writeio_data[2]), .B(superIOa[2]), .Z(n_5098
));
notech_nand2 i_151922(.A(n_8015), .B(n_725), .Z(n_7388));
notech_reg superIOa_reg_3(.CP(n_8479), .D(n_5110), .CD(n_8166), .Q(superIOa
notech_nand2 i_161967(.A(n_8033), .B(n_753), .Z(n_7424));
notech_reg superIOa_reg_3(.CP(n_8473), .D(n_5104), .CD(n_8541), .Q(superIOa
[3]));
notech_mux2 i_7687(.S(n_292), .A(writeio_data[3]), .B(superIOa[3]), .Z(n_5110
notech_mux2 i_7687(.S(n_300), .A(writeio_data[3]), .B(superIOa[3]), .Z(n_5104
));
notech_nand2 i_141921(.A(n_8015), .B(n_726), .Z(n_7381));
notech_reg superIOa_reg_4(.CP(n_8479), .D(n_5116), .CD(n_8165), .Q(superIOa
notech_nand2 i_151966(.A(n_8033), .B(n_754), .Z(n_7417));
notech_reg superIOa_reg_4(.CP(n_8473), .D(n_5110), .CD(n_8527), .Q(superIOa
[4]));
notech_mux2 i_7695(.S(n_292), .A(writeio_data[4]), .B(superIOa[4]), .Z(n_5116
notech_mux2 i_7695(.S(n_300), .A(writeio_data[4]), .B(superIOa[4]), .Z(n_5110
));
notech_nand2 i_131920(.A(n_486), .B(n_727), .Z(n_7374));
notech_reg superIOa_reg_5(.CP(n_8479), .D(n_5122), .CD(n_8165), .Q(superIOa
notech_nand2 i_141965(.A(n_8033), .B(n_755), .Z(n_7410));
notech_reg superIOa_reg_5(.CP(n_8473), .D(n_5116), .CD(n_8541), .Q(superIOa
[5]));
notech_mux2 i_7703(.S(n_292), .A(writeio_data[5]), .B(superIOa[5]), .Z(n_5122
notech_mux2 i_7703(.S(n_300), .A(writeio_data[5]), .B(superIOa[5]), .Z(n_5116
));
notech_nand2 i_121919(.A(n_8015), .B(n_728), .Z(n_7367));
notech_reg superIOa_reg_6(.CP(n_8479), .D(n_5128), .CD(n_8166), .Q(superIOa
notech_nand2 i_131964(.A(n_8033), .B(n_756), .Z(n_7403));
notech_reg superIOa_reg_6(.CP(n_8473), .D(n_5122), .CD(n_8541), .Q(superIOa
[6]));
notech_mux2 i_7711(.S(n_292), .A(writeio_data[6]), .B(superIOa[6]), .Z(n_5128
notech_mux2 i_7711(.S(n_300), .A(writeio_data[6]), .B(superIOa[6]), .Z(n_5122
));
notech_nand2 i_111918(.A(n_8015), .B(n_729), .Z(n_7360));
notech_reg superIOa_reg_7(.CP(n_8479), .D(n_5134), .CD(n_8166), .Q(superIOa
notech_nand2 i_121963(.A(n_8033), .B(n_757), .Z(n_7396));
notech_reg superIOa_reg_7(.CP(n_8473), .D(n_5128), .CD(n_8541), .Q(superIOa
[7]));
notech_mux2 i_7719(.S(n_292), .A(writeio_data[7]), .B(superIOa[7]), .Z(n_5134
notech_mux2 i_7719(.S(n_300), .A(writeio_data[7]), .B(superIOa[7]), .Z(n_5128
));
notech_nand2 i_101917(.A(n_8015), .B(n_730), .Z(n_7353));
notech_reg reg290_reg_0(.CP(n_8479), .D(n_6762), .CD(n_8166), .Q(gpioA_out
notech_nand2 i_111962(.A(n_8033), .B(n_758), .Z(n_7389));
notech_reg reg290_reg_0(.CP(n_8473), .D(n_7165), .CD(n_8541), .Q(gpioA_out
[0]));
notech_reg reg290_reg_1(.CP(n_8479), .D(n_6769), .CD(n_8167), .Q(gpioA_out
notech_reg reg290_reg_1(.CP(n_8473), .D(n_7172), .CD(n_8541), .Q(gpioA_out
[1]));
notech_reg reg290_reg_2(.CP(n_8479), .D(n_6776), .CD(n_8167), .Q(gpioA_out
notech_reg reg290_reg_2(.CP(n_8473), .D(n_7179), .CD(n_8541), .Q(gpioA_out
[2]));
notech_reg reg290_reg_3(.CP(n_8479), .D(n_6783), .CD(n_8167), .Q(gpioA_out
notech_reg reg290_reg_3(.CP(n_8473), .D(n_7186), .CD(n_8541), .Q(gpioA_out
[3]));
notech_reg reg290_reg_4(.CP(n_8479), .D(n_6790), .CD(n_8167), .Q(gpioA_out
notech_reg reg290_reg_4(.CP(n_8473), .D(n_7193), .CD(n_8541), .Q(gpioA_out
[4]));
notech_reg reg290_reg_5(.CP(n_8479), .D(n_6797), .CD(n_8167), .Q(gpioA_out
notech_reg reg290_reg_5(.CP(n_8473), .D(n_7200), .CD(n_8541), .Q(gpioA_out
[5]));
notech_reg reg290_reg_6(.CP(n_8479), .D(n_6804), .CD(n_8167), .Q(gpioA_out
notech_reg reg290_reg_6(.CP(n_8473), .D(n_7207), .CD(n_8541), .Q(gpioA_out
[6]));
notech_reg reg290_reg_7(.CP(n_8479), .D(n_6811), .CD(n_8166), .Q(gpioA_out
notech_reg reg290_reg_7(.CP(n_8473), .D(n_7214), .CD(n_8541), .Q(gpioA_out
[7]));
notech_reg superIOb_reg_0(.CP(n_8479), .D(n_5156), .CD(n_8166), .Q(superIOb
notech_reg superIOb_reg_0(.CP(n_8473), .D(n_5150), .CD(n_8541), .Q(superIOb
[0]));
notech_mux2 i_7759(.S(n_551), .A(writeio_data[0]), .B(superIOb[0]), .Z(n_5156
notech_mux2 i_7759(.S(n_576), .A(writeio_data[0]), .B(superIOb[0]), .Z(n_5150
));
notech_nand2 i_91916(.A(n_8015), .B(n_731), .Z(n_7346));
notech_reg superIOb_reg_1(.CP(n_8497), .D(n_5162), .CD(n_8166), .Q(superIOb
notech_nand2 i_101961(.A(n_8033), .B(n_759), .Z(n_7382));
notech_reg superIOb_reg_1(.CP(n_8491), .D(n_5156), .CD(n_8541), .Q(superIOb
[1]));
notech_mux2 i_7767(.S(n_551), .A(writeio_data[1]), .B(superIOb[1]), .Z(n_5162
notech_mux2 i_7767(.S(n_576), .A(writeio_data[1]), .B(superIOb[1]), .Z(n_5156
));
notech_and4 i_81915(.A(n_738), .B(n_749), .C(n_493), .D(n_737), .Z(n_7339
));
notech_reg superIOb_reg_2(.CP(n_8497), .D(n_5168), .CD(n_8167), .Q(superIOb
notech_nand2 i_91960(.A(n_8033), .B(n_760), .Z(n_7375));
notech_reg superIOb_reg_2(.CP(n_8491), .D(n_5162), .CD(n_8541), .Q(superIOb
[2]));
notech_mux2 i_7775(.S(n_551), .A(writeio_data[2]), .B(superIOb[2]), .Z(n_5168
notech_mux2 i_7775(.S(n_576), .A(writeio_data[2]), .B(superIOb[2]), .Z(n_5162
));
notech_nand2 i_71914(.A(n_762), .B(n_757), .Z(n_7332));
notech_reg superIOb_reg_3(.CP(n_8497), .D(n_5174), .CD(n_8167), .Q(superIOb
notech_and4 i_81959(.A(n_773), .B(n_772), .C(n_771), .D(n_779), .Z(n_7368
));
notech_reg superIOb_reg_3(.CP(n_8491), .D(n_5168), .CD(n_8541), .Q(superIOb
[3]));
notech_mux2 i_7783(.S(n_551), .A(writeio_data[3]), .B(superIOb[3]), .Z(n_5174
notech_mux2 i_7783(.S(n_576), .A(writeio_data[3]), .B(superIOb[3]), .Z(n_5168
));
notech_nand2 i_61913(.A(n_773), .B(n_768), .Z(n_7325));
notech_reg superIOb_reg_4(.CP(n_8497), .D(n_5180), .CD(n_8167), .Q(superIOb
notech_and4 i_71958(.A(n_786), .B(n_785), .C(n_501), .D(n_792), .Z(n_7361
));
notech_reg superIOb_reg_4(.CP(n_8491), .D(n_5174), .CD(n_8541), .Q(superIOb
[4]));
notech_mux2 i_7791(.S(n_551), .A(writeio_data[4]), .B(superIOb[4]), .Z(n_5180
notech_mux2 i_7791(.S(n_576), .A(writeio_data[4]), .B(superIOb[4]), .Z(n_5174
));
notech_and4 i_51912(.A(n_777), .B(n_784), .C(n_457), .D(n_776), .Z(n_7318
notech_and4 i_61957(.A(n_800), .B(n_799), .C(n_489), .D(n_803), .Z(n_7354
));
notech_reg superIOb_reg_5(.CP(n_8497), .D(n_5186), .CD(n_8169), .Q(superIOb
notech_reg superIOb_reg_5(.CP(n_8491), .D(n_5180), .CD(n_8541), .Q(superIOb
[5]));
notech_mux2 i_7799(.S(n_551), .A(writeio_data[5]), .B(superIOb[5]), .Z(n_5186
notech_mux2 i_7799(.S(n_576), .A(writeio_data[5]), .B(superIOb[5]), .Z(n_5180
));
notech_or4 i_41911(.A(n_447), .B(n_786), .C(n_793), .D(n_5337), .Z(n_7311
));
notech_reg superIOb_reg_6(.CP(n_8497), .D(n_5192), .CD(n_8173), .Q(superIOb
notech_nand2 i_51956(.A(n_816), .B(n_810), .Z(n_7347));
notech_reg superIOb_reg_6(.CP(n_8491), .D(n_5186), .CD(n_8541), .Q(superIOb
[6]));
notech_mux2 i_7807(.S(n_551), .A(writeio_data[6]), .B(superIOb[6]), .Z(n_5192
notech_mux2 i_7807(.S(n_576), .A(writeio_data[6]), .B(superIOb[6]), .Z(n_5186
));
notech_and4 i_31910(.A(n_796), .B(n_803), .C(n_438), .D(n_795), .Z(n_7304
notech_and4 i_41955(.A(n_822), .B(n_820), .C(n_466), .D(n_469), .Z(n_7340
));
notech_reg superIOb_reg_7(.CP(n_8497), .D(n_5198), .CD(n_8173), .Q(superIOb
notech_reg superIOb_reg_7(.CP(n_8491), .D(n_5192), .CD(n_8527), .Q(superIOb
[7]));
notech_mux2 i_7815(.S(n_551), .A(writeio_data[7]), .B(superIOb[7]), .Z(n_5198
notech_mux2 i_7815(.S(n_576), .A(writeio_data[7]), .B(superIOb[7]), .Z(n_5192
));
notech_nand2 i_21909(.A(n_814), .B(n_809), .Z(n_7297));
notech_reg reg291_reg_0(.CP(n_8497), .D(n_7122), .CD(n_8173), .Q(gpioB_out
notech_and4 i_31954(.A(n_826), .B(n_833), .C(n_461), .D(n_825), .Z(n_7333
));
notech_reg reg291_reg_0(.CP(n_8491), .D(n_7047), .CD(n_8527), .Q(gpioB_out
[0]));
notech_reg reg291_reg_1(.CP(n_8497), .D(n_7129), .CD(n_8173), .Q(gpioB_out
notech_reg reg291_reg_1(.CP(n_8491), .D(n_7054), .CD(n_8511), .Q(gpioB_out
[1]));
notech_reg reg291_reg_2(.CP(n_8497), .D(n_7136), .CD(n_8173), .Q(gpioB_out
notech_reg reg291_reg_2(.CP(n_8491), .D(n_7061), .CD(n_8511), .Q(gpioB_out
[2]));
notech_reg reg291_reg_3(.CP(n_8497), .D(n_7143), .CD(n_8173), .Q(gpioB_out
notech_reg reg291_reg_3(.CP(n_8491), .D(n_7068), .CD(n_8531), .Q(gpioB_out
[3]));
notech_reg reg291_reg_4(.CP(n_8497), .D(n_7150), .CD(n_8172), .Q(gpioB_out
notech_reg reg291_reg_4(.CP(n_8491), .D(n_7075), .CD(n_8513), .Q(gpioB_out
[4]));
notech_reg reg291_reg_5(.CP(n_8497), .D(n_7157), .CD(n_8172), .Q(gpioB_out
notech_reg reg291_reg_5(.CP(n_8491), .D(n_7082), .CD(n_8513), .Q(gpioB_out
[5]));
notech_reg reg291_reg_6(.CP(n_8497), .D(n_7164), .CD(n_8172), .Q(gpioB_out
notech_reg reg291_reg_6(.CP(n_8491), .D(n_7089), .CD(n_8531), .Q(gpioB_out
[6]));
notech_reg reg291_reg_7(.CP(n_8497), .D(n_7171), .CD(n_8173), .Q(gpioB_out
notech_reg reg291_reg_7(.CP(n_8491), .D(n_7096), .CD(n_8531), .Q(gpioB_out
[7]));
notech_reg_set s00_AXI_RDATA_reg_0(.CP(n_8497), .D(n_5384), .SD(n_8173),
notech_reg_set s00_AXI_RDATA_reg_0(.CP(n_8491), .D(n_5380), .SD(n_8531),
.Q(s00_AXI_RDATA[0]));
notech_reg_set s00_AXI_RDATA_reg_1(.CP(n_8497), .D(n_7297), .SD(n_8172),
notech_reg_set s00_AXI_RDATA_reg_1(.CP(n_8491), .D(n_5381), .SD(n_8531),
.Q(s00_AXI_RDATA[1]));
notech_reg_set s00_AXI_RDATA_reg_2(.CP(n_8497), .D(n_5385), .SD(n_8174),
notech_reg_set s00_AXI_RDATA_reg_2(.CP(n_8491), .D(n_5382), .SD(n_8531),
.Q(s00_AXI_RDATA[2]));
notech_reg_set s00_AXI_RDATA_reg_3(.CP(n_8479), .D(n_7311), .SD(n_8174),
notech_reg_set s00_AXI_RDATA_reg_3(.CP(n_8473), .D(n_5383), .SD(n_8531),
.Q(s00_AXI_RDATA[3]));
notech_reg_set s00_AXI_RDATA_reg_4(.CP(n_8479), .D(n_5386), .SD(n_8174),
notech_reg_set s00_AXI_RDATA_reg_4(.CP(n_8473), .D(n_7347), .SD(n_8531),
.Q(s00_AXI_RDATA[4]));
notech_reg_set s00_AXI_RDATA_reg_5(.CP(n_8481), .D(n_7325), .SD(n_8174),
notech_reg_set s00_AXI_RDATA_reg_5(.CP(n_8475), .D(n_5384), .SD(n_8513),
.Q(s00_AXI_RDATA[5]));
notech_reg_set s00_AXI_RDATA_reg_6(.CP(n_8481), .D(n_7332), .SD(n_8174),
notech_reg_set s00_AXI_RDATA_reg_6(.CP(n_8475), .D(n_5385), .SD(n_8531),
.Q(s00_AXI_RDATA[6]));
notech_reg_set s00_AXI_RDATA_reg_7(.CP(n_8481), .D(n_5387), .SD(n_8174),
notech_reg_set s00_AXI_RDATA_reg_7(.CP(n_8475), .D(n_5386), .SD(n_8531),
.Q(s00_AXI_RDATA[7]));
notech_reg_set s00_AXI_RDATA_reg_8(.CP(n_8481), .D(n_7346), .SD(n_8173),
notech_reg_set s00_AXI_RDATA_reg_8(.CP(n_8475), .D(n_7375), .SD(n_8531),
.Q(s00_AXI_RDATA[8]));
notech_reg_set s00_AXI_RDATA_reg_9(.CP(n_8481), .D(n_7353), .SD(n_8173),
notech_reg_set s00_AXI_RDATA_reg_9(.CP(n_8475), .D(n_7382), .SD(n_8531),
.Q(s00_AXI_RDATA[9]));
notech_reg_set s00_AXI_RDATA_reg_10(.CP(n_8481), .D(n_7360), .SD(n_8173)
notech_reg_set s00_AXI_RDATA_reg_10(.CP(n_8475), .D(n_7389), .SD(n_8531)
, .Q(s00_AXI_RDATA[10]));
notech_reg_set s00_AXI_RDATA_reg_11(.CP(n_8481), .D(n_7367), .SD(n_8174)
notech_reg_set s00_AXI_RDATA_reg_11(.CP(n_8475), .D(n_7396), .SD(n_8531)
, .Q(s00_AXI_RDATA[11]));
notech_reg_set s00_AXI_RDATA_reg_12(.CP(n_8481), .D(n_7374), .SD(n_8174)
notech_reg_set s00_AXI_RDATA_reg_12(.CP(n_8475), .D(n_7403), .SD(n_8531)
, .Q(s00_AXI_RDATA[12]));
notech_reg_set s00_AXI_RDATA_reg_13(.CP(n_8481), .D(n_7381), .SD(n_8173)
notech_reg_set s00_AXI_RDATA_reg_13(.CP(n_8475), .D(n_7410), .SD(n_8531)
, .Q(s00_AXI_RDATA[13]));
notech_reg_set s00_AXI_RDATA_reg_14(.CP(n_8481), .D(n_7388), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_14(.CP(n_8475), .D(n_7417), .SD(n_8531)
, .Q(s00_AXI_RDATA[14]));
notech_reg_set s00_AXI_RDATA_reg_15(.CP(n_8481), .D(n_7395), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_15(.CP(n_8475), .D(n_7424), .SD(n_8531)
, .Q(s00_AXI_RDATA[15]));
notech_reg_set s00_AXI_RDATA_reg_16(.CP(n_8481), .D(n_7402), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_16(.CP(n_8475), .D(n_7431), .SD(n_8513)
, .Q(s00_AXI_RDATA[16]));
notech_reg_set s00_AXI_RDATA_reg_17(.CP(n_8481), .D(n_7409), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_17(.CP(n_8475), .D(n_7438), .SD(n_8531)
, .Q(s00_AXI_RDATA[17]));
notech_reg_set s00_AXI_RDATA_reg_18(.CP(n_8481), .D(n_7416), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_18(.CP(n_8475), .D(n_7445), .SD(n_8515)
, .Q(s00_AXI_RDATA[18]));
notech_reg_set s00_AXI_RDATA_reg_19(.CP(n_8481), .D(n_7423), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_19(.CP(n_8475), .D(n_7452), .SD(n_8515)
, .Q(s00_AXI_RDATA[19]));
notech_reg_set s00_AXI_RDATA_reg_20(.CP(n_8481), .D(n_7430), .SD(n_8169)
notech_reg_set s00_AXI_RDATA_reg_20(.CP(n_8475), .D(n_7459), .SD(n_8515)
, .Q(s00_AXI_RDATA[20]));
notech_reg_set s00_AXI_RDATA_reg_21(.CP(n_8481), .D(n_7437), .SD(n_8169)
notech_reg_set s00_AXI_RDATA_reg_21(.CP(n_8475), .D(n_7466), .SD(n_8515)
, .Q(s00_AXI_RDATA[21]));
notech_reg_set s00_AXI_RDATA_reg_22(.CP(n_8481), .D(n_7444), .SD(n_8169)
notech_reg_set s00_AXI_RDATA_reg_22(.CP(n_8475), .D(n_7473), .SD(n_8515)
, .Q(s00_AXI_RDATA[22]));
notech_reg_set s00_AXI_RDATA_reg_23(.CP(n_8481), .D(n_7451), .SD(n_8165)
notech_reg_set s00_AXI_RDATA_reg_23(.CP(n_8475), .D(n_7480), .SD(n_8515)
, .Q(s00_AXI_RDATA[23]));
notech_reg_set s00_AXI_RDATA_reg_24(.CP(s00_AXI_CLK), .D(n_7458), .SD(n_8169
notech_reg_set s00_AXI_RDATA_reg_24(.CP(s00_AXI_CLK), .D(n_7487), .SD(n_8515
), .Q(s00_AXI_RDATA[24]));
notech_reg_set s00_AXI_RDATA_reg_25(.CP(s00_AXI_CLK), .D(n_7465), .SD(n_8169
notech_reg_set s00_AXI_RDATA_reg_25(.CP(s00_AXI_CLK), .D(n_7494), .SD(n_8515
), .Q(s00_AXI_RDATA[25]));
notech_reg_set s00_AXI_RDATA_reg_26(.CP(s00_AXI_CLK), .D(n_7472), .SD(n_8172
notech_reg_set s00_AXI_RDATA_reg_26(.CP(s00_AXI_CLK), .D(n_7501), .SD(n_8515
), .Q(s00_AXI_RDATA[26]));
notech_reg_set s00_AXI_RDATA_reg_27(.CP(s00_AXI_CLK), .D(n_7479), .SD(n_8172
notech_reg_set s00_AXI_RDATA_reg_27(.CP(s00_AXI_CLK), .D(n_7508), .SD(n_8515
), .Q(s00_AXI_RDATA[27]));
notech_reg_set s00_AXI_RDATA_reg_28(.CP(s00_AXI_CLK), .D(n_7486), .SD(n_8172
notech_reg_set s00_AXI_RDATA_reg_28(.CP(s00_AXI_CLK), .D(n_7515), .SD(n_8515
), .Q(s00_AXI_RDATA[28]));
notech_reg_set s00_AXI_RDATA_reg_29(.CP(s00_AXI_CLK), .D(n_7493), .SD(n_8172
notech_reg_set s00_AXI_RDATA_reg_29(.CP(s00_AXI_CLK), .D(n_7522), .SD(n_8515
), .Q(s00_AXI_RDATA[29]));
notech_reg_set s00_AXI_RDATA_reg_30(.CP(s00_AXI_CLK), .D(n_7500), .SD(n_8172
notech_reg_set s00_AXI_RDATA_reg_30(.CP(s00_AXI_CLK), .D(n_7529), .SD(n_8515
), .Q(s00_AXI_RDATA[30]));
notech_reg_set s00_AXI_RDATA_reg_31(.CP(s00_AXI_CLK), .D(n_7507), .SD(n_8172
notech_reg_set s00_AXI_RDATA_reg_31(.CP(s00_AXI_CLK), .D(n_7536), .SD(n_8515
), .Q(s00_AXI_RDATA[31]));
notech_reg gpio_out_reg_0(.CP(s00_AXI_CLK), .D(n_5284), .CD(n_8165), .Q(spi_mosi
notech_reg gpio_out_reg_0(.CP(s00_AXI_CLK), .D(n_5278), .CD(n_8515), .Q(spi_mosi
));
notech_mux2 i_7983(.S(n_552), .A(writeio_data[0]), .B(spi_mosi), .Z(n_5284
notech_mux2 i_7983(.S(n_574), .A(n_8185), .B(spi_mosi), .Z(n_5278));
notech_and4 i_21953(.A(n_838), .B(n_837), .C(n_846), .D(n_450), .Z(n_7326
));
notech_and4 i_11908(.A(n_822), .B(n_824), .C(n_821), .D(n_412), .Z(n_7290
notech_reg gpio_out_reg_1(.CP(s00_AXI_CLK), .D(n_5284), .CD(n_8515), .Q(\gpio_out[1]
));
notech_reg gpio_out_reg_1(.CP(s00_AXI_CLK), .D(n_5290), .CD(n_8165), .Q(\gpio_out[1]
));
notech_mux2 i_7991(.S(n_552), .A(writeio_data[1]), .B(\gpio_out[1] ), .Z
(n_5290));
notech_mux2 i_21256(.S(bit_bang[2]), .A(n_826), .B(n_5462), .Z(n_6862)
notech_mux2 i_7991(.S(n_574), .A(n_8116), .B(\gpio_out[1] ), .Z(n_5284)
);
notech_reg gpio_out_reg_2(.CP(s00_AXI_CLK), .D(n_5300), .CD(n_8165), .Q(spi_cs
notech_and4 i_11952(.A(n_848), .B(n_847), .C(n_859), .D(n_852), .Z(n_7319
));
notech_mux2 i_7999(.S(n_552), .A(writeio_data[2]), .B(spi_cs), .Z(n_5300
notech_reg gpio_out_reg_2(.CP(s00_AXI_CLK), .D(n_5290), .CD(n_8515), .Q(spi_cs
));
notech_reg bit_bang_sclk_reg(.CP(s00_AXI_CLK), .D(n_5310), .CD(n_8172),
notech_mux2 i_7999(.S(n_574), .A(n_8105), .B(spi_cs), .Z(n_5290));
notech_mux2 i_21268(.S(bit_bang[2]), .A(n_860), .B(n_5448), .Z(n_6934)
);
notech_reg bit_bang_sclk_reg(.CP(s00_AXI_CLK), .D(n_5297), .CD(n_8515),
.Q(bit_bang_sclk));
notech_mux2 i_8007(.S(n_547), .A(n_6862), .B(bit_bang_sclk), .Z(n_5310)
notech_mux2 i_8007(.S(n_571), .A(n_6934), .B(bit_bang_sclk), .Z(n_5297)
);
notech_reg s00_AXI_RVALID_reg(.CP(s00_AXI_CLK), .D(s00_AXI_ARREADY), .CD
(n_8172), .Q(s00_AXI_RVALID));
notech_inv i_8661(.A(n_678), .Z(n_5318));
notech_inv i_8662(.A(n_671), .Z(n_5319));
notech_inv i_8663(.A(n_668), .Z(n_5320));
notech_inv i_8664(.A(n_675), .Z(n_5321));
notech_inv i_8665(.A(n_664), .Z(n_5322));
notech_inv i_8666(.A(n_660), .Z(n_5323));
notech_inv i_8667(.A(n_657), .Z(n_5324));
notech_inv i_8668(.A(n_653), .Z(n_5325));
notech_inv i_8669(.A(n_645), .Z(n_5326));
notech_inv i_8670(.A(n_636), .Z(n_5327));
notech_inv i_8671(.A(n_633), .Z(n_5328));
notech_inv i_8672(.A(n_628), .Z(n_5329));
notech_inv i_8673(.A(n_622), .Z(n_5330));
notech_inv i_8674(.A(n_699), .Z(n_5331));
notech_inv i_8675(.A(n_732), .Z(n_5332));
notech_inv i_8676(.A(n_606), .Z(n_5333));
notech_inv i_8677(.A(n_604), .Z(n_5334));
notech_inv i_8678(.A(n_5054), .Z(n_5335));
notech_inv i_8679(.A(n_296), .Z(n_5336));
notech_inv i_8680(.A(n_787), .Z(n_5337));
notech_inv i_8681(.A(n_351), .Z(n_5338));
notech_inv i_8682(.A(n_6223), .Z(n_5339));
notech_inv i_8683(.A(\io_add[6] ), .Z(n_5340));
notech_inv i_8684(.A(\io_add[10] ), .Z(n_5341));
notech_inv i_8685(.A(\io_add[11] ), .Z(n_5342));
notech_inv i_8686(.A(superIO_idx[0]), .Z(n_5343));
notech_inv i_8687(.A(superIO_idx[5]), .Z(n_5344));
notech_inv i_8688(.A(div_clke[0]), .Z(n_5345));
notech_inv i_8689(.A(n_497), .Z(n_5346));
notech_inv i_8690(.A(div_clke[1]), .Z(n_5347));
notech_inv i_8691(.A(n_6718), .Z(n_5348));
notech_inv i_8692(.A(div_clke[3]), .Z(n_5349));
notech_inv i_8693(.A(div_clke[4]), .Z(n_5350));
notech_inv i_8694(.A(div_clke[5]), .Z(n_5351));
notech_inv i_8695(.A(\nbus_119[0] ), .Z(n_5352));
notech_inv i_8696(.A(bit_bang_shift[0]), .Z(n_5353));
notech_inv i_8697(.A(bit_bang_shift[1]), .Z(n_5354));
notech_inv i_8698(.A(bit_bang_shift[4]), .Z(n_5355));
notech_inv i_8699(.A(bit_bang_shift[5]), .Z(n_5356));
notech_inv i_8700(.A(bit_bang_shift[6]), .Z(n_5357));
notech_inv i_8701(.A(bit_bang_shift[7]), .Z(n_5358));
notech_inv i_8702(.A(bit_bang_shift[8]), .Z(n_5359));
notech_inv i_8703(.A(bit_bang_shift[9]), .Z(n_5360));
notech_inv i_8704(.A(bit_bang_shift[10]), .Z(n_5361));
notech_inv i_8705(.A(bit_bang_shift[11]), .Z(n_5362));
notech_inv i_8706(.A(bit_bang_shift[12]), .Z(n_5363));
notech_inv i_8707(.A(bit_bang_shift[13]), .Z(n_5364));
notech_inv i_8708(.A(bit_bang_shift[14]), .Z(n_5365));
notech_inv i_8709(.A(bit_bang_shift[15]), .Z(n_5366));
notech_inv i_8710(.A(bit_bang_shift[16]), .Z(n_5367));
notech_inv i_8711(.A(bit_bang_shift[17]), .Z(n_5368));
notech_inv i_8712(.A(bit_bang_shift[18]), .Z(n_5369));
notech_inv i_8713(.A(bit_bang_shift[19]), .Z(n_5370));
notech_inv i_8714(.A(bit_bang_shift[20]), .Z(n_5371));
notech_inv i_8715(.A(bit_bang_shift[21]), .Z(n_5372));
notech_inv i_8716(.A(bit_bang_shift[22]), .Z(n_5373));
notech_inv i_8717(.A(bit_bang_shift[23]), .Z(n_5374));
notech_inv i_8718(.A(bit_bang_shift[24]), .Z(n_5375));
notech_inv i_8719(.A(bit_bang_shift[25]), .Z(n_5376));
notech_inv i_8720(.A(bit_bang_shift[26]), .Z(n_5377));
notech_inv i_8721(.A(bit_bang_shift[27]), .Z(n_5378));
notech_inv i_8722(.A(bit_bang_shift[28]), .Z(n_5379));
notech_inv i_8723(.A(bit_bang_shift[29]), .Z(n_5380));
notech_inv i_8724(.A(bit_bang_shift[30]), .Z(n_5381));
notech_inv i_8725(.A(bit_bang_shift[31]), .Z(n_5382));
notech_inv i_8726(.A(n_565), .Z(n_5383));
notech_inv i_8727(.A(n_7290), .Z(n_5384));
notech_inv i_8728(.A(n_7304), .Z(n_5385));
notech_inv i_8729(.A(n_7318), .Z(n_5386));
notech_inv i_8730(.A(n_7339), .Z(n_5387));
notech_inv i_8731(.A(gpioB_out[5]), .Z(n_5388));
notech_inv i_8732(.A(gpioB_out[6]), .Z(n_5389));
notech_inv i_8733(.A(gpioB_out[7]), .Z(n_5390));
notech_inv i_8734(.A(dat_o_spi_0[0]), .Z(n_5391));
notech_inv i_8735(.A(dat_o_spi_0[1]), .Z(n_5392));
notech_inv i_8736(.A(dat_o_spi_0[5]), .Z(n_5393));
notech_inv i_8737(.A(dat_o_spi_0[6]), .Z(n_5394));
notech_inv i_8738(.A(dat_o_spi_0[8]), .Z(n_5395));
notech_inv i_8739(.A(dat_o_spi_0[9]), .Z(n_5396));
notech_inv i_8740(.A(dat_o_spi_0[10]), .Z(n_5397));
notech_inv i_8741(.A(dat_o_spi_0[11]), .Z(n_5398));
notech_inv i_8742(.A(dat_o_spi_0[12]), .Z(n_5399));
notech_inv i_8743(.A(dat_o_spi_0[13]), .Z(n_5400));
notech_inv i_8744(.A(dat_o_spi_0[14]), .Z(n_5401));
notech_inv i_8745(.A(dat_o_spi_0[15]), .Z(n_5402));
notech_inv i_8746(.A(dat_o_spi_0[16]), .Z(n_5403));
notech_inv i_8747(.A(dat_o_spi_0[17]), .Z(n_5404));
notech_inv i_8748(.A(dat_o_spi_0[18]), .Z(n_5405));
notech_inv i_8749(.A(dat_o_spi_0[19]), .Z(n_5406));
notech_inv i_8750(.A(dat_o_spi_0[20]), .Z(n_5407));
notech_inv i_8751(.A(dat_o_spi_0[21]), .Z(n_5408));
notech_inv i_8752(.A(dat_o_spi_0[22]), .Z(n_5409));
notech_inv i_8753(.A(dat_o_spi_0[23]), .Z(n_5410));
notech_inv i_8754(.A(dat_o_spi_0[24]), .Z(n_5411));
notech_inv i_8755(.A(dat_o_spi_0[25]), .Z(n_5412));
notech_inv i_8756(.A(dat_o_spi_0[26]), .Z(n_5413));
notech_inv i_8757(.A(dat_o_spi_0[27]), .Z(n_5414));
notech_inv i_8758(.A(dat_o_spi_0[28]), .Z(n_5415));
notech_inv i_8759(.A(dat_o_spi_0[29]), .Z(n_5416));
notech_inv i_8760(.A(dat_o_spi_0[30]), .Z(n_5417));
notech_inv i_8761(.A(dat_o_spi_0[31]), .Z(n_5418));
notech_inv i_8762(.A(rdio_pic2[2]), .Z(n_5419));
notech_inv i_8763(.A(rdio_pic2[3]), .Z(n_5420));
notech_inv i_8764(.A(rdio_pic2[5]), .Z(n_5421));
notech_inv i_8765(.A(rdio_pic2[6]), .Z(n_5422));
notech_inv i_8766(.A(gpioA_out[0]), .Z(n_5423));
notech_inv i_8767(.A(gpioA_out[1]), .Z(n_5424));
notech_inv i_8768(.A(gpioA_out[2]), .Z(n_5425));
notech_inv i_8769(.A(gpioA_out[3]), .Z(n_5426));
notech_inv i_8770(.A(gpioA_out[4]), .Z(n_5427));
notech_inv i_8771(.A(gpioA_out[5]), .Z(n_5428));
notech_inv i_8772(.A(gpioA_out[7]), .Z(n_5429));
notech_inv i_8773(.A(rdio_pit[2]), .Z(n_5430));
notech_inv i_8774(.A(rdio_pit[3]), .Z(n_5431));
notech_inv i_8775(.A(rdio_pit[5]), .Z(n_5432));
notech_inv i_8776(.A(rdio_pit[6]), .Z(n_5433));
notech_inv i_8777(.A(rdio_pit[7]), .Z(n_5434));
notech_inv i_8778(.A(rdio_pic1[0]), .Z(n_5435));
notech_inv i_8779(.A(rdio_pic1[1]), .Z(n_5436));
notech_inv i_8780(.A(rdio_pic1[2]), .Z(n_5437));
notech_inv i_8781(.A(rdio_pic1[3]), .Z(n_5438));
notech_inv i_8782(.A(rdio_pic1[4]), .Z(n_5439));
notech_inv i_8783(.A(rdio_pic1[7]), .Z(n_5440));
notech_inv i_8784(.A(cfg[0]), .Z(n_5441));
notech_inv i_8785(.A(cfg[1]), .Z(n_5442));
notech_inv i_8786(.A(cfg[2]), .Z(n_5443));
notech_inv i_8787(.A(cfg[3]), .Z(n_5444));
notech_inv i_8788(.A(cfg[4]), .Z(n_5445));
notech_inv i_8789(.A(gpioA_dir[0]), .Z(n_5446));
notech_inv i_8790(.A(gpioA_dir[1]), .Z(n_5447));
notech_inv i_8791(.A(gpioA_dir[2]), .Z(n_5448));
notech_inv i_8792(.A(gpioA_dir[3]), .Z(n_5449));
notech_inv i_8793(.A(gpioA_dir[4]), .Z(n_5450));
notech_inv i_8794(.A(gpioA_dir[5]), .Z(n_5451));
notech_inv i_8795(.A(gpioA_dir[6]), .Z(n_5452));
notech_inv i_8796(.A(gpioA_dir[7]), .Z(n_5453));
notech_inv i_8797(.A(gpioB_dir[0]), .Z(n_5454));
notech_inv i_8798(.A(gpioB_dir[1]), .Z(n_5455));
notech_inv i_8799(.A(gpioB_dir[2]), .Z(n_5456));
notech_inv i_8800(.A(gpioB_dir[3]), .Z(n_5457));
notech_inv i_8801(.A(gpioB_dir[4]), .Z(n_5458));
notech_inv i_8802(.A(gpioB_dir[5]), .Z(n_5459));
notech_inv i_8803(.A(gpioB_dir[7]), .Z(n_5460));
notech_inv i_8804(.A(bit_bang[0]), .Z(n_5461));
notech_inv i_8805(.A(bit_bang[1]), .Z(n_5462));
notech_inv i_8806(.A(1'b0), .Z(n_5463));
notech_inv i_8807(.A(n_8165), .Z(n_4956));
notech_inv i_8808(.A(pit_irq), .Z(\nbus_108[0] ));
notech_inv i_8809(.A(\io_add[4] ), .Z(n_5466));
notech_inv i_8810(.A(\io_add[0] ), .Z(n_5467));
notech_inv i_8812(.A(\io_add[2] ), .Z(n_5469));
notech_inv i_8813(.A(n_5307), .Z(n_5470));
notech_inv i_8814(.A(spi_miso), .Z(n_5471));
notech_inv i_8815(.A(n_5305), .Z(n_5472));
notech_inv i_8816(.A(n_5303), .Z(n_5473));
notech_inv i_8817(.A(\rdio_spk[4] ), .Z(n_5474));
notech_inv i_8818(.A(n_5301), .Z(n_5475));
notech_inv i_8819(.A(\rdio_spk[1] ), .Z(n_5476));
notech_inv i_8820(.A(n_5295), .Z(n_5477));
notech_inv i_8821(.A(\rdio_spk[0] ), .Z(n_5478));
notech_inv i_8822(.A(n_5293), .Z(n_5479));
notech_inv i_8823(.A(s00_AXI_ARREADY), .Z(n_5480));
notech_inv i_8824(.A(s00_AXI_AWREADY), .Z(n_5481));
tiny_spi uspi_0(.rst_i(n_4956), .clk_i(s00_AXI_CLK), .stb_i(n_7233), .we_i
(n_8515), .Q(s00_AXI_RVALID));
notech_inv i_8661(.A(n_692), .Z(n_5312));
notech_inv i_8662(.A(n_696), .Z(n_5313));
notech_inv i_8663(.A(n_704), .Z(n_5314));
notech_inv i_8664(.A(n_707), .Z(n_5315));
notech_inv i_8665(.A(n_680), .Z(n_5316));
notech_inv i_8666(.A(n_682), .Z(n_5317));
notech_inv i_8667(.A(n_662), .Z(n_5318));
notech_inv i_8668(.A(n_659), .Z(n_5319));
notech_inv i_8669(.A(n_653), .Z(n_5320));
notech_inv i_8670(.A(n_649), .Z(n_5321));
notech_inv i_8671(.A(n_647), .Z(n_5322));
notech_inv i_8672(.A(n_728), .Z(n_5323));
notech_inv i_8673(.A(n_639), .Z(n_5324));
notech_inv i_8674(.A(n_725), .Z(n_5325));
notech_inv i_8675(.A(n_630), .Z(n_5326));
notech_inv i_8676(.A(n_736), .Z(n_5327));
notech_inv i_8677(.A(n_299), .Z(n_6808));
notech_inv i_8678(.A(n_301), .Z(n_5060));
notech_inv i_8679(.A(n_320), .Z(n_5330));
notech_inv i_8680(.A(n_372), .Z(n_5331));
notech_inv i_8681(.A(n_6224), .Z(n_5332));
notech_inv i_8682(.A(\io_add[6] ), .Z(n_5333));
notech_inv i_8683(.A(\io_add[7] ), .Z(n_5334));
notech_inv i_8684(.A(\io_add[10] ), .Z(n_5335));
notech_inv i_8685(.A(n_471), .Z(n_5336));
notech_inv i_8686(.A(superIO_idx[0]), .Z(n_5337));
notech_inv i_8687(.A(superIO_idx[1]), .Z(n_5338));
notech_inv i_8688(.A(superIO_idx[2]), .Z(n_5339));
notech_inv i_8689(.A(superIO_idx[6]), .Z(n_5340));
notech_inv i_8690(.A(div_clke[0]), .Z(n_5341));
notech_inv i_8691(.A(div_clke[1]), .Z(n_5342));
notech_inv i_8692(.A(n_6822), .Z(n_5343));
notech_inv i_8693(.A(div_clke[3]), .Z(n_5344));
notech_inv i_8694(.A(div_clke[4]), .Z(n_5345));
notech_inv i_8695(.A(div_clke[5]), .Z(n_5346));
notech_inv i_8696(.A(\nbus_117[0] ), .Z(n_5347));
notech_inv i_8697(.A(bit_bang_shift[0]), .Z(n_5348));
notech_inv i_8698(.A(bit_bang_shift[1]), .Z(n_5349));
notech_inv i_8699(.A(bit_bang_shift[2]), .Z(n_5350));
notech_inv i_8700(.A(bit_bang_shift[3]), .Z(n_5351));
notech_inv i_8701(.A(bit_bang_shift[4]), .Z(n_5352));
notech_inv i_8702(.A(bit_bang_shift[5]), .Z(n_5353));
notech_inv i_8703(.A(bit_bang_shift[6]), .Z(n_5354));
notech_inv i_8704(.A(bit_bang_shift[7]), .Z(n_5355));
notech_inv i_8705(.A(bit_bang_shift[8]), .Z(n_5356));
notech_inv i_8706(.A(bit_bang_shift[9]), .Z(n_5357));
notech_inv i_8707(.A(bit_bang_shift[10]), .Z(n_5358));
notech_inv i_8708(.A(bit_bang_shift[11]), .Z(n_5359));
notech_inv i_8709(.A(bit_bang_shift[12]), .Z(n_5360));
notech_inv i_8710(.A(bit_bang_shift[13]), .Z(n_5361));
notech_inv i_8711(.A(bit_bang_shift[14]), .Z(n_5362));
notech_inv i_8712(.A(bit_bang_shift[15]), .Z(n_5363));
notech_inv i_8713(.A(bit_bang_shift[16]), .Z(n_5364));
notech_inv i_8714(.A(bit_bang_shift[17]), .Z(n_5365));
notech_inv i_8715(.A(bit_bang_shift[18]), .Z(n_5366));
notech_inv i_8716(.A(bit_bang_shift[19]), .Z(n_5367));
notech_inv i_8717(.A(bit_bang_shift[20]), .Z(n_5368));
notech_inv i_8718(.A(bit_bang_shift[21]), .Z(n_5369));
notech_inv i_8719(.A(bit_bang_shift[22]), .Z(n_5370));
notech_inv i_8720(.A(bit_bang_shift[23]), .Z(n_5371));
notech_inv i_8721(.A(bit_bang_shift[24]), .Z(n_5372));
notech_inv i_8722(.A(bit_bang_shift[25]), .Z(n_5373));
notech_inv i_8723(.A(bit_bang_shift[26]), .Z(n_5374));
notech_inv i_8724(.A(bit_bang_shift[27]), .Z(n_5375));
notech_inv i_8725(.A(bit_bang_shift[28]), .Z(n_5376));
notech_inv i_8726(.A(bit_bang_shift[29]), .Z(n_5377));
notech_inv i_8727(.A(bit_bang_shift[30]), .Z(n_5378));
notech_inv i_8728(.A(bit_bang_shift[31]), .Z(n_5379));
notech_inv i_8729(.A(n_7319), .Z(n_5380));
notech_inv i_8730(.A(n_7326), .Z(n_5381));
notech_inv i_8731(.A(n_7333), .Z(n_5382));
notech_inv i_8732(.A(n_7340), .Z(n_5383));
notech_inv i_8733(.A(n_7354), .Z(n_5384));
notech_inv i_8734(.A(n_7361), .Z(n_5385));
notech_inv i_8735(.A(n_7368), .Z(n_5386));
notech_inv i_8736(.A(rdio_pic2[0]), .Z(n_5387));
notech_inv i_8737(.A(rdio_pic2[1]), .Z(n_5388));
notech_inv i_8738(.A(rdio_pic2[3]), .Z(n_5389));
notech_inv i_8739(.A(rdio_pic2[4]), .Z(n_5390));
notech_inv i_8740(.A(rdio_pic2[7]), .Z(n_5391));
notech_inv i_8741(.A(rdio_pit[0]), .Z(n_5392));
notech_inv i_8742(.A(rdio_pit[1]), .Z(n_5393));
notech_inv i_8743(.A(rdio_pit[3]), .Z(n_5394));
notech_inv i_8744(.A(rdio_pit[4]), .Z(n_5395));
notech_inv i_8745(.A(rdio_pit[7]), .Z(n_5396));
notech_inv i_8746(.A(rdio_pic1[0]), .Z(n_5397));
notech_inv i_8747(.A(rdio_pic1[1]), .Z(n_5398));
notech_inv i_8748(.A(rdio_pic1[2]), .Z(n_5399));
notech_inv i_8749(.A(rdio_pic1[4]), .Z(n_5400));
notech_inv i_8750(.A(rdio_pic1[5]), .Z(n_5401));
notech_inv i_8751(.A(rdio_pic1[6]), .Z(n_5402));
notech_inv i_8752(.A(rdio_pic1[7]), .Z(n_5403));
notech_inv i_8753(.A(cfg[0]), .Z(n_5404));
notech_inv i_8754(.A(cfg[1]), .Z(n_5405));
notech_inv i_8755(.A(cfg[2]), .Z(n_5406));
notech_inv i_8756(.A(cfg[4]), .Z(n_5407));
notech_inv i_8757(.A(cfg[5]), .Z(n_5408));
notech_inv i_8758(.A(cfg[6]), .Z(n_5409));
notech_inv i_8759(.A(gpioA_dir[0]), .Z(n_5410));
notech_inv i_8760(.A(gpioA_dir[1]), .Z(n_5411));
notech_inv i_8761(.A(gpioA_dir[2]), .Z(n_5412));
notech_inv i_8762(.A(gpioA_dir[3]), .Z(n_5413));
notech_inv i_8763(.A(gpioA_dir[4]), .Z(n_5414));
notech_inv i_8764(.A(gpioA_dir[5]), .Z(n_5415));
notech_inv i_8765(.A(gpioA_dir[6]), .Z(n_5416));
notech_inv i_8766(.A(gpioA_dir[7]), .Z(n_5417));
notech_inv i_8767(.A(gpioB_dir[0]), .Z(n_5418));
notech_inv i_8768(.A(gpioB_dir[1]), .Z(n_5419));
notech_inv i_8769(.A(gpioB_dir[2]), .Z(n_5420));
notech_inv i_8770(.A(gpioB_dir[3]), .Z(n_5421));
notech_inv i_8771(.A(gpioB_dir[4]), .Z(n_5422));
notech_inv i_8772(.A(gpioB_dir[5]), .Z(n_5423));
notech_inv i_8773(.A(gpioB_dir[6]), .Z(n_5424));
notech_inv i_8774(.A(gpioB_dir[7]), .Z(n_5425));
notech_inv i_8775(.A(rdio_8042[0]), .Z(n_5426));
notech_inv i_8776(.A(rdio_8042[1]), .Z(n_5427));
notech_inv i_8777(.A(rdio_8042[3]), .Z(n_5428));
notech_inv i_8778(.A(rdio_8042[4]), .Z(n_5429));
notech_inv i_8779(.A(rdio_8042[5]), .Z(n_5430));
notech_inv i_8780(.A(rdio_8042[6]), .Z(n_5431));
notech_inv i_8781(.A(rdio_8042[7]), .Z(n_5432));
notech_inv i_8782(.A(gpioB_out[0]), .Z(n_5433));
notech_inv i_8783(.A(gpioB_out[1]), .Z(n_5434));
notech_inv i_8784(.A(gpioB_out[2]), .Z(n_5435));
notech_inv i_8785(.A(gpioB_out[3]), .Z(n_5436));
notech_inv i_8786(.A(gpioB_out[4]), .Z(n_5437));
notech_inv i_8787(.A(gpioB_out[5]), .Z(n_5438));
notech_inv i_8788(.A(gpioB_out[6]), .Z(n_5439));
notech_inv i_8789(.A(gpioB_out[7]), .Z(n_5440));
notech_inv i_8790(.A(gpioA_out[0]), .Z(n_5441));
notech_inv i_8791(.A(gpioA_out[1]), .Z(n_5442));
notech_inv i_8792(.A(gpioA_out[2]), .Z(n_5443));
notech_inv i_8793(.A(gpioA_out[4]), .Z(n_5444));
notech_inv i_8794(.A(gpioA_out[5]), .Z(n_5445));
notech_inv i_8795(.A(gpioA_out[6]), .Z(n_5446));
notech_inv i_8796(.A(bit_bang[0]), .Z(n_5447));
notech_inv i_8797(.A(bit_bang[1]), .Z(n_5448));
notech_inv i_8798(.A(dat_o_spi_0[0]), .Z(n_5449));
notech_inv i_8799(.A(dat_o_spi_0[1]), .Z(n_5450));
notech_inv i_8800(.A(dat_o_spi_0[4]), .Z(n_5451));
notech_inv i_8801(.A(dat_o_spi_0[5]), .Z(n_5452));
notech_inv i_8802(.A(dat_o_spi_0[7]), .Z(n_5453));
notech_inv i_8803(.A(dat_o_spi_0[8]), .Z(n_5454));
notech_inv i_8804(.A(dat_o_spi_0[9]), .Z(n_5455));
notech_inv i_8805(.A(dat_o_spi_0[10]), .Z(n_5456));
notech_inv i_8806(.A(dat_o_spi_0[11]), .Z(n_5457));
notech_inv i_8807(.A(dat_o_spi_0[12]), .Z(n_5458));
notech_inv i_8808(.A(dat_o_spi_0[13]), .Z(n_5459));
notech_inv i_8809(.A(dat_o_spi_0[14]), .Z(n_5460));
notech_inv i_8810(.A(dat_o_spi_0[15]), .Z(n_5461));
notech_inv i_8811(.A(dat_o_spi_0[16]), .Z(n_5462));
notech_inv i_8812(.A(dat_o_spi_0[17]), .Z(n_5463));
notech_inv i_8813(.A(dat_o_spi_0[18]), .Z(n_5464));
notech_inv i_8814(.A(dat_o_spi_0[19]), .Z(n_5465));
notech_inv i_8815(.A(dat_o_spi_0[20]), .Z(n_5466));
notech_inv i_8816(.A(dat_o_spi_0[21]), .Z(n_5467));
notech_inv i_8817(.A(dat_o_spi_0[22]), .Z(n_5468));
notech_inv i_8818(.A(dat_o_spi_0[23]), .Z(n_5469));
notech_inv i_8819(.A(dat_o_spi_0[24]), .Z(n_5470));
notech_inv i_8820(.A(dat_o_spi_0[25]), .Z(n_5471));
notech_inv i_8821(.A(dat_o_spi_0[26]), .Z(n_5472));
notech_inv i_8822(.A(dat_o_spi_0[27]), .Z(n_5473));
notech_inv i_8823(.A(dat_o_spi_0[28]), .Z(n_5474));
notech_inv i_8824(.A(dat_o_spi_0[29]), .Z(n_5475));
notech_inv i_8825(.A(dat_o_spi_0[30]), .Z(n_5476));
notech_inv i_8826(.A(dat_o_spi_0[31]), .Z(n_5477));
notech_inv i_8827(.A(n_8521), .Z(n_4956));
notech_inv i_8828(.A(pit_irq), .Z(\nbus_108[0] ));
notech_inv i_8829(.A(\io_add[3] ), .Z(n_5480));
notech_inv i_8830(.A(\io_add[5] ), .Z(n_5481));
notech_inv i_8831(.A(\io_add[1] ), .Z(n_5482));
notech_inv i_8832(.A(n_8215), .Z(n_5483));
notech_inv i_8833(.A(\io_add[4] ), .Z(n_5484));
notech_inv i_8835(.A(\io_add[2] ), .Z(n_5486));
notech_inv i_8836(.A(n_5310), .Z(n_5487));
notech_inv i_8837(.A(spi_miso), .Z(n_5488));
notech_inv i_8838(.A(n_5308), .Z(n_5489));
notech_inv i_8839(.A(\rdio_spk[5] ), .Z(n_5490));
notech_inv i_8840(.A(n_5306), .Z(n_5491));
notech_inv i_8841(.A(n_5304), .Z(n_5492));
notech_inv i_8842(.A(n_5300), .Z(n_5493));
notech_inv i_8843(.A(n_5298), .Z(n_5494));
notech_inv i_8844(.A(n_5296), .Z(n_5495));
notech_inv i_8845(.A(n_5302), .Z(n_5496));
notech_inv i_8846(.A(s00_AXI_ARREADY), .Z(n_5497));
notech_inv i_8847(.A(s00_AXI_AWREADY), .Z(n_5498));
notech_inv i_8848(.A(AMBIT_GND), .Z(n_5499));
v8042 U8042(.rst_n(s00_AXI_RSTN), .clk(s00_AXI_CLK), .io_address({\io_add[2]
, \io_add[1] , n_8215}), .io_read(AMBIT_GND), .io_readdata(rdio_8042
), .io_write(AMBIT_GND), .io_writedata({writeio_data[7], writeio_data
[6], writeio_data[5], writeio_data[4], writeio_data[3], n_8105, n_8116
, n_8185}), .ps2clk(ps2clk), .ps2data(ps2data));
tiny_spi uspi_0(.rst_i(n_4956), .clk_i(s00_AXI_CLK), .stb_i(n_6808), .we_i
(we_spi_0), .dat_o(dat_o_spi_0), .dat_i(writeio_data), .adr_i({\io_add[5]
, \io_add[4] , \io_add[3] , \io_add[2] }), .MOSI(mosi), .SCLK(sclk
), .MISO(miso), .int_o());
v8253 U8253(.clk(n_8505), .rst_n(n_8165), .irq(pit_irq), .io_address({\io_add[1]
, n_8217}), .io_read(rd_pit), .io_readdata(rdio_pit), .io_write(wr_pit
), .io_writedata({writeio_data[7], n_8081, n_8071, n_8062, n_8054
, n_8098, n_8107, n_8187}), .port_61h_readdata({UNCONNECTED_000,
v8253 U8253(.clk(n_8499), .rst_n(n_8521), .irq(pit_irq), .io_address({\io_add[1]
, n_8215}), .io_read(rd_pit), .io_readdata(rdio_pit), .io_write(wr_pit
), .io_writedata({writeio_data[7], n_8088, n_8078, n_8069, n_8061
, n_8105, n_8116, n_8185}), .port_61h_readdata({UNCONNECTED_000,
UNCONNECTED_001, \rdio_spk[5] , \rdio_spk[4] , UNCONNECTED_002,
UNCONNECTED_003, \rdio_spk[1] , \rdio_spk[0] }), .port_61h_write
(wr_spk));
uart_16750 A16750(.CLK(n_8505), .RST(n_4956), .BAUDCE(clke), .CS(n_5054)
uart_16750 A16750(.CLK(n_8499), .RST(n_4956), .BAUDCE(clke), .CS(n_5060)
, .WR(s00_AXI_WREADY), .RD(s00_AXI_ARREADY), .A({\io_add[2] , \io_add[1]
, n_8216}), .DIN({writeio_data[7], n_8080, n_8071, n_8062, n_8053
, n_8098, n_8107, n_8187}), .DOUT({n_5307, n_5305, n_5303, n_5301
, n_5299, n_5297, n_5295, n_5293}), .INT(\nbus_108[4] ), .RCLK(baudout
, n_8214}), .DIN({writeio_data[7], n_8087, n_8078, n_8069, n_8060
, n_8105, n_8116, n_8185}), .DOUT({n_5310, n_5308, n_5306, n_5304
, n_5302, n_5300, n_5298, n_5296}), .INT(\nbus_108[4] ), .RCLK(baudout
), .BAUDOUTN(baudout), .SIN(RXD), .SOUT(TXD));
v8259 U8259(.clk(n_8505), .rst_n(n_8165), .ms_read(rd_pic1), .ms_readdata
(rdio_pic1), .ms_write(wr_pic1), .sl_address(n_8217), .sl_read(rd_pic2
v8259 U8259(.clk(n_8499), .rst_n(n_8521), .ms_read(rd_pic1), .ms_readdata
(rdio_pic1), .ms_write(wr_pic1), .sl_address(n_8214), .sl_read(rd_pic2
), .sl_readdata(rdio_pic2), .sl_write(wr_pic2), .sl_writedata({writeio_data
[7], n_8081, n_8072, n_8062, n_8054, n_8099, n_8108, n_8187}), .inter_input
[7], n_8088, n_8079, n_8069, n_8061, n_8106, n_8117, n_8185}), .inter_input
({UNCONNECTED_004, UNCONNECTED_005, UNCONNECTED_006,
UNCONNECTED_007, UNCONNECTED_008, UNCONNECTED_009,
UNCONNECTED_010, int_reg[3], int_reg[2], int_reg[1], int_reg[0],
15175,5 → 15237,5
\nbus_108[4] , UNCONNECTED_011, UNCONNECTED_012,
UNCONNECTED_013, \nbus_108[0] }), .inter_do(int_pic), .inter_vector
(ivect), .inter_done(iack));
AWDP_DEC_023767 i_3513(.O0(bit_bang_0), .bit_bang(bit_bang));
AWDP_DEC_023891 i_3514(.O0(bit_bang_0), .bit_bang(bit_bang));
endmodule

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