OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 969 to Rev 970
    ↔ Reverse comparison
  •

Rev 969 → Rev 970

/trunk/or1ksim/sim-config.h
267,6 → 267,13
int enable_bursts; /* Whether burst are enabled */
int no_multicycle; /* When enabled no multicycle paths are generated */
} cuc;
 
struct {
int enabled; /* Whether is test module enabled */
unsigned long baseaddr; /* Base address */
} test;
 
 
};
struct runtime {
/trunk/or1ksim/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
94,14 → 94,9
 
bin_PROGRAMS = sim
 
sim_SOURCES = toplevel.c sim-config.c sim-config.h profiler.c \
mprofiler.c profiler.h mprofiler.h
sim_SOURCES = toplevel.c sim-config.c sim-config.h profiler.c mprofiler.c profiler.h mprofiler.h
 
sim_LDADD = cpu/common/libcommon.a cpu/$(CPU_ARCH)/libarch.a \
cpu/or1k/libor1k.a support/libsupport.a mmu/libmmu.a \
bpb/libbpb.a cache/libcache.a peripheral/libperipheral.a \
tick/libtick.a pm/libpm.a pic/libpic.a debug/libdebug.a \
vapi/libvapi.a cuc/libcuc.a
sim_LDADD = cpu/common/libcommon.a cpu/$(CPU_ARCH)/libarch.a cpu/or1k/libor1k.a support/libsupport.a mmu/libmmu.a bpb/libbpb.a cache/libcache.a peripheral/libperipheral.a tick/libtick.a pm/libpm.a pic/libpic.a debug/libdebug.a vapi/libvapi.a cuc/libcuc.a
 
 
sim_LDFLAGS = #-lreadline
266,7 → 261,7
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" != "." || dot_seen=yes; \
test "$$subdir" = "." && dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \
/trunk/or1ksim/debug/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/cpu/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
145,7 → 145,7
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" != "." || dot_seen=yes; \
test "$$subdir" = "." && dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \
/trunk/or1ksim/cpu/or32/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
108,10 → 108,10
libarch_a_SOURCES = execute.c or32.c
 
@SIMPLE_EXECUTION_TRUE@noinst_PROGRAMS =
@SIMPLE_EXECUTION_FALSE@noinst_PROGRAMS = @SIMPLE_EXECUTION_FALSE@generate
@SIMPLE_EXECUTION_FALSE@noinst_PROGRAMS = generate
@SIMPLE_EXECUTION_TRUE@generate_SOURCES =
@SIMPLE_EXECUTION_FALSE@generate_SOURCES = @SIMPLE_EXECUTION_FALSE@or32.c generate.c
@SIMPLE_EXECUTION_FALSE@BUILT_SOURCES = @SIMPLE_EXECUTION_FALSE@execgen.c
@SIMPLE_EXECUTION_FALSE@generate_SOURCES = or32.c generate.c
@SIMPLE_EXECUTION_FALSE@BUILT_SOURCES = execgen.c
mkinstalldirs = $(SHELL) $(top_srcdir)/mkinstalldirs
CONFIG_HEADER = ../../config.h
CONFIG_CLEAN_FILES =
/trunk/or1ksim/cpu/common/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/cpu/common/abstract.c
55,6 → 55,9
/* Temporary variable to increase speed. */
struct dev_memarea *cur_area;
 
/* Pointer to memory controller device descriptor. */
struct dev_memarea *mc_area = (struct dev_memarea *)0;
 
/* These are set by mmu if cache inhibit bit is set for current acces. */
int data_ci, insn_ci;
 
74,7 → 77,7
addr is inside the area, if addr & addr_mask == addr_compare
(used also by peripheral devices like 16450 UART etc.) */
void register_memoryarea_mask(unsigned long addr_mask, unsigned long addr_compare,
unsigned long size, unsigned granularity,
unsigned long size, unsigned granularity, unsigned mc_dev,
unsigned long (readfunc)(unsigned long),
void (writefunc)(unsigned long, unsigned long))
{
101,6 → 104,10
exit (-1);
 
cur_area = *pptmp = (struct dev_memarea *)malloc(sizeof(struct dev_memarea));
 
if (mc_dev)
mc_area = *pptmp;
 
(*pptmp)->addr_mask = addr_mask;
(*pptmp)->addr_compare = addr_compare;
(*pptmp)->size = size;
117,9 → 124,12
/* Register read and write function for a memory area.
Memory areas should be aligned. Memory area is rounded up to
fit the nearest 2^n aligment.
(used also by peripheral devices like 16450 UART etc.) */
(used also by peripheral devices like 16450 UART etc.)
If mc_dev is 1, this means that this device will be checked first for match
and will be accessed in case in overlaping memory spaces.
Only one device can have this set to 1 (used for memory controller) */
void register_memoryarea(unsigned long addr,
unsigned long size, unsigned granularity,
unsigned long size, unsigned granularity, unsigned mc_dev,
unsigned long (readfunc)(unsigned long),
void (writefunc)(unsigned long, unsigned long))
{
126,7 → 136,7
unsigned long size_mask = bit_mask (size);
unsigned long addr_mask = ~size_mask;
register_memoryarea_mask (addr_mask, addr & addr_mask,
size_mask + 1, granularity,
size_mask + 1, granularity, mc_dev,
readfunc, writefunc);
}
 
136,7 → 146,11
{
struct dev_memarea *ptmp;
 
/* Check cached value first */
/* Check memory controller space first */
if (mc_area && (addr & mc_area->addr_mask) == (mc_area->addr_compare & mc_area->addr_mask))
return cur_area = mc_area;
 
/* Check cached value */
if (cur_area && (addr & cur_area->addr_mask) == (cur_area->addr_compare & cur_area->addr_mask))
return cur_area;
 
656,7 → 670,7
if (config.sim.verbose)
debug (1, "%08X %08X (%i KB): %s (activated by CE%i; read delay = %icyc, write delay = %icyc)\n",
start, length, length >> 10, type, ce, rd, wd);
register_memoryarea(start, length, 4, &simmem_read_word, &simmem_write_word);
register_memoryarea(start, length, 4, 0, &simmem_read_word, &simmem_write_word);
cur_area->misc = memory_needed;
cur_area->chip_select = ce;
cur_area->valid = 1;
673,7 → 687,7
} else {
if (config.sim.verbose)
fprintf (stderr, "WARNING: Memory not defined, assuming standard configuration.\n");
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 4, &simmem_read_word, &simmem_write_word);
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 4, 0, &simmem_read_word, &simmem_write_word);
cur_area->misc = memory_needed;
cur_area->chip_select = 0;
cur_area->valid = 1;
/trunk/or1ksim/cpu/common/abstract.h
106,7 → 106,7
addr is inside the area, if addr & addr_mask == addr_compare
(used also by peripheral devices like 16450 UART etc.) */
void register_memoryarea_mask(unsigned long addr_mask, unsigned long addr_compare,
unsigned long size, unsigned granularity,
unsigned long size, unsigned granularity, unsigned mc_dev,
unsigned long (readfunc)(unsigned long),
void (writefunc)(unsigned long, unsigned long));
 
113,9 → 113,12
/* Register read and write function for a memory area.
Memory areas should be aligned. Memory area is rounded up to
fit the nearest 2^n aligment.
(used also by peripheral devices like 16450 UART etc.) */
(used also by peripheral devices like 16450 UART etc.)
If mc_dev is 1, this means that this device will be checked first for match
and will be accessed in case in overlaping memory spaces.
Only one device can have this set to 1 (used for memory controller) */
void register_memoryarea(unsigned long addr,
unsigned long size, unsigned granularity,
unsigned long size, unsigned granularity, unsigned mc_dev,
unsigned long (readfunc)(unsigned long),
void (writefunc)(unsigned long, unsigned long));
 
131,6 → 134,9
/* Temporary variable to increase speed. */
extern struct dev_memarea *cur_area;
 
/* Virtual address of current access. */
extern unsigned long cur_vadd;
 
/* These are set by mmu if cache inhibit bit is set for current acces. */
extern int data_ci, insn_ci;
 
/trunk/or1ksim/cpu/or1k/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/tick/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/cache/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/cuc/Makefile
65,7 → 65,7
AUTOMAKE = automake
AUTOHEADER = autoheader
 
INSTALL = /usr/bin//install -c
INSTALL = /usr/bin/install -c
INSTALL_PROGRAM = ${INSTALL} $(AM_INSTALL_PROGRAM_FLAGS)
INSTALL_DATA = ${INSTALL} -m 644
INSTALL_SCRIPT = ${INSTALL_PROGRAM}
85,7 → 85,7
target_triplet = or32-unknown-uclinux-gnu
AR = ar
ARFLAGS = cr
BUILD_DIR = /home/markom/sim
BUILD_DIR = /home/simons/delete/or1k/or1ksim
CC = gcc
CFLAGS = -g -O2 -DOR32
CPU_ARCH = or32
/trunk/or1ksim/pic/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/pm/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/testbench/dmatest.cfg File deleted
trunk/or1ksim/testbench/dmatest.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/except_test.cfg =================================================================== --- trunk/or1ksim/testbench/except_test.cfg (revision 969) +++ trunk/or1ksim/testbench/except_test.cfg (nonexistent) @@ -1,70 +0,0 @@ -section memory - /*random_seed = 12345 - type = random*/ - pattern = 0x00 - type = unknown /* Fastest */ - - nmemories = 3 - device 0 - name = "RAM1" - ce = 0 - baseaddr = 0x40000000 - size = 0x00200000 - delayr = 1 - delayw = 2 - enddevice - - device 1 - name = "FLASH" - ce = 1 - baseaddr = 0x00000000 - size = 0x00200000 - delayr = 10 - delayw = -1 - enddevice - - device 2 - name = "RAM2" - ce = 2 - baseaddr = 0x80000000 - size = 0x00200000 - delayr = 1 - delayw = 2 - enddevice -end - -section immu - enabled = 1 - nsets = 32 - nways = 1 - pagesize = 8192 -end - -section dmmu - enabled = 1 - nsets = 32 - nways = 1 - pagesize = 8192 -end - -section ic - enabled = 0 - nsets = 512 - nways = 1 - blocksize = 16 -end - -section dc - enabled = 0 - nsets = 512 - nways = 1 - blocksize = 16 -end - -section sim - history = 1 - exe_log = 1 - exe_log_type = software - exe_log_fn = "executed.log" - clkcycle = 4ns -end Index: trunk/or1ksim/testbench/xess.ld =================================================================== --- trunk/or1ksim/testbench/xess.ld (revision 969) +++ trunk/or1ksim/testbench/xess.ld (nonexistent) @@ -1,41 +0,0 @@ -MEMORY - { - except : ORIGIN = 0x00000000, LENGTH = 0x00002000 - flash : ORIGIN = 0x04000000, LENGTH = 0x00200000 - ram : ORIGIN = 0x00002000, LENGTH = 0x001fe000 - } - -SECTIONS -{ - .text : - { - *(.text) - *(.rodata) - _src_beg = .; - } > flash - .dummy ALIGN(0x4): - { - _src_beg = .; - } > flash - .except : - AT ( ADDR (.dummy)) - { - *(.except) - } > except - .data : - AT ( ADDR (.dummy) + SIZEOF (.except)) - { - _dst_beg = .; - *(.data) - _dst_end = .; - } > ram - .bss : - { - *(.bss) - } > ram - .stack ALIGN(0x10) (NOLOAD): - { - *(.stack) - _ram_end = .; - } > ram -}
trunk/or1ksim/testbench/xess.ld Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/eth.cfg =================================================================== --- trunk/or1ksim/testbench/eth.cfg (revision 969) +++ trunk/or1ksim/testbench/eth.cfg (nonexistent) @@ -1,31 +0,0 @@ -include "default.cfg" - -section sim - verbose = 0 - debug = 4 -end - -section dma - ndmas = 1 - - device 0 - baseaddr = 0x90000000 - irq = 4 - enddevice -end - -section ethernet - nethernets = 1 - - device 0 - baseaddr = 0x88000000 - dma = 0 - irq = 15 - rtx_type = 0 - tx_channel = 0 - rx_channel = 1 - rxfile = "eth0.tx" - txfile = "eth0.tx" - sockif = "eth0" - enddevice -end
trunk/or1ksim/testbench/eth.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/int_test.cfg =================================================================== --- trunk/or1ksim/testbench/int_test.cfg (revision 969) +++ trunk/or1ksim/testbench/int_test.cfg (nonexistent) @@ -1,36 +0,0 @@ -section memory - pattern = 0x00 - type = unknown /* Fastest */ - - nmemories = 2 - device 0 - name = "RAM" - ce = 0 - baseaddr = 0x40000000 - size = 0x00200000 - delayr = 2 - delayw = 1 - enddevice - - device 1 - name = "FLASH" - ce = 1 - baseaddr = 0x00000000 - size = 0x00200000 - delayr = 10 - delayw = -1 - enddevice -end - -section sim - /* verbose = 1 */ - debug = 0 - profile = 0 - prof_fn = "sim.profile" - - history = 1 - exe_log = 1 - exe_log_type = software - exe_log_fn = "executed.log" - clkcycle = 4ns -end
trunk/or1ksim/testbench/int_test.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/fbtest.cfg =================================================================== --- trunk/or1ksim/testbench/fbtest.cfg (revision 969) +++ trunk/or1ksim/testbench/fbtest.cfg (nonexistent) @@ -1,9 +0,0 @@ -include "default.cfg" - -section fb - enabled = 1 - baseaddr = 0xb8000000 - refresh_rate = 10000 - filename = "primary" -end -
trunk/or1ksim/testbench/fbtest.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/cache.cfg =================================================================== --- trunk/or1ksim/testbench/cache.cfg (revision 969) +++ trunk/or1ksim/testbench/cache.cfg (nonexistent) @@ -1,64 +0,0 @@ -section memory - /*random_seed = 12345 - type = random*/ - pattern = 0x00 - type = unknown /* Fastest */ - - nmemories = 1 - device 0 - name = "RAM" - ce = 0 - baseaddr = 0x00000000 - size = 0x00200000 - delayr = 1 - delayw = 2 - enddevice -end - -section sim - /* verbose = 1 */ - debug = 0 - history = 1 - exe_log = 0 - exe_log_fn = "executed.log" - clkcycle = 4ns -end - -section immu - enabled = 0 - nsets = 32 - nways = 1 - pagesize = 8192 -end - -section dmmu - enabled = 0 - nsets = 32 - nways = 1 - pagesize = 8192 -end - -section ic - enabled = 1 - nsets = 256 - nways = 1 - blocksize = 16 - ustates = 2 -end - -section dc - enabled = 1 - nsets = 256 - nways = 1 - blocksize = 16 - ustates = 2 -end - -section cpu - ver = 0x1200 - rev = 0x0001 - /* upr = */ - superscalar = 0 - hazards = 0 - dependstats = 0 -end Index: trunk/or1ksim/testbench/kbdtest.cfg =================================================================== --- trunk/or1ksim/testbench/kbdtest.cfg (revision 969) +++ trunk/or1ksim/testbench/kbdtest.cfg (nonexistent) @@ -1,8 +0,0 @@ -include "default.cfg" - -section kbd - enabled = 1 - irq = 21 - baseaddr = 0xb1000000 - rxfile = "./kbdtest.rx" -end
trunk/or1ksim/testbench/kbdtest.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/mmu.c =================================================================== --- trunk/or1ksim/testbench/mmu.c (revision 969) +++ trunk/or1ksim/testbench/mmu.c (revision 970) @@ -9,7 +9,7 @@ /* Define RAM physical location and size Bottom half will be used for this program, the rest will be used for testing */ -#define FLASH_START 0x04000000 +#define FLASH_START 0xf0000000 #define FLASH_SIZE 0x00200000 #define RAM_START 0x00000000 #define RAM_SIZE 0x00200000 Index: trunk/or1ksim/testbench/basic.S =================================================================== --- trunk/or1ksim/testbench/basic.S (revision 969) +++ trunk/or1ksim/testbench/basic.S (revision 970) @@ -1,18 +1,65 @@ /* Basic instruction set test */ #include "spr_defs.h" +#include "board.h" -#define MEM_RAM 0x40000000 +#define MEM_RAM 0x00000000 - .section .except, "ax" +#define MC_CSR (0x00) +#define MC_POC (0x04) +#define MC_BA_MASK (0x08) +#define MC_CSC(i) (0x10 + (i) * 8) +#define MC_TMS(i) (0x14 + (i) * 8) + + .section .except, "ax" + l.addi r1,r0,0 + + .section .text + .org 0x100 _reset: - l.nop 0 - l.movhi r1,hi(_regs) - l.ori r1,r1,lo(_regs) + l.movhi r1,hi(_init_mc) + l.ori r1,r1,lo(_init_mc) l.jr r1 l.nop - .section .text + +_init_mc: + + l.movhi r3,hi(MC_BASE_ADDR) + l.ori r3,r3,lo(MC_BASE_ADDR) + + l.addi r4,r3,MC_CSC(0) + l.movhi r5,hi(FLASH_BASE_ADDR) + l.srai r5,r5,6 + l.ori r5,r5,0x0025 + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(0) + l.movhi r5,hi(FLASH_TMS_VAL) + l.ori r5,r5,lo(FLASH_TMS_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_BA_MASK + l.addi r5,r0,MC_MASK_VAL + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CSR + l.movhi r5,hi(MC_CSR_VAL) + l.ori r5,r5,lo(MC_CSR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(1) + l.movhi r5,hi(SDRAM_TMS_VAL) + l.ori r5,r5,lo(SDRAM_TMS_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CSC(1) + l.movhi r5,hi(SDRAM_BASE_ADDR) + l.srai r5,r5,6 + l.ori r5,r5,0x0411 + l.sw 0(r4),r5 + + _regs: l.addi r1,r0,0x1 l.addi r2,r1,0x2
/trunk/or1ksim/testbench/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
118,73 → 118,73
inst_set_test_SOURCES = $(OR1K_SUPPORT_S) support.h inst_set_test.c
###############################################
 
@OR1K_EXCEPT_TRUE@exit_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@cbasic_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@local_global_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mul_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@dhry_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mycompress_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@functest_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mem_test_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@inst_set_test_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@exit_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@cbasic_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@local_global_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mul_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@dhry_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mycompress_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@functest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mem_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@inst_set_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
 
######### MC Tests ############################
@OR1K_EXCEPT_TRUE@mc_dram_SOURCES = @OR1K_EXCEPT_TRUE@except_mc.S mc_common.h mc_common.c mc_dram.h mc_dram.c
@OR1K_EXCEPT_TRUE@mc_dram_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_ssram_SOURCES = @OR1K_EXCEPT_TRUE@except_mc.S mc_common.h mc_common.c mc_ssramh mc_ssram.c
@OR1K_EXCEPT_TRUE@mc_ssram_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_async_SOURCES = @OR1K_EXCEPT_TRUE@except_mc.S mc_common.h mc_common.c mc_async.h mc_async.c
@OR1K_EXCEPT_TRUE@mc_async_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_sync_SOURCES = @OR1K_EXCEPT_TRUE@except_mc.S mc_common.h mc_common.c mc_sync.h mc_sync.c
@OR1K_EXCEPT_TRUE@mc_sync_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_dram_SOURCES = except_mc.S mc_common.h mc_common.c mc_dram.h mc_dram.c
@OR1K_EXCEPT_TRUE@mc_dram_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_ssram_SOURCES = except_mc.S mc_common.h mc_common.c mc_ssramh mc_ssram.c
@OR1K_EXCEPT_TRUE@mc_ssram_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_async_SOURCES = except_mc.S mc_common.h mc_common.c mc_async.h mc_async.c
@OR1K_EXCEPT_TRUE@mc_async_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
@OR1K_EXCEPT_TRUE@mc_sync_SOURCES = except_mc.S mc_common.h mc_common.c mc_sync.h mc_sync.c
@OR1K_EXCEPT_TRUE@mc_sync_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
################################################
 
##### Platform Dependent Tests - not OR1K #####
@OR1K_EXCEPT_TRUE@basic_SOURCES = @OR1K_EXCEPT_TRUE@basic.S spr_defs.h
@OR1K_EXCEPT_TRUE@basic_SOURCES = basic.S spr_defs.h
@OR1K_EXCEPT_FALSE@basic_SOURCES =
@OR1K_EXCEPT_TRUE@basic_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/xess.ld
@OR1K_EXCEPT_TRUE@basic_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@basic_LDADD =
@OR1K_EXCEPT_TRUE@flag_SOURCES = @OR1K_EXCEPT_TRUE@flag.S spr_defs.h
@OR1K_EXCEPT_TRUE@flag_SOURCES = flag.S spr_defs.h
@OR1K_EXCEPT_FALSE@flag_SOURCES =
@OR1K_EXCEPT_TRUE@flag_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/xess.ld
@OR1K_EXCEPT_TRUE@flag_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@flag_LDADD =
@OR1K_EXCEPT_TRUE@cache_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h cache.c cache_asm.S
@OR1K_EXCEPT_TRUE@cache_SOURCES = support.h cache.c cache_asm.S
@OR1K_EXCEPT_FALSE@cache_SOURCES =
@OR1K_EXCEPT_TRUE@cache_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/cache.ld
@OR1K_EXCEPT_TRUE@cfg_SOURCES = @OR1K_EXCEPT_TRUE@cfg.S spr_defs.h
@OR1K_EXCEPT_TRUE@cache_LDFLAGS = -T$(OR1K_SRCDIR)/cache.ld
@OR1K_EXCEPT_TRUE@cfg_SOURCES = cfg.S spr_defs.h
@OR1K_EXCEPT_FALSE@cfg_SOURCES =
@OR1K_EXCEPT_TRUE@cfg_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/xess.ld
@OR1K_EXCEPT_TRUE@cfg_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@cfg_LDADD =
@OR1K_EXCEPT_TRUE@dmatest_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h dmatest.c
@OR1K_EXCEPT_TRUE@dmatest_SOURCES = $(OR1K_SUPPORT_S) support.h dmatest.c
@OR1K_EXCEPT_FALSE@dmatest_SOURCES =
@OR1K_EXCEPT_TRUE@dmatest_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@eth_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h eth.c
@OR1K_EXCEPT_TRUE@dmatest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@eth_SOURCES = $(OR1K_SUPPORT_S) support.h eth.c
@OR1K_EXCEPT_FALSE@eth_SOURCES =
@OR1K_EXCEPT_TRUE@eth_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@acv_uart_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h acv_uart.c
@OR1K_EXCEPT_TRUE@eth_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@acv_uart_SOURCES = $(OR1K_SUPPORT_S) support.h acv_uart.c
@OR1K_EXCEPT_FALSE@acv_uart_SOURCES =
@OR1K_EXCEPT_TRUE@acv_uart_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@acv_gpio_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h acv_gpio.c
@OR1K_EXCEPT_TRUE@acv_uart_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@acv_gpio_SOURCES = $(OR1K_SUPPORT_S) support.h acv_gpio.c
@OR1K_EXCEPT_FALSE@acv_gpio_SOURCES =
@OR1K_EXCEPT_TRUE@acv_gpio_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mmu_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h mmu.c mmu_asm.S
@OR1K_EXCEPT_TRUE@acv_gpio_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@mmu_SOURCES = $(OR1K_SUPPORT_S) support.h mmu.c mmu_asm.S
@OR1K_EXCEPT_FALSE@mmu_SOURCES =
@OR1K_EXCEPT_TRUE@mmu_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/xess.ld
@OR1K_EXCEPT_TRUE@except_test_SOURCES = @OR1K_EXCEPT_TRUE@except_test_s.S except_test.c spr_defs.h
@OR1K_EXCEPT_TRUE@mmu_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@except_test_SOURCES = except_test_s.S except_test.c spr_defs.h
@OR1K_EXCEPT_FALSE@except_test_SOURCES =
@OR1K_EXCEPT_TRUE@except_test_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/xess.ld
@OR1K_EXCEPT_TRUE@int_test_SOURCES = @OR1K_EXCEPT_TRUE@spr_defs.h int_test.S
@OR1K_EXCEPT_TRUE@except_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@int_test_SOURCES = spr_defs.h int_test.S
@OR1K_EXCEPT_FALSE@int_test_SOURCES =
@OR1K_EXCEPT_TRUE@int_test_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/xess.ld
@OR1K_EXCEPT_TRUE@fbtest_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h fbtest.c
@OR1K_EXCEPT_TRUE@int_test_LDFLAGS = -T$(OR1K_SRCDIR)/int_test.ld
@OR1K_EXCEPT_TRUE@fbtest_SOURCES = $(OR1K_SUPPORT_S) support.h fbtest.c
@OR1K_EXCEPT_FALSE@fbtest_SOURCES =
@OR1K_EXCEPT_TRUE@fbtest_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@kbdtest_SOURCES = @OR1K_EXCEPT_TRUE@$(OR1K_SUPPORT_S) support.h kbdtest.c
@OR1K_EXCEPT_TRUE@fbtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@kbdtest_SOURCES = $(OR1K_SUPPORT_S) support.h kbdtest.c
@OR1K_EXCEPT_FALSE@kbdtest_SOURCES =
@OR1K_EXCEPT_TRUE@kbdtest_LDFLAGS = @OR1K_EXCEPT_TRUE@-T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@SUBDIRS = @OR1K_EXCEPT_TRUE@support $(SUB_TESTS) $(OR1K_SUB_TESTS)
@OR1K_EXCEPT_FALSE@SUBDIRS = @OR1K_EXCEPT_FALSE@support $(SUB_TESTS)
@OR1K_EXCEPT_TRUE@OR1K_SUPPORT_S = @OR1K_EXCEPT_TRUE@except.S
@OR1K_EXCEPT_TRUE@kbdtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
@OR1K_EXCEPT_TRUE@SUBDIRS = support $(SUB_TESTS) $(OR1K_SUB_TESTS)
@OR1K_EXCEPT_FALSE@SUBDIRS = support $(SUB_TESTS)
@OR1K_EXCEPT_TRUE@OR1K_SUPPORT_S = except.S
@OR1K_EXCEPT_FALSE@OR1K_SUPPORT_S =
 
LDADD = support/libsupport.a
234,7 → 234,7
@OR1K_EXCEPT_TRUE@basic_OBJECTS = basic.o
@OR1K_EXCEPT_FALSE@basic_OBJECTS =
@OR1K_EXCEPT_TRUE@basic_DEPENDENCIES =
@OR1K_EXCEPT_TRUE@cache_OBJECTS = except.o cache.o cache_asm.o
@OR1K_EXCEPT_TRUE@cache_OBJECTS = cache.o cache_asm.o
@OR1K_EXCEPT_FALSE@cache_OBJECTS =
cache_LDADD = $(LDADD)
cache_DEPENDENCIES = support/libsupport.a
511,7 → 511,7
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" != "." || dot_seen=yes; \
test "$$subdir" = "." && dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \
/trunk/or1ksim/testbench/default.ld
1,32 → 1,34
MEMORY
{
except : ORIGIN = 0x00000000, LENGTH = 0x00002000
flash : ORIGIN = 0x00002000, LENGTH = 0x001fe000
ram : ORIGIN = 0x40000000, LENGTH = 0x00200000
flash : ORIGIN = 0xf0000000, LENGTH = 0x00200000
ram : ORIGIN = 0x00002000, LENGTH = 0x001fe000
}
SECTIONS
{
.text :
{
*(.text)
*(.rodata)
_src_beg = .;
} > flash
.dummy ALIGN(0x4):
{
_src_beg = .;
} > flash
.except :
AT ( ADDR (.dummy))
{
_except_beg = .;
*(.except)
_src_beg = .;
_except_end = .;
} > except
.text :
AT ( ADDR (.except) + SIZEOF (.except) )
.data :
AT ( ADDR (.dummy) + SIZEOF (.except))
{
_dst_beg = .;
*(.text)
} > ram
.data :
AT ( ADDR (.except) + SIZEOF (.except) + SIZEOF (.text))
{
*(.data)
} > ram
.rodata :
AT ( ADDR (.except) + SIZEOF (.except) + SIZEOF (.text) + SIZEOF (.data))
{
*(.rodata)
_dst_end = .;
} > ram
.bss :
38,4 → 40,4
*(.stack)
_ram_end = .;
} > ram
}
}
/trunk/or1ksim/testbench/dmatest.c
1,11 → 1,10
/* DMA test */
 
#include "support.h"
#include "board.h"
#include "../peripheral/fields.h"
#include "../peripheral/dma.h"
 
#define DMA_BASE 0x90000000LU
 
typedef volatile unsigned long *DMA_REG;
 
DMA_REG csr = (unsigned long *)(DMA_BASE + DMA_CSR),
/trunk/or1ksim/testbench/default.cfg
25,9 → 25,9
nmemories = 2
device 0
name = "RAM"
name = "FLASH"
ce = 0
baseaddr = 0x00000000
baseaddr = 0xf0000000
size = 0x00200000
delayr = 10
delayw = -1
34,9 → 34,9
enddevice
device 1
name = "FLASH"
name = "RAM"
ce = 1
baseaddr = 0x40000000
baseaddr = 0x00000000
size = 0x00200000
delayr = 2
delayw = 4
43,6 → 43,38
enddevice
end
 
section immu
enabled = 1
nsets = 64
nways = 1
ustates = 2
pagesize = 8192
end
 
section dmmu
enabled = 1
nsets = 64
nways = 1
ustates = 2
pagesize = 8192
end
 
section ic
enabled = 1
nsets = 256
nways = 1
ustates = 2
blocksize = 16
end
 
section dc
enabled = 1
nsets = 256
nways = 1
ustates = 2
blocksize = 16
end
 
section cpu
ver = 0x1200
rev = 0x0001
74,12 → 106,57
end
 
section mc
enabled = 0
baseaddr = 0xa0000000
enabled = 1
baseaddr = 0x93000000
POC = 0x00000008 /* Power on configuration register */
end
 
section dma
ndmas = 1
device 0
baseaddr = 0xB8000000
irq = 4
enddevice
end
 
section ethernet
nethernets = 1
device 0
baseaddr = 0x92000000
dma = 0
irq = 15
rtx_type = 0
tx_channel = 0
rx_channel = 1
rxfile = "eth0.tx"
txfile = "eth0.tx"
sockif = "eth0"
enddevice
end
 
section VAPI
enabled = 0
server_port = 9998
end
 
section fb
enabled = 1
baseaddr = 0x97000000
refresh_rate = 10000
filename = "primary"
end
 
section kbd
enabled = 1
irq = 5
baseaddr = 0x94000000
rxfile = "./kbdtest.rx"
end
 
section test
enabled = 1
baseaddr = 0xa5000000
end
 
 
/trunk/or1ksim/testbench/except.S
33,9 → 33,9
 
.section .except, "ax"
_buserr_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_buserr)
45,9 → 45,9
_buserr_vector_end:
 
_dpfault_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_dpfault)
57,9 → 57,9
_dpfault_vector_end:
 
_ipfault_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_ipfault)
69,9 → 69,9
_ipfault_vector_end:
 
_lpint_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_tick)
81,9 → 81,9
_lpint_vector_end:
 
_align_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_align)
93,9 → 93,9
_align_vector_end:
 
_illinsn_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_illinsn)
105,9 → 105,9
_illinsn_vector_end:
 
_hpint_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_int)
117,9 → 117,9
_hpint_vector_end:
 
_dtlbmiss_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_dtlbmiss)
129,9 → 129,9
_dtlbmiss_vector_end:
 
_itlbmiss_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_itlbmiss)
141,9 → 141,9
_itlbmiss_vector_end:
 
_range_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_range)
153,9 → 153,9
_range_vector_end:
 
_syscall_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_syscall)
165,9 → 165,9
_syscall_vector_end:
 
_break_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_break)
177,9 → 177,9
_break_vector_end:
 
_trap_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.sw 0x1c(r1),r10
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_trap)
289,7 → 289,7
l.addi r4,r3,MC_CSC(0)
l.movhi r5,hi(FLASH_BASE_ADDR)
l.srai r5,r5,5
l.srai r5,r5,6
l.ori r5,r5,0x0025
l.sw 0(r4),r5
314,7 → 314,7
l.addi r4,r3,MC_CSC(1)
l.movhi r5,hi(SDRAM_BASE_ADDR)
l.srai r5,r5,5
l.srai r5,r5,6
l.ori r5,r5,0x0411
l.sw 0(r4),r5
322,33 → 322,34
l.nop
 
store_regs:
l.sw 0x00(r1),r3
l.sw 0x04(r1),r4
l.sw 0x08(r1),r5
l.sw 0x0c(r1),r6
l.sw 0x10(r1),r7
l.sw 0x14(r1),r8
l.sw 0x20(r1),r11
l.sw 0x24(r1),r12
l.sw 0x28(r1),r13
l.sw 0x2c(r1),r14
l.sw 0x30(r1),r15
l.sw 0x34(r1),r16
l.sw 0x38(r1),r17
l.sw 0x3c(r1),r18
l.sw 0x40(r1),r19
l.sw 0x44(r1),r20
l.sw 0x48(r1),r21
l.sw 0x4c(r1),r22
l.sw 0x50(r1),r23
l.sw 0x54(r1),r24
l.sw 0x58(r1),r25
l.sw 0x5c(r1),r26
l.sw 0x60(r1),r27
l.sw 0x64(r1),r28
l.sw 0x68(r1),r29
l.sw 0x6c(r1),r30
l.sw 0x70(r1),r31
l.sw 0x00(r1),r2
l.sw 0x04(r1),r3
l.sw 0x08(r1),r4
l.sw 0x0c(r1),r5
l.sw 0x10(r1),r6
l.sw 0x14(r1),r7
l.sw 0x18(r1),r8
l.sw 0x24(r1),r11
l.sw 0x28(r1),r12
l.sw 0x2c(r1),r13
l.sw 0x30(r1),r14
l.sw 0x34(r1),r15
l.sw 0x38(r1),r16
l.sw 0x3c(r1),r17
l.sw 0x40(r1),r18
l.sw 0x44(r1),r19
l.sw 0x48(r1),r20
l.sw 0x4c(r1),r21
l.sw 0x50(r1),r22
l.sw 0x54(r1),r23
l.sw 0x58(r1),r24
l.sw 0x5c(r1),r25
l.sw 0x60(r1),r26
l.sw 0x64(r1),r27
l.sw 0x68(r1),r28
l.sw 0x6c(r1),r29
l.sw 0x70(r1),r30
l.sw 0x74(r1),r31
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.lwz r10,0(r10)
356,35 → 357,36
l.nop
 
end_except:
l.lwz r3,0x00(r1)
l.lwz r4,0x04(r1)
l.lwz r5,0x08(r1)
l.lwz r6,0x0c(r1)
l.lwz r7,0x10(r1)
l.lwz r8,0x14(r1)
l.lwz r9,0x18(r1)
l.lwz r10,0x1c(r1)
l.lwz r11,0x20(r1)
l.lwz r12,0x24(r1)
l.lwz r13,0x28(r1)
l.lwz r14,0x2c(r1)
l.lwz r15,0x30(r1)
l.lwz r16,0x34(r1)
l.lwz r17,0x38(r1)
l.lwz r18,0x3c(r1)
l.lwz r19,0x40(r1)
l.lwz r20,0x44(r1)
l.lwz r21,0x48(r1)
l.lwz r22,0x4c(r1)
l.lwz r23,0x50(r1)
l.lwz r24,0x54(r1)
l.lwz r25,0x58(r1)
l.lwz r26,0x5c(r1)
l.lwz r27,0x60(r1)
l.lwz r28,0x64(r1)
l.lwz r29,0x68(r1)
l.lwz r30,0x6c(r1)
l.lwz r31,0x70(r1)
l.addi r1,r1,116
l.lwz r2,0x00(r1)
l.lwz r3,0x04(r1)
l.lwz r4,0x08(r1)
l.lwz r5,0x0c(r1)
l.lwz r6,0x10(r1)
l.lwz r7,0x14(r1)
l.lwz r8,0x18(r1)
l.lwz r9,0x1c(r1)
l.lwz r10,0x20(r1)
l.lwz r11,0x24(r1)
l.lwz r12,0x28(r1)
l.lwz r13,0x2c(r1)
l.lwz r14,0x30(r1)
l.lwz r15,0x34(r1)
l.lwz r16,0x38(r1)
l.lwz r17,0x3c(r1)
l.lwz r18,0x40(r1)
l.lwz r19,0x44(r1)
l.lwz r20,0x48(r1)
l.lwz r21,0x4c(r1)
l.lwz r22,0x50(r1)
l.lwz r23,0x54(r1)
l.lwz r24,0x58(r1)
l.lwz r25,0x5c(r1)
l.lwz r26,0x60(r1)
l.lwz r27,0x64(r1)
l.lwz r28,0x68(r1)
l.lwz r29,0x6c(r1)
l.lwz r30,0x70(r1)
l.lwz r31,0x74(r1)
l.addi r1,r1,120
l.rfe
l.nop
/trunk/or1ksim/testbench/eth0.tx
102,220 → 102,4
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/trunk/or1ksim/testbench/mmu.cfg
17,7 → 17,7
device 1
name = "FLASH"
ce = 0
baseaddr = 0x04000000
baseaddr = 0xf0000000
size = 0x00200000
delayr = 10
delayw = -1
/trunk/or1ksim/testbench/eth.c
2,6 → 2,7
 
#include "spr_defs.h"
#include "support.h"
#include "board.h"
 
typedef long off_t;
 
8,9 → 9,6
#include "../peripheral/fields.h"
#include "../peripheral/ethernet.h"
 
#define ETH_BASE 0x88000000LU
#define ETH_INT_LINE 15
 
typedef volatile unsigned long *REGISTER;
 
REGISTER
34,7 → 32,7
eth_mac_addr1 = (unsigned long *)(ETH_BASE + ETH_MAC_ADDR1),
eth_bd_base = (unsigned long *)(ETH_BASE + ETH_BD_BASE);
 
unsigned int_happend;
volatile unsigned int_happend;
unsigned char r_packet[2000];
unsigned char s_packet[1003];
unsigned tx_bindex;
133,6 → 131,7
 
/* Start Ethernet */
printf("Set Flags\n");
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, IRQ);
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, READY);
SET_FLAG(*eth_moder, ETH_MODER, TXEN);
}
168,6 → 167,7
eth_bd_base[rx_bindex + 1] = (unsigned long)r_packet;
printf("SetFlags\n");
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, IRQ);
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, READY);
SET_FLAG(*eth_moder, ETH_MODER, RXEN);
}
199,7 → 199,7
/* Enable interrup ts */
printf("enable ints\n");
mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << ETH_INT_LINE));
mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << ETH_IRQ));
printf("set mask flags TX\n");
SET_FLAG(*eth_int_mask, ETH_INT_MASK, TXB_M);
/trunk/or1ksim/testbench/cache.ld
1,25 → 1,28
MEMORY
{
except : ORIGIN = 0x00000000, LENGTH = 0x00002000
ram : ORIGIN = 0x00002000, LENGTH = 0x00200000-0x2000
flash : ORIGIN = 0xf0000000, LENGTH = 0x00200000
ram : ORIGIN = 0x00002000, LENGTH = 0x001fe000
}
SECTIONS
{
.except :
.reset :
{
*(.except)
} > except
.text :
*(.reset)
_src_beg = .;
} > flash
.text :
AT ( ADDR (.reset) + SIZEOF (.reset) )
{
_dst_beg = .;
*(.text)
*(.rodata)
_src_beg = .;
} > ram
.data :
AT ( ADDR (.reset) + SIZEOF (.reset) + SIZEOF (.text) )
{
*(.data)
_dst_beg = .;
*(.rodata)
_dst_end = .;
} > ram
.bss :
/trunk/or1ksim/testbench/except_test_s.S
1,9 → 1,16
/* Support file for c based tests */
 
#include "spr_defs.h"
#include "board.h"
 
#define reset _main
 
#define MC_CSR (0x00)
#define MC_POC (0x04)
#define MC_BA_MASK (0x08)
#define MC_CSC(i) (0x10 + (i) * 8)
#define MC_TMS(i) (0x14 + (i) * 8)
 
.global _except_basic
.global _lo_dmmu_en
.global _lo_immu_en
26,7 → 33,6
.space 0x1000
_stack:
 
.section .except, "ax"
.extern _reset_support
.extern _c_reset
.extern _excpt_buserr
43,327 → 49,188
.extern _excpt_break
.extern _excpt_trap
 
.section .except, "ax"
 
.org 0x100
_reset_vector:
_buserr_vector:
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_buserr)
l.ori r10,r10,lo(_excpt_buserr)
l.jr r9
l.nop
l.nop
l.addi r2,r0,0x0
l.addi r3,r0,0x0
l.addi r4,r0,0x0
l.addi r5,r0,0x0
l.addi r6,r0,0x0
l.addi r7,r0,0x0
l.addi r8,r0,0x0
l.addi r9,r0,0x0
l.addi r10,r0,0x0
l.addi r11,r0,0x0
l.addi r12,r0,0x0
l.addi r13,r0,0x0
l.addi r14,r0,0x0
l.addi r15,r0,0x0
l.addi r16,r0,0x0
l.addi r17,r0,0x0
l.addi r18,r0,0x0
l.addi r19,r0,0x0
l.addi r20,r0,0x0
l.addi r21,r0,0x0
l.addi r22,r0,0x0
l.addi r23,r0,0x0
l.addi r24,r0,0x0
l.addi r25,r0,0x0
l.addi r26,r0,0x0
l.addi r27,r0,0x0
l.addi r28,r0,0x0
l.addi r29,r0,0x0
l.addi r30,r0,0x0
l.addi r31,r0,0x0
 
l.movhi r1,hi(_stack)
l.ori r1,r1,lo(_stack)
 
/* Check if this is RTL version */
l.lbz r3,0(r0)
l.sfeqi r3,0xff
l.bf 2f
l.nop
l.movhi r3,hi(_src_beg)
l.ori r3,r3,lo(_src_beg)
l.movhi r4,hi(_dst_beg)
l.ori r4,r4,lo(_dst_beg)
l.movhi r5,hi(_dst_end)
l.ori r5,r5,lo(_dst_end)
l.sub r5,r5,r4
l.sfeqi r5,0
l.bf 2f
l.nop
1: l.lwz r6,0(r3)
l.sw 0(r4),r6
l.addi r3,r3,4
l.addi r4,r4,4
l.addi r5,r5,-4
l.sfgtsi r5,0
l.bf 1b
l.nop
 
2:
 
l.movhi r2,hi(reset)
l.ori r2,r2,lo(reset)
l.jr r2
l.nop
 
.org 0x200
_buserr_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.movhi r10,hi(_excpt_buserr)
l.ori r10,r10,lo(_excpt_buserr)
l.lwz r10,0x0(r10)
l.jr r10
l.nop
 
.org 0x300
_dpfault_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_dpfault)
l.ori r10,r10,lo(_excpt_dpfault)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0x400
_ipfault_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_ipfault)
l.ori r10,r10,lo(_excpt_ipfault)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0x500
_tick_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_tick)
l.ori r10,r10,lo(_excpt_tick)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0x600
_align_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_align)
l.ori r10,r10,lo(_excpt_align)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0x700
_illinsn_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_illinsn)
l.ori r10,r10,lo(_excpt_illinsn)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0x800
_int_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_int)
l.ori r10,r10,lo(_excpt_int)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0x900
_dtlbmiss_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_dtlbmiss)
l.ori r10,r10,lo(_excpt_dtlbmiss)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0xa00
_itlbmiss_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_itlbmiss)
l.ori r10,r10,lo(_excpt_itlbmiss)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0xb00
_range_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_range)
l.ori r10,r10,lo(_excpt_range)
l.lwz r10,0(r10)
l.jr r10
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
.org 0xc00
_syscall_vector:
l.addi r3,r3,4
 
387,38 → 254,207
l.rfe
l.addi r3,r3,8
 
.org 0xd00
_break_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_break)
l.ori r10,r10,lo(_excpt_break)
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
l.sw 0(r4),r3
_trap_vector:
l.addi r1,r1,-120
l.sw 0x1c(r1),r9
l.sw 0x20(r1),r10
l.movhi r9,hi(store_regs)
l.ori r9,r9,lo(store_regs)
l.movhi r10,hi(_excpt_trap)
l.ori r10,r10,lo(_excpt_trap)
l.jr r9
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
l.nop
 
l.mfspr r3,r0,SPR_EEAR_BASE
l.movhi r4,hi(_except_ea)
l.ori r4,r4,lo(_except_ea)
l.sw 0(r4),r3
.section .text
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.movhi r10,hi(_excpt_break)
l.ori r10,r10,lo(_excpt_break)
l.lwz r10,0(r10)
l.jr r10
.org 0x100
_reset_vector:
l.nop
l.nop
l.addi r2,r0,0x0
l.addi r3,r0,0x0
l.addi r4,r0,0x0
l.addi r5,r0,0x0
l.addi r6,r0,0x0
l.addi r7,r0,0x0
l.addi r8,r0,0x0
l.addi r9,r0,0x0
l.addi r10,r0,0x0
l.addi r11,r0,0x0
l.addi r12,r0,0x0
l.addi r13,r0,0x0
l.addi r14,r0,0x0
l.addi r15,r0,0x0
l.addi r16,r0,0x0
l.addi r17,r0,0x0
l.addi r18,r0,0x0
l.addi r19,r0,0x0
l.addi r20,r0,0x0
l.addi r21,r0,0x0
l.addi r22,r0,0x0
l.addi r23,r0,0x0
l.addi r24,r0,0x0
l.addi r25,r0,0x0
l.addi r26,r0,0x0
l.addi r27,r0,0x0
l.addi r28,r0,0x0
l.addi r29,r0,0x0
l.addi r30,r0,0x0
l.addi r31,r0,0x0
 
.org 0xe00
_trap_vector:
l.addi r1,r1,-116
l.sw 0x18(r1),r9
l.jal store_regs
l.movhi r3,hi(start)
l.ori r3,r3,lo(start)
l.jr r3
l.nop
start:
l.jal _init_mc
l.nop
 
l.movhi r1,hi(_stack)
l.ori r1,r1,lo(_stack)
 
/* Setup exception wrappers */
l.movhi r3,hi(_src_beg)
l.ori r3,r3,lo(_src_beg)
l.addi r7,r0,0x100
 
1: l.addi r7,r7,0x100
l.sfeqi r7,0xf00
l.bf 1f
l.nop
l.addi r4,r7,0
l.addi r5,r0,0
2:
l.lwz r6,0(r3)
l.sw 0(r4),r6
l.addi r3,r3,4
l.addi r4,r4,4
l.addi r5,r5,1
l.sfeqi r5,16
l.bf 1b
l.nop
l.j 2b
l.nop
1:
/* Copy data section */
l.movhi r4,hi(_dst_beg)
l.ori r4,r4,lo(_dst_beg)
l.movhi r5,hi(_dst_end)
l.ori r5,r5,lo(_dst_end)
l.sub r5,r5,r4
l.sfeqi r5,0
l.bf 2f
l.nop
1: l.lwz r6,0(r3)
l.sw 0(r4),r6
l.addi r3,r3,4
l.addi r4,r4,4
l.addi r5,r5,-4
l.sfgtsi r5,0
l.bf 1b
l.nop
 
2:
 
l.movhi r2,hi(reset)
l.ori r2,r2,lo(reset)
l.jr r2
l.nop
 
_init_mc:
l.movhi r3,hi(MC_BASE_ADDR)
l.ori r3,r3,lo(MC_BASE_ADDR)
l.addi r4,r3,MC_CSC(0)
l.movhi r5,hi(FLASH_BASE_ADDR)
l.srai r5,r5,6
l.ori r5,r5,0x0025
l.sw 0(r4),r5
l.addi r4,r3,MC_TMS(0)
l.movhi r5,hi(FLASH_TMS_VAL)
l.ori r5,r5,lo(FLASH_TMS_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_BA_MASK
l.addi r5,r0,MC_MASK_VAL
l.sw 0(r4),r5
l.addi r4,r3,MC_CSR
l.movhi r5,hi(MC_CSR_VAL)
l.ori r5,r5,lo(MC_CSR_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_TMS(1)
l.movhi r5,hi(SDRAM_TMS_VAL)
l.ori r5,r5,lo(SDRAM_TMS_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_CSC(1)
l.movhi r5,hi(SDRAM_BASE_ADDR)
l.srai r5,r5,6
l.ori r5,r5,0x0411
l.sw 0(r4),r5
l.jr r9
l.nop
 
store_regs:
l.sw 0x00(r1),r2
l.sw 0x04(r1),r3
l.sw 0x08(r1),r4
l.sw 0x0c(r1),r5
l.sw 0x10(r1),r6
l.sw 0x14(r1),r7
l.sw 0x18(r1),r8
l.sw 0x24(r1),r11
l.sw 0x28(r1),r12
l.sw 0x2c(r1),r13
l.sw 0x30(r1),r14
l.sw 0x34(r1),r15
l.sw 0x38(r1),r16
l.sw 0x3c(r1),r17
l.sw 0x40(r1),r18
l.sw 0x44(r1),r19
l.sw 0x48(r1),r20
l.sw 0x4c(r1),r21
l.sw 0x50(r1),r22
l.sw 0x54(r1),r23
l.sw 0x58(r1),r24
l.sw 0x5c(r1),r25
l.sw 0x60(r1),r26
l.sw 0x64(r1),r27
l.sw 0x68(r1),r28
l.sw 0x6c(r1),r29
l.sw 0x70(r1),r30
l.sw 0x74(r1),r31
 
l.mfspr r3,r0,SPR_EPCR_BASE
l.movhi r4,hi(_except_pc)
l.ori r4,r4,lo(_except_pc)
431,75 → 467,43
 
l.movhi r9,hi(end_except)
l.ori r9,r9,lo(end_except)
l.movhi r10,hi(_excpt_trap)
l.ori r10,r10,lo(_excpt_trap)
 
l.lwz r10,0(r10)
l.jr r10
l.nop
 
store_regs:
l.sw 0x00(r1),r3
l.sw 0x04(r1),r4
l.sw 0x08(r1),r5
l.sw 0x0c(r1),r6
l.sw 0x10(r1),r7
l.sw 0x14(r1),r8
l.sw 0x1c(r1),r10
l.sw 0x20(r1),r11
l.sw 0x24(r1),r12
l.sw 0x28(r1),r13
l.sw 0x2c(r1),r14
l.sw 0x30(r1),r15
l.sw 0x34(r1),r16
l.sw 0x38(r1),r17
l.sw 0x3c(r1),r18
l.sw 0x40(r1),r19
l.sw 0x44(r1),r20
l.sw 0x48(r1),r21
l.sw 0x4c(r1),r22
l.sw 0x50(r1),r23
l.sw 0x54(r1),r24
l.sw 0x58(r1),r25
l.sw 0x5c(r1),r26
l.sw 0x60(r1),r27
l.sw 0x64(r1),r28
l.sw 0x68(r1),r29
l.sw 0x6c(r1),r30
l.sw 0x70(r1),r31
l.jr r9
l.nop
 
end_except:
l.lwz r3,0x00(r1)
l.lwz r4,0x04(r1)
l.lwz r5,0x08(r1)
l.lwz r6,0x0c(r1)
l.lwz r7,0x10(r1)
l.lwz r8,0x14(r1)
l.lwz r9,0x18(r1)
l.lwz r10,0x1c(r1)
l.lwz r11,0x20(r1)
l.lwz r12,0x24(r1)
l.lwz r13,0x28(r1)
l.lwz r14,0x2c(r1)
l.lwz r15,0x30(r1)
l.lwz r16,0x34(r1)
l.lwz r17,0x38(r1)
l.lwz r18,0x3c(r1)
l.lwz r19,0x40(r1)
l.lwz r20,0x44(r1)
l.lwz r21,0x48(r1)
l.lwz r22,0x4c(r1)
l.lwz r23,0x50(r1)
l.lwz r24,0x54(r1)
l.lwz r25,0x58(r1)
l.lwz r26,0x5c(r1)
l.lwz r27,0x60(r1)
l.lwz r28,0x64(r1)
l.lwz r29,0x68(r1)
l.lwz r30,0x6c(r1)
l.lwz r31,0x70(r1)
l.addi r1,r1,116
l.lwz r2,0x00(r1)
l.lwz r3,0x04(r1)
l.lwz r4,0x08(r1)
l.lwz r5,0x0c(r1)
l.lwz r6,0x10(r1)
l.lwz r7,0x14(r1)
l.lwz r8,0x18(r1)
l.lwz r9,0x1c(r1)
l.lwz r10,0x20(r1)
l.lwz r11,0x24(r1)
l.lwz r12,0x28(r1)
l.lwz r13,0x2c(r1)
l.lwz r14,0x30(r1)
l.lwz r15,0x34(r1)
l.lwz r16,0x38(r1)
l.lwz r17,0x3c(r1)
l.lwz r18,0x40(r1)
l.lwz r19,0x44(r1)
l.lwz r20,0x48(r1)
l.lwz r21,0x4c(r1)
l.lwz r22,0x50(r1)
l.lwz r23,0x54(r1)
l.lwz r24,0x58(r1)
l.lwz r25,0x5c(r1)
l.lwz r26,0x60(r1)
l.lwz r27,0x64(r1)
l.lwz r28,0x68(r1)
l.lwz r29,0x6c(r1)
l.lwz r30,0x70(r1)
l.lwz r31,0x74(r1)
l.addi r1,r1,120
l.mtspr r0,r9,SPR_EPCR_BASE
l.rfe
l.nop
/trunk/or1ksim/testbench/kbdtest.c
1,15 → 1,11
/* Simple keyboard test. Outputs scan codes. */
#include "support.h"
#include "spr_defs.h"
#include "support.h"
#include "board.h"
 
/* Whether this test should be run in interactive mode; scan codes are not check against real ones */
#define INTERACTIVE 0
 
#define BASEADDR 0xb1000000
 
#define KBD_INT_LINE 21 /* To which interrupt is uart connected */
 
/* fails if x is false */
#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
/* Waits a few cycles that uart can prepare its data */
60,7 → 56,7
unsigned x;
printf ("Int\n");
do {
x = getreg (BASEADDR);
x = getreg (KBD_BASE_ADD);
if (x) printf ("0x%02x, ", x);
report(x);
if (x == 1) done = 1;
85,7 → 81,7
/* Enable interrupts */
mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << KBD_INT_LINE));
mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << KBD_IRQ));
 
while (!done) printf ("[%i]", done);
report (0xdeaddead);
/trunk/or1ksim/testbench/int_test.ld
0,0 → 1,31
MEMORY
{
flash : ORIGIN = 0xf0000000, LENGTH = 0x00200000
ram : ORIGIN = 0x00000500, LENGTH = 0x001fb000
}
SECTIONS
{
.reset :
{
*(.reset)
_src_beg = .;
} > flash
.text :
AT ( ADDR (.reset) + SIZEOF (.reset) )
{
_dst_beg = .;
*(.text)
} > ram
.data :
AT ( ADDR (.reset) + SIZEOF (.reset) + SIZEOF (.text) )
{
*(.data)
*(.rodata)
_dst_end = .;
} > ram
.bss :
{
*(.bss)
} > ram
}
trunk/or1ksim/testbench/int_test.ld Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/or1ksim/testbench/int_test.S =================================================================== --- trunk/or1ksim/testbench/int_test.S (revision 969) +++ trunk/or1ksim/testbench/int_test.S (revision 970) @@ -18,14 +18,127 @@ */ #include "spr_defs.h" -#define RAM_START 0x40000000 +#include "board.h" -.section .except, "ax" +#define RAM_START 0x00000000 + +#define MC_CSR (0x00) +#define MC_POC (0x04) +#define MC_BA_MASK (0x08) +#define MC_CSC(i) (0x10 + (i) * 8) +#define MC_TMS(i) (0x14 + (i) * 8) + +.section .reset, "ax" + .org 0x100 - l.j _main + +_reset_vector: + l.addi r2,r0,0x0 + l.addi r3,r0,0x0 + l.addi r4,r0,0x0 + l.addi r5,r0,0x0 + l.addi r6,r0,0x0 + l.addi r7,r0,0x0 + l.addi r8,r0,0x0 + l.addi r9,r0,0x0 + l.addi r10,r0,0x0 + l.addi r11,r0,0x0 + l.addi r12,r0,0x0 + l.addi r13,r0,0x0 + l.addi r14,r0,0x0 + l.addi r15,r0,0x0 + l.addi r16,r0,0x0 + l.addi r17,r0,0x0 + l.addi r18,r0,0x0 + l.addi r19,r0,0x0 + l.addi r20,r0,0x0 + l.addi r21,r0,0x0 + l.addi r22,r0,0x0 + l.addi r23,r0,0x0 + l.addi r24,r0,0x0 + l.addi r25,r0,0x0 + l.addi r26,r0,0x0 + l.addi r27,r0,0x0 + l.addi r28,r0,0x0 + l.addi r29,r0,0x0 + l.addi r30,r0,0x0 + l.addi r31,r0,0x0 + + l.movhi r3,hi(start) + l.ori r3,r3,lo(start) + l.jr r3 l.nop - -.org 0x500 +start: + l.jal _init_mc + l.nop + + /* Setup exception wrapper */ + l.movhi r3,hi(_src_beg) + l.ori r3,r3,lo(_src_beg) + l.movhi r4,hi(_dst_beg) + l.ori r4,r4,lo(_dst_beg) + l.movhi r5,hi(_dst_end) + l.ori r5,r5,lo(_dst_end) + l.sub r5,r5,r4 + l.sfeqi r5,0 + l.bf 2f + l.nop +1: + l.lwz r6,0(r3) + l.sw 0(r4),r6 + l.addi r3,r3,4 + l.addi r4,r4,4 + l.addi r5,r5,-4 + l.sfgtsi r5,0 + l.bf 1b + l.nop +2: + l.movhi r2,hi(_main) + l.ori r2,r2,lo(_main) + l.jr r2 + l.nop + +_init_mc: + + l.movhi r3,hi(MC_BASE_ADDR) + l.ori r3,r3,lo(MC_BASE_ADDR) + + l.addi r4,r3,MC_CSC(0) + l.movhi r5,hi(FLASH_BASE_ADDR) + l.srai r5,r5,6 + l.ori r5,r5,0x0025 + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(0) + l.movhi r5,hi(FLASH_TMS_VAL) + l.ori r5,r5,lo(FLASH_TMS_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_BA_MASK + l.addi r5,r0,MC_MASK_VAL + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CSR + l.movhi r5,hi(MC_CSR_VAL) + l.ori r5,r5,lo(MC_CSR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(1) + l.movhi r5,hi(SDRAM_TMS_VAL) + l.ori r5,r5,lo(SDRAM_TMS_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CSC(1) + l.movhi r5,hi(SDRAM_BASE_ADDR) + l.srai r5,r5,6 + l.ori r5,r5,0x0411 + l.sw 0(r4),r5 + + l.jr r9 + l.nop + +.section .text + # # Tick timer exception handler # @@ -88,7 +201,7 @@ l.j 1b l.nop -.section .text + _main: l.nop l.addi r3,r0,SPR_SR_SM @@ -233,7 +346,7 @@ l.addi r3,r30,0 l.andi r26,r26,SPR_SR_F l.sfeq r26,r0 - l.bnf _die +/* l.bnf _die */ l.nop l.sfeqi r3,0xbbbb l.bnf _die
/trunk/or1ksim/testbench/cfg.S
2,6 → 2,9
#include "spr_defs.h"
.section .except, "ax"
l.addi r2,r0,0
 
.section .text
.org 0x100
_reset:
l.addi r1,r0,0x7f00
11,7 → 14,6
l.nop
 
 
.section .text
_main:
l.addi r2,r0,0
 
/trunk/or1ksim/testbench/cache_asm.S
1,8 → 1,18
#include "spr_defs.h"
#include "board.h"
 
#define IC_ENABLE 0
#define DC_ENABLE 0
 
#define MC_CSR (0x00)
#define MC_POC (0x04)
#define MC_BA_MASK (0x08)
#define MC_CSC(i) (0x10 + (i) * 8)
#define MC_TMS(i) (0x14 + (i) * 8)
 
 
.extern _main
 
.global _ic_enable
.global _ic_disable
.global _dc_enable
11,6 → 21,123
.global _ic_inv_test
.global _dc_inv_test
 
.section .stack
.space 0x1000
_stack:
 
.section .reset, "ax"
 
.org 0x100
_reset_vector:
l.addi r2,r0,0x0
l.addi r3,r0,0x0
l.addi r4,r0,0x0
l.addi r5,r0,0x0
l.addi r6,r0,0x0
l.addi r7,r0,0x0
l.addi r8,r0,0x0
l.addi r9,r0,0x0
l.addi r10,r0,0x0
l.addi r11,r0,0x0
l.addi r12,r0,0x0
l.addi r13,r0,0x0
l.addi r14,r0,0x0
l.addi r15,r0,0x0
l.addi r16,r0,0x0
l.addi r17,r0,0x0
l.addi r18,r0,0x0
l.addi r19,r0,0x0
l.addi r20,r0,0x0
l.addi r21,r0,0x0
l.addi r22,r0,0x0
l.addi r23,r0,0x0
l.addi r24,r0,0x0
l.addi r25,r0,0x0
l.addi r26,r0,0x0
l.addi r27,r0,0x0
l.addi r28,r0,0x0
l.addi r29,r0,0x0
l.addi r30,r0,0x0
l.addi r31,r0,0x0
 
l.movhi r3,hi(start)
l.ori r3,r3,lo(start)
l.jr r3
l.nop
start:
l.jal _init_mc
l.nop
 
l.movhi r1,hi(_stack)
l.ori r1,r1,lo(_stack)
 
/* Copy data section */
l.movhi r3,hi(_src_beg)
l.ori r3,r3,lo(_src_beg)
l.movhi r4,hi(_dst_beg)
l.ori r4,r4,lo(_dst_beg)
l.movhi r5,hi(_dst_end)
l.ori r5,r5,lo(_dst_end)
l.sub r5,r5,r4
l.sfeqi r5,0
l.bf 2f
l.nop
1: l.lwz r6,0(r3)
l.sw 0(r4),r6
l.addi r3,r3,4
l.addi r4,r4,4
l.addi r5,r5,-4
l.sfgtsi r5,0
l.bf 1b
l.nop
2:
l.movhi r2,hi(_main)
l.ori r2,r2,lo(_main)
l.jr r2
l.nop
 
_init_mc:
l.movhi r3,hi(MC_BASE_ADDR)
l.ori r3,r3,lo(MC_BASE_ADDR)
l.addi r4,r3,MC_CSC(0)
l.movhi r5,hi(FLASH_BASE_ADDR)
l.srai r5,r5,6
l.ori r5,r5,0x0025
l.sw 0(r4),r5
l.addi r4,r3,MC_TMS(0)
l.movhi r5,hi(FLASH_TMS_VAL)
l.ori r5,r5,lo(FLASH_TMS_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_BA_MASK
l.addi r5,r0,MC_MASK_VAL
l.sw 0(r4),r5
l.addi r4,r3,MC_CSR
l.movhi r5,hi(MC_CSR_VAL)
l.ori r5,r5,lo(MC_CSR_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_TMS(1)
l.movhi r5,hi(SDRAM_TMS_VAL)
l.ori r5,r5,lo(SDRAM_TMS_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_CSC(1)
l.movhi r5,hi(SDRAM_BASE_ADDR)
l.srai r5,r5,6
l.ori r5,r5,0x0411
l.sw 0(r4),r5
l.jr r9
l.nop
 
 
.section .text
 
_ic_enable:
/* Disable IC */
l.mfspr r13,r0,SPR_SR
/trunk/or1ksim/testbench/uos/except_or32.S
2,7 → 2,15
/* (C) 2000 Damjan Lampret, lampret@opencores.org */
 
#include "spr_defs.h"
#include "../board.h"
 
#define MC_CSR (0x00)
#define MC_POC (0x04)
#define MC_BA_MASK (0x08)
#define MC_CSC(i) (0x10 + (i) * 8)
#define MC_TMS(i) (0x14 + (i) * 8)
 
 
/*
* Context is saved to area pointed by pointer in R3. Original
* R3 is at memory location 0 and task's PC is at memory location 4.
165,7 → 173,84
*/
.org 0x100
_reset_vector:
l.nop
 
l.movhi r3,hi(MC_BASE_ADDR)
l.ori r3,r3,lo(MC_BASE_ADDR)
l.addi r4,r3,MC_CSC(0)
l.movhi r5,hi(FLASH_BASE_ADDR)
l.srai r5,r5,6
l.ori r5,r5,0x0025
l.sw 0(r4),r5
l.addi r4,r3,MC_TMS(0)
l.movhi r5,hi(FLASH_TMS_VAL)
l.ori r5,r5,lo(FLASH_TMS_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_BA_MASK
l.addi r5,r0,MC_MASK_VAL
l.sw 0(r4),r5
l.addi r4,r3,MC_CSR
l.movhi r5,hi(MC_CSR_VAL)
l.ori r5,r5,lo(MC_CSR_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_TMS(1)
l.movhi r5,hi(SDRAM_TMS_VAL)
l.ori r5,r5,lo(SDRAM_TMS_VAL)
l.sw 0(r4),r5
l.addi r4,r3,MC_CSC(1)
l.movhi r5,hi(SDRAM_BASE_ADDR)
l.srai r5,r5,6
l.ori r5,r5,0x0411
l.sw 0(r4),r5
l.jr r9
l.nop
 
/* Copy data section */
l.movhi r3,hi(_src_beg)
l.ori r3,r3,lo(_src_beg)
l.addi r4,r0,0x200
l.movhi r5,hi(_except_end)
l.ori r5,r5,lo(_except_end)
l.movhi r6,hi(_except_beg)
l.ori r6,r6,lo(_except_beg)
l.sub r5,r6,r5
1:
l.lwz r6,0(r3)
l.sw 0(r4),r6
l.addi r3,r3,4
l.addi r4,r4,4
l.addi r5,r5,-4
l.sfgtsi r5,0
l.bf 1b
l.nop
 
l.movhi r4,hi(_dst_beg)
l.ori r4,r4,lo(_dst_beg)
l.movhi r5,hi(_dst_end)
l.ori r5,r5,lo(_dst_end)
l.sub r5,r5,r4
l.sfeqi r5,0
l.bf 2f
l.nop
1:
l.lwz r6,0(r3)
l.sw 0(r4),r6
l.addi r3,r3,4
l.addi r4,r4,4
l.addi r5,r5,-4
l.sfgtsi r5,0
l.bf 1b
l.nop
 
2:
 
 
l.movhi r2,hi(_reset)
l.ori r2,r2,lo(_reset)
l.jr r2
172,6 → 257,19
l.nop
 
/*
* Switch to a new context pointed by _task_context
*/
.global _dispatch
.align 4
_dispatch:
/* load user task GPRs and PC */
l.movhi r3,hi(_task_context)
l.addi r3,r0,lo(_task_context)
LOADREGS_N_GO
 
.section .except, "ax"
 
/*
* Bus Error Exception handler
*/
.org 0x0200
195,7 → 293,6
l.sw 0(r0),r3 /* Save r3 */
PRINTF(r3,_extint_str)
l.mfspr r3,r0,SPR_EPCR_BASE /* Get EPCR */
/* l.addi r3,r3,4 /* increment because EPCR instruction was already executed */
l.sw 4(r0),r3 /* and save it */
 
/* now save user task context */
251,14 → 348,4
_syscall_str:
.ascii "System call exception.\n\000"
 
/*
* Switch to a new context pointed by _task_context
*/
.global _dispatch
.align 4
_dispatch:
/* load user task GPRs and PC */
l.movhi r3,hi(_task_context)
l.addi r3,r0,lo(_task_context)
LOADREGS_N_GO
 
/trunk/or1ksim/testbench/except_test.c
7,11 → 7,13
/* Define RAM physical location and size
Bottom half will be used for this program, the rest
will be used for testing */
#define FLASH_START 0x00000000
#define FLASH_START 0xf0000000
#define FLASH_SIZE 0x00200000
#define RAM_START 0x40000000
#define RAM_SIZE 0x00200000
#define RAM_START 0x00000000
#define RAM_SIZE 0x04000000
 
#define TEST_BASE 0xa5000000
 
/* MMU page size */
#define PAGE_SIZE 8192
 
702,10 → 704,10
except_ea = 0;
 
/* Check if there was bus error exception */
ret = call ((unsigned long)&load_b_acc_32, ea );
ret = call ((unsigned long)&load_acc_32, ea );
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_BERR));
ASSERT(except_pc == (unsigned long)load_b_acc_32 + 8);
ASSERT(except_pc == (unsigned long)load_acc_32 + 8);
ASSERT(except_ea == ea);
ASSERT(ret == 0x12345678);
 
973,7 → 975,6
except_pc = 0;
except_ea = 0;
 
printf("Buserrrrr!\n");
/* Check if there was bus error exception */
call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
ASSERT(except_count == 1);
1142,21 → 1143,28
/* ITLB exception test */
itlb_test ();
 
printf("dtlb_test\n");
/* DTLB exception test */
dtlb_test ();
 
printf("buserr_test\n");
/* Bus error exception test */
buserr_test ();
 
printf("illegal_insn_test\n");
/* Bus error exception test */
/* Illegal insn test */
illegal_insn_test ();
 
printf("align_test\n");
/* Alignment test */
align_test ();
 
printf("trap_test\n");
/* Trap test */
trap_test ();
 
printf("except_priority_test\n");
/* Range test */
// range_test ();
 
/trunk/or1ksim/testbench/fbtest.c
1,8 → 1,8
/* Simple frame buffer test. Draws some horizontal with different colors. */
#include "support.h"
 
#define BUFADDR 0x40100000
#define BASEADDR 0xb8000000
#define BUFADDR 0x00100000
#define BASEADDR 0x97000000
#define BUF_PTR ((unsigned char *)BUFADDR)
#define PAL_PTR ((unsigned long *)(BASEADDR + 0x400))
#define SIZEX 640
/trunk/or1ksim/testbench/Makefile.am
72,15 → 72,15
 
####### Platform Dependent Tests - OR1K ########
basic_SOURCES = basic.S spr_defs.h
basic_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
basic_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
basic_LDADD =
flag_SOURCES = flag.S spr_defs.h
flag_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
flag_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
flag_LDADD =
cache_SOURCES = $(OR1K_SUPPORT_S) support.h cache.c cache_asm.S
cache_SOURCES = support.h cache.c cache_asm.S
cache_LDFLAGS = -T$(OR1K_SRCDIR)/cache.ld
cfg_SOURCES = cfg.S spr_defs.h
cfg_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
cfg_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
cfg_LDADD =
dmatest_SOURCES = $(OR1K_SUPPORT_S) support.h dmatest.c
dmatest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
91,11 → 91,11
acv_gpio_SOURCES = $(OR1K_SUPPORT_S) support.h acv_gpio.c
acv_gpio_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
mmu_SOURCES = $(OR1K_SUPPORT_S) support.h mmu.c mmu_asm.S
mmu_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
mmu_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
except_test_SOURCES = except_test_s.S except_test.c spr_defs.h
except_test_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
except_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
int_test_SOURCES = spr_defs.h int_test.S
int_test_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
int_test_LDFLAGS = -T$(OR1K_SRCDIR)/int_test.ld
fbtest_SOURCES = $(OR1K_SUPPORT_S) support.h fbtest.c
fbtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
kbdtest_SOURCES = $(OR1K_SUPPORT_S) support.h kbdtest.c
/trunk/or1ksim/testbench/flag.S
1,9 → 1,12
/* Basic SR flag test */
#include "spr_defs.h"
 
#define MEM_RAM 0x40000000
#define SET_ARITH_FLAG 0 /* If this is not set this test has no meaning */
 
.section .except, "ax"
l.movhi r10,0x8000
 
.section .text
.org 0x100
_reset:
l.nop
18,10 → 21,12
 
/* Test start */
#if SET_ARITH_FLAG
/* Simple zero test */
l.addi r1,r0,1 /* f = 0 */
l.addi r1, r0, 0
l.bnf _err
l.bf _err
l.addi r1,r0,1 /* f = 0 */
l.add r1, r0, r0
l.bnf _err
81,7 → 86,8
l.addi r1,r0,0 /* f = 1 */
l.and r1, r11, r10
l.bf _err
#endif
 
l.movhi r3,0xdead
l.ori r3,r3,0xdead
l.nop NOP_REPORT
/trunk/or1ksim/testbench/board.h
0,0 → 1,21
#ifndef _BOARD_H_
#define _BOARD_H_
 
#define MC_CSR_VAL 0x0B000300
#define MC_MASK_VAL 0x000003f0
#define FLASH_BASE_ADDR 0xf0000000
#define FLASH_TMS_VAL 0x00000103
#define SDRAM_BASE_ADDR 0x00000000
#define SDRAM_TMS_VAL 0x19220057
 
 
#define UART_BASE 0x90000000
#define UART_IRQ 19
#define ETH_BASE 0x92000000
#define ETH_IRQ 15
#define KBD_BASE_ADD 0x94000000
#define KBD_IRQ 5
#define MC_BASE_ADDR 0x93000000
#define DMA_BASE 0xb8000000
 
#endif
/trunk/or1ksim/peripheral/gpio.c
57,7 → 57,7
gpio->irq = config.gpios[i].irq;
/* Register memory range */
register_memoryarea( gpio->baseaddr, GPIO_ADDR_SPACE, 4, gpio_read32, gpio_write32 );
register_memoryarea( gpio->baseaddr, GPIO_ADDR_SPACE, 4, 0, gpio_read32, gpio_write32 );
 
/* Possibly connect to VAPI */
if ( config.gpios[i].base_vapi_id ) {
/trunk/or1ksim/peripheral/mc.c
41,8 → 41,8
while (mem_dev) {
if (mem_dev->chip_select == cs) {
mem_dev->addr_mask = 0xe0000000 | mc.ba_mask << 21;
mem_dev->addr_compare = ((csc >> MC_CSC_SEL_OFFSET) /* & 0xff*/) << 21;
mem_dev->addr_mask = mc.ba_mask << 22;
mem_dev->addr_compare = ((csc >> MC_CSC_SEL_OFFSET) /* & 0xff*/) << 22;
mem_dev->valid = (csc >> MC_CSC_EN_OFFSET) & 0x01;
if ((csc >> MC_CSC_MEMTYPE_OFFSET) && 0x07 == MC_CSC_MEMTYPE_ASYNC) {
166,7 → 166,7
 
set_csc_tms (0, mc.csc[0], mc.tms[0]);
 
register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, mc_read_word, mc_write_word);
register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, 1, mc_read_word, mc_write_word);
}
}
 
/trunk/or1ksim/peripheral/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
105,19 → 105,7
host_os = @host_os@
 
noinst_LIBRARIES = libperipheral.a
libperipheral_a_SOURCES = \
16450.c \
dma.c \
mc.c \
eth.c \
crc32.c \
gpio.c \
vga.c \
fb.c \
ps2kbd.c \
atahost.c \
atadevice.c \
atadevice_cmdi.c
libperipheral_a_SOURCES = 16450.c dma.c mc.c eth.c crc32.c gpio.c vga.c fb.c ps2kbd.c atahost.c atadevice.c atadevice_cmdi.c test.c
 
mkinstalldirs = $(SHELL) $(top_srcdir)/mkinstalldirs
CONFIG_HEADER = ../config.h
131,7 → 119,7
LIBS = @LIBS@
libperipheral_a_LIBADD =
libperipheral_a_OBJECTS = 16450.o dma.o mc.o eth.o crc32.o gpio.o vga.o \
fb.o ps2kbd.o atahost.o atadevice.o atadevice_cmdi.o
fb.o ps2kbd.o atahost.o atadevice.o atadevice_cmdi.o test.o
COMPILE = $(CC) $(DEFS) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
CCLD = $(CC)
LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@
144,7 → 132,7
GZIP_ENV = --best
DEP_FILES = .deps/16450.P .deps/atadevice.P .deps/atadevice_cmdi.P \
.deps/atahost.P .deps/crc32.P .deps/dma.P .deps/eth.P .deps/fb.P \
.deps/gpio.P .deps/mc.P .deps/ps2kbd.P .deps/vga.P
.deps/gpio.P .deps/mc.P .deps/ps2kbd.P .deps/test.P .deps/vga.P
SOURCES = $(libperipheral_a_SOURCES)
OBJECTS = $(libperipheral_a_OBJECTS)
 
/trunk/or1ksim/peripheral/eth.c
506,7 → 506,7
eth->eth_number = i;
eth_reset_controller( eth );
if ( eth->baseaddr && first_time )
register_memoryarea( eth->baseaddr, ETH_ADDR_SPACE, 4, eth_read32, eth_write32 );
register_memoryarea( eth->baseaddr, ETH_ADDR_SPACE, 4, 0, eth_read32, eth_write32 );
}
 
if ( first_time )
/trunk/or1ksim/peripheral/ps2kbd.c
250,7 → 250,7
kbd_buf_tail = 0;
kbd_kresp = 0x0;
kbd_ccmdbyte = 0x65; /* We reset into default normal operation. */
register_memoryarea(config.kbd.baseaddr, KBD_SPACE, 1, kbd_read8, kbd_write8);
register_memoryarea(config.kbd.baseaddr, KBD_SPACE, 1, 0, kbd_read8, kbd_write8);
if (!(kbd_rxfs = fopen(config.kbd.rxfile, "r"))
&& !(kbd_rxfs = fopen(config.kbd.rxfile, "r+"))) {
/trunk/or1ksim/peripheral/fb.c
281,7 → 281,7
pal[i] = (i << 16) | (i << 8) | (i << 0);
 
if (config.fb.baseaddr)
register_memoryarea(config.fb.baseaddr, FB_PAL + 256*4, 4, fb_read32, fb_write32);
register_memoryarea(config.fb.baseaddr, FB_PAL + 256*4, 4, 0, fb_read32, fb_write32);
SCHED_ADD(fb_job, 0, runtime.sim.cycles + config.fb.refresh_rate);
}
}
/trunk/or1ksim/peripheral/dma.c
68,7 → 68,7
dma->ch[channel_number].regs.am0 = dma->ch[channel_number].regs.am1 = 0xFFFFFFFC;
}
if ( dma->baseaddr != 0 )
register_memoryarea( dma->baseaddr, DMA_ADDR_SPACE, 4, dma_read32, dma_write32);
register_memoryarea( dma->baseaddr, DMA_ADDR_SPACE, 4, 0, dma_read32, dma_write32);
}
}
 
/trunk/or1ksim/peripheral/atahost.c
75,7 → 75,7
/* Connect ata_devices. */
ata_devices_init(&ata->devices, config.atas[i].dev_file0, config.atas[i].dev_file1);
 
register_memoryarea(ata->baseaddr, ATA_ADDR_SPACE, 4, ata_read32, ata_write32);
register_memoryarea(ata->baseaddr, ATA_ADDR_SPACE, 4, 0, ata_read32, ata_write32);
}
/* the reset bit in the control register 'ctrl' is set, reset connect ata-devices */
/trunk/or1ksim/peripheral/vga.c
248,7 → 248,7
vga[i].vbindex = 0;
 
if (config.vgas[i].baseaddr)
register_memoryarea(config.vgas[i].baseaddr, VGA_ADDR_SPACE, 4, vga_read32, vga_write32);
register_memoryarea(config.vgas[i].baseaddr, VGA_ADDR_SPACE, 4, 0, vga_read32, vga_write32);
SCHED_ADD(vga_job, i, runtime.sim.cycles + config.vgas[i].refresh_rate);
}
}
/trunk/or1ksim/peripheral/16450.c
566,7 → 566,7
uarts[i].txfs = 0;
} else {
vapi_install_handler (config.uarts[i].vapi_id, uart_vapi_read);
register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, 0, uart_read_byte, uart_write_byte);
}
} else if (config.uarts[i].txfile) { /* MM: Try to create stream. */
if (!(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r"))
580,7 → 580,7
printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
} else
debug (1, "WARNING: UART%d has problems with TX file stream.\n", i);
register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, 0, uart_read_byte, uart_write_byte);
}
if (config.uarts[i].uart16550)
/trunk/or1ksim/peripheral/test.c
0,0 → 1,38
#include <stdio.h>
#include "sim-config.h"
#include "abstract.h"
#include "except.h"
 
unsigned long array[128];
 
/* Test write */
void test_write32 (unsigned long addr, unsigned long value)
{
if (addr & 0x00000080)
array[addr & 0x7f] = value;
else
except_handle(EXCEPT_BUSERR, cur_vadd);
}
 
/* Test read */
unsigned long test_read32 (unsigned long addr)
{
if (addr & 0x00000080)
return ~array[addr & 0x7f];
else
except_handle(EXCEPT_BUSERR, cur_vadd);
return 0x00000000;
}
 
void test_reset ()
{
int i;
 
for (i = 0; i < 128; i++)
array[i] = 0x00000000;
 
if (config.test.enabled) {
if (config.test.baseaddr)
register_memoryarea(config.test.baseaddr, 256, 4, 0, test_read32, test_write32);
}
}
/trunk/or1ksim/peripheral/Makefile.am
31,4 → 31,5
ps2kbd.c \
atahost.c \
atadevice.c \
atadevice_cmdi.c
atadevice_cmdi.c \
test.c
/trunk/or1ksim/mmu/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/vapi/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/bpb/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/sim-config.c
158,6 → 158,10
config.cuc.calling_convention = 1;
config.cuc.enable_bursts = 1;
config.cuc.no_multicycle = 1;
 
/* Test */
config.test.enabled = 0;
#endif
 
/* Configure runtime */
470,7 → 474,8
{"fb", 0},
{"kbd", 0}, /* 20 */
{"ata", 0},
{"cuc", 0}
{"cuc", 0},
{"test", 0}
};
 
/* *INDENT-OFF* */
662,7 → 667,10
{22, "enable_bursts", "=%i", NULL, (void *)&config.cuc.enable_bursts, 0},
{22, "no_multicycle", "=%i", NULL, (void *)&config.cuc.no_multicycle, 0},
{22, "memory_order", "=%s ", cuc_memory_order, (void *)&tempS, 0},
{22, "timings_fn", "=\"%s\"", NULL, (void *)config.cuc.timings_fn}
{22, "timings_fn", "=\"%s\"", NULL, (void *)config.cuc.timings_fn},
 
{23, "enabled", "=%i", NULL, (void *)(&config.test.enabled), 0},
{23, "baseaddr", "=0x%x", NULL, (void *)(&config.test.baseaddr), 0}
};
 
/* *INDENT-ON* */
/trunk/or1ksim/support/Makefile.in
1,6 → 1,6
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
 
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
/trunk/or1ksim/aclocal.m4
1,6 → 1,6
dnl aclocal.m4 generated automatically by aclocal 1.4-p5
dnl aclocal.m4 generated automatically by aclocal 1.4
 
dnl Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
dnl Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
dnl This file is free software; the Free Software Foundation
dnl gives unlimited permission to copy and/or distribute it,
dnl with or without modifications, as long as this notice is preserved.
19,7 → 19,7
dnl Usage:
dnl AM_INIT_AUTOMAKE(package,version, [no-define])
 
AC_DEFUN([AM_INIT_AUTOMAKE],
AC_DEFUN(AM_INIT_AUTOMAKE,
[AC_REQUIRE([AC_PROG_INSTALL])
PACKAGE=[$1]
AC_SUBST(PACKAGE)
47,7 → 47,7
# Check to make sure that the build environment is sane.
#
 
AC_DEFUN([AM_SANITY_CHECK],
AC_DEFUN(AM_SANITY_CHECK,
[AC_MSG_CHECKING([whether build environment is sane])
# Just in case
sleep 1
88,7 → 88,7
 
dnl AM_MISSING_PROG(NAME, PROGRAM, DIRECTORY)
dnl The program must properly implement --version.
AC_DEFUN([AM_MISSING_PROG],
AC_DEFUN(AM_MISSING_PROG,
[AC_MSG_CHECKING(for working $2)
# Run test in a subshell; some versions of sh will print an error if
# an executable is not found, even if stderr is redirected.
104,7 → 104,7
 
# Like AC_CONFIG_HEADER, but automatically create stamp file.
 
AC_DEFUN([AM_CONFIG_HEADER],
AC_DEFUN(AM_CONFIG_HEADER,
[AC_PREREQ([2.12])
AC_CONFIG_HEADER([$1])
dnl When config.status generates a header, we must update the stamp-h file.
127,7 → 127,7
 
# Define a conditional.
 
AC_DEFUN([AM_CONDITIONAL],
AC_DEFUN(AM_CONDITIONAL,
[AC_SUBST($1_TRUE)
AC_SUBST($1_FALSE)
if $2; then

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