URL
https://opencores.org/ocsvn/System09/System09/trunk
Subversion Repositories System09
Compare Revisions
- This comparison shows the changes necessary to convert path
/System09/trunk/rtl/Spartan3
- from Rev 66 to Rev 99
- ↔ Reverse comparison
Rev 66 → Rev 99
/char_rom2k_b16.vhd
1,13 → 1,58
---------------------------------------------------------------- |
--===========================================================================-- |
-- -- |
-- Synthesizable Character Generator using Xilinx RAMB16_S9 Block RAM -- |
-- -- |
--===========================================================================-- |
-- |
-- Character generator ROM |
-- File name : char_rom2k_b16.vhd |
-- |
-- Entity name : char_rom |
-- |
-- 7 pixels x 11 rows x 128 characters. |
-- Purpose : Implements a character generator ROM |
-- using one Xilinx RAMB16_S9 Block RAM |
-- Used by vdu8.vhd in the System09 SoC |
-- |
-- Dependencies : ieee.std_logic_1164 |
-- ieee.std_logic_arith |
-- |
-- Last Updated |
-- 18th Oct 2004 |
-- J. E. Kent. |
---------------------------------------------------------------- |
-- Uses : RAMB16_S9 (Xilinx 16KBit Block RAM) |
-- |
-- Author : John E. Kent |
-- |
-- Email : dilbert57@opencores.org |
-- |
-- Web : http://opencores.org/project,system09 |
-- |
-- Description : Characters are 7 pixels x 11 rows x 128 characters |
-- Stored as 8 bits x 16 locations x 128 characters |
-- |
-- Copyright (C) 2003 - 2010 John Kent |
-- |
-- This program is free software: you can redistribute it and/or modify |
-- it under the terms of the GNU General Public License as published by |
-- the Free Software Foundation, either version 3 of the License, or |
-- (at your option) any later version. |
-- |
-- This program is distributed in the hope that it will be useful, |
-- but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
-- GNU General Public License for more details. |
-- |
-- You should have received a copy of the GNU General Public License |
-- along with this program. If not, see <http://www.gnu.org/licenses/>. |
-- |
--===========================================================================-- |
-- -- |
-- Revision History -- |
-- -- |
--===========================================================================-- |
-- |
-- Version Date Author Changes |
-- |
-- 0.1 2004-10-18 John Kent Initial relaease |
-- |
-- 0.2 2010-06-17 John Kent Updated header and description and added GPL |
-- |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
17,13 → 62,13
|
entity char_rom is |
Port ( |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (10 downto 0); |
rdata : out std_logic_vector (7 downto 0); |
wdata : in std_logic_vector (7 downto 0) |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
addr : in std_logic_vector (10 downto 0); |
rw : in std_logic; |
data_in : in std_logic_vector (7 downto 0); |
data_out : out std_logic_vector (7 downto 0) |
); |
end char_rom; |
|
104,11 → 149,11
) |
|
port map ( |
do => rdata, |
do => data_out, |
dop(0)=> dp, |
addr => addr, |
clk => clk, |
di => wdata, |
di => data_in, |
dip(0)=> dp, |
en => cs, |
ssr => rst, |
/keymap_rom512_b4.vhd
1,13 → 1,59
--------------------------------------------------------- |
--===========================================================================-- |
-- -- |
-- Synthesizable PS/2 Keyboard Key map ROM for the Spartan 2 -- |
-- -- |
--===========================================================================-- |
-- |
-- PS2 Keycode look up table |
-- converts 7 bit key code to ASCII |
-- Address bit 7 = CAPS Lock |
-- Address bit 8 = Shift |
-- File name : keymap_rom512_b4.vhd |
-- |
-- Entity name : keymap_rom |
-- |
-- J.E.Kent |
-- 18th Oct 2004 |
-- Purpose : PS/2 key code look up table for PS/2 Keyboard |
-- Converts 7 bit key code to ASCII |
-- Address bit 8 = Shift |
-- Address bit 7 = CAPS Lock |
-- Address bits 6 - 0 = Key code |
-- Data bits 6 - 0 = ASCII code |
-- Designed for the Spartan 2 |
-- |
-- Dependencies : ieee.std_logic_1164 |
-- ieee.std_logic_arith |
-- ieee.std_logic_unsigned |
-- |
-- Uses : RAMB4_S8 |
-- |
-- Author : John E. Kent |
-- |
-- Email : dilbert57@opencores.org |
-- |
-- Web : http://opencores.org/project,system09 |
-- |
-- Copyright (C) 2004 - 2010 John Kent |
-- |
-- This program is free software: you can redistribute it and/or modify |
-- it under the terms of the GNU General Public License as published by |
-- the Free Software Foundation, either version 3 of the License, or |
-- (at your option) any later version. |
-- |
-- This program is distributed in the hope that it will be useful, |
-- but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
-- GNU General Public License for more details. |
-- |
-- You should have received a copy of the GNU General Public License |
-- along with this program. If not, see <http://www.gnu.org/licenses/>. |
-- |
--===========================================================================-- |
-- -- |
-- Revision History -- |
-- -- |
--===========================================================================-- |
-- |
-- Version Date Author Changes |
-- 0.1 2004-10-18 John Kent Initial Version |
-- 0.2 2010-06-17 John Kent Added header, Rename data signals |
-- |
-- |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.STD_LOGIC_ARITH.ALL; |
16,13 → 62,13
|
entity keymap_rom is |
Port ( |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (8 downto 0); |
rdata : out std_logic_vector (7 downto 0); |
wdata : in std_logic_vector (7 downto 0) |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
addr : in std_logic_vector (8 downto 0); |
rw : in std_logic; |
data_in : in std_logic_vector (7 downto 0); |
data_out : out std_logic_vector (7 downto 0) |
); |
end keymap_rom; |
|
59,8 → 105,8
we => we, |
rst => rst, |
addr => addr, |
di => wdata, |
do => rdata |
di => data_in, |
do => data_out |
); |
|
|
/keymap_rom_slice.vhd
1,16 → 1,66
--------------------------------------------------------- |
-- keymap_rom_slice.vhd |
--===========================================================================-- |
-- -- |
-- Synthesizable PS/2 Keyboard Key map ROM -- |
-- -- |
--===========================================================================-- |
-- |
-- PS2 Keycode look up table |
-- converts 7 bit key code to ASCII |
-- Address bit 7 = CAPS Lock |
-- Address bit 8 = Shift |
-- File name : keymap_rom_slice.vhd |
-- |
-- Entity name : keymap_rom |
-- |
-- J.E.Kent |
-- 18th Oct 2004 |
-- 28th Jan 2007 - made entity compatible with block RAM versions. |
-- 3rd Feb 2007 - initialized with Bit_vector |
-- Purpose : PS/2 key code look up table for PS/2 Keyboard |
-- Converts 7 bit key code to ASCII |
-- Address bit 8 = Shift |
-- Address bit 7 = CAPS Lock |
-- Address bits 6 - 0 = Key code |
-- Data bits 6 - 0 = ASCII code |
-- Using constant array look up. |
-- |
-- Dependencies : ieee.std_logic_1164 |
-- ieee.std_logic_arith |
-- ieee.std_logic_unsigned |
-- |
-- Uses : None |
-- |
-- Author : John E. Kent |
-- |
-- Email : dilbert57@opencores.org |
-- |
-- Web : http://opencores.org/project,system09 |
-- |
-- Copyright (C) 2004 - 2010 John Kent |
-- |
-- This program is free software: you can redistribute it and/or modify |
-- it under the terms of the GNU General Public License as published by |
-- the Free Software Foundation, either version 3 of the License, or |
-- (at your option) any later version. |
-- |
-- This program is distributed in the hope that it will be useful, |
-- but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
-- GNU General Public License for more details. |
-- |
-- You should have received a copy of the GNU General Public License |
-- along with this program. If not, see <http://www.gnu.org/licenses/>. |
-- |
--===========================================================================-- |
-- -- |
-- Revision History -- |
-- -- |
--===========================================================================-- |
-- |
-- Version Date Author Changes |
-- |
-- 0.1 2004-10-18 John Kent Initial version |
-- |
-- 0.2 2007-01-28 John Kent Made entity compatible with block RAM versions |
-- |
-- 0.3 2007-02-03 John Kent Initialized with bit_vector |
-- |
-- 0.4 2010-06-17 John Kent Updated header and added GPL |
-- Renamed data_in and data_out signals |
-- |
-- |
library IEEE; |
use ieee.std_logic_1164.all; |
use ieee.std_logic_arith.all; |
18,23 → 68,20
|
entity keymap_rom is |
Port ( |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (8 downto 0); |
rdata : out std_logic_vector (7 downto 0); |
wdata : in std_logic_vector (7 downto 0) |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (8 downto 0); |
data_in : in std_logic_vector (7 downto 0); |
data_out : out std_logic_vector (7 downto 0) |
); |
end keymap_rom; |
|
architecture rtl of keymap_rom is |
constant width : integer := 8; |
constant memsize : integer := 512; |
signal rvect : std_logic_vector(255 downto 0); |
|
|
type rom_array is array(0 to 15) of std_logic_vector (255 downto 0); |
|
|
constant rom_data : rom_array := |
( |
x"00327761737a0000003171000000000000600900000000000000000000000000", -- 1F - 00 |
57,9 → 104,16
x"00007c007d0d000000002b7b00220000005f703a6c3f3e000028296f696b3c00", -- DF - C0 |
x"0000000000000000001b000000007f0000000000000000000008000000000000" -- FF - E0 |
); |
|
signal rom_out : std_logic_vector(255 downto 0); |
|
begin |
|
rvect <= rom_data(conv_integer(addr(8 downto 5))); |
rdata <= rvect( conv_integer(addr(4 downto 0))*8+7 downto conv_integer(addr(4 downto 0))*8); |
|
process( addr, rom_data, rom_out ) |
begin |
rom_out <= rom_data(conv_integer(addr(8 downto 5))); |
data_out <= rom_out( conv_integer(addr(4 downto 0))*8+7 downto conv_integer(addr(4 downto 0))*8); |
end; |
|
end architecture rtl; |
|
/Maisforth_rom16k_b16.vhd
1,4 → 1,4
-- $Id: Maisforth_rom16k_b16.vhd,v 1.2 2008-03-14 15:52:43 dilbert57 Exp $ |
-- $Id: Maisforth_rom16k_b16.vhd,v 1.2 2008/03/14 15:52:43 dilbert57 Exp $ |
--=================================================================== |
-- |
-- Mais Forth 16K ROM for the 6809 |
/ram2k_b16.vhd
1,3 → 1,58
--===========================================================================-- |
-- -- |
-- Synthesizable 2K RAM using Xilinx RAMB16_S9 Block RAM -- |
-- -- |
--===========================================================================-- |
-- |
-- File name : ram2k_b16.vhd |
-- |
-- Entity name : ram_2k |
-- |
-- Purpose : Implements 2KBytes of RAM using one Xilinx RAMB16_S9 Block RAM |
-- Essentially a wrapper for a 2KByte RAM block for different |
-- technology FPGAs. Used in vdu8.vhd for the System09 SoC as a |
-- character buffer and attribute RAM. Initiatized with rubbish |
-- so that the VDU displays random characters on start up to |
-- indicate it is working correctly. |
-- |
-- Dependencies : ieee.std_logic_1164 |
-- ieee.std_logic_arith |
-- |
-- Uses : RAMB16_S9 (Xilinx 16KBit Block RAM) |
-- |
-- Author : John E. Kent |
-- |
-- Email : dilbert57@opencores.org |
-- |
-- Web : http://opencores.org/project,system09 |
-- |
-- Description : Block RAM instatiation |
-- |
-- Copyright (C) 2010 John Kent |
-- |
-- This program is free software: you can redistribute it and/or modify |
-- it under the terms of the GNU General Public License as published by |
-- the Free Software Foundation, either version 3 of the License, or |
-- (at your option) any later version. |
-- |
-- This program is distributed in the hope that it will be useful, |
-- but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
-- GNU General Public License for more details. |
-- |
-- You should have received a copy of the GNU General Public License |
-- along with this program. If not, see <http://www.gnu.org/licenses/>. |
-- |
--===========================================================================-- |
-- -- |
-- Revision History -- |
-- -- |
--===========================================================================-- |
-- |
-- Version Date Author Changes |
-- |
-- 0.1 2010-06-17 John Kent Added GPL and header |
-- |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.STD_LOGIC_ARITH.ALL; |
6,13 → 61,13
|
entity ram_2k is |
Port ( |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (10 downto 0); |
rdata : out std_logic_vector (7 downto 0); |
wdata : in std_logic_vector (7 downto 0) |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
addr : in std_logic_vector (10 downto 0); |
rw : in std_logic; |
data_in : in std_logic_vector (7 downto 0); |
data_out : out std_logic_vector (7 downto 0) |
); |
end ram_2k; |
|
93,11 → 148,11
) |
|
port map ( |
do => rdata, |
do => data_out, |
dop(0) => dp, |
addr => addr, |
clk => clk, |
di => wdata, |
di => data_in, |
dip(0) => dp, |
en => cs, |
ssr => rst, |
/tracebug_rom8k_b16.vhd
1,4 → 1,4
-- $Id: tracebug_rom8k_b16.vhd,v 1.2 2008-03-14 15:52:43 dilbert57 Exp $ |
-- $Id: tracebug_rom8k_b16.vhd,v 1.2 2008/03/14 15:52:43 dilbert57 Exp $ |
|
--============================================================= |
|
/ram32k_b16.vhd
1,4 → 1,4
-- $Id: ram32k_b16.vhd,v 1.2 2008-03-14 15:52:43 dilbert57 Exp $ |
-- $Id: ram32k_b16.vhd,v 1.2 2008/03/14 15:52:43 dilbert57 Exp $ |
--=================================================================== |
-- |
-- 32K Block RAM |
/keymap_rom2k_b16.vhd
1,3 → 1,60
--===========================================================================-- |
-- -- |
-- Synthesizable PS/2 Keyboard Key map ROM for Spartan3 -- |
-- -- |
--===========================================================================-- |
-- |
-- File name : keymap_rom2k_b16.vhd |
-- |
-- Entity name : keymap_rom |
-- |
-- Purpose : Key code look up table for PS/2 Keyboard |
-- Converts 7 bit key code to ASCII |
-- Address bit 8 = Shift |
-- Address bit 7 = CAPS Lock |
-- Address bits 6 - 0 = Key code |
-- Data bits 6 - 0 = ASCII code |
-- Intended for Spartan 3/3E |
-- |
-- Dependencies : ieee.std_logic_1164 |
-- ieee.std_logic_arith |
-- unisim.vcomponents |
-- |
-- Uses : RAMB16_S9 |
-- |
-- Author : John E. Kent |
-- |
-- Email : dilbert57@opencores.org |
-- |
-- Web : http://opencores.org/project,system09 |
-- |
-- Copyright (C) 2004 - 2010 John Kent |
-- |
-- This program is free software: you can redistribute it and/or modify |
-- it under the terms of the GNU General Public License as published by |
-- the Free Software Foundation, either version 3 of the License, or |
-- (at your option) any later version. |
-- |
-- This program is distributed in the hope that it will be useful, |
-- but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
-- GNU General Public License for more details. |
-- |
-- You should have received a copy of the GNU General Public License |
-- along with this program. If not, see <http://www.gnu.org/licenses/>. |
-- |
--===========================================================================-- |
-- -- |
-- Revision History -- |
-- -- |
--===========================================================================-- |
-- |
-- Version Date Author Changes |
-- |
-- 0.1 ????-??-?? John Kent Initial version |
-- 0.2 2010-06-17 John Kent Revised Header, renamed data pins |
-- |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.STD_LOGIC_ARITH.ALL; |
4,25 → 61,25
library unisim; |
use unisim.vcomponents.all; |
|
entity keymap_rom_b16 is |
entity keymap_rom is |
Port ( |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (10 downto 0); |
rdata : out std_logic_vector (7 downto 0); |
wdata : in std_logic_vector (7 downto 0) |
clk : in std_logic; |
rst : in std_logic; |
cs : in std_logic; |
rw : in std_logic; |
addr : in std_logic_vector (8 downto 0); |
data_in : in std_logic_vector (7 downto 0); |
data_out : out std_logic_vector (7 downto 0) |
); |
end keymap_rom_b16; |
end keymap_rom; |
|
architecture rtl of keymap_rom_b16 is |
architecture rtl of keymap_rom is |
|
|
signal we : std_logic; |
signal dp : std_logic; |
signal ad : std_logic_vector(10 downto 0); |
|
|
begin |
|
ROM : RAMB16_S9 |
94,11 → 151,11
) |
|
port map ( |
do => rdata, |
do => data_out, |
dop(0) => dp, |
addr => addr, |
addr => ad, |
clk => clk, |
di => wdata, |
di => data_in, |
dip(0) => dp, |
en => cs, |
ssr => rst, |
105,9 → 162,11
we => we |
); |
|
my_keymap_rom_b16 : process ( rw ) |
my_keymap_rom_b16 : process ( rw, addr ) |
begin |
we <= not rw; |
we <= not rw; |
ad(8 downto 0) = addr; |
ad(10 downto 9) = "00"; |
end process; |
|
end architecture rtl; |
/ram24k_b16.vhd
1,4 → 1,4
-- $Id: ram24k_b16.vhd,v 1.2 2008-03-14 15:52:43 dilbert57 Exp $ |
-- $Id: ram24k_b16.vhd,v 1.2 2008/03/14 15:52:43 dilbert57 Exp $ |
--=================================================================== |
-- |
-- 32K Block RAM |