OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

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  • This comparison shows the changes necessary to convert path 
    /a-z80/trunk/cpu/bus
    from Rev 6 to Rev 8
    ↔ Reverse comparison
  •

Rev 6 → Rev 8

/bus_switch.sv File deleted
/bus_control.bdf
21,7 → 21,7
(header "graphic" (version "1.4"))
(pin
(input)
(rect 32 112 208 128)
(rect 32 64 208 80)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_bus_ff_oe" (rect 9 0 77 12)(font "Arial" ))
(pt 176 8)
37,7 → 37,7
)
(pin
(input)
(rect 32 96 208 112)
(rect 32 48 208 64)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_bus_zero_oe" (rect 9 0 88 12)(font "Arial" ))
(pt 176 8)
52,40 → 52,8
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
(input)
(rect 32 48 208 64)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_bus_db_oe" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
(line (pt 92 4)(pt 117 4))
(line (pt 121 8)(pt 176 8))
(line (pt 92 12)(pt 92 4))
(line (pt 117 4)(pt 121 8))
(line (pt 117 12)(pt 121 8))
)
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
(output)
(rect 600 56 776 72)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "bus_db_oe" (rect 90 0 143 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
)
(pin
(bidir)
(rect 600 184 776 200)
(rect 600 136 776 152)
(text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "db[7..0]" (rect 90 0 127 12)(font "Arial" ))
(pt 0 8)
101,7 → 69,7
(text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
)
(symbol
(rect 512 176 560 208)
(rect 512 128 560 160)
(text "TRI" (rect 1 0 16 10)(font "Arial" (font_size 6)))
(text "inst" (rect 3 21 20 33)(font "Arial" ))
(port
132,7 → 100,7
)
)
(symbol
(rect 304 168 368 216)
(rect 304 120 368 168)
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "inst2" (rect 3 37 26 49)(font "Arial" ))
(port
164,39 → 132,22
)
)
(symbol
(rect 504 40 568 88)
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "inst5" (rect 3 37 26 49)(font "Arial" ))
(rect 144 120 176 136)
(text "VCC" (rect 7 0 27 10)(font "Arial" (font_size 6)))
(text "inst1" (rect 3 5 26 17)(font "Arial" )(invisible))
(port
(pt 0 16)
(input)
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 14 16))
)
(port
(pt 0 32)
(input)
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(line (pt 0 32)(pt 14 32))
)
(port
(pt 64 24)
(pt 16 16)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
(text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
(text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
(line (pt 16 16)(pt 16 8))
)
(drawing
(line (pt 14 12)(pt 30 12))
(line (pt 14 37)(pt 31 37))
(line (pt 14 12)(pt 14 37))
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37))
(line (pt 8 8)(pt 24 8))
)
)
(symbol
(rect 304 88 368 136)
(rect 304 40 368 88)
(text "OR2" (rect 1 0 19 10)(font "Arial" (font_size 6)))
(text "inst6" (rect 3 37 26 49)(font "Arial" ))
(port
228,130 → 179,65
(arc (pt 25 35)(pt 49 24)(rect -6 -27 57 36))
)
)
(symbol
(rect 432 56 480 88)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst3" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(symbol
(rect 144 168 176 184)
(text "VCC" (rect 7 0 27 10)(font "Arial" (font_size 6)))
(text "inst1" (rect 3 5 26 17)(font "Arial" )(invisible))
(port
(pt 16 16)
(output)
(text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
(text "1" (rect 19 7 24 19)(font "Courier New" (bold))(invisible))
(line (pt 16 16)(pt 16 8))
)
(drawing
(line (pt 8 8)(pt 24 8))
)
)
(connector
(pt 432 72)
(pt 408 72)
(pt 600 144)
(pt 560 144)
(bus)
)
(connector
(pt 600 64)
(pt 568 64)
(pt 208 56)
(pt 304 56)
)
(connector
(pt 208 56)
(pt 504 56)
(pt 304 136)
(pt 232 136)
)
(connector
(pt 480 72)
(pt 504 72)
(pt 232 72)
(pt 232 136)
)
(connector
(pt 600 192)
(pt 560 192)
(text "bus[7..0]" (rect 387 128 430 140)(font "Arial" ))
(pt 368 144)
(pt 512 144)
(bus)
)
(connector
(pt 408 72)
(pt 408 112)
(text "vcc[7..0]" (rect 190 136 234 148)(font "Arial" ))
(pt 304 152)
(pt 160 152)
(bus)
)
(connector
(pt 536 176)
(pt 536 112)
(pt 368 64)
(pt 536 64)
)
(connector
(pt 368 112)
(pt 408 112)
)
(connector
(pt 408 112)
(pt 536 112)
)
(connector
(pt 208 104)
(pt 304 104)
)
(connector
(pt 160 184)
(pt 160 200)
(pt 160 136)
(pt 160 152)
(bus)
)
(connector
(pt 304 184)
(pt 232 184)
(pt 208 72)
(pt 232 72)
)
(connector
(pt 232 120)
(pt 232 184)
(pt 232 72)
(pt 304 72)
)
(connector
(pt 208 120)
(pt 232 120)
(pt 536 64)
(pt 536 128)
)
(connector
(pt 232 120)
(pt 304 120)
)
(connector
(text "bus[7..0]" (rect 387 176 430 188)(font "Arial" ))
(pt 368 192)
(pt 512 192)
(bus)
)
(connector
(text "vcc[7..0]" (rect 190 184 234 196)(font "Arial" ))
(pt 304 200)
(pt 160 200)
(bus)
)
(junction (pt 408 112))
(junction (pt 232 120))
(junction (pt 232 72))
(title_block
(rect 32 256 289 308)
(rect 32 208 289 260)
(name "title-custom-small")
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "August 17, 2014" (rect 56 3 150 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "August 17, 2014, 2016" (rect 56 3 185 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "bus_control" (rect 43 2 123 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.0" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.3" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/data_pins.bdf
69,9 → 69,9
)
(pin
(input)
(rect 24 256 200 272)
(rect 24 168 200 184)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "bus_db_oe" (rect 9 0 62 12)(font "Arial" ))
(text "clk" (rect 9 0 23 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
85,9 → 85,9
)
(pin
(input)
(rect 24 168 200 184)
(rect 24 256 200 272)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "clk" (rect 9 0 23 12)(font "Arial" ))
(text "ctl_bus_db_oe" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
602,11 → 602,11
(title_block
(rect 24 360 281 412)
(name "title-custom-small")
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "June 14, 2014, 2016" (rect 56 3 171 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "data_pins" (rect 43 2 109 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "data_pins" (rect 43 2 109 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "June 14, 2014" (rect 56 3 136 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.3" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.4" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/bus_control.v
14,13 → 14,11
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Mon Oct 13 12:39:04 2014"
// CREATED "Fri Feb 26 22:25:37 2016"
 
module bus_control(
ctl_bus_ff_oe,
ctl_bus_zero_oe,
ctl_bus_db_oe,
bus_db_oe,
db
);
 
27,36 → 25,29
 
input wire ctl_bus_ff_oe;
input wire ctl_bus_zero_oe;
input wire ctl_bus_db_oe;
output wire bus_db_oe;
inout wire [7:0] db;
 
wire [7:0] bus;
wire [7:0] vcc;
wire SYNTHESIZED_WIRE_3;
wire SYNTHESIZED_WIRE_2;
wire SYNTHESIZED_WIRE_0;
 
 
 
 
assign db[7] = SYNTHESIZED_WIRE_3 ? bus[7] : 1'bz;
assign db[6] = SYNTHESIZED_WIRE_3 ? bus[6] : 1'bz;
assign db[5] = SYNTHESIZED_WIRE_3 ? bus[5] : 1'bz;
assign db[4] = SYNTHESIZED_WIRE_3 ? bus[4] : 1'bz;
assign db[3] = SYNTHESIZED_WIRE_3 ? bus[3] : 1'bz;
assign db[2] = SYNTHESIZED_WIRE_3 ? bus[2] : 1'bz;
assign db[1] = SYNTHESIZED_WIRE_3 ? bus[1] : 1'bz;
assign db[0] = SYNTHESIZED_WIRE_3 ? bus[0] : 1'bz;
assign db[7] = SYNTHESIZED_WIRE_0 ? bus[7] : 1'bz;
assign db[6] = SYNTHESIZED_WIRE_0 ? bus[6] : 1'bz;
assign db[5] = SYNTHESIZED_WIRE_0 ? bus[5] : 1'bz;
assign db[4] = SYNTHESIZED_WIRE_0 ? bus[4] : 1'bz;
assign db[3] = SYNTHESIZED_WIRE_0 ? bus[3] : 1'bz;
assign db[2] = SYNTHESIZED_WIRE_0 ? bus[2] : 1'bz;
assign db[1] = SYNTHESIZED_WIRE_0 ? bus[1] : 1'bz;
assign db[0] = SYNTHESIZED_WIRE_0 ? bus[0] : 1'bz;
 
 
assign bus = {ctl_bus_ff_oe,ctl_bus_ff_oe,ctl_bus_ff_oe,ctl_bus_ff_oe,ctl_bus_ff_oe,ctl_bus_ff_oe,ctl_bus_ff_oe,ctl_bus_ff_oe} & vcc;
 
assign SYNTHESIZED_WIRE_2 = ~SYNTHESIZED_WIRE_3;
assign SYNTHESIZED_WIRE_0 = ctl_bus_ff_oe | ctl_bus_zero_oe;
 
assign bus_db_oe = ctl_bus_db_oe & SYNTHESIZED_WIRE_2;
 
assign SYNTHESIZED_WIRE_3 = ctl_bus_ff_oe | ctl_bus_zero_oe;
 
assign vcc = 8'b11111111;
 
endmodule
/test_pins.sv
100,6 → 100,6
 
address_pins address_pins_inst( .*, .bus_ab_pin_we(ctl_ab_we), .address(ab[15:0]), .abus(apin[15:0]) );
 
data_pins data_pins_inst( .*, .bus_db_oe(ctl_db_pin_oe), .ctl_bus_db_we(ctl_db_we), .bus_db_pin_oe(ctl_db_pin_oe), .bus_db_pin_re(ctl_db_pin_re), .D(dpin[7:0]) );
data_pins data_pins_inst( .*, .ctl_bus_db_oe(ctl_db_pin_oe), .ctl_bus_db_we(ctl_db_we), .bus_db_pin_oe(ctl_db_pin_oe), .bus_db_pin_re(ctl_db_pin_re), .D(dpin[7:0]) );
 
endmodule
/data_pins.v
20,8 → 20,8
bus_db_pin_oe,
bus_db_pin_re,
ctl_bus_db_we,
bus_db_oe,
clk,
ctl_bus_db_oe,
D,
db
);
30,8 → 30,8
input wire bus_db_pin_oe;
input wire bus_db_pin_re;
input wire ctl_bus_db_we;
input wire bus_db_oe;
input wire clk;
input wire ctl_bus_db_oe;
inout wire [7:0] D;
inout wire [7:0] db;
 
62,14 → 62,14
 
assign SYNTHESIZED_WIRE_2 = ctl_bus_db_we | bus_db_pin_re;
 
assign db[7] = bus_db_oe ? dout[7] : 1'bz;
assign db[6] = bus_db_oe ? dout[6] : 1'bz;
assign db[5] = bus_db_oe ? dout[5] : 1'bz;
assign db[4] = bus_db_oe ? dout[4] : 1'bz;
assign db[3] = bus_db_oe ? dout[3] : 1'bz;
assign db[2] = bus_db_oe ? dout[2] : 1'bz;
assign db[1] = bus_db_oe ? dout[1] : 1'bz;
assign db[0] = bus_db_oe ? dout[0] : 1'bz;
assign db[7] = ctl_bus_db_oe ? dout[7] : 1'bz;
assign db[6] = ctl_bus_db_oe ? dout[6] : 1'bz;
assign db[5] = ctl_bus_db_oe ? dout[5] : 1'bz;
assign db[4] = ctl_bus_db_oe ? dout[4] : 1'bz;
assign db[3] = ctl_bus_db_oe ? dout[3] : 1'bz;
assign db[2] = ctl_bus_db_oe ? dout[2] : 1'bz;
assign db[1] = ctl_bus_db_oe ? dout[1] : 1'bz;
assign db[0] = ctl_bus_db_oe ? dout[0] : 1'bz;
 
assign D[7] = bus_db_pin_oe ? dout[7] : 1'bz;
assign D[6] = bus_db_pin_oe ? dout[6] : 1'bz;
/address_latch.bsf
20,14 → 20,14
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 240 208)
(rect 16 16 240 240)
(text "address_latch" (rect 5 0 86 14)(font "Arial" (font_size 8)))
(text "inst" (rect 8 176 25 188)(font "Arial" ))
(text "inst" (rect 8 208 25 220)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "ctl_inc_zero" (rect 0 0 69 14)(font "Arial" (font_size 8)))
(text "ctl_inc_zero" (rect 21 27 90 41)(font "Arial" (font_size 8)))
(text "clrpc" (rect 0 0 28 14)(font "Arial" (font_size 8)))
(text "clrpc" (rect 21 27 49 41)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32))
)
(port
75,18 → 75,25
(port
(pt 0 144)
(input)
(text "ctl_apin_mux2" (rect 0 0 81 14)(font "Arial" (font_size 8)))
(text "ctl_apin_mux2" (rect 21 139 102 153)(font "Arial" (font_size 8)))
(text "nreset" (rect 0 0 36 14)(font "Arial" (font_size 8)))
(text "nreset" (rect 21 139 57 153)(font "Arial" (font_size 8)))
(line (pt 0 144)(pt 16 144))
)
(port
(pt 0 160)
(input)
(text "ctl_apin_mux" (rect 0 0 74 14)(font "Arial" (font_size 8)))
(text "ctl_apin_mux" (rect 21 155 95 169)(font "Arial" (font_size 8)))
(text "ctl_apin_mux2" (rect 0 0 81 14)(font "Arial" (font_size 8)))
(text "ctl_apin_mux2" (rect 21 155 102 169)(font "Arial" (font_size 8)))
(line (pt 0 160)(pt 16 160))
)
(port
(pt 0 176)
(input)
(text "ctl_apin_mux" (rect 0 0 74 14)(font "Arial" (font_size 8)))
(text "ctl_apin_mux" (rect 21 171 95 185)(font "Arial" (font_size 8)))
(line (pt 0 176)(pt 16 176))
)
(port
(pt 224 48)
(output)
(text "address_is_1" (rect 0 0 77 14)(font "Arial" (font_size 8)))
108,6 → 115,6
(line (pt 224 32)(pt 208 32)(line_width 3))
)
(drawing
(rectangle (rect 16 16 208 176))
(rectangle (rect 16 16 208 208))
)
)
/bus_switch.v
0,0 → 1,41
//============================================================================
// Bus switch in bus A-Z80 CPU
//
// Copyright 2014, 2016 Goran Devic
//
// This module provides control data bus switch signals. The sole purpose of
// having these wires defined in this module is to get all control signals
// (which are processed by genglobals.py) to appear in the list of global
// control signals ("globals.vh") for consistency.
//============================================================================
 
module bus_switch
(
input wire ctl_sw_1u, // Control input for the SW1 upstream
input wire ctl_sw_1d, // Control input for the SW1 downstream
 
input wire ctl_sw_2u, // Control input for the SW2 upstream
input wire ctl_sw_2d, // Control input for the SW2 downstream
 
input wire ctl_sw_mask543_en, // Enables masking [5:3] on the data bus switch 1
 
//--------------------------------------------------------------------
 
output wire bus_sw_1u, // SW1 upstream
output wire bus_sw_1d, // SW1 downstream
 
output wire bus_sw_2u, // SW2 upstream
output wire bus_sw_2d, // SW2 downstream
 
output wire bus_sw_mask543_en // Affects SW1 downstream
);
 
assign bus_sw_1u = ctl_sw_1u;
assign bus_sw_1d = ctl_sw_1d;
 
assign bus_sw_2u = ctl_sw_2u;
assign bus_sw_2d = ctl_sw_2d;
 
assign bus_sw_mask543_en = ctl_sw_mask543_en;
 
endmodule
/test_bus.sv
9,7 → 9,8
// Define one full T-clock cycle delay
`define T #2
bit clk = 1;
initial repeat (24) #1 clk = ~clk;
initial repeat (26) #1 clk = ~clk;
reg nreset;
 
// ----------------------------------------------------
// Bi-directional bus that can also be tri-stated
27,7 → 28,7
reg ctl_inc_dec; // Perform decrement (1) or increment (0)
reg ctl_inc_limit6; // Limit increment to 6 bits (for incrementing IR)
reg ctl_inc_cy; // Address increment, carry in value (+/-1 or 0)
reg ctl_inc_zero; // Output zero from the incrementer
reg clrpc; // Force zero (to clear PC/IR)
 
// ----------------- OUTPUT/STATUS -----------------
wire address_is_1; // Signals when the final address is 1
37,6 → 38,7
assert(address==arg);
 
initial begin
nreset = 0;
abusw = 'z;
ctl_al_we = 0;
ctl_bus_inc_oe = 0;
43,11 → 45,14
ctl_inc_dec = 0;
ctl_inc_limit6 = 0;
ctl_inc_cy = 0;
ctl_inc_zero = 0;
clrpc = 0;
ctl_apin_mux = 0;
ctl_apin_mux2 = 0;
 
//------------------------------------------------------------
`T nreset = 1;
 
//------------------------------------------------------------
// Perform a simple increment and decrement
`T abusw = 16'h1234;
ctl_al_we = 1; // Write value to the latch
/test_bus.qsf
1,17 → 1,17
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
69,9 → 69,9
set_global_assignment -name BDF_FILE data_switch.bdf
set_global_assignment -name BDF_FILE data_pins.bdf
set_global_assignment -name BDF_FILE control_pins_n.bdf
set_global_assignment -name SYSTEMVERILOG_FILE bus_switch.sv
set_global_assignment -name BDF_FILE bus_control.bdf
set_global_assignment -name BDF_FILE address_pins.bdf
set_global_assignment -name BDF_FILE address_latch.bdf
set_global_assignment -name BDF_FILE address_mux.bdf
set_global_assignment -name VERILOG_FILE bus_switch.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
/simulation/modelsim/test_bus.mpf
2,9 → 2,9
;
; All Rights Reserved.
;
; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF
; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF
; MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS.
;
;
 
[Library]
std = $MODEL_TECH/../std
129,7 → 129,7
 
work = work
[vcom]
; VHDL93 variable selects language version as the default.
; VHDL93 variable selects language version as the default.
; Default is VHDL-2002.
; Value of 0 or 1987 for VHDL-1987.
; Value of 1 or 1993 for VHDL-1993.
272,7 → 272,7
BreakOnAssertion = 3
 
; Assertion Message Format
; %S - Severity Level
; %S - Severity Level
; %R - Report Message
; %T - Time of assertion
; %D - Delta
423,10 → 423,10
; description of a message.
 
; Control transcripting of elaboration/runtime messages.
; The default is to have messages appear in the transcript and
; The default is to have messages appear in the transcript and
; recorded in the wlf file (messages that are recorded in the
; wlf file can be viewed in the MsgViewer). The other settings
; are to send messages only to the transcript or only to the
; are to send messages only to the transcript or only to the
; wlf file. The valid values are
; both {default}
; tran {transcript only}
470,42 → 470,42
ForceSoftPaths = 1
ProjectStatusDelay = 5000
VERILOG_DoubleClick = Edit
VERILOG_CustomDoubleClick =
VERILOG_CustomDoubleClick =
SYSTEMVERILOG_DoubleClick = Edit
SYSTEMVERILOG_CustomDoubleClick =
SYSTEMVERILOG_CustomDoubleClick =
VHDL_DoubleClick = Edit
VHDL_CustomDoubleClick =
VHDL_CustomDoubleClick =
PSL_DoubleClick = Edit
PSL_CustomDoubleClick =
PSL_CustomDoubleClick =
TEXT_DoubleClick = Edit
TEXT_CustomDoubleClick =
TEXT_CustomDoubleClick =
SYSTEMC_DoubleClick = Edit
SYSTEMC_CustomDoubleClick =
SYSTEMC_CustomDoubleClick =
TCL_DoubleClick = Edit
TCL_CustomDoubleClick =
TCL_CustomDoubleClick =
MACRO_DoubleClick = Edit
MACRO_CustomDoubleClick =
MACRO_CustomDoubleClick =
VCD_DoubleClick = Edit
VCD_CustomDoubleClick =
VCD_CustomDoubleClick =
SDF_DoubleClick = Edit
SDF_CustomDoubleClick =
SDF_CustomDoubleClick =
XML_DoubleClick = Edit
XML_CustomDoubleClick =
XML_CustomDoubleClick =
LOGFILE_DoubleClick = Edit
LOGFILE_CustomDoubleClick =
LOGFILE_CustomDoubleClick =
UCDB_DoubleClick = Edit
UCDB_CustomDoubleClick =
UCDB_CustomDoubleClick =
UPF_DoubleClick = Edit
UPF_CustomDoubleClick =
UPF_CustomDoubleClick =
PCF_DoubleClick = Edit
PCF_CustomDoubleClick =
PCF_CustomDoubleClick =
PROJECT_DoubleClick = Edit
PROJECT_CustomDoubleClick =
PROJECT_CustomDoubleClick =
VRM_DoubleClick = Edit
VRM_CustomDoubleClick =
VRM_CustomDoubleClick =
DEBUGDATABASE_DoubleClick = Edit
DEBUGDATABASE_CustomDoubleClick =
DEBUGDATABASE_CustomDoubleClick =
DEBUGARCHIVE_DoubleClick = Edit
DEBUGARCHIVE_CustomDoubleClick =
DEBUGARCHIVE_CustomDoubleClick =
Project_Major_Version = 10
Project_Minor_Version = 1
/simulation/modelsim/wave_bus.do
1,5 → 1,6
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /test_bus/nreset
add wave -noupdate /test_bus/clk
add wave -noupdate /test_bus/abusw
add wave -noupdate /test_bus/abus
9,7 → 10,7
add wave -noupdate /test_bus/ctl_inc_dec
add wave -noupdate /test_bus/ctl_inc_limit6
add wave -noupdate /test_bus/ctl_inc_cy
add wave -noupdate /test_bus/ctl_inc_zero
add wave -noupdate /test_bus/clrpc
add wave -noupdate /test_bus/address_is_1
add wave -noupdate /test_bus/address_latch_/ctl_apin_mux
add wave -noupdate /test_bus/address_latch_/ctl_apin_mux2
/address_latch.bdf
53,9 → 53,9
)
(pin
(input)
(rect 24 40 200 56)
(rect 24 312 200 328)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_inc_zero" (rect 9 0 66 12)(font "Arial" ))
(text "ctl_al_we" (rect 9 0 53 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
69,9 → 69,9
)
(pin
(input)
(rect 24 312 200 328)
(rect 24 168 200 184)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_al_we" (rect 9 0 53 12)(font "Arial" ))
(text "ctl_inc_limit6" (rect 9 0 72 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
85,9 → 85,9
)
(pin
(input)
(rect 24 168 200 184)
(rect 24 16 200 32)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_inc_limit6" (rect 9 0 72 12)(font "Arial" ))
(text "ctl_bus_inc_oe" (rect 9 0 82 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
101,9 → 101,9
)
(pin
(input)
(rect 24 64 200 80)
(rect 24 296 200 312)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_bus_inc_oe" (rect 9 0 82 12)(font "Arial" ))
(text "clk" (rect 9 0 23 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
117,9 → 117,9
)
(pin
(input)
(rect 24 296 200 312)
(rect 24 432 200 448)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "clk" (rect 9 0 23 12)(font "Arial" ))
(text "ctl_apin_mux" (rect 9 0 73 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
133,9 → 133,9
)
(pin
(input)
(rect 24 432 200 448)
(rect 24 416 200 432)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_apin_mux" (rect 9 0 73 12)(font "Arial" ))
(text "ctl_apin_mux2" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
149,9 → 149,9
)
(pin
(input)
(rect 24 416 200 432)
(rect 24 48 200 64)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_apin_mux2" (rect 5 0 76 12)(font "Arial" ))
(text "clrpc" (rect 9 0 32 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
164,8 → 164,24
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
(input)
(rect 24 352 200 368)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "nreset" (rect 9 0 39 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
(line (pt 92 4)(pt 117 4))
(line (pt 121 8)(pt 176 8))
(line (pt 92 12)(pt 92 4))
(line (pt 117 4)(pt 121 8))
(line (pt 117 12)(pt 121 8))
)
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
(output)
(rect 944 352 1120 368)
(rect 1008 352 1184 368)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "address[15..0]" (rect 90 0 160 12)(font "Arial" ))
(pt 0 8)
181,7 → 197,7
)
(pin
(output)
(rect 944 176 1120 192)
(rect 1008 176 1184 192)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "address_is_1" (rect 90 0 154 12)(font "Arial" ))
(pt 0 8)
197,7 → 213,7
)
(pin
(bidir)
(rect 24 96 200 112)
(rect 24 80 200 96)
(text "BIDIR" (rect 151 0 175 10)(font "Arial" (font_size 6)))
(text "abus[15..0]" (rect 31 0 86 12)(font "Arial" ))
(pt 176 8)
214,7 → 230,7
(text "VCC" (rect 152 7 172 17)(font "Arial" (font_size 6)))
)
(symbol
(rect 280 88 328 120)
(rect 344 72 392 104)
(text "TRI" (rect 32 0 47 10)(font "Arial" (font_size 6)))
(text "inst4" (rect 22 21 45 33)(font "Arial" ))
(port
235,7 → 251,7
(pt 0 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 2 7 16 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(line (pt 16 16)(pt 0 16))
)
(drawing
246,65 → 262,7
(flipy)
)
(symbol
(rect 376 80 440 128)
(text "AND2" (rect 39 0 63 10)(font "Arial" (font_size 6)))
(text "inst3" (rect 38 37 61 49)(font "Arial" ))
(port
(pt 64 16)
(input)
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(text "IN1" (rect 45 7 62 19)(font "Courier New" (bold))(invisible))
(line (pt 64 16)(pt 50 16))
)
(port
(pt 64 32)
(input)
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(text "IN2" (rect 45 23 62 35)(font "Courier New" (bold))(invisible))
(line (pt 64 32)(pt 50 32))
)
(port
(pt 0 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 2 15 16 27)(font "Courier New" (bold))(invisible))
(line (pt 22 24)(pt 0 24))
)
(drawing
(line (pt 50 12)(pt 34 12))
(line (pt 50 37)(pt 33 37))
(line (pt 50 12)(pt 50 37))
(arc (pt 34 12)(pt 33 37)(rect 21 12 46 37))
)
(flipy)
)
(symbol
(rect 392 32 440 64)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "i5" (rect 3 21 11 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(symbol
(rect 400 144 600 272)
(rect 464 144 664 272)
(text "inc_dec" (rect 5 0 49 14)(font "Arial" (font_size 8)))
(text "inst_inc_dec" (rect 8 112 69 124)(font "Arial" ))
(port
347,7 → 305,7
)
)
(symbol
(rect 272 264 336 344)
(rect 336 264 400 344)
(text "DFFE" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "alatch" (rect 3 68 32 80)(font "Arial" ))
(port
389,7 → 347,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
404,7 → 362,7
)
)
(symbol
(rect 760 192 824 336)
(rect 824 192 888 336)
(text "OR8" (rect 1 0 19 10)(font "Arial" (font_size 6)))
(text "inst5" (rect 3 133 26 145)(font "Arial" ))
(port
467,7 → 425,7
(pt 64 72)
(output)
(text "OUT" (rect 48 63 65 75)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 63 62 75)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 63 65 75)(font "Courier New" (bold))(invisible))
(line (pt 48 72)(pt 64 72))
)
(drawing
481,7 → 439,7
)
)
(symbol
(rect 760 40 824 184)
(rect 824 40 888 184)
(text "OR8" (rect 1 0 19 10)(font "Arial" (font_size 6)))
(text "inst6" (rect 3 133 26 145)(font "Arial" ))
(port
544,7 → 502,7
(pt 64 72)
(output)
(text "OUT" (rect 48 63 65 75)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 63 62 75)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 63 65 75)(font "Courier New" (bold))(invisible))
(line (pt 48 72)(pt 64 72))
)
(drawing
558,7 → 516,7
)
)
(symbol
(rect 704 304 752 336)
(rect 768 304 816 336)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "n" (rect 3 21 8 33)(font "Arial" ))
(port
572,7 → 530,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
583,7 → 541,7
)
)
(symbol
(rect 856 160 920 208)
(rect 920 160 984 208)
(text "NOR2" (rect 1 0 26 10)(font "Arial" (font_size 6)))
(text "inst" (rect 3 37 20 49)(font "Arial" ))
(port
604,7 → 562,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 54 24)(pt 64 24))
)
(drawing
617,7 → 575,7
)
)
(symbol
(rect 376 320 464 464)
(rect 440 320 528 464)
(text "address_mux" (rect 5 0 82 14)(font "Arial" (font_size 8)))
(text "mux" (rect 0 128 21 140)(font "Arial" ))
(port
658,7 → 616,7
)
)
(symbol
(rect 520 304 608 448)
(rect 584 304 672 448)
(text "address_mux" (rect 5 0 82 14)(font "Arial" (font_size 8)))
(text "inst7" (rect 0 128 23 140)(font "Arial" ))
(port
698,386 → 656,448
(line (pt 48 120)(pt 48 80))
)
)
(symbol
(rect 280 104 328 168)
(text "AND2" (rect 0 1 10 25)(font "Arial" (font_size 6))(vertical))
(text "inst3" (rect 37 3 49 26)(font "Arial" )(vertical))
(port
(pt 16 0)
(input)
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
(text "IN1" (rect 7 2 19 19)(font "Courier New" (bold))(vertical)(invisible))
(line (pt 16 0)(pt 16 14))
)
(port
(pt 32 0)
(input)
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
(text "IN2" (rect 23 2 35 19)(font "Courier New" (bold))(vertical)(invisible))
(line (pt 32 0)(pt 32 14))
)
(port
(pt 24 64)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 15 48 27 65)(font "Courier New" (bold))(vertical)(invisible))
(line (pt 24 42)(pt 24 64))
)
(drawing
(line (pt 12 14)(pt 12 30))
(line (pt 37 14)(pt 37 31))
(line (pt 12 14)(pt 37 14))
(arc (pt 12 30)(pt 37 31)(rect 12 18 37 43))
)
(flipy_rotate90)
)
(symbol
(rect 224 40 272 72)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst9" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(connector
(pt 232 288)
(pt 272 288)
(pt 440 208)
(pt 440 288)
(bus)
)
(connector
(pt 200 304)
(pt 272 304)
(pt 824 320)
(pt 816 320)
)
(connector
(pt 200 320)
(pt 272 320)
(pt 904 112)
(pt 904 176)
)
(connector
(pt 304 72)
(pt 304 88)
(pt 904 264)
(pt 904 192)
)
(connector
(pt 200 72)
(pt 304 72)
(pt 560 288)
(pt 560 336)
(bus)
)
(connector
(pt 456 96)
(pt 456 48)
(pt 200 176)
(pt 464 176)
)
(connector
(pt 624 176)
(pt 624 112)
(pt 200 192)
(pt 464 192)
)
(connector
(pt 440 208)
(pt 464 208)
(bus)
)
(connector
(pt 376 208)
(pt 376 288)
(pt 200 224)
(pt 464 224)
)
(connector
(pt 304 288)
(pt 336 288)
(bus)
)
(connector
(pt 760 320)
(pt 752 320)
(pt 200 304)
(pt 336 304)
)
(connector
(pt 840 112)
(pt 840 176)
(text "Q[7]" (rect 790 212 811 224)(font "Arial" ))
(pt 744 208)
(pt 824 208)
)
(connector
(pt 840 264)
(pt 840 192)
(text "Q[5]" (rect 790 244 811 256)(font "Arial" ))
(pt 744 240)
(pt 824 240)
)
(connector
(pt 440 96)
(pt 456 96)
(text "Q[6]" (rect 790 228 811 240)(font "Arial" ))
(pt 744 224)
(pt 824 224)
)
(connector
(pt 440 112)
(pt 624 112)
(bus)
(text "Q[4]" (rect 790 260 811 272)(font "Arial" ))
(pt 744 256)
(pt 824 256)
)
(connector
(pt 440 48)
(pt 456 48)
(text "Q[2]" (rect 790 292 811 304)(font "Arial" ))
(pt 744 288)
(pt 824 288)
)
(connector
(pt 600 176)
(pt 624 176)
(bus)
(text "Q[3]" (rect 790 276 811 288)(font "Arial" ))
(pt 744 272)
(pt 824 272)
)
(connector
(pt 824 264)
(pt 840 264)
(text "Q[1]" (rect 750 308 771 320)(font "Arial" ))
(pt 744 304)
(pt 824 304)
)
(connector
(pt 824 112)
(pt 840 112)
(text "Q[15]" (rect 785 60 812 72)(font "Arial" ))
(pt 744 56)
(pt 824 56)
)
(connector
(pt 680 56)
(pt 680 72)
(bus)
(text "Q[13]" (rect 785 92 812 104)(font "Arial" ))
(pt 744 88)
(pt 824 88)
)
(connector
(pt 680 72)
(pt 680 88)
(bus)
(text "Q[14]" (rect 785 76 812 88)(font "Arial" ))
(pt 744 72)
(pt 824 72)
)
(connector
(pt 680 88)
(pt 680 104)
(bus)
(text "Q[12]" (rect 785 108 812 120)(font "Arial" ))
(pt 744 104)
(pt 824 104)
)
(connector
(pt 680 104)
(pt 680 120)
(bus)
(text "Q[10]" (rect 785 140 812 152)(font "Arial" ))
(pt 744 136)
(pt 824 136)
)
(connector
(pt 680 120)
(pt 680 136)
(bus)
(text "Q[11]" (rect 785 124 812 136)(font "Arial" ))
(pt 744 120)
(pt 824 120)
)
(connector
(pt 680 136)
(pt 680 152)
(bus)
(text "Q[9]" (rect 790 156 811 168)(font "Arial" ))
(pt 744 152)
(pt 824 152)
)
(connector
(pt 680 152)
(pt 680 168)
(bus)
(text "Q[8]" (rect 790 172 811 184)(font "Arial" ))
(pt 744 168)
(pt 824 168)
)
(connector
(pt 680 168)
(pt 680 208)
(bus)
(text "Q[0]" (rect 748 326 769 338)(font "Arial" ))
(pt 744 320)
(pt 768 320)
)
(connector
(pt 680 208)
(pt 680 224)
(bus)
(pt 904 192)
(pt 920 192)
)
(connector
(pt 680 224)
(pt 680 240)
(bus)
(pt 904 176)
(pt 920 176)
)
(connector
(pt 680 240)
(pt 680 256)
(pt 304 392)
(pt 440 392)
(bus)
)
(connector
(pt 680 256)
(pt 680 272)
(bus)
(pt 200 440)
(pt 440 440)
)
(connector
(pt 680 272)
(pt 680 288)
(pt 560 336)
(pt 584 336)
(bus)
)
(connector
(pt 680 288)
(pt 680 304)
(bus)
(pt 200 424)
(pt 584 424)
)
(connector
(text "Q[15..0]" (rect 648 231 660 271)(font "Arial" )(vertical))
(pt 680 304)
(pt 680 320)
(pt 440 288)
(pt 560 288)
(bus)
)
(connector
(pt 336 288)
(pt 376 288)
(pt 560 288)
(pt 744 288)
(bus)
)
(connector
(pt 200 48)
(pt 392 48)
(pt 744 208)
(pt 744 224)
(bus)
)
(connector
(pt 200 176)
(pt 400 176)
(pt 744 224)
(pt 744 240)
(bus)
)
(connector
(pt 200 192)
(pt 400 192)
(text "Q[15..0]" (rect 712 231 724 271)(font "Arial" )(vertical))
(pt 744 240)
(pt 744 256)
(bus)
)
(connector
(pt 376 208)
(pt 400 208)
(pt 744 256)
(pt 744 272)
(bus)
)
(connector
(pt 200 224)
(pt 400 224)
(pt 744 272)
(pt 744 288)
(bus)
)
(connector
(text "Q[7]" (rect 726 212 747 224)(font "Arial" ))
(pt 680 208)
(pt 760 208)
(pt 744 288)
(pt 744 304)
(bus)
)
(connector
(text "Q[5]" (rect 726 244 747 256)(font "Arial" ))
(pt 680 240)
(pt 760 240)
(pt 744 304)
(pt 744 320)
(bus)
)
(connector
(text "Q[6]" (rect 726 228 747 240)(font "Arial" ))
(pt 680 224)
(pt 760 224)
(pt 744 56)
(pt 744 72)
(bus)
)
(connector
(text "Q[4]" (rect 726 260 747 272)(font "Arial" ))
(pt 680 256)
(pt 760 256)
(pt 744 72)
(pt 744 88)
(bus)
)
(connector
(text "Q[2]" (rect 726 292 747 304)(font "Arial" ))
(pt 680 288)
(pt 760 288)
(pt 744 88)
(pt 744 104)
(bus)
)
(connector
(text "Q[3]" (rect 726 276 747 288)(font "Arial" ))
(pt 680 272)
(pt 760 272)
(pt 744 104)
(pt 744 120)
(bus)
)
(connector
(text "Q[1]" (rect 686 308 707 320)(font "Arial" ))
(pt 680 304)
(pt 760 304)
(pt 744 120)
(pt 744 136)
(bus)
)
(connector
(text "Q[15]" (rect 721 60 748 72)(font "Arial" ))
(pt 680 56)
(pt 760 56)
(pt 744 136)
(pt 744 152)
(bus)
)
(connector
(text "Q[13]" (rect 721 92 748 104)(font "Arial" ))
(pt 680 88)
(pt 760 88)
(pt 744 152)
(pt 744 168)
(bus)
)
(connector
(text "Q[14]" (rect 721 76 748 88)(font "Arial" ))
(pt 680 72)
(pt 760 72)
(pt 744 168)
(pt 744 208)
(bus)
)
(connector
(text "Q[12]" (rect 721 108 748 120)(font "Arial" ))
(pt 680 104)
(pt 760 104)
(pt 400 288)
(pt 440 288)
(bus)
)
(connector
(text "Q[10]" (rect 721 140 748 152)(font "Arial" ))
(pt 680 136)
(pt 760 136)
(pt 888 264)
(pt 904 264)
)
(connector
(text "Q[11]" (rect 721 124 748 136)(font "Arial" ))
(pt 680 120)
(pt 760 120)
(pt 888 112)
(pt 904 112)
)
(connector
(text "Q[9]" (rect 726 156 747 168)(font "Arial" ))
(pt 680 152)
(pt 760 152)
(pt 984 184)
(pt 1008 184)
)
(connector
(text "Q[8]" (rect 726 172 747 184)(font "Arial" ))
(pt 680 168)
(pt 760 168)
(pt 528 376)
(pt 584 376)
(bus)
)
(connector
(text "Q[0]" (rect 684 326 705 338)(font "Arial" ))
(pt 680 320)
(pt 704 320)
(pt 672 360)
(pt 1008 360)
(bus)
)
(connector
(pt 840 192)
(pt 856 192)
(pt 200 320)
(pt 336 320)
)
(connector
(pt 840 176)
(pt 856 176)
(pt 368 344)
(pt 368 360)
)
(connector
(pt 920 184)
(pt 944 184)
(pt 368 360)
(pt 200 360)
)
(connector
(pt 352 352)
(pt 376 352)
(pt 688 176)
(pt 688 88)
(bus)
)
(connector
(pt 352 104)
(pt 352 352)
(pt 664 176)
(pt 688 176)
(bus)
)
(connector
(pt 232 392)
(pt 376 392)
(pt 304 288)
(pt 304 392)
(bus)
)
(connector
(pt 200 440)
(pt 376 440)
(pt 312 104)
(pt 312 88)
(bus)
)
(connector
(pt 328 104)
(pt 352 104)
(pt 416 352)
(pt 416 88)
(bus)
)
(connector
(pt 352 104)
(pt 376 104)
(pt 440 352)
(pt 416 352)
(bus)
)
(connector
(pt 200 104)
(pt 232 104)
(pt 200 88)
(pt 312 88)
(bus)
)
(connector
(pt 232 104)
(pt 280 104)
(pt 312 88)
(pt 344 88)
(bus)
)
(connector
(text "abus[15..0]" (rect 216 241 228 296)(font "Arial" )(vertical))
(pt 232 104)
(pt 232 288)
(pt 392 88)
(pt 416 88)
(bus)
)
(connector
(pt 232 288)
(pt 232 392)
(pt 416 88)
(pt 688 88)
(bus)
)
(connector
(pt 496 336)
(pt 520 336)
(bus)
(pt 296 56)
(pt 272 56)
)
(connector
(pt 496 288)
(pt 496 336)
(bus)
(pt 296 104)
(pt 296 56)
)
(connector
(pt 376 288)
(pt 496 288)
(bus)
(pt 200 56)
(pt 224 56)
)
(connector
(pt 496 288)
(pt 680 288)
(bus)
(pt 368 24)
(pt 200 24)
)
(connector
(pt 608 360)
(pt 944 360)
(bus)
(pt 368 72)
(pt 368 24)
)
(connector
(pt 464 376)
(pt 520 376)
(text "abusz[15..0]" (rect 287 240 299 300)(font "Arial" )(vertical))
(pt 304 168)
(pt 304 288)
(bus)
)
(connector
(pt 200 424)
(pt 520 424)
)
(junction (pt 232 104))
(junction (pt 232 288))
(junction (pt 680 72))
(junction (pt 680 88))
(junction (pt 680 104))
(junction (pt 680 120))
(junction (pt 680 136))
(junction (pt 680 152))
(junction (pt 680 168))
(junction (pt 680 208))
(junction (pt 680 224))
(junction (pt 680 240))
(junction (pt 680 256))
(junction (pt 680 272))
(junction (pt 680 288))
(junction (pt 680 304))
(junction (pt 376 288))
(junction (pt 352 104))
(junction (pt 496 288))
(text "Address increment / decrement" (rect 456 120 635 134)(font "Arial" (font_size 8)))
(text "A kludge to work around the latch => flop translation" (rect 376 472 673 486)(font "Arial" (font_size 8)))
(junction (pt 304 288))
(junction (pt 440 288))
(junction (pt 560 288))
(junction (pt 744 288))
(junction (pt 744 208))
(junction (pt 744 240))
(junction (pt 744 224))
(junction (pt 744 256))
(junction (pt 744 272))
(junction (pt 744 304))
(junction (pt 744 88))
(junction (pt 744 72))
(junction (pt 744 104))
(junction (pt 744 136))
(junction (pt 744 120))
(junction (pt 744 152))
(junction (pt 744 168))
(junction (pt 416 88))
(junction (pt 312 88))
(text "Address increment / decrement" (rect 488 112 667 126)(font "Arial" (font_size 8)))
(text "A kludge to work around the latch => flop translation" (rect 440 472 737 486)(font "Arial" (font_size 8)))
(title_block
(rect 24 472 281 524)
(name "title-custom-small")
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "May 17, 2014, 2016" (rect 56 3 168 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "address_latch" (rect 43 2 139 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "address_latch" (rect 43 2 139 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "May 17, 2014" (rect 56 3 132 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.3" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.5" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/bus_control.bsf
20,45 → 20,31
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 232 112)
(rect 16 16 208 112)
(text "bus_control" (rect 5 0 72 14)(font "Arial" (font_size 8)))
(text "inst" (rect 8 80 25 92)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "ctl_bus_db_oe" (rect 0 0 83 14)(font "Arial" (font_size 8)))
(text "ctl_bus_db_oe" (rect 21 27 104 41)(font "Arial" (font_size 8)))
(text "ctl_bus_zero_oe" (rect 0 0 95 14)(font "Arial" (font_size 8)))
(text "ctl_bus_zero_oe" (rect 21 27 116 41)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "ctl_bus_zero_oe" (rect 0 0 95 14)(font "Arial" (font_size 8)))
(text "ctl_bus_zero_oe" (rect 21 43 116 57)(font "Arial" (font_size 8)))
(text "ctl_bus_ff_oe" (rect 0 0 79 14)(font "Arial" (font_size 8)))
(text "ctl_bus_ff_oe" (rect 21 43 100 57)(font "Arial" (font_size 8)))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 0 64)
(input)
(text "ctl_bus_ff_oe" (rect 0 0 79 14)(font "Arial" (font_size 8)))
(text "ctl_bus_ff_oe" (rect 21 59 100 73)(font "Arial" (font_size 8)))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 216 32)
(output)
(text "bus_db_oe" (rect 0 0 63 14)(font "Arial" (font_size 8)))
(text "bus_db_oe" (rect 132 27 195 41)(font "Arial" (font_size 8)))
(line (pt 216 32)(pt 200 32))
)
(port
(pt 216 48)
(pt 192 32)
(bidir)
(text "db[7..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))
(text "db[7..0]" (rect 153 43 195 57)(font "Arial" (font_size 8)))
(line (pt 216 48)(pt 200 48)(line_width 3))
(text "db[7..0]" (rect 129 27 171 41)(font "Arial" (font_size 8)))
(line (pt 192 32)(pt 176 32)(line_width 3))
)
(drawing
(rectangle (rect 16 16 200 80))
(rectangle (rect 16 16 176 80))
)
)
/address_latch.v
14,12 → 14,11
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Sat Nov 08 12:52:27 2014"
// CREATED "Sat Feb 27 08:13:14 2016"
 
module address_latch(
ctl_inc_cy,
ctl_inc_dec,
ctl_inc_zero,
ctl_al_we,
ctl_inc_limit6,
ctl_bus_inc_oe,
26,6 → 25,8
clk,
ctl_apin_mux,
ctl_apin_mux2,
clrpc,
nreset,
address_is_1,
abus,
address
34,7 → 35,6
 
input wire ctl_inc_cy;
input wire ctl_inc_dec;
input wire ctl_inc_zero;
input wire ctl_al_we;
input wire ctl_inc_limit6;
input wire ctl_bus_inc_oe;
41,55 → 41,60
input wire clk;
input wire ctl_apin_mux;
input wire ctl_apin_mux2;
input wire clrpc;
input wire nreset;
output wire address_is_1;
inout wire [15:0] abus;
output wire [15:0] address;
 
wire [15:0] abusz;
reg [15:0] Q;
wire SYNTHESIZED_WIRE_0;
wire SYNTHESIZED_WIRE_1;
wire SYNTHESIZED_WIRE_2;
wire [15:0] SYNTHESIZED_WIRE_3;
wire [15:0] SYNTHESIZED_WIRE_8;
wire SYNTHESIZED_WIRE_5;
wire [15:0] SYNTHESIZED_WIRE_6;
wire [15:0] SYNTHESIZED_WIRE_7;
wire SYNTHESIZED_WIRE_4;
wire [15:0] SYNTHESIZED_WIRE_5;
 
 
 
 
 
always@(posedge clk)
always@(posedge clk or negedge nreset)
begin
if (!nreset)
begin
Q[15:0] <= 16'b0000000000000000;
end
else
if (ctl_al_we)
begin
Q[15:0] <= abus[15:0];
Q[15:0] <= abusz[15:0];
end
end
 
assign SYNTHESIZED_WIRE_2 = ~ctl_inc_zero;
 
assign address_is_1 = ~(SYNTHESIZED_WIRE_0 | SYNTHESIZED_WIRE_1);
 
assign SYNTHESIZED_WIRE_8 = {SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2} & SYNTHESIZED_WIRE_3;
assign abusz = {SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2,SYNTHESIZED_WIRE_2} & abus;
 
assign abus[15] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[15] : 1'bz;
assign abus[14] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[14] : 1'bz;
assign abus[13] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[13] : 1'bz;
assign abus[12] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[12] : 1'bz;
assign abus[11] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[11] : 1'bz;
assign abus[10] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[10] : 1'bz;
assign abus[9] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[9] : 1'bz;
assign abus[8] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[8] : 1'bz;
assign abus[7] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[7] : 1'bz;
assign abus[6] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[6] : 1'bz;
assign abus[5] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[5] : 1'bz;
assign abus[4] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[4] : 1'bz;
assign abus[3] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[3] : 1'bz;
assign abus[2] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[2] : 1'bz;
assign abus[1] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[1] : 1'bz;
assign abus[0] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_8[0] : 1'bz;
assign abus[15] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[15] : 1'bz;
assign abus[14] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[14] : 1'bz;
assign abus[13] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[13] : 1'bz;
assign abus[12] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[12] : 1'bz;
assign abus[11] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[11] : 1'bz;
assign abus[10] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[10] : 1'bz;
assign abus[9] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[9] : 1'bz;
assign abus[8] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[8] : 1'bz;
assign abus[7] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[7] : 1'bz;
assign abus[6] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[6] : 1'bz;
assign abus[5] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[5] : 1'bz;
assign abus[4] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[4] : 1'bz;
assign abus[3] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[3] : 1'bz;
assign abus[2] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[2] : 1'bz;
assign abus[1] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[1] : 1'bz;
assign abus[0] = ctl_bus_inc_oe ? SYNTHESIZED_WIRE_7[0] : 1'bz;
 
assign SYNTHESIZED_WIRE_0 = Q[7] | Q[5] | Q[6] | Q[4] | Q[2] | Q[3] | Q[1] | SYNTHESIZED_WIRE_5;
assign SYNTHESIZED_WIRE_0 = Q[7] | Q[5] | Q[6] | Q[4] | Q[2] | Q[3] | Q[1] | SYNTHESIZED_WIRE_4;
 
assign SYNTHESIZED_WIRE_1 = Q[15] | Q[13] | Q[14] | Q[12] | Q[10] | Q[11] | Q[9] | Q[8];
 
96,26 → 101,28
 
address_mux b2v_inst7(
.select(ctl_apin_mux2),
.in0(SYNTHESIZED_WIRE_6),
.in0(SYNTHESIZED_WIRE_5),
.in1(Q),
.out(address));
 
assign SYNTHESIZED_WIRE_2 = ~clrpc;
 
 
inc_dec b2v_inst_inc_dec(
.limit6(ctl_inc_limit6),
.decrement(ctl_inc_dec),
.carry_in(ctl_inc_cy),
.d(Q),
.address(SYNTHESIZED_WIRE_3));
.address(SYNTHESIZED_WIRE_7));
 
 
address_mux b2v_mux(
.select(ctl_apin_mux),
.in0(abus),
.in1(SYNTHESIZED_WIRE_8),
.out(SYNTHESIZED_WIRE_6));
.in0(abusz),
.in1(SYNTHESIZED_WIRE_7),
.out(SYNTHESIZED_WIRE_5));
 
assign SYNTHESIZED_WIRE_5 = ~Q[0];
assign SYNTHESIZED_WIRE_4 = ~Q[0];
 
 
endmodule
/data_pins.bsf
54,8 → 54,8
(port
(pt 0 96)
(input)
(text "bus_db_oe" (rect 0 0 63 14)(font "Arial" (font_size 8)))
(text "bus_db_oe" (rect 21 91 84 105)(font "Arial" (font_size 8)))
(text "ctl_bus_db_oe" (rect 0 0 83 14)(font "Arial" (font_size 8)))
(text "ctl_bus_db_oe" (rect 21 91 104 105)(font "Arial" (font_size 8)))
(line (pt 0 96)(pt 16 96))
)
(port

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