URL
https://opencores.org/ocsvn/a-z80/a-z80/trunk
Subversion Repositories a-z80
Compare Revisions
- This comparison shows the changes necessary to convert path
/a-z80/trunk/cpu
- from Rev 18 to Rev 19
- ↔ Reverse comparison
Rev 18 → Rev 19
/export.py
1,11 → 1,9
#!/usr/bin/env python3 |
# |
# This script exports all core A-Z80 Verilog files to a destination folder of your choice. |
# Add all Verilog files (*.v) to your project and ensure that Verilog include files (*.vh) |
# are on the include path. |
# Run this script to export necessary CPU files away and into your project. |
# |
#------------------------------------------------------------------------------- |
# Copyright (C) 2014,2017 Goran Devic, www.baltazarstudios.com |
# Copyright (C) 2014,2018 Goran Devic, www.baltazarstudios.com |
# |
# This program is free software; you can redistribute it and/or modify it |
# under the terms of the GNU General Public License as published by the Free |
23,7 → 21,7
|
if len(sys.argv) != 2: |
print ("\nUsage: export.py <destination-folder>\n") |
print ("Copies all core A-Z80 Verilog files to a destination folder of your choice.") |
print ("Exports all necessary A-Z80 Verilog files to a project folder of your choice.") |
exit(-1) |
|
dest = sys.argv[1] |
/top-level-files.txt
1,6 → 1,5
# This is a list of A-Z80 files and their dependencies. It is used by several scripts. |
# To copy A-Z80 files into your project, run "export.py" script instead of reading |
# this list or, even worse, copying everything. |
# To copy A-Z80 files into your project, run "export.py" script. |
|
------ Control block ------- |
control/clk_delay.v |