URL
https://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk
Subversion Repositories adv_debug_sys
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- This comparison shows the changes necessary to convert path
/adv_debug_sys/tags/ADS_RELEASE_1_0_0/Hardware/jtag/tap
- from Rev 8 to Rev 12
- ↔ Reverse comparison
Rev 8 → Rev 12
/rtl/verilog/tap_defines.v
0,0 → 1,79
////////////////////////////////////////////////////////////////////// |
//// //// |
//// tap_defines.v //// |
//// //// |
//// //// |
//// This file is part of the JTAG Test Access Port (TAP) //// |
//// http://www.opencores.org/projects/jtag/ //// |
//// //// |
//// Author(s): //// |
//// Igor Mohor (igorm@opencores.org) //// |
//// //// |
//// //// |
//// All additional information is avaliable in the README.txt //// |
//// file. //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 - 2003 Authors //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: tap_defines.v,v $ |
// Revision 1.1.1.1 2008/05/14 12:07:33 Nathan |
// Original from OpenCores |
// |
// Revision 1.3 2004/03/02 17:39:45 mohor |
// IDCODE_VALUE changed to Flextronics ID. |
// |
// Revision 1.2 2004/01/27 10:00:33 mohor |
// Unused registers removed. |
// |
// Revision 1.1 2003/12/23 14:52:14 mohor |
// Directory structure changed. New version of TAP. |
// |
// |
// |
|
|
// Define IDCODE Value |
`define IDCODE_VALUE 32'h149511c3 |
// 0001 version |
// 0100100101010001 part number (IQ) |
// 00011100001 manufacturer id (flextronics) |
// 1 required by standard |
|
// Length of the Instruction register |
`define IR_LENGTH 4 |
|
// Supported Instructions |
`define EXTEST 4'b0000 |
`define SAMPLE_PRELOAD 4'b0001 |
`define IDCODE 4'b0010 |
`define DEBUG 4'b1000 |
`define MBIST 4'b1001 |
`define BYPASS 4'b1111 |
|
/rtl/verilog/tap_top.v
0,0 → 1,577
////////////////////////////////////////////////////////////////////// |
//// //// |
//// tap_top.v //// |
//// //// |
//// //// |
//// This file is part of the JTAG Test Access Port (TAP) //// |
//// //// |
//// Author(s): //// |
//// Igor Mohor (igorm@opencores.org) //// |
//// Nathan Yawn (nathan.yawn@opencores.org) //// |
//// //// |
//// //// |
//// All additional information is avaliable in the jtag.pdf //// |
//// file. //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 - 2008 Authors //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: tap_top.v,v $ |
// Revision 1.4 2009/05/17 20:54:38 Nathan |
// Changed email address to opencores.org |
// |
// Revision 1.3 2008/06/18 18:45:07 Nathan |
// Improved reset slightly. Cleanup. |
// |
// |
// Revision 1.2 2008/05/14 13:13:24 Nathan |
// Rewrote TAP FSM in canonical form, for readability. Switched |
// from one-hot to binary encoding. Made reset signal active- |
// low, per JTAG spec. Removed FF chain for 5 TMS reset - reset |
// done in Test Logic Reset mode. Added test_logic_reset_o and |
// run_test_idle_o signals. Removed double registers from IR data |
// path. Unified the registers at the output of each data register |
// to a single shared FF. |
// |
// Revision 1.6 2004/01/27 10:00:33 mohor |
// Unused registers removed. |
// |
// Revision 1.5 2004/01/18 09:27:39 simons |
// Blocking non blocking assignmenst fixed. |
// |
// Revision 1.4 2004/01/17 17:37:44 mohor |
// capture_dr_o added to ports. |
// |
// Revision 1.3 2004/01/14 13:50:56 mohor |
// 5 consecutive TMS=1 causes reset of TAP. |
// |
// Revision 1.2 2004/01/08 10:29:44 mohor |
// Control signals for tdo_pad_o mux are changed to negedge. |
// |
// Revision 1.1 2003/12/23 14:52:14 mohor |
// Directory structure changed. New version of TAP. |
// |
// Revision 1.10 2003/10/23 18:08:01 mohor |
// MBIST chain connection fixed. |
// |
// Revision 1.9 2003/10/23 16:17:02 mohor |
// CRC logic changed. |
// |
// Revision 1.8 2003/10/21 09:48:31 simons |
// Mbist support added. |
// |
// Revision 1.7 2002/11/06 14:30:10 mohor |
// Trst active high. Inverted on higher layer. |
// |
// Revision 1.6 2002/04/22 12:55:56 mohor |
// tdo_padoen_o changed to tdo_padoe_o. Signal is active high. |
// |
// Revision 1.5 2002/03/26 14:23:38 mohor |
// Signal tdo_padoe_o changed back to tdo_padoen_o. |
// |
// Revision 1.4 2002/03/25 13:16:15 mohor |
// tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just |
// not named correctly. |
// |
// Revision 1.3 2002/03/12 14:30:05 mohor |
// Few outputs for boundary scan chain added. |
// |
// Revision 1.2 2002/03/12 10:31:53 mohor |
// tap_top and dbg_top modules are put into two separate modules. tap_top |
// contains only tap state machine and related logic. dbg_top contains all |
// logic necessery for debugging. |
// |
// Revision 1.1 2002/03/08 15:28:16 mohor |
// Structure changed. Hooks for jtag chain added. |
// |
// |
// |
// |
|
`include "tap_defines.v" |
|
// Top module |
module tap_top( |
// JTAG pads |
tms_pad_i, |
tck_pad_i, |
trstn_pad_i, |
tdi_pad_i, |
tdo_pad_o, |
tdo_padoe_o, |
|
// TAP states |
test_logic_reset_o, |
run_test_idle_o, |
shift_dr_o, |
pause_dr_o, |
update_dr_o, |
capture_dr_o, |
|
// Select signals for boundary scan or mbist |
extest_select_o, |
sample_preload_select_o, |
mbist_select_o, |
debug_select_o, |
|
// TDO signal that is connected to TDI of sub-modules. |
tdo_o, |
|
// TDI signals from sub-modules |
debug_tdi_i, // from debug module |
bs_chain_tdi_i, // from Boundary Scan Chain |
mbist_tdi_i // from Mbist Chain |
); |
|
|
// JTAG pins |
input tms_pad_i; // JTAG test mode select pad |
input tck_pad_i; // JTAG test clock pad |
input trstn_pad_i; // JTAG test reset pad |
input tdi_pad_i; // JTAG test data input pad |
output tdo_pad_o; // JTAG test data output pad |
output tdo_padoe_o; // Output enable for JTAG test data output pad |
|
// TAP states |
output test_logic_reset_o; |
output run_test_idle_o; |
output shift_dr_o; |
output pause_dr_o; |
output update_dr_o; |
output capture_dr_o; |
|
// Select signals for boundary scan or mbist |
output extest_select_o; |
output sample_preload_select_o; |
output mbist_select_o; |
output debug_select_o; |
|
// TDO signal that is connected to TDI of sub-modules. |
output tdo_o; |
|
// TDI signals from sub-modules |
input debug_tdi_i; // from debug module |
input bs_chain_tdi_i; // from Boundary Scan Chain |
input mbist_tdi_i; // from Mbist Chain |
|
// Wires which depend on the state of the TAP FSM |
reg test_logic_reset; |
reg run_test_idle; |
reg select_dr_scan; |
reg capture_dr; |
reg shift_dr; |
reg exit1_dr; |
reg pause_dr; |
reg exit2_dr; |
reg update_dr; |
reg select_ir_scan; |
reg capture_ir; |
reg shift_ir; |
reg exit1_ir; |
reg pause_ir; |
reg exit2_ir; |
reg update_ir; |
|
// Wires which depend on the current value in the IR |
reg extest_select; |
reg sample_preload_select; |
reg idcode_select; |
reg mbist_select; |
reg debug_select; |
reg bypass_select; |
|
// TDO and enable |
reg tdo_pad_o; |
reg tdo_padoe_o; |
|
assign tdo_o = tdi_pad_i; |
|
assign test_logic_reset_o = test_logic_reset; |
assign run_test_idle_o = run_test_idle; |
assign shift_dr_o = shift_dr; |
assign pause_dr_o = pause_dr; |
assign update_dr_o = update_dr; |
assign capture_dr_o = capture_dr; |
|
assign extest_select_o = extest_select; |
assign sample_preload_select_o = sample_preload_select; |
assign mbist_select_o = mbist_select; |
assign debug_select_o = debug_select; |
|
|
/********************************************************************************** |
* * |
* TAP State Machine: Fully JTAG compliant * |
* * |
**********************************************************************************/ |
// Definition of machine state values. We could one-hot encode this, and use 16 |
// registers, but this uses binary encoding for the minimum of 4 DFF's instead. |
`define STATE_test_logic_reset 4'hF |
`define STATE_run_test_idle 4'hC |
`define STATE_select_dr_scan 4'h7 |
`define STATE_capture_dr 4'h6 |
`define STATE_shift_dr 4'h2 |
`define STATE_exit1_dr 4'h1 |
`define STATE_pause_dr 4'h3 |
`define STATE_exit2_dr 4'h0 |
`define STATE_update_dr 4'h5 |
`define STATE_select_ir_scan 4'h4 |
`define STATE_capture_ir 4'hE |
`define STATE_shift_ir 4'hA |
`define STATE_exit1_ir 4'h9 |
`define STATE_pause_ir 4'hB |
`define STATE_exit2_ir 4'h8 |
`define STATE_update_ir 4'hD |
|
reg [3:0] TAP_state = `STATE_test_logic_reset; // current state of the TAP controller |
reg [3:0] next_TAP_state; // state TAP will take at next rising TCK, combinational signal |
|
// sequential part of the FSM |
always @ (posedge tck_pad_i or negedge trstn_pad_i) |
begin |
if(trstn_pad_i == 0) |
TAP_state = `STATE_test_logic_reset; |
else |
TAP_state = next_TAP_state; |
end |
|
|
// Determination of next state; purely combinatorial |
always @ (TAP_state or tms_pad_i) |
begin |
case(TAP_state) |
`STATE_test_logic_reset: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_test_logic_reset; |
else next_TAP_state = `STATE_run_test_idle; |
end |
`STATE_run_test_idle: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_select_dr_scan; |
else next_TAP_state = `STATE_run_test_idle; |
end |
`STATE_select_dr_scan: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_select_ir_scan; |
else next_TAP_state = `STATE_capture_dr; |
end |
`STATE_capture_dr: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_exit1_dr; |
else next_TAP_state = `STATE_shift_dr; |
end |
`STATE_shift_dr: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_exit1_dr; |
else next_TAP_state = `STATE_shift_dr; |
end |
`STATE_exit1_dr: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_update_dr; |
else next_TAP_state = `STATE_pause_dr; |
end |
`STATE_pause_dr: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_exit2_dr; |
else next_TAP_state = `STATE_pause_dr; |
end |
`STATE_exit2_dr: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_update_dr; |
else next_TAP_state = `STATE_shift_dr; |
end |
`STATE_update_dr: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_select_dr_scan; |
else next_TAP_state = `STATE_run_test_idle; |
end |
`STATE_select_ir_scan: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_test_logic_reset; |
else next_TAP_state = `STATE_capture_ir; |
end |
`STATE_capture_ir: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_exit1_ir; |
else next_TAP_state = `STATE_shift_ir; |
end |
`STATE_shift_ir: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_exit1_ir; |
else next_TAP_state = `STATE_shift_ir; |
end |
`STATE_exit1_ir: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_update_ir; |
else next_TAP_state = `STATE_pause_ir; |
end |
`STATE_pause_ir: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_exit2_ir; |
else next_TAP_state = `STATE_pause_ir; |
end |
`STATE_exit2_ir: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_update_ir; |
else next_TAP_state = `STATE_shift_ir; |
end |
`STATE_update_ir: |
begin |
if(tms_pad_i) next_TAP_state = `STATE_select_dr_scan; |
else next_TAP_state = `STATE_run_test_idle; |
end |
default: next_TAP_state = `STATE_test_logic_reset; // can't actually happen |
endcase |
end |
|
|
// Outputs of state machine, pure combinatorial |
always @ (TAP_state) |
begin |
// Default everything to 0, keeps the case statement simple |
test_logic_reset = 1'b0; |
run_test_idle = 1'b0; |
select_dr_scan = 1'b0; |
capture_dr = 1'b0; |
shift_dr = 1'b0; |
exit1_dr = 1'b0; |
pause_dr = 1'b0; |
exit2_dr = 1'b0; |
update_dr = 1'b0; |
select_ir_scan = 1'b0; |
capture_ir = 1'b0; |
shift_ir = 1'b0; |
exit1_ir = 1'b0; |
pause_ir = 1'b0; |
exit2_ir = 1'b0; |
update_ir = 1'b0; |
|
case(TAP_state) |
`STATE_test_logic_reset: test_logic_reset = 1'b1; |
`STATE_run_test_idle: run_test_idle = 1'b1; |
`STATE_select_dr_scan: select_dr_scan = 1'b1; |
`STATE_capture_dr: capture_dr = 1'b1; |
`STATE_shift_dr: shift_dr = 1'b1; |
`STATE_exit1_dr: exit1_dr = 1'b1; |
`STATE_pause_dr: pause_dr = 1'b1; |
`STATE_exit2_dr: exit2_dr = 1'b1; |
`STATE_update_dr: update_dr = 1'b1; |
`STATE_select_ir_scan: select_ir_scan = 1'b1; |
`STATE_capture_ir: capture_ir = 1'b1; |
`STATE_shift_ir: shift_ir = 1'b1; |
`STATE_exit1_ir: exit1_ir = 1'b1; |
`STATE_pause_ir: pause_ir = 1'b1; |
`STATE_exit2_ir: exit2_ir = 1'b1; |
`STATE_update_ir: update_ir = 1'b1; |
default: ; |
endcase |
end |
|
/********************************************************************************** |
* * |
* End: TAP State Machine * |
* * |
**********************************************************************************/ |
|
|
|
/********************************************************************************** |
* * |
* jtag_ir: JTAG Instruction Register * |
* * |
**********************************************************************************/ |
reg [`IR_LENGTH-1:0] jtag_ir; // Instruction register |
reg [`IR_LENGTH-1:0] latched_jtag_ir; //, latched_jtag_ir_neg; |
wire instruction_tdo; |
|
always @ (posedge tck_pad_i or negedge trstn_pad_i) |
begin |
if(trstn_pad_i == 0) |
jtag_ir[`IR_LENGTH-1:0] <= #1 `IR_LENGTH'b0; |
else if (test_logic_reset == 1) |
jtag_ir[`IR_LENGTH-1:0] <= #1 `IR_LENGTH'b0; |
else if(capture_ir) |
jtag_ir <= #1 4'b0101; // This value is fixed for easier fault detection |
else if(shift_ir) |
jtag_ir[`IR_LENGTH-1:0] <= #1 {tdi_pad_i, jtag_ir[`IR_LENGTH-1:1]}; |
end |
|
assign instruction_tdo = jtag_ir[0]; // This is latched on a negative TCK edge after the output MUX |
|
// Updating jtag_ir (Instruction Register) |
// jtag_ir should be latched on FALLING EDGE of TCK when capture_ir == 1 |
always @ (negedge tck_pad_i or negedge trstn_pad_i) |
begin |
if(trstn_pad_i == 0) |
latched_jtag_ir <=#1 `IDCODE; // IDCODE selected after reset |
else if (test_logic_reset) |
latched_jtag_ir <=#1 `IDCODE; // IDCODE selected after reset |
else if(update_ir) |
latched_jtag_ir <=#1 jtag_ir; |
end |
|
/********************************************************************************** |
* * |
* End: jtag_ir * |
* * |
**********************************************************************************/ |
|
|
|
/********************************************************************************** |
* * |
* idcode logic * |
* * |
**********************************************************************************/ |
reg [31:0] idcode_reg; |
wire idcode_tdo; |
|
always @ (posedge tck_pad_i or negedge trstn_pad_i) |
begin |
if(trstn_pad_i == 0) |
idcode_reg <=#1 `IDCODE_VALUE; // IDCODE selected after reset |
else if (test_logic_reset) |
idcode_reg <=#1 `IDCODE_VALUE; // IDCODE selected after reset |
else if(idcode_select & capture_dr) |
idcode_reg <= #1 `IDCODE_VALUE; |
else if(idcode_select & shift_dr) |
idcode_reg <= #1 {tdi_pad_i, idcode_reg[31:1]}; |
|
end |
|
assign idcode_tdo = idcode_reg[0]; // This is latched on a negative TCK edge after the output MUX |
|
/********************************************************************************** |
* * |
* End: idcode logic * |
* * |
**********************************************************************************/ |
|
|
/********************************************************************************** |
* * |
* Bypass logic * |
* * |
**********************************************************************************/ |
wire bypassed_tdo; |
reg bypass_reg; // This is a 1-bit register |
|
always @ (posedge tck_pad_i or negedge trstn_pad_i) |
begin |
if (trstn_pad_i == 0) |
bypass_reg <= #1 1'b0; |
else if (test_logic_reset == 1) |
bypass_reg <= #1 1'b0; |
else if (bypass_select & capture_dr) |
bypass_reg<=#1 1'b0; |
else if(bypass_select & shift_dr) |
bypass_reg<=#1 tdi_pad_i; |
end |
|
assign bypassed_tdo = bypass_reg; // This is latched on a negative TCK edge after the output MUX |
|
/********************************************************************************** |
* * |
* End: Bypass logic * |
* * |
**********************************************************************************/ |
|
|
/********************************************************************************** |
* * |
* Selecting active data register * |
* * |
**********************************************************************************/ |
always @ (latched_jtag_ir) |
begin |
extest_select = 1'b0; |
sample_preload_select = 1'b0; |
idcode_select = 1'b0; |
mbist_select = 1'b0; |
debug_select = 1'b0; |
bypass_select = 1'b0; |
|
case(latched_jtag_ir) /* synthesis parallel_case */ |
`EXTEST: extest_select = 1'b1; // External test |
`SAMPLE_PRELOAD: sample_preload_select = 1'b1; // Sample preload |
`IDCODE: idcode_select = 1'b1; // ID Code |
`MBIST: mbist_select = 1'b1; // Mbist test |
`DEBUG: debug_select = 1'b1; // Debug |
`BYPASS: bypass_select = 1'b1; // BYPASS |
default: bypass_select = 1'b1; // BYPASS |
endcase |
end |
|
|
/********************************************************************************** |
* * |
* Multiplexing TDO data * |
* * |
**********************************************************************************/ |
reg tdo_mux_out; // really just a wire |
|
always @ (shift_ir or instruction_tdo or latched_jtag_ir or idcode_tdo or |
debug_tdi_i or bs_chain_tdi_i or mbist_tdi_i or bypassed_tdo or |
bs_chain_tdi_i) |
begin |
if(shift_ir) |
tdo_mux_out = instruction_tdo; |
else |
begin |
case(latched_jtag_ir) // synthesis parallel_case |
`IDCODE: tdo_mux_out = idcode_tdo; // Reading ID code |
`DEBUG: tdo_mux_out = debug_tdi_i; // Debug |
`SAMPLE_PRELOAD: tdo_mux_out = bs_chain_tdi_i; // Sampling/Preloading |
`EXTEST: tdo_mux_out = bs_chain_tdi_i; // External test |
`MBIST: tdo_mux_out = mbist_tdi_i; // Mbist test |
default: tdo_mux_out = bypassed_tdo; // BYPASS instruction |
endcase |
end |
end |
|
|
// TDO changes state at negative edge of TCK |
always @ (negedge tck_pad_i) |
begin |
tdo_pad_o = tdo_mux_out; |
end |
|
|
// Tristate control for tdo_pad_o pin |
always @ (posedge tck_pad_i) |
begin |
tdo_padoe_o <= #1 shift_ir | shift_dr; |
end |
/********************************************************************************** |
* * |
* End: Multiplexing TDO data * |
* * |
**********************************************************************************/ |
|
endmodule |
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Index: doc/gpl-2.0.txt
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+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
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+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
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+ Finally, any free program is threatened constantly by software
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+ The precise terms and conditions for copying, distribution and
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+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
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+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
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+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
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+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
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+exercise the right to control the distribution of derivative or
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+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
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+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
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+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
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+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
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+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+
+ Copyright (C)
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ , 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
Index: doc/jtag.pdf
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