URL
https://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk
Subversion Repositories adv_debug_sys
Compare Revisions
- This comparison shows the changes necessary to convert path
/adv_debug_sys/trunk/Hardware/altera_virtual_jtag
- from Rev 8 to Rev 14
- ↔ Reverse comparison
Rev 8 → Rev 14
/rtl/vhdl/altera_virtual_jtag.vhd
47,9 → 47,12
// CVS Revision History |
// |
// $Log: altera_virtual_jtag.vhd,v $ |
// Revision 1.2 2009/05/17 20:54:47 Nathan |
// Changed email address to opencores.org |
// Revision 1.3 2009/06/16 02:53:19 Nathan |
// Changed some signal names for better consistency between different hardware modules. |
// |
// Revision 1.2 2009/05/17 20:54:47 Nathan |
// Changed email address to opencores.org |
// |
// Revision 1.1 2008/07/18 20:09:31 Nathan |
// Changed directory structure to match existing projects. |
// |
68,8 → 71,8
PORT |
( |
tck_o : OUT STD_LOGIC; |
debug_tdi_i : IN STD_LOGIC; |
tdo_o : OUT STD_LOGIC; |
debug_tdo_o : IN STD_LOGIC; |
tdi_o : OUT STD_LOGIC; |
test_logic_reset_o : OUT STD_LOGIC; |
run_test_idle_o : OUT STD_LOGIC; |
shift_dr_o : OUT STD_LOGIC; |
151,8 → 154,8
) |
PORT MAP ( |
ir_out => ir_value, |
tdo => debug_tdi_i, |
tdi => tdo_o, |
tdo => debug_tdo_o, |
tdi => tdi_o, |
jtag_state_rti => run_test_idle_o, |
tck => tck_o, |
ir_in => ir_value, |
/doc/src/altera_virtual_jtag.odt
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/doc/altera_virtual_jtag.pdf
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svn:mime-type = application/octet-stream