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URL https://opencores.org/ocsvn/ag_6502/ag_6502/trunk

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    /ag_6502
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Rev 3 → Rev 4

/trunk/ag_6502/ag_6502.v
5,7 → 5,7
//
// Create Date: 10:50:36 02/15/2012
// Design Name:
// Module Name: ag_6502
// Module Name: my6502
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
15,6 → 15,7
//
// Revision:
// Revision 0.01 - File Created
// Revision 0.02 - Fixed NMI bug
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
39,13 → 40,13
`else
 
module ag6502_phase_shift(input baseclk, input phi_0, output reg phi_1);
parameter DELAY = 1; // delay in semi-waves of baseclk
parameter DELAY = 1; // delay in waves of baseclk
initial phi_1 = 0;
integer cnt = 0;
always @(posedge baseclk) begin
if (phi_0 != phi_1) begin
if (!cnt) begin phi_1 <= ~phi_1; cnt <= DELAY; end
if (!cnt) begin phi_1 <= phi_0; cnt <= DELAY; end
else cnt <= cnt - 1;
end
end
53,7 → 54,7
 
// baseclk is used to simulate delays on a real hardware
module ag6502_ext_clock(input baseclk, input phi_0, output phi_1, output phi_2);
parameter DELAY1 = 3, DELAY2 = 1; // delays in semi-waves of baseclk
parameter DELAY1 = 3, DELAY2 = 1; // delays in waves of baseclk
wire phi_1_neg, phi_01;
145,7 → 146,7
reg rdyg = 1;
reg[2:0] T = 7;
reg[7:0] IR ='h18;
reg[7:0] IR ='h00;
reg[15:0] PC = 0;
wire[7:0] PCH = PC[15:8], PCL = PC[7:0];
177,6 → 178,8
wire rst_active = ~rst;
wire so_active = so & ~so_prev;
wire[7:0] IR_in = int_active?8'b0:db_in;
 
wire[1:0] vec_bits=
nmi_active?2'b01:
rst_active?2'b10:
184,10 → 187,8
wire[15:0] vec_addr = {{13{1'b1}}, vec_bits, 1'b0};
wire[7:0] IR_eff = int_active?8'b0:IR;
wire[10:0] L = {T, IR};
wire[10:0] L = {T, IR_eff};
`include "states.v"
assign read = ~A_RW_W;
266,8 → 267,9
E_T__0;
always @(negedge phi_2) if (rdyg) begin
if (E_PC__PC_1) PC <= PC + 1;
else if (E_PC__EA) PC <= EA;
if (E_PC__PC_1) begin
if (T || (!int_active && !rst_active)) PC <= PC + 1;
end else if (E_PC__EA) PC <= EA;
else begin
if (E_PCH__RES) PC[15:8] <= RES;
if (E_PCL__ALU) PC[7:0] <= ALU;
277,8 → 279,8
end
if (!T) begin
IR <= db_in;
if (!db_in) begin // BRK instruction
IR <= IR_in;
if (!IR_in) begin // BRK instruction
{EAH, EAL} <= vec_addr;
end
nmi_prev <= nmi;
326,8 → 328,8
if (cond) begin
T <= 0;
if (!IR_eff) begin
FLAG_B <= !IR;
if (!IR) begin
FLAG_B <= !int_active;
FLAG_I <= 1;
end
end else T <= T + ((E_T__T_1IF_ALUCZ && !ALU_CF)?2: 1);
/trunk/agat7/ag_6502.v
5,7 → 5,7
//
// Create Date: 10:50:36 02/15/2012
// Design Name:
// Module Name: ag_6502
// Module Name: my6502
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
15,6 → 15,7
//
// Revision:
// Revision 0.01 - File Created
// Revision 0.02 - Fixed NMI bug
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
39,13 → 40,13
`else
 
module ag6502_phase_shift(input baseclk, input phi_0, output reg phi_1);
parameter DELAY = 1; // delay in semi-waves of baseclk
parameter DELAY = 1; // delay in waves of baseclk
initial phi_1 = 0;
integer cnt = 0;
always @(posedge baseclk) begin
if (phi_0 != phi_1) begin
if (!cnt) begin phi_1 <= ~phi_1; cnt <= DELAY; end
if (!cnt) begin phi_1 <= phi_0; cnt <= DELAY; end
else cnt <= cnt - 1;
end
end
53,7 → 54,7
 
// baseclk is used to simulate delays on a real hardware
module ag6502_ext_clock(input baseclk, input phi_0, output phi_1, output phi_2);
parameter DELAY1 = 3, DELAY2 = 1; // delays in semi-waves of baseclk
parameter DELAY1 = 3, DELAY2 = 1; // delays in waves of baseclk
wire phi_1_neg, phi_01;
145,7 → 146,7
reg rdyg = 1;
reg[2:0] T = 7;
reg[7:0] IR ='h18;
reg[7:0] IR ='h00;
reg[15:0] PC = 0;
wire[7:0] PCH = PC[15:8], PCL = PC[7:0];
177,6 → 178,8
wire rst_active = ~rst;
wire so_active = so & ~so_prev;
wire[7:0] IR_in = int_active?8'b0:db_in;
 
wire[1:0] vec_bits=
nmi_active?2'b01:
rst_active?2'b10:
184,10 → 187,8
wire[15:0] vec_addr = {{13{1'b1}}, vec_bits, 1'b0};
wire[7:0] IR_eff = int_active?8'b0:IR;
wire[10:0] L = {T, IR};
wire[10:0] L = {T, IR_eff};
`include "states.v"
assign read = ~A_RW_W;
266,8 → 267,9
E_T__0;
always @(negedge phi_2) if (rdyg) begin
if (E_PC__PC_1) PC <= PC + 1;
else if (E_PC__EA) PC <= EA;
if (E_PC__PC_1) begin
if (T || (!int_active && !rst_active)) PC <= PC + 1;
end else if (E_PC__EA) PC <= EA;
else begin
if (E_PCH__RES) PC[15:8] <= RES;
if (E_PCL__ALU) PC[7:0] <= ALU;
277,8 → 279,8
end
if (!T) begin
IR <= db_in;
if (!db_in) begin // BRK instruction
IR <= IR_in;
if (!IR_in) begin // BRK instruction
{EAH, EAL} <= vec_addr;
end
nmi_prev <= nmi;
326,8 → 328,8
if (cond) begin
T <= 0;
if (!IR_eff) begin
FLAG_B <= !IR;
if (!IR) begin
FLAG_B <= !int_active;
FLAG_I <= 1;
end
end else T <= T + ((E_T__T_1IF_ALUCZ && !ALU_CF)?2: 1);
/trunk/juke-box/ag_main.v
0,0 → 1,279
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: BMSTU
// Engineer: Oleg Odintsov
//
// Create Date: 15:09:47 01/19/2012
// Design Name:
// Module Name: ag_main
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
module RAM2kx8(input CLK, input[10:0] AB, input CS, input READ, output[7:0] DO, input[7:0] DI);
reg[7:0] mem[0:2047];
reg[7:0] R;
assign DO = CS? R: 8'bZ;
initial begin
`include "monitor7.v"
// mem['h7FA] = 8'h58;
// mem['h7FB] = 8'hF9;
mem['h7FC] = 8'h00;
mem['h7FD] = 8'h18;
end
always @(posedge CLK) if (CS) if (READ) R <= mem[AB]; else mem[AB] <= DI;
endmodule
 
module RAM4kx8(input CLK, input[11:0] AB, input CS, input READ, output[7:0] DO, input[7:0] DI);
reg[7:0] mem[0:4095];
reg[7:0] R;
assign DO = CS? R: 8'bZ;
always @(posedge CLK) if (CS) if (READ) R <= mem[AB]; else mem[AB] <= DI;
endmodule
 
module RAM8kx8(input CLK, input[12:0] AB, input CS, input READ, output[7:0] DO, input[7:0] DI);
reg[7:0] mem[0:8191];
reg[7:0] R;
assign DO = CS? R: 8'bZ;
always @(posedge CLK) if (CS) if (READ) R <= mem[AB]; else mem[AB] <= DI;
endmodule
 
module RAM32kx8(input CLK, input[14:0] AB, input CS, input READ, output[7:0] DO, input[7:0] DI);
reg[7:0] mem[0:32767];
reg[7:0] R;
integer i;
assign DO = CS? R: 8'bZ;
initial begin
for(i = 0; i<32768; i = i + 1) mem[i] <= 0;
end
always @(posedge CLK) if (CS) if (READ) R <= mem[AB]; else mem[AB] <= DI;
endmodule
 
module ag_main(
input clk50,
input[3:0] btns,
output[7:0] leds,
output[3:0] controls,
output[4:0] vga_bus,
input[1:0] ps2_bus_in,
output clk_cpu
);
 
// assign leds = 0;
// assign controls = 0;
// assign vga_bus = 0;
wire clk1, clk10;
clk_div#5 cd5(clk50, clk10);
clk_div#10 cd10(clk10, clk1);
 
wire clk_vram;
wire[13:0] AB2;
wire[15:0] DI2;
wire [15:0] AB; // address bus
wire [7:0] DI; // data in, read bus
wire [7:0] DO; // data out, write bus
wire read;
wire rom_cs, ram_cs, xram_cs;
wire phi_1, phi_2;
RAM32Kx8x16 base_ram(phi_2, AB[14:0], ram_cs, read, DI, DO,
clk_vram, AB2, 1, DI2);
RAM2kx8 rom1(phi_2, AB[10:0], rom_cs, read, DI, DO);
// RAM8kx8 xram(phi_2, AB[12:0], xram_cs, read, DI, DO);
wire [3:0] AB_HH = AB[15:12];
wire [3:0] AB_HL = AB[11:8];
wire [3:0] AB_LH = AB[7:4];
wire [3:0] AB_LL = AB[3:0];
wire [7:0] AB_H = AB[15:8];
wire [7:0] AB_L = AB[7:0];
wire AB_CXXX = (AB_HH == 4'hC);
wire AB_FXXX = (AB_HH == 4'hF);
wire AB_C0XX = AB_CXXX && !AB_HL;
wire AB_C00X = AB_C0XX && (AB_LH == 4'h0);
wire AB_C01X = AB_C0XX && (AB_LH == 4'h1);
wire AB_C02X = AB_C0XX && (AB_LH == 4'h2);
wire AB_C03X = AB_C0XX && (AB_LH == 4'h3);
wire AB_C04X = AB_C0XX && (AB_LH == 4'h4);
wire AB_C05X = AB_C0XX && (AB_LH == 4'h5);
wire AB_C7XX = AB_CXXX && (AB_HL == 4'h7);
reg timer_ints = 0;
assign rom_cs = AB_FXXX && AB[11]; // F800-FFFF
assign ram_cs = !AB[15];
assign xram_cs = (AB_HH[3:1] == 3'b100);
 
reg reset_auto = 1;
wire reset;
wire WE = ~read; // write enable
supply0 IRQ; // interrupt request
wire NMI; // non-maskable interrupt request
supply1 RDY; // Ready signal. Pauses CPU when RDY=0
supply1 SO; // Set Overflow, not used.
wire SYNC;
assign NMI = timer_ints & vga_bus[0];
reg[7:0] vmode = 0;
wire[7:0] key_reg;
reg[7:0] b_reg;
reg[3:0] lb;
wire key_rus;
reg key_clear = 0;
wire key_rst, key_pause;
reg beep_reg = 0, tape_out_reg = 0;
 
assign reset = 0;//btns[0];
assign leds = AB[11:4];
assign controls = {1'b0, beep_reg ^ tape_out_reg, tape_out_reg, beep_reg};
 
ag_video video(clk50, vmode, clk_vram, AB2, DI2, vga_bus);
wire[1:0] ps2_bus;
signal_filter sf1(clk1, ps2_bus_in[0], ps2_bus[0]);
signal_filter sf2(clk1, ps2_bus_in[1], ps2_bus[1]);
 
 
ag_keyb keyb(phi_2, ps2_bus, key_reg, key_clear, key_rus, key_rst, key_pause);
assign DI = (AB_C00X && !WE)?b_reg?b_reg:key_reg:8'bZ;
wire reset_all = reset | reset_auto | key_rst;
always @(posedge phi_2) begin
key_clear <= AB_C01X;
if (AB_C01X) b_reg <= 0;
else if (AB_C04X) timer_ints <= 1;
else if (AB_C05X || reset_all) timer_ints <= 0;
if (btns[2] & ~lb[2]) b_reg <= 8'h8D;
else if (btns[0] & ~lb[0]) b_reg <= 8'h9A;
else if (btns[1] & ~lb[1]) b_reg <= 8'hA0;
else if (btns[3] & ~lb[3]) b_reg <= 8'h99;
lb <= btns;
if (AB_C02X) tape_out_reg <= ~tape_out_reg;
if (AB_C03X) beep_reg <= ~beep_reg;
if (AB_C7XX) vmode <= AB_L;
end
always @(posedge vga_bus[0]) begin
reset_auto <= 0;
end
ag6502_ext_clock clk(clk50, clk1, phi_1, phi_2);
ag6502 cpu(clk1, phi_1, phi_2, AB, read, DI, DO,
RDY & ~key_pause, ~reset_all, ~IRQ, ~NMI, SO, SYNC);
assign clk_cpu = clk1;
 
endmodule
 
 
module ag_test(
input clk10
);
 
wire clk1, clkx;
my_clk_div#10 c10(clk10, clk1);
my_clk_div#100 c100(clk1, clkx);
wire[13:0] AB2 = 0;
wire[15:0] DI2;
wire [15:0] AB; // address bus
wire [7:0] DI; // data in, read bus
wire [7:0] DO; // data out, write bus
wire read;
wire rom_cs, ram_cs;
wire phi_1, phi_2;
wire clk_vram = 0;
// RAM32Kx8x16 base_ram(phi_2, AB[14:0], ram_cs, read, DI, DO,
// clk_vram, AB2, 1, DI2);
RAM32kx8 base_ram(phi_2, AB[14:0], ram_cs, read, DI, DO);
RAM2kx8 rom1(phi_2, AB[10:0], rom_cs, read, DI, DO);
wire [3:0] AB_HH = AB[15:12];
wire [3:0] AB_HL = AB[11:8];
wire [3:0] AB_LH = AB[7:4];
wire [3:0] AB_LL = AB[3:0];
wire [7:0] AB_H = AB[15:8];
wire [7:0] AB_L = AB[7:0];
wire AB_CXXX = (AB_HH == 4'hC);
wire AB_FXXX = (AB_HH == 4'hF);
wire AB_C0XX = AB_CXXX && !AB_HL;
wire AB_C00X = AB_C0XX && (AB_LH == 4'h0);
wire AB_C01X = AB_C0XX && (AB_LH == 4'h1);
wire AB_C02X = AB_C0XX && (AB_LH == 4'h2);
wire AB_C03X = AB_C0XX && (AB_LH == 4'h3);
wire AB_C04X = AB_C0XX && (AB_LH == 4'h4);
wire AB_C05X = AB_C0XX && (AB_LH == 4'h5);
wire AB_C7XX = AB_CXXX && (AB_HL == 4'h7);
reg timer_ints = 1;
assign rom_cs = AB_FXXX && AB[11]; // F800-FFFF
assign ram_cs = !AB[15];
assign xram_cs = (AB_HH[3:1] == 3'b100);
 
reg reset_auto = 1;
wire reset;
wire WE = ~read; // write enable
supply0 IRQ; // interrupt request
wire NMI; // non-maskable interrupt request
supply1 RDY; // Ready signal. Pauses CPU when RDY=0
supply1 SO; // Set Overflow, not used.
wire SYNC;
assign NMI = clkx;
reg[7:0] vmode = 0;
wire[7:0] key_reg;
reg[7:0] b_reg;
reg lb;
wire key_rus = 0;
reg key_clear = 0;
wire key_rst = 0, key_pause = 0;
reg beep_reg = 0, tape_out_reg = 0;
 
assign reset = 0;//btns[0];
 
assign DI = (AB_C00X && !WE)?b_reg?b_reg:key_reg:8'bZ;
always @(negedge clkx) begin
reset_auto <= 0;
end
ag6502_ext_clock#(2,1) clk(clk10, clk1, phi_1, phi_2);
ag6502 cpu(clk1, phi_1, phi_2, AB, read, DI, DO,
RDY & ~key_pause, ~(reset | reset_auto | key_rst), ~IRQ, ~NMI, SO, SYNC);
endmodule
/trunk/juke-box/clkdiv.v
0,0 → 1,48
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 23:20:37 02/23/2012
// Design Name:
// Module Name: clkdiv
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
module clk_div(input clk, output clk1);
parameter divide = 16;
wire clk0;
 
DCM_SP #(
.CLKDV_DIVIDE(divide) // Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
// 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0
) DCM_SP_inst (
.CLKDV(clk1), // Divided DCM CLK out (CLKDV_DIVIDE)
.CLKIN(clk), // Clock input (from IBUFG, BUFG or DCM)
.CLK0(clk0),
.CLKFB(clk0),
.RST(0)
);
 
endmodule
 
 
module my_clk_div(input clk, output reg clk1 = 0);
parameter divide = 16;
integer cnt = 0;
always @(posedge clk) begin
cnt <= (cnt?cnt:(divide/2)) - 1;
if (!cnt) clk1 <= ~clk1;
end
endmodule
/trunk/juke-box/chip1.ucf
0,0 → 1,59
 
 
NET "b1" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
NET "b2" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
NET "b3" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
NET "b4" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ;
 
NET "rot_a" CLOCK_DEDICATED_ROUTE = FALSE;
NET "rot_b" CLOCK_DEDICATED_ROUTE = FALSE;
NET "rot_center" CLOCK_DEDICATED_ROUTE = FALSE;
 
NET "clk" LOC = C9 | IOSTANDARD = "LVCMOS33";
NET "clk" CLOCK_DEDICATED_ROUTE = FALSE;
//PIN "cpu1/cd5/DCM_SP_inst.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
NET "ROT_A" LOC = K18 | IOSTANDARD = "LVTTL" | PULLUP;
NET "ROT_B" LOC = G18 | IOSTANDARD = "LVTTL" | PULLUP;
NET "ROT_CENTER" LOC = V16 | IOSTANDARD = "LVTTL" | PULLDOWN;
 
NET "LED<7>" LOC = F9 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<6>" LOC = E9 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<5>" LOC = D11 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<4>" LOC = C11 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<3>" LOC = F11 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<2>" LOC = E11 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<1>" LOC = E12 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
NET "LED<0>" LOC = F12 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 8;
 
NET "VGA_RED" LOC = H14 | IOSTANDARD = "LVTTL" | DRIVE = 8 | SLEW = FAST;
NET "VGA_GREEN" LOC = H15 | IOSTANDARD = "LVTTL" | DRIVE = 8 | SLEW = FAST;
NET "VGA_BLUE" LOC = G15 | IOSTANDARD = "LVTTL" | DRIVE = 8 | SLEW = FAST;
NET "VGA_HSYNC" LOC = F15 | IOSTANDARD = "LVTTL" | DRIVE = 8 | SLEW = FAST;
NET "VGA_VSYNC" LOC = F14 | IOSTANDARD = "LVTTL" | DRIVE = 8 | SLEW = FAST;
 
NET "J4<0>" LOC = D7 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 6;
NET "J4<1>" LOC = C7 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 6;
NET "J4<2>" LOC = F8 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 6;
NET "J4<3>" LOC = E8 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 6;
#Created by Constraints Editor (xc3s500e-fg320-4) - 2012/01/19
NET "clk" TNM_NET = clk;
TIMESPEC TS_clk = PERIOD "clk" 50 MHz HIGH 50%;
 
#NET "SPI_MISO" LOC = "N10" | IOSTANDARD = LVCMOS33 ;
NET "SPI_MOSI" LOC = T4 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
NET "SPI_MISO" LOC = N10 | IOSTANDARD = "LVCMOS33";
NET "SPI_SCK" LOC = U16 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
NET "DAC_CS" LOC = N8 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
NET "DAC_CLR" LOC = P8 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
 
NET "spi_amp_cs" LOC = N7 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
NET "spi_rom_cs" LOC = U3 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
NET "platformflash_oe" LOC = T3 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 2;
NET "strataflash_oe" LOC = C18 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 2;
NET "strataflash_ce" LOC = D16 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 2;
NET "strataflash_we" LOC = D17 | IOSTANDARD = "LVTTL" | SLEW = SLOW | DRIVE = 2;
NET "spi_adc_conv" LOC = P11 | IOSTANDARD = "LVCMOS33" | SLEW = SLOW | DRIVE = 8;
 
NET "PS2_CLK" LOC = G14 | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW | PULLUP;
NET "PS2_DATA" LOC = G13 | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW | PULLUP;
NET "PS2_CLK" CLOCK_DEDICATED_ROUTE = FALSE;
/trunk/juke-box/ag_video.v
0,0 → 1,173
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: BMSTU
// Engineer: Oleg Odintsov
//
// Create Date: 11:44:32 02/24/2012
// Design Name:
// Module Name: ag_video
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
module FONT_ROM(input[10:0] adr, input cs, output[7:0] DO);
reg[7:0] mem[0:2047];
assign DO = cs?mem[adr]:8'bZ;
initial begin
`include "agathe7.v"
end
endmodule
 
 
module ag_video(input clk50,
input[7:0] vmode,
output clk_vram,
output[13:0] AB2, input[15:0] DI2,
output[4:0] vga_bus);
parameter
HGR_WHITE = 4'b1111, // RGBX
HGR_BLACK = 4'b0000,
TEXT_COLOR= 4'b1111,
TEXT_BACK = 4'b0000;
wire clk25;
assign clk_vram = ~clk25;
wire[0:15] rDI2 = DI2;
// assign AB2 = 14'b0;
clk_div#2 cd2(clk50, clk25);
wire [9:0] hpos;
wire [8:0] vpos;
wire video_on;
reg[8:0] hpos1;
reg[7:0] vpos1;
wire[1:0] VTYPE = vmode[1:0];
// for 64K+ - variant
// wire[2:0] PAGE_ADDR = {vmode[6], vmode[6]? 1'b0: vmode[5], vmode[4]};
// for 32K-variant
wire[2:0] PAGE_ADDR = {0, vmode[5], vmode[4]};
wire[1:0] SUBPAGE_ADDR = vmode[3:2];
wire VTYPE_HGR = (VTYPE == 2'b11);
wire VTYPE_MGR = (VTYPE == 2'b01);
wire VTYPE_LGR = (VTYPE == 2'b00);
wire VTYPE_TXT = (VTYPE == 2'b10);
wire VTYPE_T32 = VTYPE_TXT && !vmode[7];
wire VTYPE_T64 = VTYPE_TXT && vmode[7];
wire VTYPE_T64_INV = VTYPE_T64 && !SUBPAGE_ADDR[0];
wire[13:0] HGR_ADDR = {PAGE_ADDR[1:0], vpos1, hpos1[8:5]};
wire[3:0] HGR_BITNO = hpos1[4:1];
wire HGR_BIT = rDI2[HGR_BITNO];
wire[3:0] HGR_COLOR = HGR_BIT? HGR_WHITE: HGR_BLACK;
 
wire[13:0] MGR_ADDR = {PAGE_ADDR[1:0], vpos1[7:1], hpos1[8:4]};
wire[1:0] MGR_BLOCKNO = hpos1[3:2];
 
wire[13:0] LGR_ADDR = {PAGE_ADDR[1:0], SUBPAGE_ADDR, vpos1[7:2], hpos1[8:5]};
wire[1:0] LGR_BLOCKNO = hpos1[4:3];
wire[1:0] GR_BLOCKNO = VTYPE_MGR?MGR_BLOCKNO:
LGR_BLOCKNO;
wire[3:0] GR_COLOR = (GR_BLOCKNO == 2'b00)? {DI2[12], DI2[13], DI2[14], DI2[15]}:
(GR_BLOCKNO == 2'b01)? {DI2[8], DI2[9], DI2[10], DI2[11]}:
(GR_BLOCKNO == 2'b10)? {DI2[4], DI2[5], DI2[6], DI2[7]}:
{DI2[0], DI2[1], DI2[2], DI2[3]};
 
wire[13:0] TEXT_ADDR = {PAGE_ADDR[1:0], SUBPAGE_ADDR, vpos1[7:3], hpos1[8:4]};
wire h_phase = hpos1[1:0]?0:1;
reg[0:0] h_cnt = 0;
wire[0:0] h_delay = h_phase?1'd1:1'd0;
wire v_phase = vpos1[2:0]?1:0;
reg[0:0] v_cnt = 0;
wire[0:0] v_delay = v_phase?1'd1:1'd0;
wire[7:0] font_char;
wire[2:0] font_y, font_x;
wire[10:0] font_ab = {font_char, font_y};
wire[0:7] font_db;// = 8'b0;
wire font_pix = font_db[font_x];
FONT_ROM font(font_ab, 1, font_db);
 
 
integer flash_cnt = 0;
reg flash_reg = 0;
wire inverse = VTYPE_T64?VTYPE_T64_INV:!{DI2[5],DI2[3]},
flash = VTYPE_T64?font_db[7]:!{DI2[5],~DI2[3]};
wire inv_mode = inverse || (flash && flash_reg);
 
assign font_x = VTYPE_T64?hpos1[2:0]:hpos1[3:1];
assign font_y = vpos1[2:0];
assign font_char = (VTYPE_T64 && hpos1[3])? DI2[7:0]: DI2[15:8];
wire[3:0] T_COLOR = VTYPE_T64? TEXT_COLOR: {DI2[0], DI2[1], DI2[2], DI2[4]};
 
assign AB2 = VTYPE_HGR? HGR_ADDR:
VTYPE_MGR? MGR_ADDR:
VTYPE_LGR? LGR_ADDR:
TEXT_ADDR;
wire[2:0] color = VTYPE_HGR? HGR_COLOR[3:1]:
(VTYPE_MGR | VTYPE_LGR)? GR_COLOR[3:1]:
((font_pix^inv_mode)?T_COLOR[3:1]: TEXT_BACK);
reg[2:0] color_reg;
always @(posedge clk25) begin
if (!vga_bus[1]) begin
hpos1 <= 0;
h_cnt <= 1;
end else if (video_on) begin
if (!h_cnt) begin
h_cnt <= h_delay;
hpos1 <= hpos1 + 1;
end else h_cnt <= h_cnt - 1;
end
end
always @(posedge clk25) color_reg <= color;
always @(posedge video_on) begin
if (!vpos) begin
vpos1 <= 0;
v_cnt <= 1;
end else begin
if (!v_cnt) begin
v_cnt <= v_delay;
vpos1 <= vpos1 + 1;
end else v_cnt <= v_cnt - 1;
end
end
always @(posedge vga_bus[0]) begin
if (flash_cnt) flash_cnt <= flash_cnt - 1;
else begin
flash_cnt <= 11;
flash_reg <= ~flash_reg;
end
end
assign {vga_bus[4], vga_bus[3], vga_bus[2]} = video_on?color_reg:3'b000;
video_counters cnt(clk25, vga_bus[0], vga_bus[1], video_on, hpos, vpos);
endmodule
/trunk/juke-box/monitor7.v
0,0 → 1,2048
mem['h000] = 'h48;
mem['h001] = 'h4A;
mem['h002] = 'h4A;
mem['h003] = 'h4A;
mem['h004] = 'h4A;
mem['h005] = 'hA8;
mem['h006] = 'h68;
mem['h007] = 'h59;
mem['h008] = 'h19;
mem['h009] = 'hF8;
mem['h00A] = 'hC9;
mem['h00B] = 'hA0;
mem['h00C] = 'hB0;
mem['h00D] = 'h08;
mem['h00E] = 'hC9;
mem['h00F] = 'h90;
mem['h010] = 'h90;
mem['h011] = 'h04;
mem['h012] = 'hA8;
mem['h013] = 'hB9;
mem['h014] = 'h91;
mem['h015] = 'hF7;
mem['h016] = 'hA4;
mem['h017] = 'h24;
mem['h018] = 'h60;
mem['h019] = 'h80;
mem['h01A] = 'hB0;
mem['h01B] = 'hD0;
mem['h01C] = 'hD0;
mem['h01D] = 'hD0;
mem['h01E] = 'hE0;
mem['h01F] = 'hB0;
mem['h020] = 'hB0;
mem['h021] = 'h88;
mem['h022] = 'hA0;
mem['h023] = 'h8D;
mem['h024] = 'h93;
mem['h025] = 'h94;
mem['h026] = 'h98;
mem['h027] = 'h96;
mem['h028] = 'h97;
mem['h029] = 'h95;
mem['h02A] = 'h99;
mem['h02B] = 'h9A;
mem['h02C] = 'h9B;
mem['h02D] = 'h9C;
mem['h02E] = 'h9D;
mem['h02F] = 'h9E;
mem['h030] = 'h9B;
mem['h031] = 'h86;
mem['h032] = 'h2C;
mem['h033] = 'hBC;
mem['h034] = 'h5A;
mem['h035] = 'hF8;
mem['h036] = 'h0A;
mem['h037] = 'h0A;
mem['h038] = 'h48;
mem['h039] = 'h0A;
mem['h03A] = 'hC9;
mem['h03B] = 'hC0;
mem['h03C] = 'h90;
mem['h03D] = 'h02;
mem['h03E] = 'hE9;
mem['h03F] = 'h3F;
mem['h040] = 'h99;
mem['h041] = 'h00;
mem['h042] = 'h00;
mem['h043] = 'h7D;
mem['h044] = 'h56;
mem['h045] = 'hF8;
mem['h046] = 'h45;
mem['h047] = 'h1E;
mem['h048] = 'h29;
mem['h049] = 'hF8;
mem['h04A] = 'h45;
mem['h04B] = 'h1E;
mem['h04C] = 'h85;
mem['h04D] = 'h1E;
mem['h04E] = 'h68;
mem['h04F] = 'h65;
mem['h050] = 'h2C;
mem['h051] = 'hAA;
mem['h052] = 'h9D;
mem['h053] = 'h00;
mem['h054] = 'hC7;
mem['h055] = 'h60;
mem['h056] = 'h08;
mem['h057] = 'h20;
mem['h058] = 'h08;
mem['h059] = 'h20;
mem['h05A] = 'hD0;
mem['h05B] = 'hD0;
mem['h05C] = 'h19;
mem['h05D] = 'hD0;
mem['h05E] = 'h29;
mem['h05F] = 'h07;
mem['h060] = 'hA8;
mem['h061] = 'hB9;
mem['h062] = 'h69;
mem['h063] = 'hF8;
mem['h064] = 'hA8;
mem['h065] = 'h99;
mem['h066] = 'hF0;
mem['h067] = 'hC0;
mem['h068] = 'h60;
mem['h069] = 'h00;
mem['h06A] = 'h01;
mem['h06B] = 'h0A;
mem['h06C] = 'h0B;
mem['h06D] = 'h06;
mem['h06E] = 'h07;
mem['h06F] = 'h02;
mem['h070] = 'h03;
mem['h071] = 'hA6;
mem['h072] = 'h3A;
mem['h073] = 'hA4;
mem['h074] = 'h3B;
mem['h075] = 'h20;
mem['h076] = 'h7D;
mem['h077] = 'hFD;
mem['h078] = 'h20;
mem['h079] = 'h5A;
mem['h07A] = 'hFF;
mem['h07B] = 'hA1;
mem['h07C] = 'h3A;
mem['h07D] = 'hA8;
mem['h07E] = 'h4A;
mem['h07F] = 'h90;
mem['h080] = 'h09;
mem['h081] = 'h6A;
mem['h082] = 'hB0;
mem['h083] = 'h15;
mem['h084] = 'hC9;
mem['h085] = 'hA2;
mem['h086] = 'hF0;
mem['h087] = 'h11;
mem['h088] = 'h29;
mem['h089] = 'h87;
mem['h08A] = 'h4A;
mem['h08B] = 'hAA;
mem['h08C] = 'hBD;
mem['h08D] = 'h48;
mem['h08E] = 'hF9;
mem['h08F] = 'hB0;
mem['h090] = 'h04;
mem['h091] = 'h4A;
mem['h092] = 'h4A;
mem['h093] = 'h4A;
mem['h094] = 'h4A;
mem['h095] = 'h29;
mem['h096] = 'h0F;
mem['h097] = 'hD0;
mem['h098] = 'h04;
mem['h099] = 'hA0;
mem['h09A] = 'h80;
mem['h09B] = 'hA9;
mem['h09C] = 'h00;
mem['h09D] = 'hAA;
mem['h09E] = 'hBD;
mem['h09F] = 'h8C;
mem['h0A0] = 'hF9;
mem['h0A1] = 'h85;
mem['h0A2] = 'h2E;
mem['h0A3] = 'h29;
mem['h0A4] = 'h03;
mem['h0A5] = 'h85;
mem['h0A6] = 'h2F;
mem['h0A7] = 'h98;
mem['h0A8] = 'h29;
mem['h0A9] = 'h8F;
mem['h0AA] = 'hAA;
mem['h0AB] = 'h98;
mem['h0AC] = 'hA0;
mem['h0AD] = 'h03;
mem['h0AE] = 'hE0;
mem['h0AF] = 'h8A;
mem['h0B0] = 'hF0;
mem['h0B1] = 'h0B;
mem['h0B2] = 'h4A;
mem['h0B3] = 'h90;
mem['h0B4] = 'h08;
mem['h0B5] = 'h4A;
mem['h0B6] = 'h4A;
mem['h0B7] = 'h09;
mem['h0B8] = 'h20;
mem['h0B9] = 'h88;
mem['h0BA] = 'hD0;
mem['h0BB] = 'hFA;
mem['h0BC] = 'hC8;
mem['h0BD] = 'h88;
mem['h0BE] = 'hD0;
mem['h0BF] = 'hF2;
mem['h0C0] = 'h60;
mem['h0C1] = 'h20;
mem['h0C2] = 'h71;
mem['h0C3] = 'hF8;
mem['h0C4] = 'h48;
mem['h0C5] = 'hB1;
mem['h0C6] = 'h3A;
mem['h0C7] = 'h20;
mem['h0C8] = 'hC1;
mem['h0C9] = 'hFD;
mem['h0CA] = 'hA2;
mem['h0CB] = 'h01;
mem['h0CC] = 'h20;
mem['h0CD] = 'h5C;
mem['h0CE] = 'hFF;
mem['h0CF] = 'hC4;
mem['h0D0] = 'h2F;
mem['h0D1] = 'hC8;
mem['h0D2] = 'h90;
mem['h0D3] = 'hF1;
mem['h0D4] = 'hA2;
mem['h0D5] = 'h03;
mem['h0D6] = 'hC0;
mem['h0D7] = 'h04;
mem['h0D8] = 'h90;
mem['h0D9] = 'hF2;
mem['h0DA] = 'h68;
mem['h0DB] = 'hA8;
mem['h0DC] = 'hB9;
mem['h0DD] = 'hA6;
mem['h0DE] = 'hF9;
mem['h0DF] = 'h85;
mem['h0E0] = 'h2C;
mem['h0E1] = 'hB9;
mem['h0E2] = 'hE6;
mem['h0E3] = 'hF9;
mem['h0E4] = 'h85;
mem['h0E5] = 'h2D;
mem['h0E6] = 'hA9;
mem['h0E7] = 'h00;
mem['h0E8] = 'hA0;
mem['h0E9] = 'h05;
mem['h0EA] = 'h06;
mem['h0EB] = 'h2D;
mem['h0EC] = 'h26;
mem['h0ED] = 'h2C;
mem['h0EE] = 'h2A;
mem['h0EF] = 'h88;
mem['h0F0] = 'hD0;
mem['h0F1] = 'hF8;
mem['h0F2] = 'h69;
mem['h0F3] = 'hBF;
mem['h0F4] = 'h20;
mem['h0F5] = 'hD4;
mem['h0F6] = 'hFD;
mem['h0F7] = 'hCA;
mem['h0F8] = 'hD0;
mem['h0F9] = 'hEC;
mem['h0FA] = 'h20;
mem['h0FB] = 'h5A;
mem['h0FC] = 'hFF;
mem['h0FD] = 'hA4;
mem['h0FE] = 'h2F;
mem['h0FF] = 'hA2;
mem['h100] = 'h06;
mem['h101] = 'hE0;
mem['h102] = 'h03;
mem['h103] = 'hF0;
mem['h104] = 'h1C;
mem['h105] = 'h06;
mem['h106] = 'h2E;
mem['h107] = 'h90;
mem['h108] = 'h0E;
mem['h109] = 'hBD;
mem['h10A] = 'h99;
mem['h10B] = 'hF9;
mem['h10C] = 'h20;
mem['h10D] = 'hD4;
mem['h10E] = 'hFD;
mem['h10F] = 'hBD;
mem['h110] = 'h9F;
mem['h111] = 'hF9;
mem['h112] = 'hF0;
mem['h113] = 'h03;
mem['h114] = 'h20;
mem['h115] = 'hD4;
mem['h116] = 'hFD;
mem['h117] = 'hCA;
mem['h118] = 'hD0;
mem['h119] = 'hE7;
mem['h11A] = 'h60;
mem['h11B] = 'h88;
mem['h11C] = 'h30;
mem['h11D] = 'hE7;
mem['h11E] = 'h20;
mem['h11F] = 'hC1;
mem['h120] = 'hFD;
mem['h121] = 'hA5;
mem['h122] = 'h2E;
mem['h123] = 'hC9;
mem['h124] = 'hE8;
mem['h125] = 'hB1;
mem['h126] = 'h3A;
mem['h127] = 'h90;
mem['h128] = 'hF2;
mem['h129] = 'h20;
mem['h12A] = 'h3C;
mem['h12B] = 'hF9;
mem['h12C] = 'hAA;
mem['h12D] = 'hE8;
mem['h12E] = 'hD0;
mem['h12F] = 'h01;
mem['h130] = 'hC8;
mem['h131] = 'h98;
mem['h132] = 'h20;
mem['h133] = 'hC1;
mem['h134] = 'hFD;
mem['h135] = 'h8A;
mem['h136] = 'h4C;
mem['h137] = 'hC1;
mem['h138] = 'hFD;
mem['h139] = 'h38;
mem['h13A] = 'hA5;
mem['h13B] = 'h2F;
mem['h13C] = 'hA4;
mem['h13D] = 'h3B;
mem['h13E] = 'hAA;
mem['h13F] = 'h10;
mem['h140] = 'h01;
mem['h141] = 'h88;
mem['h142] = 'h65;
mem['h143] = 'h3A;
mem['h144] = 'h90;
mem['h145] = 'h01;
mem['h146] = 'hC8;
mem['h147] = 'h60;
mem['h148] = 'h40;
mem['h149] = 'h02;
mem['h14A] = 'h45;
mem['h14B] = 'h03;
mem['h14C] = 'hD0;
mem['h14D] = 'h08;
mem['h14E] = 'h40;
mem['h14F] = 'h09;
mem['h150] = 'h30;
mem['h151] = 'h22;
mem['h152] = 'h45;
mem['h153] = 'h33;
mem['h154] = 'hD0;
mem['h155] = 'h08;
mem['h156] = 'h40;
mem['h157] = 'h09;
mem['h158] = 'h40;
mem['h159] = 'h02;
mem['h15A] = 'h45;
mem['h15B] = 'h33;
mem['h15C] = 'hD0;
mem['h15D] = 'h08;
mem['h15E] = 'h40;
mem['h15F] = 'h09;
mem['h160] = 'h40;
mem['h161] = 'h02;
mem['h162] = 'h45;
mem['h163] = 'hB3;
mem['h164] = 'hD0;
mem['h165] = 'h08;
mem['h166] = 'h40;
mem['h167] = 'h09;
mem['h168] = 'h00;
mem['h169] = 'h22;
mem['h16A] = 'h44;
mem['h16B] = 'h33;
mem['h16C] = 'hD0;
mem['h16D] = 'h8C;
mem['h16E] = 'h44;
mem['h16F] = 'h00;
mem['h170] = 'h11;
mem['h171] = 'h22;
mem['h172] = 'h44;
mem['h173] = 'h33;
mem['h174] = 'hD0;
mem['h175] = 'h8C;
mem['h176] = 'h44;
mem['h177] = 'h9A;
mem['h178] = 'h10;
mem['h179] = 'h22;
mem['h17A] = 'h44;
mem['h17B] = 'h33;
mem['h17C] = 'hD0;
mem['h17D] = 'h08;
mem['h17E] = 'h40;
mem['h17F] = 'h09;
mem['h180] = 'h10;
mem['h181] = 'h22;
mem['h182] = 'h44;
mem['h183] = 'h33;
mem['h184] = 'hD0;
mem['h185] = 'h08;
mem['h186] = 'h40;
mem['h187] = 'h09;
mem['h188] = 'h62;
mem['h189] = 'h13;
mem['h18A] = 'h78;
mem['h18B] = 'hA9;
mem['h18C] = 'h00;
mem['h18D] = 'h21;
mem['h18E] = 'h81;
mem['h18F] = 'h82;
mem['h190] = 'h00;
mem['h191] = 'h00;
mem['h192] = 'h59;
mem['h193] = 'h4D;
mem['h194] = 'h91;
mem['h195] = 'h92;
mem['h196] = 'h86;
mem['h197] = 'h4A;
mem['h198] = 'h85;
mem['h199] = 'h9D;
mem['h19A] = 'hAC;
mem['h19B] = 'hA9;
mem['h19C] = 'hAC;
mem['h19D] = 'hA3;
mem['h19E] = 'hA8;
mem['h19F] = 'hA4;
mem['h1A0] = 'hD9;
mem['h1A1] = 'h00;
mem['h1A2] = 'hD8;
mem['h1A3] = 'hA4;
mem['h1A4] = 'hA4;
mem['h1A5] = 'h00;
mem['h1A6] = 'h1C;
mem['h1A7] = 'h8A;
mem['h1A8] = 'h1C;
mem['h1A9] = 'h23;
mem['h1AA] = 'h5D;
mem['h1AB] = 'h8B;
mem['h1AC] = 'h1B;
mem['h1AD] = 'hA1;
mem['h1AE] = 'h9D;
mem['h1AF] = 'h8A;
mem['h1B0] = 'h1D;
mem['h1B1] = 'h23;
mem['h1B2] = 'h9D;
mem['h1B3] = 'h8B;
mem['h1B4] = 'h1D;
mem['h1B5] = 'hA1;
mem['h1B6] = 'h00;
mem['h1B7] = 'h29;
mem['h1B8] = 'h19;
mem['h1B9] = 'hAE;
mem['h1BA] = 'h69;
mem['h1BB] = 'hA8;
mem['h1BC] = 'h19;
mem['h1BD] = 'h23;
mem['h1BE] = 'h24;
mem['h1BF] = 'h53;
mem['h1C0] = 'h1B;
mem['h1C1] = 'h23;
mem['h1C2] = 'h24;
mem['h1C3] = 'h53;
mem['h1C4] = 'h19;
mem['h1C5] = 'hA1;
mem['h1C6] = 'h00;
mem['h1C7] = 'h1A;
mem['h1C8] = 'h5B;
mem['h1C9] = 'h5B;
mem['h1CA] = 'hA5;
mem['h1CB] = 'h69;
mem['h1CC] = 'h24;
mem['h1CD] = 'h24;
mem['h1CE] = 'hAE;
mem['h1CF] = 'hAE;
mem['h1D0] = 'hA8;
mem['h1D1] = 'hAD;
mem['h1D2] = 'h29;
mem['h1D3] = 'h00;
mem['h1D4] = 'h7C;
mem['h1D5] = 'h00;
mem['h1D6] = 'h15;
mem['h1D7] = 'h9C;
mem['h1D8] = 'h6D;
mem['h1D9] = 'h9C;
mem['h1DA] = 'hA5;
mem['h1DB] = 'h69;
mem['h1DC] = 'h29;
mem['h1DD] = 'h53;
mem['h1DE] = 'h84;
mem['h1DF] = 'h13;
mem['h1E0] = 'h34;
mem['h1E1] = 'h11;
mem['h1E2] = 'hA5;
mem['h1E3] = 'h69;
mem['h1E4] = 'h23;
mem['h1E5] = 'hA0;
mem['h1E6] = 'hD8;
mem['h1E7] = 'h62;
mem['h1E8] = 'h5A;
mem['h1E9] = 'h48;
mem['h1EA] = 'h26;
mem['h1EB] = 'h62;
mem['h1EC] = 'h94;
mem['h1ED] = 'h88;
mem['h1EE] = 'h54;
mem['h1EF] = 'h44;
mem['h1F0] = 'hC8;
mem['h1F1] = 'h54;
mem['h1F2] = 'h68;
mem['h1F3] = 'h44;
mem['h1F4] = 'hE8;
mem['h1F5] = 'h94;
mem['h1F6] = 'h00;
mem['h1F7] = 'hB4;
mem['h1F8] = 'h08;
mem['h1F9] = 'h84;
mem['h1FA] = 'h74;
mem['h1FB] = 'hB4;
mem['h1FC] = 'h28;
mem['h1FD] = 'h6E;
mem['h1FE] = 'h74;
mem['h1FF] = 'hF4;
mem['h200] = 'hCC;
mem['h201] = 'h4A;
mem['h202] = 'h72;
mem['h203] = 'hF2;
mem['h204] = 'hA4;
mem['h205] = 'h8A;
mem['h206] = 'h00;
mem['h207] = 'hAA;
mem['h208] = 'hA2;
mem['h209] = 'hA2;
mem['h20A] = 'h74;
mem['h20B] = 'h74;
mem['h20C] = 'h74;
mem['h20D] = 'h72;
mem['h20E] = 'h44;
mem['h20F] = 'h68;
mem['h210] = 'hB2;
mem['h211] = 'h32;
mem['h212] = 'hB2;
mem['h213] = 'h00;
mem['h214] = 'h22;
mem['h215] = 'h00;
mem['h216] = 'h1A;
mem['h217] = 'h1A;
mem['h218] = 'h26;
mem['h219] = 'h26;
mem['h21A] = 'h72;
mem['h21B] = 'h72;
mem['h21C] = 'h88;
mem['h21D] = 'hC8;
mem['h21E] = 'hC4;
mem['h21F] = 'hCA;
mem['h220] = 'h26;
mem['h221] = 'h48;
mem['h222] = 'h44;
mem['h223] = 'h44;
mem['h224] = 'hA2;
mem['h225] = 'hC8;
mem['h226] = 'h85;
mem['h227] = 'h45;
mem['h228] = 'h68;
mem['h229] = 'h48;
mem['h22A] = 'h0A;
mem['h22B] = 'h0A;
mem['h22C] = 'h0A;
mem['h22D] = 'h30;
mem['h22E] = 'h03;
mem['h22F] = 'h6C;
mem['h230] = 'hFE;
mem['h231] = 'h03;
mem['h232] = 'h28;
mem['h233] = 'h20;
mem['h234] = 'h4D;
mem['h235] = 'hFF;
mem['h236] = 'h68;
mem['h237] = 'h85;
mem['h238] = 'h3A;
mem['h239] = 'h68;
mem['h23A] = 'h85;
mem['h23B] = 'h3B;
mem['h23C] = 'h6C;
mem['h23D] = 'hF0;
mem['h23E] = 'h03;
mem['h23F] = 'h20;
mem['h240] = 'h71;
mem['h241] = 'hF8;
mem['h242] = 'h20;
mem['h243] = 'hD0;
mem['h244] = 'hFA;
mem['h245] = 'h4C;
mem['h246] = 'h65;
mem['h247] = 'hFF;
mem['h248] = 'hD8;
mem['h249] = 'h20;
mem['h24A] = 'h7B;
mem['h24B] = 'hFE;
mem['h24C] = 'h20;
mem['h24D] = 'h3C;
mem['h24E] = 'hFB;
mem['h24F] = 'h20;
mem['h250] = 'h8A;
mem['h251] = 'hFE;
mem['h252] = 'h20;
mem['h253] = 'h80;
mem['h254] = 'hFE;
mem['h255] = 'h2C;
mem['h256] = 'h10;
mem['h257] = 'hC0;
mem['h258] = 'hD8;
mem['h259] = 'h20;
mem['h25A] = 'h3B;
mem['h25B] = 'hFF;
mem['h25C] = 'hAD;
mem['h25D] = 'hF3;
mem['h25E] = 'h03;
mem['h25F] = 'h49;
mem['h260] = 'hA5;
mem['h261] = 'hCD;
mem['h262] = 'hF4;
mem['h263] = 'h03;
mem['h264] = 'hD0;
mem['h265] = 'h1C;
mem['h266] = 'h20;
mem['h267] = 'h2E;
mem['h268] = 'hFB;
mem['h269] = 'hAD;
mem['h26A] = 'hF2;
mem['h26B] = 'h03;
mem['h26C] = 'hC9;
mem['h26D] = 'h69;
mem['h26E] = 'hD0;
mem['h26F] = 'h0F;
mem['h270] = 'hA9;
mem['h271] = 'hFF;
mem['h272] = 'hCD;
mem['h273] = 'hF3;
mem['h274] = 'h03;
mem['h275] = 'hD0;
mem['h276] = 'h08;
mem['h277] = 'hA0;
mem['h278] = 'h69;
mem['h279] = 'h8C;
mem['h27A] = 'hF2;
mem['h27B] = 'h03;
mem['h27C] = 'h4C;
mem['h27D] = 'h69;
mem['h27E] = 'hFF;
mem['h27F] = 'h6C;
mem['h280] = 'hF2;
mem['h281] = 'h03;
mem['h282] = 'h2C;
mem['h283] = 'hF1;
mem['h284] = 'hC0;
mem['h285] = 'hA0;
mem['h286] = 'h00;
mem['h287] = 'h84;
mem['h288] = 'h1E;
mem['h289] = 'hA9;
mem['h28A] = 'h0F;
mem['h28B] = 'hA2;
mem['h28C] = 'h02;
mem['h28D] = 'h20;
mem['h28E] = 'h31;
mem['h28F] = 'hF8;
mem['h290] = 'h20;
mem['h291] = 'h3B;
mem['h292] = 'hFC;
mem['h293] = 'hA0;
mem['h294] = 'h14;
mem['h295] = 'hB9;
mem['h296] = 'hFE;
mem['h297] = 'hFA;
mem['h298] = 'h99;
mem['h299] = 'h0F;
mem['h29A] = 'h78;
mem['h29B] = 'h88;
mem['h29C] = 'hD0;
mem['h29D] = 'hF7;
mem['h29E] = 'h2C;
mem['h29F] = 'hF0;
mem['h2A0] = 'hC0;
mem['h2A1] = 'hA2;
mem['h2A2] = 'h05;
mem['h2A3] = 'hBD;
mem['h2A4] = 'hF2;
mem['h2A5] = 'hFA;
mem['h2A6] = 'h9D;
mem['h2A7] = 'hEF;
mem['h2A8] = 'h03;
mem['h2A9] = 'hCA;
mem['h2AA] = 'hD0;
mem['h2AB] = 'hF7;
mem['h2AC] = 'hA9;
mem['h2AD] = 'hC7;
mem['h2AE] = 'h86;
mem['h2AF] = 'h00;
mem['h2B0] = 'h85;
mem['h2B1] = 'h01;
mem['h2B2] = 'hA0;
mem['h2B3] = 'h07;
mem['h2B4] = 'hC6;
mem['h2B5] = 'h01;
mem['h2B6] = 'hA5;
mem['h2B7] = 'h01;
mem['h2B8] = 'hC9;
mem['h2B9] = 'hC0;
mem['h2BA] = 'hF0;
mem['h2BB] = 'hBB;
mem['h2BC] = 'h8D;
mem['h2BD] = 'hF8;
mem['h2BE] = 'h07;
mem['h2BF] = 'hB1;
mem['h2C0] = 'h00;
mem['h2C1] = 'hD9;
mem['h2C2] = 'hF7;
mem['h2C3] = 'hFA;
mem['h2C4] = 'hD0;
mem['h2C5] = 'hEC;
mem['h2C6] = 'h88;
mem['h2C7] = 'h88;
mem['h2C8] = 'h10;
mem['h2C9] = 'hF5;
mem['h2CA] = 'h6C;
mem['h2CB] = 'h00;
mem['h2CC] = 'h00;
mem['h2CD] = 'h20;
mem['h2CE] = 'h75;
mem['h2CF] = 'hFD;
mem['h2D0] = 'hA9;
mem['h2D1] = 'h45;
mem['h2D2] = 'h85;
mem['h2D3] = 'h40;
mem['h2D4] = 'hA9;
mem['h2D5] = 'h00;
mem['h2D6] = 'h85;
mem['h2D7] = 'h41;
mem['h2D8] = 'hA2;
mem['h2D9] = 'hFB;
mem['h2DA] = 'hA9;
mem['h2DB] = 'hA0;
mem['h2DC] = 'h20;
mem['h2DD] = 'hD4;
mem['h2DE] = 'hFD;
mem['h2DF] = 'hBD;
mem['h2E0] = 'h18;
mem['h2E1] = 'hFA;
mem['h2E2] = 'h20;
mem['h2E3] = 'hD4;
mem['h2E4] = 'hFD;
mem['h2E5] = 'hA9;
mem['h2E6] = 'hBD;
mem['h2E7] = 'h20;
mem['h2E8] = 'hD4;
mem['h2E9] = 'hFD;
mem['h2EA] = 'hB5;
mem['h2EB] = 'h4A;
mem['h2EC] = 'h20;
mem['h2ED] = 'hC1;
mem['h2EE] = 'hFD;
mem['h2EF] = 'hE8;
mem['h2F0] = 'h30;
mem['h2F1] = 'hE8;
mem['h2F2] = 'h60;
mem['h2F3] = 'h3F;
mem['h2F4] = 'hFA;
mem['h2F5] = 'h69;
mem['h2F6] = 'hFF;
mem['h2F7] = 'h5A;
mem['h2F8] = 'h20;
mem['h2F9] = 'hFF;
mem['h2FA] = 'h00;
mem['h2FB] = 'hFF;
mem['h2FC] = 'h03;
mem['h2FD] = 'hFF;
mem['h2FE] = 'h3C;
mem['h2FF] = 'hAA;
mem['h300] = 'h2A;
mem['h301] = 'hAA;
mem['h302] = 'h2A;
mem['h303] = 'hA0;
mem['h304] = 'h2F;
mem['h305] = 'hE1;
mem['h306] = 'h29;
mem['h307] = 'hE7;
mem['h308] = 'h29;
mem['h309] = 'hE1;
mem['h30A] = 'h29;
mem['h30B] = 'hF4;
mem['h30C] = 'h29;
mem['h30D] = 'hA0;
mem['h30E] = 'h2F;
mem['h30F] = 'hAA;
mem['h310] = 'h2A;
mem['h311] = 'hAA;
mem['h312] = 'h2A;
mem['h313] = 'hC1;
mem['h314] = 'hD8;
mem['h315] = 'hD9;
mem['h316] = 'hD0;
mem['h317] = 'hD3;
mem['h318] = 'hAD;
mem['h319] = 'h70;
mem['h31A] = 'hC0;
mem['h31B] = 'hA0;
mem['h31C] = 'h00;
mem['h31D] = 'hEA;
mem['h31E] = 'hEA;
mem['h31F] = 'hBD;
mem['h320] = 'h64;
mem['h321] = 'hC0;
mem['h322] = 'h10;
mem['h323] = 'h07;
mem['h324] = 'hEA;
mem['h325] = 'hEA;
mem['h326] = 'hEA;
mem['h327] = 'hC8;
mem['h328] = 'hD0;
mem['h329] = 'hF5;
mem['h32A] = 'h88;
mem['h32B] = 'h60;
mem['h32C] = 'h10;
mem['h32D] = 'h08;
mem['h32E] = 'hA5;
mem['h32F] = 'h19;
mem['h330] = 'h4A;
mem['h331] = 'h90;
mem['h332] = 'h02;
mem['h333] = 'h69;
mem['h334] = 'h1F;
mem['h335] = 'h69;
mem['h336] = 'h02;
mem['h337] = 'hA8;
mem['h338] = 'h99;
mem['h339] = 'h00;
mem['h33A] = 'hC7;
mem['h33B] = 'h60;
mem['h33C] = 'hA9;
mem['h33D] = 'h00;
mem['h33E] = 'h85;
mem['h33F] = 'h48;
mem['h340] = 'h85;
mem['h341] = 'h22;
mem['h342] = 'hA9;
mem['h343] = 'h00;
mem['h344] = 'h85;
mem['h345] = 'h20;
mem['h346] = 'hA9;
mem['h347] = 'h40;
mem['h348] = 'h85;
mem['h349] = 'h21;
mem['h34A] = 'hA9;
mem['h34B] = 'h20;
mem['h34C] = 'h85;
mem['h34D] = 'h23;
mem['h34E] = 'hA9;
mem['h34F] = 'h1F;
mem['h350] = 'h85;
mem['h351] = 'h25;
mem['h352] = 'h4C;
mem['h353] = 'h2F;
mem['h354] = 'hFC;
mem['h355] = 'h20;
mem['h356] = 'h76;
mem['h357] = 'hFB;
mem['h358] = 'h20;
mem['h359] = 'h04;
mem['h35A] = 'hFD;
mem['h35B] = 'hC9;
mem['h35C] = 'h95;
mem['h35D] = 'hF0;
mem['h35E] = 'hF6;
mem['h35F] = 'hC9;
mem['h360] = 'h88;
mem['h361] = 'hF0;
mem['h362] = 'hF2;
mem['h363] = 'h20;
mem['h364] = 'h76;
mem['h365] = 'hFB;
mem['h366] = 'h20;
mem['h367] = 'h04;
mem['h368] = 'hFD;
mem['h369] = 'hC9;
mem['h36A] = 'h9B;
mem['h36B] = 'hF0;
mem['h36C] = 'hEB;
mem['h36D] = 'hC9;
mem['h36E] = 'h99;
mem['h36F] = 'hF0;
mem['h370] = 'hF2;
mem['h371] = 'hC9;
mem['h372] = 'h9A;
mem['h373] = 'hF0;
mem['h374] = 'hEE;
mem['h375] = 'h60;
mem['h376] = 'hC9;
mem['h377] = 'hA0;
mem['h378] = 'hB0;
mem['h379] = 'hFB;
mem['h37A] = 'h4C;
mem['h37B] = 'hD4;
mem['h37C] = 'hFD;
mem['h37D] = 'h85;
mem['h37E] = 'h29;
mem['h37F] = 'hA9;
mem['h380] = 'h00;
mem['h381] = 'h85;
mem['h382] = 'h28;
mem['h383] = 'h46;
mem['h384] = 'h29;
mem['h385] = 'h66;
mem['h386] = 'h28;
mem['h387] = 'h46;
mem['h388] = 'h29;
mem['h389] = 'h66;
mem['h38A] = 'h28;
mem['h38B] = 'hA5;
mem['h38C] = 'h19;
mem['h38D] = 'h29;
mem['h38E] = 'hF8;
mem['h38F] = 'h65;
mem['h390] = 'h29;
mem['h391] = 'h85;
mem['h392] = 'h29;
mem['h393] = 'h60;
mem['h394] = 'h38;
mem['h395] = 'h48;
mem['h396] = 'hE9;
mem['h397] = 'h01;
mem['h398] = 'hD0;
mem['h399] = 'hFC;
mem['h39A] = 'h68;
mem['h39B] = 'hE9;
mem['h39C] = 'h01;
mem['h39D] = 'hD0;
mem['h39E] = 'hF6;
mem['h39F] = 'h60;
mem['h3A0] = 'hE6;
mem['h3A1] = 'h42;
mem['h3A2] = 'hD0;
mem['h3A3] = 'h02;
mem['h3A4] = 'hE6;
mem['h3A5] = 'h43;
mem['h3A6] = 'hA5;
mem['h3A7] = 'h3C;
mem['h3A8] = 'hC5;
mem['h3A9] = 'h3E;
mem['h3AA] = 'hA5;
mem['h3AB] = 'h3D;
mem['h3AC] = 'hE5;
mem['h3AD] = 'h3F;
mem['h3AE] = 'hE6;
mem['h3AF] = 'h3C;
mem['h3B0] = 'hD0;
mem['h3B1] = 'h02;
mem['h3B2] = 'hE6;
mem['h3B3] = 'h3D;
mem['h3B4] = 'h60;
mem['h3B5] = 'h8D;
mem['h3B6] = 'h8A;
mem['h3B7] = 'h88;
mem['h3B8] = 'h95;
mem['h3B9] = 'h99;
mem['h3BA] = 'h9A;
mem['h3BB] = 'h8C;
mem['h3BC] = 'h9D;
mem['h3BD] = 'h9E;
mem['h3BE] = 'h87;
mem['h3BF] = 'h9C;
mem['h3C0] = 'h5B;
mem['h3C1] = 'h5B;
mem['h3C2] = 'h19;
mem['h3C3] = 'h0E;
mem['h3C4] = 'h27;
mem['h3C5] = 'h5F;
mem['h3C6] = 'h3B;
mem['h3C7] = 'h96;
mem['h3C8] = 'h45;
mem['h3C9] = 'hAE;
mem['h3CA] = 'hA7;
mem['h3CB] = 'hC9;
mem['h3CC] = 'h8D;
mem['h3CD] = 'hD0;
mem['h3CE] = 'h18;
mem['h3CF] = 'hAC;
mem['h3D0] = 'h00;
mem['h3D1] = 'hC0;
mem['h3D2] = 'h10;
mem['h3D3] = 'h13;
mem['h3D4] = 'h2C;
mem['h3D5] = 'h10;
mem['h3D6] = 'hC0;
mem['h3D7] = 'hC0;
mem['h3D8] = 'hA0;
mem['h3D9] = 'hD0;
mem['h3DA] = 'h0C;
mem['h3DB] = 'hAC;
mem['h3DC] = 'h00;
mem['h3DD] = 'hC0;
mem['h3DE] = 'h10;
mem['h3DF] = 'hFB;
mem['h3E0] = 'hC0;
mem['h3E1] = 'h83;
mem['h3E2] = 'hF0;
mem['h3E3] = 'h03;
mem['h3E4] = 'h2C;
mem['h3E5] = 'h10;
mem['h3E6] = 'hC0;
mem['h3E7] = 'hC9;
mem['h3E8] = 'hA0;
mem['h3E9] = 'hB0;
mem['h3EA] = 'h1A;
mem['h3EB] = 'hA8;
mem['h3EC] = 'h10;
mem['h3ED] = 'h17;
mem['h3EE] = 'hA0;
mem['h3EF] = 'h0A;
mem['h3F0] = 'hD9;
mem['h3F1] = 'hB5;
mem['h3F2] = 'hFB;
mem['h3F3] = 'hF0;
mem['h3F4] = 'h04;
mem['h3F5] = 'h88;
mem['h3F6] = 'h10;
mem['h3F7] = 'hF8;
mem['h3F8] = 'h60;
mem['h3F9] = 'hB9;
mem['h3FA] = 'hC0;
mem['h3FB] = 'hFB;
mem['h3FC] = 'h85;
mem['h3FD] = 'h2A;
mem['h3FE] = 'hA9;
mem['h3FF] = 'hFC;
mem['h400] = 'h85;
mem['h401] = 'h2B;
mem['h402] = 'h6C;
mem['h403] = 'h2A;
mem['h404] = 'h00;
mem['h405] = 'hA4;
mem['h406] = 'h24;
mem['h407] = 'h91;
mem['h408] = 'h28;
mem['h409] = 'hC8;
mem['h40A] = 'hA5;
mem['h40B] = 'h32;
mem['h40C] = 'h91;
mem['h40D] = 'h28;
mem['h40E] = 'hE6;
mem['h40F] = 'h24;
mem['h410] = 'hE6;
mem['h411] = 'h24;
mem['h412] = 'hA5;
mem['h413] = 'h24;
mem['h414] = 'hC5;
mem['h415] = 'h21;
mem['h416] = 'hB0;
mem['h417] = 'h43;
mem['h418] = 'h60;
mem['h419] = 'hC6;
mem['h41A] = 'h24;
mem['h41B] = 'hC6;
mem['h41C] = 'h24;
mem['h41D] = 'h10;
mem['h41E] = 'hF9;
mem['h41F] = 'hA5;
mem['h420] = 'h21;
mem['h421] = 'h85;
mem['h422] = 'h24;
mem['h423] = 'hC6;
mem['h424] = 'h24;
mem['h425] = 'hC6;
mem['h426] = 'h24;
mem['h427] = 'hA5;
mem['h428] = 'h22;
mem['h429] = 'hC5;
mem['h42A] = 'h25;
mem['h42B] = 'hB0;
mem['h42C] = 'h0D;
mem['h42D] = 'hC6;
mem['h42E] = 'h25;
mem['h42F] = 'hA5;
mem['h430] = 'h25;
mem['h431] = 'h20;
mem['h432] = 'h7D;
mem['h433] = 'hFB;
mem['h434] = 'hA5;
mem['h435] = 'h28;
mem['h436] = 'h65;
mem['h437] = 'h20;
mem['h438] = 'h85;
mem['h439] = 'h28;
mem['h43A] = 'h60;
mem['h43B] = 'hA5;
mem['h43C] = 'h22;
mem['h43D] = 'h85;
mem['h43E] = 'h25;
mem['h43F] = 'hA0;
mem['h440] = 'h00;
mem['h441] = 'h84;
mem['h442] = 'h24;
mem['h443] = 'hF0;
mem['h444] = 'h04;
mem['h445] = 'hA4;
mem['h446] = 'h24;
mem['h447] = 'hA5;
mem['h448] = 'h25;
mem['h449] = 'h48;
mem['h44A] = 'h20;
mem['h44B] = 'h31;
mem['h44C] = 'hFC;
mem['h44D] = 'h20;
mem['h44E] = 'h98;
mem['h44F] = 'hFC;
mem['h450] = 'hA0;
mem['h451] = 'h00;
mem['h452] = 'h68;
mem['h453] = 'h69;
mem['h454] = 'h00;
mem['h455] = 'hC5;
mem['h456] = 'h23;
mem['h457] = 'h90;
mem['h458] = 'hF0;
mem['h459] = 'hB0;
mem['h45A] = 'hD4;
mem['h45B] = 'hA9;
mem['h45C] = 'h00;
mem['h45D] = 'h85;
mem['h45E] = 'h24;
mem['h45F] = 'hE6;
mem['h460] = 'h25;
mem['h461] = 'hA5;
mem['h462] = 'h25;
mem['h463] = 'hC5;
mem['h464] = 'h23;
mem['h465] = 'h90;
mem['h466] = 'hCA;
mem['h467] = 'hC6;
mem['h468] = 'h25;
mem['h469] = 'hA5;
mem['h46A] = 'h22;
mem['h46B] = 'h48;
mem['h46C] = 'h20;
mem['h46D] = 'h31;
mem['h46E] = 'hFC;
mem['h46F] = 'hA5;
mem['h470] = 'h28;
mem['h471] = 'h85;
mem['h472] = 'h2A;
mem['h473] = 'hA5;
mem['h474] = 'h29;
mem['h475] = 'h85;
mem['h476] = 'h2B;
mem['h477] = 'hA4;
mem['h478] = 'h21;
mem['h479] = 'h88;
mem['h47A] = 'h68;
mem['h47B] = 'h69;
mem['h47C] = 'h01;
mem['h47D] = 'hC5;
mem['h47E] = 'h23;
mem['h47F] = 'hB0;
mem['h480] = 'h0D;
mem['h481] = 'h48;
mem['h482] = 'h20;
mem['h483] = 'h31;
mem['h484] = 'hFC;
mem['h485] = 'hB1;
mem['h486] = 'h28;
mem['h487] = 'h91;
mem['h488] = 'h2A;
mem['h489] = 'h88;
mem['h48A] = 'h10;
mem['h48B] = 'hF9;
mem['h48C] = 'h30;
mem['h48D] = 'hE1;
mem['h48E] = 'hA0;
mem['h48F] = 'h00;
mem['h490] = 'h20;
mem['h491] = 'h98;
mem['h492] = 'hFC;
mem['h493] = 'h4C;
mem['h494] = 'h2F;
mem['h495] = 'hFC;
mem['h496] = 'hA4;
mem['h497] = 'h24;
mem['h498] = 'hA9;
mem['h499] = 'hA0;
mem['h49A] = 'h91;
mem['h49B] = 'h28;
mem['h49C] = 'hC8;
mem['h49D] = 'hA5;
mem['h49E] = 'h32;
mem['h49F] = 'h91;
mem['h4A0] = 'h28;
mem['h4A1] = 'hC8;
mem['h4A2] = 'hC4;
mem['h4A3] = 'h21;
mem['h4A4] = 'h90;
mem['h4A5] = 'hF2;
mem['h4A6] = 'h60;
mem['h4A7] = 'hA5;
mem['h4A8] = 'h32;
mem['h4A9] = 'h49;
mem['h4AA] = 'h80;
mem['h4AB] = 'h85;
mem['h4AC] = 'h32;
mem['h4AD] = 'h60;
mem['h4AE] = 'hA9;
mem['h4AF] = 'h40;
mem['h4B0] = 'h20;
mem['h4B1] = 'h94;
mem['h4B2] = 'hFB;
mem['h4B3] = 'hA0;
mem['h4B4] = 'hC0;
mem['h4B5] = 'hA9;
mem['h4B6] = 'h0C;
mem['h4B7] = 'h20;
mem['h4B8] = 'h94;
mem['h4B9] = 'hFB;
mem['h4BA] = 'hAD;
mem['h4BB] = 'h30;
mem['h4BC] = 'hC0;
mem['h4BD] = 'h88;
mem['h4BE] = 'hD0;
mem['h4BF] = 'hF5;
mem['h4C0] = 'h60;
mem['h4C1] = 'hA0;
mem['h4C2] = 'h4B;
mem['h4C3] = 'h20;
mem['h4C4] = 'hD3;
mem['h4C5] = 'hFC;
mem['h4C6] = 'hD0;
mem['h4C7] = 'hF9;
mem['h4C8] = 'h69;
mem['h4C9] = 'hFE;
mem['h4CA] = 'hB0;
mem['h4CB] = 'hF5;
mem['h4CC] = 'hA0;
mem['h4CD] = 'h21;
mem['h4CE] = 'h20;
mem['h4CF] = 'hD3;
mem['h4D0] = 'hFC;
mem['h4D1] = 'hC8;
mem['h4D2] = 'hC8;
mem['h4D3] = 'h88;
mem['h4D4] = 'hD0;
mem['h4D5] = 'hFD;
mem['h4D6] = 'h90;
mem['h4D7] = 'h05;
mem['h4D8] = 'hA0;
mem['h4D9] = 'h32;
mem['h4DA] = 'h88;
mem['h4DB] = 'hD0;
mem['h4DC] = 'hFD;
mem['h4DD] = 'hAC;
mem['h4DE] = 'h20;
mem['h4DF] = 'hC0;
mem['h4E0] = 'hA0;
mem['h4E1] = 'h2C;
mem['h4E2] = 'hCA;
mem['h4E3] = 'h60;
mem['h4E4] = 'hA2;
mem['h4E5] = 'h08;
mem['h4E6] = 'h48;
mem['h4E7] = 'h20;
mem['h4E8] = 'hF2;
mem['h4E9] = 'hFC;
mem['h4EA] = 'h68;
mem['h4EB] = 'h2A;
mem['h4EC] = 'hA0;
mem['h4ED] = 'h3A;
mem['h4EE] = 'hCA;
mem['h4EF] = 'hD0;
mem['h4F0] = 'hF5;
mem['h4F1] = 'h60;
mem['h4F2] = 'h20;
mem['h4F3] = 'hF5;
mem['h4F4] = 'hFC;
mem['h4F5] = 'h88;
mem['h4F6] = 'hAD;
mem['h4F7] = 'h60;
mem['h4F8] = 'hC0;
mem['h4F9] = 'h45;
mem['h4FA] = 'h2F;
mem['h4FB] = 'h10;
mem['h4FC] = 'hF8;
mem['h4FD] = 'h45;
mem['h4FE] = 'h2F;
mem['h4FF] = 'h85;
mem['h500] = 'h2F;
mem['h501] = 'hC0;
mem['h502] = 'h80;
mem['h503] = 'h60;
mem['h504] = 'h6C;
mem['h505] = 'h38;
mem['h506] = 'h00;
mem['h507] = 'hA5;
mem['h508] = 'h19;
mem['h509] = 'h20;
mem['h50A] = 'h5E;
mem['h50B] = 'hF8;
mem['h50C] = 'hA4;
mem['h50D] = 'h24;
mem['h50E] = 'hB1;
mem['h50F] = 'h28;
mem['h510] = 'h85;
mem['h511] = 'h35;
mem['h512] = 'hC8;
mem['h513] = 'hB1;
mem['h514] = 'h28;
mem['h515] = 'h48;
mem['h516] = 'hA9;
mem['h517] = 'h0F;
mem['h518] = 'h91;
mem['h519] = 'h28;
mem['h51A] = 'h68;
mem['h51B] = 'hE6;
mem['h51C] = 'h4E;
mem['h51D] = 'hD0;
mem['h51E] = 'h02;
mem['h51F] = 'hE6;
mem['h520] = 'h4F;
mem['h521] = 'h2C;
mem['h522] = 'h00;
mem['h523] = 'hC0;
mem['h524] = 'h10;
mem['h525] = 'hF5;
mem['h526] = 'h91;
mem['h527] = 'h28;
mem['h528] = 'hA5;
mem['h529] = 'h1E;
mem['h52A] = 'h20;
mem['h52B] = 'h5E;
mem['h52C] = 'hF8;
mem['h52D] = 'hAD;
mem['h52E] = 'h00;
mem['h52F] = 'hC0;
mem['h530] = 'h09;
mem['h531] = 'h80;
mem['h532] = 'h2C;
mem['h533] = 'h10;
mem['h534] = 'hC0;
mem['h535] = 'hA4;
mem['h536] = 'h24;
mem['h537] = 'h60;
mem['h538] = 'h20;
mem['h539] = 'hD4;
mem['h53A] = 'hFD;
mem['h53B] = 'hC9;
mem['h53C] = 'h88;
mem['h53D] = 'hF0;
mem['h53E] = 'h1D;
mem['h53F] = 'hC9;
mem['h540] = 'h98;
mem['h541] = 'hF0;
mem['h542] = 'h0A;
mem['h543] = 'hE0;
mem['h544] = 'hF8;
mem['h545] = 'h90;
mem['h546] = 'h03;
mem['h547] = 'h20;
mem['h548] = 'h3B;
mem['h549] = 'hFF;
mem['h54A] = 'hE8;
mem['h54B] = 'hD0;
mem['h54C] = 'h13;
mem['h54D] = 'hA9;
mem['h54E] = 'hDC;
mem['h54F] = 'h20;
mem['h550] = 'hD4;
mem['h551] = 'hFD;
mem['h552] = 'h20;
mem['h553] = 'h75;
mem['h554] = 'hFD;
mem['h555] = 'hA5;
mem['h556] = 'h33;
mem['h557] = 'h20;
mem['h558] = 'hD4;
mem['h559] = 'hFD;
mem['h55A] = 'hA2;
mem['h55B] = 'h01;
mem['h55C] = 'h8A;
mem['h55D] = 'hF0;
mem['h55E] = 'hF3;
mem['h55F] = 'hCA;
mem['h560] = 'h20;
mem['h561] = 'h66;
mem['h562] = 'hFB;
mem['h563] = 'hC9;
mem['h564] = 'h95;
mem['h565] = 'hD0;
mem['h566] = 'h02;
mem['h567] = 'hA5;
mem['h568] = 'h35;
mem['h569] = 'h9D;
mem['h56A] = 'h00;
mem['h56B] = 'h02;
mem['h56C] = 'hC9;
mem['h56D] = 'h8D;
mem['h56E] = 'hD0;
mem['h56F] = 'hC8;
mem['h570] = 'hA9;
mem['h571] = 'h9D;
mem['h572] = 'h20;
mem['h573] = 'hD4;
mem['h574] = 'hFD;
mem['h575] = 'hA9;
mem['h576] = 'h8D;
mem['h577] = 'hD0;
mem['h578] = 'h5B;
mem['h579] = 'hA4;
mem['h57A] = 'h3D;
mem['h57B] = 'hA6;
mem['h57C] = 'h3C;
mem['h57D] = 'h20;
mem['h57E] = 'h75;
mem['h57F] = 'hFD;
mem['h580] = 'h20;
mem['h581] = 'h31;
mem['h582] = 'hF9;
mem['h583] = 'hA0;
mem['h584] = 'h00;
mem['h585] = 'hA9;
mem['h586] = 'hAD;
mem['h587] = 'h4C;
mem['h588] = 'hD4;
mem['h589] = 'hFD;
mem['h58A] = 'hA5;
mem['h58B] = 'h3C;
mem['h58C] = 'h09;
mem['h58D] = 'h07;
mem['h58E] = 'h85;
mem['h58F] = 'h3E;
mem['h590] = 'hA5;
mem['h591] = 'h3D;
mem['h592] = 'h85;
mem['h593] = 'h3F;
mem['h594] = 'hA5;
mem['h595] = 'h3C;
mem['h596] = 'h29;
mem['h597] = 'h07;
mem['h598] = 'hD0;
mem['h599] = 'h03;
mem['h59A] = 'h20;
mem['h59B] = 'h79;
mem['h59C] = 'hFD;
mem['h59D] = 'hA9;
mem['h59E] = 'hA0;
mem['h59F] = 'h20;
mem['h5A0] = 'hD4;
mem['h5A1] = 'hFD;
mem['h5A2] = 'hB1;
mem['h5A3] = 'h3C;
mem['h5A4] = 'h20;
mem['h5A5] = 'hC1;
mem['h5A6] = 'hFD;
mem['h5A7] = 'h20;
mem['h5A8] = 'hA6;
mem['h5A9] = 'hFB;
mem['h5AA] = 'h90;
mem['h5AB] = 'hE8;
mem['h5AC] = 'h60;
mem['h5AD] = 'h4A;
mem['h5AE] = 'h90;
mem['h5AF] = 'hEA;
mem['h5B0] = 'h4A;
mem['h5B1] = 'h4A;
mem['h5B2] = 'hA5;
mem['h5B3] = 'h3E;
mem['h5B4] = 'h90;
mem['h5B5] = 'h02;
mem['h5B6] = 'h49;
mem['h5B7] = 'hFF;
mem['h5B8] = 'h65;
mem['h5B9] = 'h3C;
mem['h5BA] = 'h48;
mem['h5BB] = 'hA9;
mem['h5BC] = 'hBD;
mem['h5BD] = 'h20;
mem['h5BE] = 'hD4;
mem['h5BF] = 'hFD;
mem['h5C0] = 'h68;
mem['h5C1] = 'h48;
mem['h5C2] = 'h4A;
mem['h5C3] = 'h4A;
mem['h5C4] = 'h4A;
mem['h5C5] = 'h4A;
mem['h5C6] = 'h20;
mem['h5C7] = 'hCC;
mem['h5C8] = 'hFD;
mem['h5C9] = 'h68;
mem['h5CA] = 'h29;
mem['h5CB] = 'h0F;
mem['h5CC] = 'h09;
mem['h5CD] = 'hB0;
mem['h5CE] = 'hC9;
mem['h5CF] = 'hBA;
mem['h5D0] = 'h90;
mem['h5D1] = 'h02;
mem['h5D2] = 'h69;
mem['h5D3] = 'h06;
mem['h5D4] = 'h6C;
mem['h5D5] = 'h36;
mem['h5D6] = 'h00;
mem['h5D7] = 'h84;
mem['h5D8] = 'h35;
mem['h5D9] = 'h48;
mem['h5DA] = 'hA5;
mem['h5DB] = 'h19;
mem['h5DC] = 'h20;
mem['h5DD] = 'h5E;
mem['h5DE] = 'hF8;
mem['h5DF] = 'h68;
mem['h5E0] = 'h48;
mem['h5E1] = 'hC9;
mem['h5E2] = 'hA0;
mem['h5E3] = 'h90;
mem['h5E4] = 'h06;
mem['h5E5] = 'h24;
mem['h5E6] = 'h32;
mem['h5E7] = 'h30;
mem['h5E8] = 'h02;
mem['h5E9] = 'h29;
mem['h5EA] = 'h7F;
mem['h5EB] = 'h20;
mem['h5EC] = 'hCB;
mem['h5ED] = 'hFB;
mem['h5EE] = 'hA5;
mem['h5EF] = 'h1E;
mem['h5F0] = 'h20;
mem['h5F1] = 'h5E;
mem['h5F2] = 'hF8;
mem['h5F3] = 'h68;
mem['h5F4] = 'hA4;
mem['h5F5] = 'h35;
mem['h5F6] = 'h60;
mem['h5F7] = 'h8A;
mem['h5F8] = 'hF0;
mem['h5F9] = 'h07;
mem['h5FA] = 'hB5;
mem['h5FB] = 'h3C;
mem['h5FC] = 'h95;
mem['h5FD] = 'h3A;
mem['h5FE] = 'hCA;
mem['h5FF] = 'h10;
mem['h600] = 'hF9;
mem['h601] = 'h60;
mem['h602] = 'hC6;
mem['h603] = 'h34;
mem['h604] = 'hF0;
mem['h605] = 'h84;
mem['h606] = 'hCA;
mem['h607] = 'hD0;
mem['h608] = 'h16;
mem['h609] = 'hC9;
mem['h60A] = 'hBA;
mem['h60B] = 'hD0;
mem['h60C] = 'hA0;
mem['h60D] = 'h85;
mem['h60E] = 'h31;
mem['h60F] = 'hA5;
mem['h610] = 'h3E;
mem['h611] = 'h91;
mem['h612] = 'h40;
mem['h613] = 'hE6;
mem['h614] = 'h40;
mem['h615] = 'hD0;
mem['h616] = 'h02;
mem['h617] = 'hE6;
mem['h618] = 'h41;
mem['h619] = 'h60;
mem['h61A] = 'hA4;
mem['h61B] = 'h34;
mem['h61C] = 'hB9;
mem['h61D] = 'hFF;
mem['h61E] = 'h01;
mem['h61F] = 'h85;
mem['h620] = 'h31;
mem['h621] = 'h60;
mem['h622] = 'hA2;
mem['h623] = 'h01;
mem['h624] = 'hB5;
mem['h625] = 'h3E;
mem['h626] = 'h95;
mem['h627] = 'h42;
mem['h628] = 'h95;
mem['h629] = 'h44;
mem['h62A] = 'hCA;
mem['h62B] = 'h10;
mem['h62C] = 'hF7;
mem['h62D] = 'h60;
mem['h62E] = 'hB1;
mem['h62F] = 'h3C;
mem['h630] = 'h91;
mem['h631] = 'h42;
mem['h632] = 'h20;
mem['h633] = 'hA0;
mem['h634] = 'hFB;
mem['h635] = 'h90;
mem['h636] = 'hF7;
mem['h637] = 'h60;
mem['h638] = 'hB1;
mem['h639] = 'h3C;
mem['h63A] = 'hD1;
mem['h63B] = 'h42;
mem['h63C] = 'hF0;
mem['h63D] = 'h1C;
mem['h63E] = 'h20;
mem['h63F] = 'h79;
mem['h640] = 'hFD;
mem['h641] = 'hB1;
mem['h642] = 'h3C;
mem['h643] = 'h20;
mem['h644] = 'hC1;
mem['h645] = 'hFD;
mem['h646] = 'hA9;
mem['h647] = 'hA0;
mem['h648] = 'h20;
mem['h649] = 'hD4;
mem['h64A] = 'hFD;
mem['h64B] = 'hA9;
mem['h64C] = 'hA8;
mem['h64D] = 'h20;
mem['h64E] = 'hD4;
mem['h64F] = 'hFD;
mem['h650] = 'hB1;
mem['h651] = 'h42;
mem['h652] = 'h20;
mem['h653] = 'hC1;
mem['h654] = 'hFD;
mem['h655] = 'hA9;
mem['h656] = 'hA9;
mem['h657] = 'h20;
mem['h658] = 'hD4;
mem['h659] = 'hFD;
mem['h65A] = 'h20;
mem['h65B] = 'hA0;
mem['h65C] = 'hFB;
mem['h65D] = 'h90;
mem['h65E] = 'hD9;
mem['h65F] = 'h60;
mem['h660] = 'h20;
mem['h661] = 'hF7;
mem['h662] = 'hFD;
mem['h663] = 'hA9;
mem['h664] = 'h1C;
mem['h665] = 'h48;
mem['h666] = 'h20;
mem['h667] = 'hC1;
mem['h668] = 'hF8;
mem['h669] = 'h20;
mem['h66A] = 'h39;
mem['h66B] = 'hF9;
mem['h66C] = 'h85;
mem['h66D] = 'h3A;
mem['h66E] = 'h84;
mem['h66F] = 'h3B;
mem['h670] = 'h68;
mem['h671] = 'h38;
mem['h672] = 'hE9;
mem['h673] = 'h01;
mem['h674] = 'hD0;
mem['h675] = 'hEF;
mem['h676] = 'h60;
mem['h677] = 'hA0;
mem['h678] = 'h87;
mem['h679] = 'hD0;
mem['h67A] = 'h02;
mem['h67B] = 'hA0;
mem['h67C] = 'hAF;
mem['h67D] = 'h84;
mem['h67E] = 'h32;
mem['h67F] = 'h60;
mem['h680] = 'hA9;
mem['h681] = 'h00;
mem['h682] = 'h85;
mem['h683] = 'h3E;
mem['h684] = 'hA2;
mem['h685] = 'h38;
mem['h686] = 'hA0;
mem['h687] = 'h07;
mem['h688] = 'hD0;
mem['h689] = 'h08;
mem['h68A] = 'hA9;
mem['h68B] = 'h00;
mem['h68C] = 'h85;
mem['h68D] = 'h3E;
mem['h68E] = 'hA2;
mem['h68F] = 'h36;
mem['h690] = 'hA0;
mem['h691] = 'hD7;
mem['h692] = 'hA5;
mem['h693] = 'h3E;
mem['h694] = 'h29;
mem['h695] = 'h0F;
mem['h696] = 'hF0;
mem['h697] = 'h06;
mem['h698] = 'h09;
mem['h699] = 'hC0;
mem['h69A] = 'hA0;
mem['h69B] = 'h00;
mem['h69C] = 'hF0;
mem['h69D] = 'h02;
mem['h69E] = 'hA9;
mem['h69F] = 'hFD;
mem['h6A0] = 'h94;
mem['h6A1] = 'h00;
mem['h6A2] = 'h95;
mem['h6A3] = 'h01;
mem['h6A4] = 'h60;
mem['h6A5] = 'h4C;
mem['h6A6] = 'h00;
mem['h6A7] = 'hE0;
mem['h6A8] = 'h4C;
mem['h6A9] = 'h03;
mem['h6AA] = 'hE0;
mem['h6AB] = 'h20;
mem['h6AC] = 'hF7;
mem['h6AD] = 'hFD;
mem['h6AE] = 'h20;
mem['h6AF] = 'h40;
mem['h6B0] = 'hFF;
mem['h6B1] = 'h6C;
mem['h6B2] = 'h3A;
mem['h6B3] = 'h00;
mem['h6B4] = 'h4C;
mem['h6B5] = 'hCD;
mem['h6B6] = 'hFA;
mem['h6B7] = 'h4C;
mem['h6B8] = 'hF8;
mem['h6B9] = 'h03;
mem['h6BA] = 'hA5;
mem['h6BB] = 'h3E;
mem['h6BC] = 'h29;
mem['h6BD] = 'h1F;
mem['h6BE] = 'hA2;
mem['h6BF] = 'h02;
mem['h6C0] = 'h4C;
mem['h6C1] = 'h31;
mem['h6C2] = 'hF8;
mem['h6C3] = 'hA5;
mem['h6C4] = 'h3E;
mem['h6C5] = 'h45;
mem['h6C6] = 'h32;
mem['h6C7] = 'h29;
mem['h6C8] = 'h07;
mem['h6C9] = 'h45;
mem['h6CA] = 'h32;
mem['h6CB] = 'h85;
mem['h6CC] = 'h32;
mem['h6CD] = 'h60;
mem['h6CE] = 'hA9;
mem['h6CF] = 'h40;
mem['h6D0] = 'h20;
mem['h6D1] = 'hC1;
mem['h6D2] = 'hFC;
mem['h6D3] = 'hA0;
mem['h6D4] = 'h27;
mem['h6D5] = 'hA2;
mem['h6D6] = 'h00;
mem['h6D7] = 'h41;
mem['h6D8] = 'h3C;
mem['h6D9] = 'h48;
mem['h6DA] = 'hA1;
mem['h6DB] = 'h3C;
mem['h6DC] = 'h20;
mem['h6DD] = 'hEE;
mem['h6DE] = 'hFE;
mem['h6DF] = 'h20;
mem['h6E0] = 'hA6;
mem['h6E1] = 'hFB;
mem['h6E2] = 'hA0;
mem['h6E3] = 'h1D;
mem['h6E4] = 'h68;
mem['h6E5] = 'h90;
mem['h6E6] = 'hEE;
mem['h6E7] = 'hA0;
mem['h6E8] = 'h22;
mem['h6E9] = 'h20;
mem['h6EA] = 'hEE;
mem['h6EB] = 'hFE;
mem['h6EC] = 'hF0;
mem['h6ED] = 'h4D;
mem['h6EE] = 'hA2;
mem['h6EF] = 'h10;
mem['h6F0] = 'h0A;
mem['h6F1] = 'h20;
mem['h6F2] = 'hCE;
mem['h6F3] = 'hFC;
mem['h6F4] = 'hD0;
mem['h6F5] = 'hFA;
mem['h6F6] = 'h60;
mem['h6F7] = 'h20;
mem['h6F8] = 'h02;
mem['h6F9] = 'hFE;
mem['h6FA] = 'h68;
mem['h6FB] = 'h68;
mem['h6FC] = 'hD0;
mem['h6FD] = 'h6B;
mem['h6FE] = 'h20;
mem['h6FF] = 'hF2;
mem['h700] = 'hFC;
mem['h701] = 'hA9;
mem['h702] = 'h16;
mem['h703] = 'h20;
mem['h704] = 'hC1;
mem['h705] = 'hFC;
mem['h706] = 'h85;
mem['h707] = 'h2E;
mem['h708] = 'h20;
mem['h709] = 'hF2;
mem['h70A] = 'hFC;
mem['h70B] = 'hA0;
mem['h70C] = 'h24;
mem['h70D] = 'h20;
mem['h70E] = 'hF5;
mem['h70F] = 'hFC;
mem['h710] = 'hB0;
mem['h711] = 'hF9;
mem['h712] = 'h20;
mem['h713] = 'hF5;
mem['h714] = 'hFC;
mem['h715] = 'hA0;
mem['h716] = 'h3B;
mem['h717] = 'h20;
mem['h718] = 'hE4;
mem['h719] = 'hFC;
mem['h71A] = 'h81;
mem['h71B] = 'h3C;
mem['h71C] = 'h45;
mem['h71D] = 'h2E;
mem['h71E] = 'h85;
mem['h71F] = 'h2E;
mem['h720] = 'h20;
mem['h721] = 'hA6;
mem['h722] = 'hFB;
mem['h723] = 'hA0;
mem['h724] = 'h35;
mem['h725] = 'h90;
mem['h726] = 'hF0;
mem['h727] = 'h20;
mem['h728] = 'hE4;
mem['h729] = 'hFC;
mem['h72A] = 'hC5;
mem['h72B] = 'h2E;
mem['h72C] = 'hF0;
mem['h72D] = 'h0D;
mem['h72E] = 'hA9;
mem['h72F] = 'hC5;
mem['h730] = 'h20;
mem['h731] = 'hD4;
mem['h732] = 'hFD;
mem['h733] = 'hA9;
mem['h734] = 'hD2;
mem['h735] = 'h20;
mem['h736] = 'hD4;
mem['h737] = 'hFD;
mem['h738] = 'h20;
mem['h739] = 'hD4;
mem['h73A] = 'hFD;
mem['h73B] = 'hA9;
mem['h73C] = 'h87;
mem['h73D] = 'h4C;
mem['h73E] = 'hD4;
mem['h73F] = 'hFD;
mem['h740] = 'hA5;
mem['h741] = 'h48;
mem['h742] = 'h48;
mem['h743] = 'hA5;
mem['h744] = 'h45;
mem['h745] = 'hA6;
mem['h746] = 'h46;
mem['h747] = 'hA4;
mem['h748] = 'h47;
mem['h749] = 'h28;
mem['h74A] = 'h60;
mem['h74B] = 'h85;
mem['h74C] = 'h45;
mem['h74D] = 'h86;
mem['h74E] = 'h46;
mem['h74F] = 'h84;
mem['h750] = 'h47;
mem['h751] = 'h08;
mem['h752] = 'h68;
mem['h753] = 'h85;
mem['h754] = 'h48;
mem['h755] = 'hBA;
mem['h756] = 'h86;
mem['h757] = 'h49;
mem['h758] = 'hD8;
mem['h759] = 'h60;
mem['h75A] = 'hA2;
mem['h75B] = 'h02;
mem['h75C] = 'hA9;
mem['h75D] = 'hA0;
mem['h75E] = 'h20;
mem['h75F] = 'hD4;
mem['h760] = 'hFD;
mem['h761] = 'hCA;
mem['h762] = 'hD0;
mem['h763] = 'hFA;
mem['h764] = 'h60;
mem['h765] = 'hD8;
mem['h766] = 'h20;
mem['h767] = 'h3B;
mem['h768] = 'hFF;
mem['h769] = 'hA9;
mem['h76A] = 'hAA;
mem['h76B] = 'h85;
mem['h76C] = 'h33;
mem['h76D] = 'h20;
mem['h76E] = 'h52;
mem['h76F] = 'hFD;
mem['h770] = 'h20;
mem['h771] = 'hC7;
mem['h772] = 'hFF;
mem['h773] = 'h20;
mem['h774] = 'hA7;
mem['h775] = 'hFF;
mem['h776] = 'h84;
mem['h777] = 'h34;
mem['h778] = 'hA0;
mem['h779] = 'h17;
mem['h77A] = 'h88;
mem['h77B] = 'h30;
mem['h77C] = 'hE8;
mem['h77D] = 'hD9;
mem['h77E] = 'hCC;
mem['h77F] = 'hFF;
mem['h780] = 'hD0;
mem['h781] = 'hF8;
mem['h782] = 'h20;
mem['h783] = 'hBE;
mem['h784] = 'hFF;
mem['h785] = 'hA4;
mem['h786] = 'h34;
mem['h787] = 'h4C;
mem['h788] = 'h73;
mem['h789] = 'hFF;
mem['h78A] = 'hA2;
mem['h78B] = 'h03;
mem['h78C] = 'h0A;
mem['h78D] = 'h0A;
mem['h78E] = 'h0A;
mem['h78F] = 'h0A;
mem['h790] = 'h0A;
mem['h791] = 'h26;
mem['h792] = 'h3E;
mem['h793] = 'h26;
mem['h794] = 'h3F;
mem['h795] = 'hCA;
mem['h796] = 'h10;
mem['h797] = 'hF8;
mem['h798] = 'hA5;
mem['h799] = 'h31;
mem['h79A] = 'hD0;
mem['h79B] = 'h06;
mem['h79C] = 'hB5;
mem['h79D] = 'h3F;
mem['h79E] = 'h95;
mem['h79F] = 'h3D;
mem['h7A0] = 'h95;
mem['h7A1] = 'h41;
mem['h7A2] = 'hE8;
mem['h7A3] = 'hF0;
mem['h7A4] = 'hF3;
mem['h7A5] = 'hD0;
mem['h7A6] = 'h06;
mem['h7A7] = 'hA2;
mem['h7A8] = 'h00;
mem['h7A9] = 'h86;
mem['h7AA] = 'h3E;
mem['h7AB] = 'h86;
mem['h7AC] = 'h3F;
mem['h7AD] = 'hB9;
mem['h7AE] = 'h00;
mem['h7AF] = 'h02;
mem['h7B0] = 'hC8;
mem['h7B1] = 'h49;
mem['h7B2] = 'hB0;
mem['h7B3] = 'hC9;
mem['h7B4] = 'h0A;
mem['h7B5] = 'h90;
mem['h7B6] = 'hD3;
mem['h7B7] = 'h69;
mem['h7B8] = 'h88;
mem['h7B9] = 'hC9;
mem['h7BA] = 'hFA;
mem['h7BB] = 'hB0;
mem['h7BC] = 'hCD;
mem['h7BD] = 'h60;
mem['h7BE] = 'hA9;
mem['h7BF] = 'hFE;
mem['h7C0] = 'h48;
mem['h7C1] = 'hB9;
mem['h7C2] = 'hE3;
mem['h7C3] = 'hFF;
mem['h7C4] = 'h48;
mem['h7C5] = 'hA5;
mem['h7C6] = 'h31;
mem['h7C7] = 'hA0;
mem['h7C8] = 'h00;
mem['h7C9] = 'h84;
mem['h7CA] = 'h31;
mem['h7CB] = 'h60;
mem['h7CC] = 'hBC;
mem['h7CD] = 'hB2;
mem['h7CE] = 'hBE;
mem['h7CF] = 'hEF;
mem['h7D0] = 'hE9;
mem['h7D1] = 'h08;
mem['h7D2] = 'hC2;
mem['h7D3] = 'hC8;
mem['h7D4] = 'hBB;
mem['h7D5] = 'hA6;
mem['h7D6] = 'hA4;
mem['h7D7] = 'h06;
mem['h7D8] = 'h95;
mem['h7D9] = 'h07;
mem['h7DA] = 'h02;
mem['h7DB] = 'h05;
mem['h7DC] = 'hF0;
mem['h7DD] = 'h00;
mem['h7DE] = 'hEB;
mem['h7DF] = 'h93;
mem['h7E0] = 'hA7;
mem['h7E1] = 'hC6;
mem['h7E2] = 'h99;
mem['h7E3] = 'hA7;
mem['h7E4] = 'hB6;
mem['h7E5] = 'hB3;
mem['h7E6] = 'h37;
mem['h7E7] = 'hB9;
mem['h7E8] = 'hC2;
mem['h7E9] = 'h83;
mem['h7EA] = 'h8D;
mem['h7EB] = 'hA4;
mem['h7EC] = 'h19;
mem['h7ED] = 'h19;
mem['h7EE] = 'h2D;
mem['h7EF] = 'h21;
mem['h7F0] = 'h7A;
mem['h7F1] = 'h76;
mem['h7F2] = 'h5F;
mem['h7F3] = 'hCD;
mem['h7F4] = 'hAA;
mem['h7F5] = 'hFD;
mem['h7F6] = 'h19;
mem['h7F7] = 'h19;
mem['h7F8] = 'hF6;
mem['h7F9] = 'h05;
mem['h7FA] = 'hFB;
mem['h7FB] = 'h03;
mem['h7FC] = 'h48;
mem['h7FD] = 'hFA;
mem['h7FE] = 'h26;
mem['h7FF] = 'hFA;
/trunk/juke-box/AGATHE7.V
0,0 → 1,2048
mem['h000] = 'h00;
mem['h001] = 'h00;
mem['h002] = 'h00;
mem['h003] = 'h00;
mem['h004] = 'h00;
mem['h005] = 'h00;
mem['h006] = 'h00;
mem['h007] = 'h00;
mem['h008] = 'h00;
mem['h009] = 'h00;
mem['h00A] = 'h00;
mem['h00B] = 'h00;
mem['h00C] = 'h00;
mem['h00D] = 'h00;
mem['h00E] = 'h00;
mem['h00F] = 'h00;
mem['h010] = 'h00;
mem['h011] = 'h00;
mem['h012] = 'h00;
mem['h013] = 'h00;
mem['h014] = 'h00;
mem['h015] = 'h00;
mem['h016] = 'h00;
mem['h017] = 'h00;
mem['h018] = 'h00;
mem['h019] = 'h00;
mem['h01A] = 'h00;
mem['h01B] = 'h00;
mem['h01C] = 'h00;
mem['h01D] = 'h00;
mem['h01E] = 'h00;
mem['h01F] = 'h00;
mem['h020] = 'h00;
mem['h021] = 'h00;
mem['h022] = 'h00;
mem['h023] = 'h00;
mem['h024] = 'h00;
mem['h025] = 'h00;
mem['h026] = 'h00;
mem['h027] = 'h00;
mem['h028] = 'h00;
mem['h029] = 'h00;
mem['h02A] = 'h00;
mem['h02B] = 'h00;
mem['h02C] = 'h00;
mem['h02D] = 'h00;
mem['h02E] = 'h00;
mem['h02F] = 'h00;
mem['h030] = 'h00;
mem['h031] = 'h00;
mem['h032] = 'h00;
mem['h033] = 'h00;
mem['h034] = 'h00;
mem['h035] = 'h00;
mem['h036] = 'h00;
mem['h037] = 'h00;
mem['h038] = 'h00;
mem['h039] = 'h00;
mem['h03A] = 'h00;
mem['h03B] = 'h00;
mem['h03C] = 'h00;
mem['h03D] = 'h00;
mem['h03E] = 'h00;
mem['h03F] = 'h00;
mem['h040] = 'h00;
mem['h041] = 'h00;
mem['h042] = 'h00;
mem['h043] = 'h00;
mem['h044] = 'h00;
mem['h045] = 'h00;
mem['h046] = 'h00;
mem['h047] = 'h00;
mem['h048] = 'h00;
mem['h049] = 'h00;
mem['h04A] = 'h00;
mem['h04B] = 'h00;
mem['h04C] = 'h00;
mem['h04D] = 'h00;
mem['h04E] = 'h00;
mem['h04F] = 'h00;
mem['h050] = 'h00;
mem['h051] = 'h00;
mem['h052] = 'h00;
mem['h053] = 'h00;
mem['h054] = 'h00;
mem['h055] = 'h00;
mem['h056] = 'h00;
mem['h057] = 'h00;
mem['h058] = 'h00;
mem['h059] = 'h00;
mem['h05A] = 'h00;
mem['h05B] = 'h00;
mem['h05C] = 'h00;
mem['h05D] = 'h00;
mem['h05E] = 'h00;
mem['h05F] = 'h00;
mem['h060] = 'h00;
mem['h061] = 'h00;
mem['h062] = 'h00;
mem['h063] = 'h00;
mem['h064] = 'h00;
mem['h065] = 'h00;
mem['h066] = 'h00;
mem['h067] = 'h00;
mem['h068] = 'h00;
mem['h069] = 'h00;
mem['h06A] = 'h00;
mem['h06B] = 'h00;
mem['h06C] = 'h00;
mem['h06D] = 'h00;
mem['h06E] = 'h00;
mem['h06F] = 'h00;
mem['h070] = 'h00;
mem['h071] = 'h00;
mem['h072] = 'h00;
mem['h073] = 'h00;
mem['h074] = 'h00;
mem['h075] = 'h00;
mem['h076] = 'h00;
mem['h077] = 'h00;
mem['h078] = 'h00;
mem['h079] = 'h00;
mem['h07A] = 'h00;
mem['h07B] = 'h00;
mem['h07C] = 'h00;
mem['h07D] = 'h00;
mem['h07E] = 'h00;
mem['h07F] = 'h00;
mem['h080] = 'h00;
mem['h081] = 'h00;
mem['h082] = 'h00;
mem['h083] = 'h7C;
mem['h084] = 'h00;
mem['h085] = 'h00;
mem['h086] = 'h00;
mem['h087] = 'h00;
mem['h088] = 'h00;
mem['h089] = 'h00;
mem['h08A] = 'h00;
mem['h08B] = 'h7C;
mem['h08C] = 'h00;
mem['h08D] = 'h00;
mem['h08E] = 'h00;
mem['h08F] = 'h00;
mem['h090] = 'h00;
mem['h091] = 'h00;
mem['h092] = 'h00;
mem['h093] = 'hF0;
mem['h094] = 'h10;
mem['h095] = 'h10;
mem['h096] = 'h10;
mem['h097] = 'h10;
mem['h098] = 'h10;
mem['h099] = 'h10;
mem['h09A] = 'h10;
mem['h09B] = 'h10;
mem['h09C] = 'h10;
mem['h09D] = 'h10;
mem['h09E] = 'h10;
mem['h09F] = 'h10;
mem['h0A0] = 'h3C;
mem['h0A1] = 'h54;
mem['h0A2] = 'h54;
mem['h0A3] = 'h34;
mem['h0A4] = 'h14;
mem['h0A5] = 'h14;
mem['h0A6] = 'h14;
mem['h0A7] = 'h00;
mem['h0A8] = 'h00;
mem['h0A9] = 'h00;
mem['h0AA] = 'h08;
mem['h0AB] = 'hFC;
mem['h0AC] = 'h08;
mem['h0AD] = 'h00;
mem['h0AE] = 'h00;
mem['h0AF] = 'h00;
mem['h0B0] = 'h00;
mem['h0B1] = 'h00;
mem['h0B2] = 'h00;
mem['h0B3] = 'h00;
mem['h0B4] = 'h7C;
mem['h0B5] = 'h7C;
mem['h0B6] = 'h7C;
mem['h0B7] = 'h00;
mem['h0B8] = 'h10;
mem['h0B9] = 'h38;
mem['h0BA] = 'h10;
mem['h0BB] = 'h10;
mem['h0BC] = 'h38;
mem['h0BD] = 'h10;
mem['h0BE] = 'h7C;
mem['h0BF] = 'h00;
mem['h0C0] = 'h00;
mem['h0C1] = 'h10;
mem['h0C2] = 'h38;
mem['h0C3] = 'h10;
mem['h0C4] = 'h10;
mem['h0C5] = 'h10;
mem['h0C6] = 'h10;
mem['h0C7] = 'h10;
mem['h0C8] = 'h10;
mem['h0C9] = 'h10;
mem['h0CA] = 'h10;
mem['h0CB] = 'h10;
mem['h0CC] = 'h10;
mem['h0CD] = 'h38;
mem['h0CE] = 'h10;
mem['h0CF] = 'h00;
mem['h0D0] = 'h00;
mem['h0D1] = 'h00;
mem['h0D2] = 'h08;
mem['h0D3] = 'hFC;
mem['h0D4] = 'h08;
mem['h0D5] = 'h00;
mem['h0D6] = 'h00;
mem['h0D7] = 'h00;
mem['h0D8] = 'h00;
mem['h0D9] = 'h00;
mem['h0DA] = 'h00;
mem['h0DB] = 'h7C;
mem['h0DC] = 'h00;
mem['h0DD] = 'h00;
mem['h0DE] = 'h00;
mem['h0DF] = 'h00;
mem['h0E0] = 'h10;
mem['h0E1] = 'h10;
mem['h0E2] = 'h10;
mem['h0E3] = 'h10;
mem['h0E4] = 'h10;
mem['h0E5] = 'h10;
mem['h0E6] = 'h10;
mem['h0E7] = 'h10;
mem['h0E8] = 'h40;
mem['h0E9] = 'h40;
mem['h0EA] = 'h40;
mem['h0EB] = 'h40;
mem['h0EC] = 'h40;
mem['h0ED] = 'h40;
mem['h0EE] = 'h7C;
mem['h0EF] = 'h00;
mem['h0F0] = 'h00;
mem['h0F1] = 'h00;
mem['h0F2] = 'h00;
mem['h0F3] = 'h7C;
mem['h0F4] = 'h00;
mem['h0F5] = 'h00;
mem['h0F6] = 'h00;
mem['h0F7] = 'h00;
mem['h0F8] = 'h00;
mem['h0F9] = 'h00;
mem['h0FA] = 'h00;
mem['h0FB] = 'h7C;
mem['h0FC] = 'h00;
mem['h0FD] = 'h00;
mem['h0FE] = 'h00;
mem['h0FF] = 'h00;
mem['h100] = 'h00;
mem['h101] = 'h00;
mem['h102] = 'h00;
mem['h103] = 'h00;
mem['h104] = 'h00;
mem['h105] = 'h00;
mem['h106] = 'h00;
mem['h107] = 'h00;
mem['h108] = 'h10;
mem['h109] = 'h10;
mem['h10A] = 'h10;
mem['h10B] = 'h10;
mem['h10C] = 'h10;
mem['h10D] = 'h00;
mem['h10E] = 'h10;
mem['h10F] = 'h00;
mem['h110] = 'h28;
mem['h111] = 'h28;
mem['h112] = 'h28;
mem['h113] = 'h00;
mem['h114] = 'h00;
mem['h115] = 'h00;
mem['h116] = 'h00;
mem['h117] = 'h00;
mem['h118] = 'h28;
mem['h119] = 'h28;
mem['h11A] = 'h7C;
mem['h11B] = 'h28;
mem['h11C] = 'h7C;
mem['h11D] = 'h28;
mem['h11E] = 'h28;
mem['h11F] = 'h00;
mem['h120] = 'h44;
mem['h121] = 'h38;
mem['h122] = 'h44;
mem['h123] = 'h44;
mem['h124] = 'h44;
mem['h125] = 'h38;
mem['h126] = 'h44;
mem['h127] = 'h00;
mem['h128] = 'h60;
mem['h129] = 'h64;
mem['h12A] = 'h08;
mem['h12B] = 'h10;
mem['h12C] = 'h20;
mem['h12D] = 'h4C;
mem['h12E] = 'h0C;
mem['h12F] = 'h00;
mem['h130] = 'h20;
mem['h131] = 'h50;
mem['h132] = 'h50;
mem['h133] = 'h20;
mem['h134] = 'h54;
mem['h135] = 'h48;
mem['h136] = 'h34;
mem['h137] = 'h00;
mem['h138] = 'h10;
mem['h139] = 'h10;
mem['h13A] = 'h10;
mem['h13B] = 'h00;
mem['h13C] = 'h00;
mem['h13D] = 'h00;
mem['h13E] = 'h00;
mem['h13F] = 'h00;
mem['h140] = 'h08;
mem['h141] = 'h10;
mem['h142] = 'h20;
mem['h143] = 'h20;
mem['h144] = 'h20;
mem['h145] = 'h10;
mem['h146] = 'h08;
mem['h147] = 'h00;
mem['h148] = 'h20;
mem['h149] = 'h10;
mem['h14A] = 'h08;
mem['h14B] = 'h08;
mem['h14C] = 'h08;
mem['h14D] = 'h10;
mem['h14E] = 'h20;
mem['h14F] = 'h00;
mem['h150] = 'h10;
mem['h151] = 'h54;
mem['h152] = 'h38;
mem['h153] = 'h10;
mem['h154] = 'h38;
mem['h155] = 'h54;
mem['h156] = 'h10;
mem['h157] = 'h00;
mem['h158] = 'h00;
mem['h159] = 'h10;
mem['h15A] = 'h10;
mem['h15B] = 'h7C;
mem['h15C] = 'h10;
mem['h15D] = 'h10;
mem['h15E] = 'h00;
mem['h15F] = 'h00;
mem['h160] = 'h00;
mem['h161] = 'h00;
mem['h162] = 'h00;
mem['h163] = 'h30;
mem['h164] = 'h30;
mem['h165] = 'h10;
mem['h166] = 'h20;
mem['h167] = 'h00;
mem['h168] = 'h00;
mem['h169] = 'h00;
mem['h16A] = 'h00;
mem['h16B] = 'h7C;
mem['h16C] = 'h00;
mem['h16D] = 'h00;
mem['h16E] = 'h00;
mem['h16F] = 'h00;
mem['h170] = 'h00;
mem['h171] = 'h00;
mem['h172] = 'h00;
mem['h173] = 'h00;
mem['h174] = 'h00;
mem['h175] = 'h30;
mem['h176] = 'h30;
mem['h177] = 'h00;
mem['h178] = 'h00;
mem['h179] = 'h04;
mem['h17A] = 'h08;
mem['h17B] = 'h10;
mem['h17C] = 'h20;
mem['h17D] = 'h40;
mem['h17E] = 'h00;
mem['h17F] = 'h00;
mem['h180] = 'h38;
mem['h181] = 'h44;
mem['h182] = 'h4C;
mem['h183] = 'h54;
mem['h184] = 'h64;
mem['h185] = 'h44;
mem['h186] = 'h38;
mem['h187] = 'h00;
mem['h188] = 'h10;
mem['h189] = 'h30;
mem['h18A] = 'h10;
mem['h18B] = 'h10;
mem['h18C] = 'h10;
mem['h18D] = 'h10;
mem['h18E] = 'h38;
mem['h18F] = 'h00;
mem['h190] = 'h38;
mem['h191] = 'h44;
mem['h192] = 'h04;
mem['h193] = 'h08;
mem['h194] = 'h10;
mem['h195] = 'h20;
mem['h196] = 'h7C;
mem['h197] = 'h00;
mem['h198] = 'h7C;
mem['h199] = 'h04;
mem['h19A] = 'h08;
mem['h19B] = 'h18;
mem['h19C] = 'h04;
mem['h19D] = 'h44;
mem['h19E] = 'h38;
mem['h19F] = 'h00;
mem['h1A0] = 'h08;
mem['h1A1] = 'h18;
mem['h1A2] = 'h28;
mem['h1A3] = 'h48;
mem['h1A4] = 'h7C;
mem['h1A5] = 'h08;
mem['h1A6] = 'h08;
mem['h1A7] = 'h00;
mem['h1A8] = 'h7C;
mem['h1A9] = 'h40;
mem['h1AA] = 'h78;
mem['h1AB] = 'h04;
mem['h1AC] = 'h04;
mem['h1AD] = 'h44;
mem['h1AE] = 'h38;
mem['h1AF] = 'h00;
mem['h1B0] = 'h1C;
mem['h1B1] = 'h20;
mem['h1B2] = 'h40;
mem['h1B3] = 'h78;
mem['h1B4] = 'h44;
mem['h1B5] = 'h44;
mem['h1B6] = 'h38;
mem['h1B7] = 'h00;
mem['h1B8] = 'h7C;
mem['h1B9] = 'h04;
mem['h1BA] = 'h08;
mem['h1BB] = 'h10;
mem['h1BC] = 'h20;
mem['h1BD] = 'h20;
mem['h1BE] = 'h20;
mem['h1BF] = 'h00;
mem['h1C0] = 'h38;
mem['h1C1] = 'h44;
mem['h1C2] = 'h44;
mem['h1C3] = 'h38;
mem['h1C4] = 'h44;
mem['h1C5] = 'h44;
mem['h1C6] = 'h38;
mem['h1C7] = 'h00;
mem['h1C8] = 'h38;
mem['h1C9] = 'h44;
mem['h1CA] = 'h44;
mem['h1CB] = 'h3C;
mem['h1CC] = 'h04;
mem['h1CD] = 'h08;
mem['h1CE] = 'h70;
mem['h1CF] = 'h00;
mem['h1D0] = 'h00;
mem['h1D1] = 'h00;
mem['h1D2] = 'h18;
mem['h1D3] = 'h18;
mem['h1D4] = 'h00;
mem['h1D5] = 'h18;
mem['h1D6] = 'h18;
mem['h1D7] = 'h00;
mem['h1D8] = 'h18;
mem['h1D9] = 'h18;
mem['h1DA] = 'h00;
mem['h1DB] = 'h18;
mem['h1DC] = 'h18;
mem['h1DD] = 'h08;
mem['h1DE] = 'h10;
mem['h1DF] = 'h00;
mem['h1E0] = 'h04;
mem['h1E1] = 'h08;
mem['h1E2] = 'h10;
mem['h1E3] = 'h20;
mem['h1E4] = 'h10;
mem['h1E5] = 'h08;
mem['h1E6] = 'h04;
mem['h1E7] = 'h00;
mem['h1E8] = 'h00;
mem['h1E9] = 'h00;
mem['h1EA] = 'h7C;
mem['h1EB] = 'h00;
mem['h1EC] = 'h7C;
mem['h1ED] = 'h00;
mem['h1EE] = 'h00;
mem['h1EF] = 'h00;
mem['h1F0] = 'h20;
mem['h1F1] = 'h10;
mem['h1F2] = 'h08;
mem['h1F3] = 'h04;
mem['h1F4] = 'h08;
mem['h1F5] = 'h10;
mem['h1F6] = 'h20;
mem['h1F7] = 'h00;
mem['h1F8] = 'h38;
mem['h1F9] = 'h44;
mem['h1FA] = 'h08;
mem['h1FB] = 'h10;
mem['h1FC] = 'h10;
mem['h1FD] = 'h00;
mem['h1FE] = 'h10;
mem['h1FF] = 'h00;
mem['h200] = 'h38;
mem['h201] = 'h44;
mem['h202] = 'h5C;
mem['h203] = 'h54;
mem['h204] = 'h5C;
mem['h205] = 'h40;
mem['h206] = 'h3C;
mem['h207] = 'h00;
mem['h208] = 'h10;
mem['h209] = 'h28;
mem['h20A] = 'h44;
mem['h20B] = 'h44;
mem['h20C] = 'h7C;
mem['h20D] = 'h44;
mem['h20E] = 'h44;
mem['h20F] = 'h00;
mem['h210] = 'h78;
mem['h211] = 'h44;
mem['h212] = 'h44;
mem['h213] = 'h78;
mem['h214] = 'h44;
mem['h215] = 'h44;
mem['h216] = 'h78;
mem['h217] = 'h00;
mem['h218] = 'h38;
mem['h219] = 'h44;
mem['h21A] = 'h40;
mem['h21B] = 'h40;
mem['h21C] = 'h40;
mem['h21D] = 'h44;
mem['h21E] = 'h38;
mem['h21F] = 'h00;
mem['h220] = 'h78;
mem['h221] = 'h44;
mem['h222] = 'h44;
mem['h223] = 'h44;
mem['h224] = 'h44;
mem['h225] = 'h44;
mem['h226] = 'h78;
mem['h227] = 'h00;
mem['h228] = 'h7C;
mem['h229] = 'h40;
mem['h22A] = 'h40;
mem['h22B] = 'h78;
mem['h22C] = 'h40;
mem['h22D] = 'h40;
mem['h22E] = 'h7C;
mem['h22F] = 'h00;
mem['h230] = 'h7C;
mem['h231] = 'h40;
mem['h232] = 'h40;
mem['h233] = 'h78;
mem['h234] = 'h40;
mem['h235] = 'h40;
mem['h236] = 'h40;
mem['h237] = 'h00;
mem['h238] = 'h3C;
mem['h239] = 'h40;
mem['h23A] = 'h40;
mem['h23B] = 'h40;
mem['h23C] = 'h4C;
mem['h23D] = 'h44;
mem['h23E] = 'h3C;
mem['h23F] = 'h00;
mem['h240] = 'h44;
mem['h241] = 'h44;
mem['h242] = 'h44;
mem['h243] = 'h7C;
mem['h244] = 'h44;
mem['h245] = 'h44;
mem['h246] = 'h44;
mem['h247] = 'h00;
mem['h248] = 'h38;
mem['h249] = 'h10;
mem['h24A] = 'h10;
mem['h24B] = 'h10;
mem['h24C] = 'h10;
mem['h24D] = 'h10;
mem['h24E] = 'h38;
mem['h24F] = 'h00;
mem['h250] = 'h04;
mem['h251] = 'h04;
mem['h252] = 'h04;
mem['h253] = 'h04;
mem['h254] = 'h04;
mem['h255] = 'h44;
mem['h256] = 'h38;
mem['h257] = 'h00;
mem['h258] = 'h44;
mem['h259] = 'h48;
mem['h25A] = 'h50;
mem['h25B] = 'h60;
mem['h25C] = 'h50;
mem['h25D] = 'h48;
mem['h25E] = 'h44;
mem['h25F] = 'h00;
mem['h260] = 'h40;
mem['h261] = 'h40;
mem['h262] = 'h40;
mem['h263] = 'h40;
mem['h264] = 'h40;
mem['h265] = 'h40;
mem['h266] = 'h7C;
mem['h267] = 'h00;
mem['h268] = 'h44;
mem['h269] = 'h6C;
mem['h26A] = 'h54;
mem['h26B] = 'h54;
mem['h26C] = 'h44;
mem['h26D] = 'h44;
mem['h26E] = 'h44;
mem['h26F] = 'h00;
mem['h270] = 'h44;
mem['h271] = 'h44;
mem['h272] = 'h64;
mem['h273] = 'h54;
mem['h274] = 'h4C;
mem['h275] = 'h44;
mem['h276] = 'h44;
mem['h277] = 'h00;
mem['h278] = 'h38;
mem['h279] = 'h44;
mem['h27A] = 'h44;
mem['h27B] = 'h44;
mem['h27C] = 'h44;
mem['h27D] = 'h44;
mem['h27E] = 'h38;
mem['h27F] = 'h00;
mem['h280] = 'h78;
mem['h281] = 'h44;
mem['h282] = 'h44;
mem['h283] = 'h78;
mem['h284] = 'h40;
mem['h285] = 'h40;
mem['h286] = 'h40;
mem['h287] = 'h00;
mem['h288] = 'h38;
mem['h289] = 'h44;
mem['h28A] = 'h44;
mem['h28B] = 'h44;
mem['h28C] = 'h54;
mem['h28D] = 'h48;
mem['h28E] = 'h34;
mem['h28F] = 'h00;
mem['h290] = 'h78;
mem['h291] = 'h44;
mem['h292] = 'h44;
mem['h293] = 'h78;
mem['h294] = 'h50;
mem['h295] = 'h48;
mem['h296] = 'h44;
mem['h297] = 'h00;
mem['h298] = 'h38;
mem['h299] = 'h44;
mem['h29A] = 'h40;
mem['h29B] = 'h38;
mem['h29C] = 'h04;
mem['h29D] = 'h44;
mem['h29E] = 'h38;
mem['h29F] = 'h00;
mem['h2A0] = 'h7C;
mem['h2A1] = 'h10;
mem['h2A2] = 'h10;
mem['h2A3] = 'h10;
mem['h2A4] = 'h10;
mem['h2A5] = 'h10;
mem['h2A6] = 'h10;
mem['h2A7] = 'h00;
mem['h2A8] = 'h44;
mem['h2A9] = 'h44;
mem['h2AA] = 'h44;
mem['h2AB] = 'h44;
mem['h2AC] = 'h44;
mem['h2AD] = 'h44;
mem['h2AE] = 'h38;
mem['h2AF] = 'h00;
mem['h2B0] = 'h44;
mem['h2B1] = 'h44;
mem['h2B2] = 'h44;
mem['h2B3] = 'h44;
mem['h2B4] = 'h44;
mem['h2B5] = 'h28;
mem['h2B6] = 'h10;
mem['h2B7] = 'h00;
mem['h2B8] = 'h44;
mem['h2B9] = 'h44;
mem['h2BA] = 'h44;
mem['h2BB] = 'h54;
mem['h2BC] = 'h54;
mem['h2BD] = 'h6C;
mem['h2BE] = 'h44;
mem['h2BF] = 'h00;
mem['h2C0] = 'h44;
mem['h2C1] = 'h44;
mem['h2C2] = 'h28;
mem['h2C3] = 'h10;
mem['h2C4] = 'h28;
mem['h2C5] = 'h44;
mem['h2C6] = 'h44;
mem['h2C7] = 'h00;
mem['h2C8] = 'h44;
mem['h2C9] = 'h44;
mem['h2CA] = 'h28;
mem['h2CB] = 'h10;
mem['h2CC] = 'h10;
mem['h2CD] = 'h10;
mem['h2CE] = 'h10;
mem['h2CF] = 'h00;
mem['h2D0] = 'h7C;
mem['h2D1] = 'h04;
mem['h2D2] = 'h08;
mem['h2D3] = 'h10;
mem['h2D4] = 'h20;
mem['h2D5] = 'h40;
mem['h2D6] = 'h7C;
mem['h2D7] = 'h00;
mem['h2D8] = 'h7C;
mem['h2D9] = 'h60;
mem['h2DA] = 'h60;
mem['h2DB] = 'h60;
mem['h2DC] = 'h60;
mem['h2DD] = 'h60;
mem['h2DE] = 'h7C;
mem['h2DF] = 'h00;
mem['h2E0] = 'h00;
mem['h2E1] = 'h40;
mem['h2E2] = 'h20;
mem['h2E3] = 'h10;
mem['h2E4] = 'h08;
mem['h2E5] = 'h04;
mem['h2E6] = 'h00;
mem['h2E7] = 'h00;
mem['h2E8] = 'h7C;
mem['h2E9] = 'h0C;
mem['h2EA] = 'h0C;
mem['h2EB] = 'h0C;
mem['h2EC] = 'h0C;
mem['h2ED] = 'h0C;
mem['h2EE] = 'h7C;
mem['h2EF] = 'h00;
mem['h2F0] = 'h00;
mem['h2F1] = 'h10;
mem['h2F2] = 'h28;
mem['h2F3] = 'h44;
mem['h2F4] = 'h00;
mem['h2F5] = 'h00;
mem['h2F6] = 'h00;
mem['h2F7] = 'h00;
mem['h2F8] = 'h00;
mem['h2F9] = 'h00;
mem['h2FA] = 'h00;
mem['h2FB] = 'h00;
mem['h2FC] = 'h00;
mem['h2FD] = 'h00;
mem['h2FE] = 'h00;
mem['h2FF] = 'hFF;
mem['h300] = 'h5C;
mem['h301] = 'h54;
mem['h302] = 'h54;
mem['h303] = 'h74;
mem['h304] = 'h54;
mem['h305] = 'h54;
mem['h306] = 'h5C;
mem['h307] = 'h00;
mem['h308] = 'h38;
mem['h309] = 'h44;
mem['h30A] = 'h44;
mem['h30B] = 'h44;
mem['h30C] = 'h7C;
mem['h30D] = 'h44;
mem['h30E] = 'h44;
mem['h30F] = 'h00;
mem['h310] = 'h7C;
mem['h311] = 'h40;
mem['h312] = 'h40;
mem['h313] = 'h78;
mem['h314] = 'h44;
mem['h315] = 'h44;
mem['h316] = 'h78;
mem['h317] = 'h00;
mem['h318] = 'h48;
mem['h319] = 'h48;
mem['h31A] = 'h48;
mem['h31B] = 'h48;
mem['h31C] = 'h48;
mem['h31D] = 'h48;
mem['h31E] = 'h7C;
mem['h31F] = 'h04;
mem['h320] = 'h1C;
mem['h321] = 'h24;
mem['h322] = 'h24;
mem['h323] = 'h24;
mem['h324] = 'h24;
mem['h325] = 'h24;
mem['h326] = 'h7E;
mem['h327] = 'h42;
mem['h328] = 'h7C;
mem['h329] = 'h40;
mem['h32A] = 'h40;
mem['h32B] = 'h78;
mem['h32C] = 'h40;
mem['h32D] = 'h40;
mem['h32E] = 'h7C;
mem['h32F] = 'h00;
mem['h330] = 'h38;
mem['h331] = 'h54;
mem['h332] = 'h54;
mem['h333] = 'h54;
mem['h334] = 'h38;
mem['h335] = 'h10;
mem['h336] = 'h10;
mem['h337] = 'h00;
mem['h338] = 'h7C;
mem['h339] = 'h40;
mem['h33A] = 'h40;
mem['h33B] = 'h40;
mem['h33C] = 'h40;
mem['h33D] = 'h40;
mem['h33E] = 'h40;
mem['h33F] = 'h00;
mem['h340] = 'h44;
mem['h341] = 'h44;
mem['h342] = 'h28;
mem['h343] = 'h10;
mem['h344] = 'h28;
mem['h345] = 'h44;
mem['h346] = 'h44;
mem['h347] = 'h00;
mem['h348] = 'h44;
mem['h349] = 'h44;
mem['h34A] = 'h44;
mem['h34B] = 'h4C;
mem['h34C] = 'h54;
mem['h34D] = 'h64;
mem['h34E] = 'h44;
mem['h34F] = 'h00;
mem['h350] = 'h54;
mem['h351] = 'h54;
mem['h352] = 'h44;
mem['h353] = 'h4C;
mem['h354] = 'h54;
mem['h355] = 'h64;
mem['h356] = 'h44;
mem['h357] = 'h00;
mem['h358] = 'h44;
mem['h359] = 'h48;
mem['h35A] = 'h50;
mem['h35B] = 'h60;
mem['h35C] = 'h50;
mem['h35D] = 'h48;
mem['h35E] = 'h44;
mem['h35F] = 'h00;
mem['h360] = 'h0C;
mem['h361] = 'h14;
mem['h362] = 'h24;
mem['h363] = 'h24;
mem['h364] = 'h24;
mem['h365] = 'h24;
mem['h366] = 'h44;
mem['h367] = 'h00;
mem['h368] = 'h44;
mem['h369] = 'h6C;
mem['h36A] = 'h54;
mem['h36B] = 'h54;
mem['h36C] = 'h44;
mem['h36D] = 'h44;
mem['h36E] = 'h44;
mem['h36F] = 'h00;
mem['h370] = 'h44;
mem['h371] = 'h44;
mem['h372] = 'h44;
mem['h373] = 'h7C;
mem['h374] = 'h44;
mem['h375] = 'h44;
mem['h376] = 'h44;
mem['h377] = 'h00;
mem['h378] = 'h38;
mem['h379] = 'h44;
mem['h37A] = 'h44;
mem['h37B] = 'h44;
mem['h37C] = 'h44;
mem['h37D] = 'h44;
mem['h37E] = 'h38;
mem['h37F] = 'h00;
mem['h380] = 'h7C;
mem['h381] = 'h44;
mem['h382] = 'h44;
mem['h383] = 'h44;
mem['h384] = 'h44;
mem['h385] = 'h44;
mem['h386] = 'h44;
mem['h387] = 'h00;
mem['h388] = 'h3C;
mem['h389] = 'h44;
mem['h38A] = 'h44;
mem['h38B] = 'h3C;
mem['h38C] = 'h14;
mem['h38D] = 'h24;
mem['h38E] = 'h44;
mem['h38F] = 'h00;
mem['h390] = 'h78;
mem['h391] = 'h44;
mem['h392] = 'h44;
mem['h393] = 'h78;
mem['h394] = 'h40;
mem['h395] = 'h40;
mem['h396] = 'h40;
mem['h397] = 'h00;
mem['h398] = 'h38;
mem['h399] = 'h44;
mem['h39A] = 'h40;
mem['h39B] = 'h40;
mem['h39C] = 'h40;
mem['h39D] = 'h44;
mem['h39E] = 'h38;
mem['h39F] = 'h00;
mem['h3A0] = 'h7C;
mem['h3A1] = 'h10;
mem['h3A2] = 'h10;
mem['h3A3] = 'h10;
mem['h3A4] = 'h10;
mem['h3A5] = 'h10;
mem['h3A6] = 'h10;
mem['h3A7] = 'h00;
mem['h3A8] = 'h44;
mem['h3A9] = 'h44;
mem['h3AA] = 'h44;
mem['h3AB] = 'h3C;
mem['h3AC] = 'h04;
mem['h3AD] = 'h44;
mem['h3AE] = 'h38;
mem['h3AF] = 'h00;
mem['h3B0] = 'h54;
mem['h3B1] = 'h54;
mem['h3B2] = 'h54;
mem['h3B3] = 'h38;
mem['h3B4] = 'h54;
mem['h3B5] = 'h54;
mem['h3B6] = 'h54;
mem['h3B7] = 'h00;
mem['h3B8] = 'h78;
mem['h3B9] = 'h44;
mem['h3BA] = 'h44;
mem['h3BB] = 'h78;
mem['h3BC] = 'h44;
mem['h3BD] = 'h44;
mem['h3BE] = 'h78;
mem['h3BF] = 'h00;
mem['h3C0] = 'h40;
mem['h3C1] = 'h40;
mem['h3C2] = 'h40;
mem['h3C3] = 'h78;
mem['h3C4] = 'h44;
mem['h3C5] = 'h44;
mem['h3C6] = 'h78;
mem['h3C7] = 'h00;
mem['h3C8] = 'h44;
mem['h3C9] = 'h44;
mem['h3CA] = 'h44;
mem['h3CB] = 'h74;
mem['h3CC] = 'h54;
mem['h3CD] = 'h54;
mem['h3CE] = 'h74;
mem['h3CF] = 'h00;
mem['h3D0] = 'h38;
mem['h3D1] = 'h44;
mem['h3D2] = 'h04;
mem['h3D3] = 'h18;
mem['h3D4] = 'h04;
mem['h3D5] = 'h44;
mem['h3D6] = 'h38;
mem['h3D7] = 'h00;
mem['h3D8] = 'h54;
mem['h3D9] = 'h54;
mem['h3DA] = 'h54;
mem['h3DB] = 'h54;
mem['h3DC] = 'h54;
mem['h3DD] = 'h54;
mem['h3DE] = 'h7C;
mem['h3DF] = 'h00;
mem['h3E0] = 'h78;
mem['h3E1] = 'h04;
mem['h3E2] = 'h04;
mem['h3E3] = 'h3C;
mem['h3E4] = 'h04;
mem['h3E5] = 'h04;
mem['h3E6] = 'h78;
mem['h3E7] = 'h00;
mem['h3E8] = 'h54;
mem['h3E9] = 'h54;
mem['h3EA] = 'h54;
mem['h3EB] = 'h54;
mem['h3EC] = 'h54;
mem['h3ED] = 'h54;
mem['h3EE] = 'h7C;
mem['h3EF] = 'h04;
mem['h3F0] = 'h44;
mem['h3F1] = 'h44;
mem['h3F2] = 'h44;
mem['h3F3] = 'h3C;
mem['h3F4] = 'h04;
mem['h3F5] = 'h04;
mem['h3F6] = 'h04;
mem['h3F7] = 'h00;
mem['h3F8] = 'h60;
mem['h3F9] = 'h20;
mem['h3FA] = 'h20;
mem['h3FB] = 'h38;
mem['h3FC] = 'h24;
mem['h3FD] = 'h24;
mem['h3FE] = 'h38;
mem['h3FF] = 'h00;
mem['h400] = 'h00;
mem['h401] = 'h00;
mem['h402] = 'h00;
mem['h403] = 'h00;
mem['h404] = 'h00;
mem['h405] = 'h00;
mem['h406] = 'h00;
mem['h407] = 'h00;
mem['h408] = 'h00;
mem['h409] = 'h00;
mem['h40A] = 'h00;
mem['h40B] = 'h00;
mem['h40C] = 'h00;
mem['h40D] = 'h00;
mem['h40E] = 'h00;
mem['h40F] = 'h00;
mem['h410] = 'h00;
mem['h411] = 'h00;
mem['h412] = 'h00;
mem['h413] = 'h00;
mem['h414] = 'h00;
mem['h415] = 'h00;
mem['h416] = 'h00;
mem['h417] = 'h00;
mem['h418] = 'h00;
mem['h419] = 'h00;
mem['h41A] = 'h00;
mem['h41B] = 'h00;
mem['h41C] = 'h00;
mem['h41D] = 'h00;
mem['h41E] = 'h00;
mem['h41F] = 'h00;
mem['h420] = 'h00;
mem['h421] = 'h00;
mem['h422] = 'h00;
mem['h423] = 'h00;
mem['h424] = 'h00;
mem['h425] = 'h00;
mem['h426] = 'h00;
mem['h427] = 'h00;
mem['h428] = 'h00;
mem['h429] = 'h00;
mem['h42A] = 'h00;
mem['h42B] = 'h00;
mem['h42C] = 'h00;
mem['h42D] = 'h00;
mem['h42E] = 'h00;
mem['h42F] = 'h00;
mem['h430] = 'h00;
mem['h431] = 'h00;
mem['h432] = 'h00;
mem['h433] = 'h00;
mem['h434] = 'h00;
mem['h435] = 'h00;
mem['h436] = 'h00;
mem['h437] = 'h00;
mem['h438] = 'h00;
mem['h439] = 'h00;
mem['h43A] = 'h00;
mem['h43B] = 'h00;
mem['h43C] = 'h00;
mem['h43D] = 'h00;
mem['h43E] = 'h00;
mem['h43F] = 'h00;
mem['h440] = 'h00;
mem['h441] = 'h00;
mem['h442] = 'h00;
mem['h443] = 'h00;
mem['h444] = 'h00;
mem['h445] = 'h00;
mem['h446] = 'h00;
mem['h447] = 'h00;
mem['h448] = 'h00;
mem['h449] = 'h00;
mem['h44A] = 'h00;
mem['h44B] = 'h00;
mem['h44C] = 'h00;
mem['h44D] = 'h00;
mem['h44E] = 'h00;
mem['h44F] = 'h00;
mem['h450] = 'h00;
mem['h451] = 'h00;
mem['h452] = 'h00;
mem['h453] = 'h00;
mem['h454] = 'h00;
mem['h455] = 'h00;
mem['h456] = 'h00;
mem['h457] = 'h00;
mem['h458] = 'h00;
mem['h459] = 'h00;
mem['h45A] = 'h00;
mem['h45B] = 'h00;
mem['h45C] = 'h00;
mem['h45D] = 'h00;
mem['h45E] = 'h00;
mem['h45F] = 'h00;
mem['h460] = 'h00;
mem['h461] = 'h00;
mem['h462] = 'h00;
mem['h463] = 'h00;
mem['h464] = 'h00;
mem['h465] = 'h00;
mem['h466] = 'h00;
mem['h467] = 'h00;
mem['h468] = 'h00;
mem['h469] = 'h00;
mem['h46A] = 'h00;
mem['h46B] = 'h00;
mem['h46C] = 'h00;
mem['h46D] = 'h00;
mem['h46E] = 'h00;
mem['h46F] = 'h00;
mem['h470] = 'h00;
mem['h471] = 'h00;
mem['h472] = 'h00;
mem['h473] = 'h00;
mem['h474] = 'h00;
mem['h475] = 'h00;
mem['h476] = 'h00;
mem['h477] = 'h00;
mem['h478] = 'h00;
mem['h479] = 'h00;
mem['h47A] = 'h00;
mem['h47B] = 'h00;
mem['h47C] = 'h00;
mem['h47D] = 'h00;
mem['h47E] = 'h00;
mem['h47F] = 'h00;
mem['h480] = 'h00;
mem['h481] = 'h00;
mem['h482] = 'h00;
mem['h483] = 'h7C;
mem['h484] = 'h00;
mem['h485] = 'h00;
mem['h486] = 'h00;
mem['h487] = 'h00;
mem['h488] = 'h00;
mem['h489] = 'h00;
mem['h48A] = 'h00;
mem['h48B] = 'h7C;
mem['h48C] = 'h00;
mem['h48D] = 'h00;
mem['h48E] = 'h00;
mem['h48F] = 'h00;
mem['h490] = 'h00;
mem['h491] = 'h00;
mem['h492] = 'h00;
mem['h493] = 'hF0;
mem['h494] = 'h10;
mem['h495] = 'h10;
mem['h496] = 'h10;
mem['h497] = 'h10;
mem['h498] = 'h10;
mem['h499] = 'h10;
mem['h49A] = 'h10;
mem['h49B] = 'h10;
mem['h49C] = 'h10;
mem['h49D] = 'h10;
mem['h49E] = 'h10;
mem['h49F] = 'h10;
mem['h4A0] = 'h3C;
mem['h4A1] = 'h54;
mem['h4A2] = 'h54;
mem['h4A3] = 'h34;
mem['h4A4] = 'h14;
mem['h4A5] = 'h14;
mem['h4A6] = 'h14;
mem['h4A7] = 'h00;
mem['h4A8] = 'h00;
mem['h4A9] = 'h00;
mem['h4AA] = 'h08;
mem['h4AB] = 'hFC;
mem['h4AC] = 'h08;
mem['h4AD] = 'h00;
mem['h4AE] = 'h00;
mem['h4AF] = 'h00;
mem['h4B0] = 'h00;
mem['h4B1] = 'h00;
mem['h4B2] = 'h00;
mem['h4B3] = 'h00;
mem['h4B4] = 'h7C;
mem['h4B5] = 'h7C;
mem['h4B6] = 'h7C;
mem['h4B7] = 'h00;
mem['h4B8] = 'h10;
mem['h4B9] = 'h38;
mem['h4BA] = 'h10;
mem['h4BB] = 'h10;
mem['h4BC] = 'h38;
mem['h4BD] = 'h10;
mem['h4BE] = 'h7C;
mem['h4BF] = 'h00;
mem['h4C0] = 'h00;
mem['h4C1] = 'h10;
mem['h4C2] = 'h38;
mem['h4C3] = 'h10;
mem['h4C4] = 'h10;
mem['h4C5] = 'h10;
mem['h4C6] = 'h10;
mem['h4C7] = 'h10;
mem['h4C8] = 'h10;
mem['h4C9] = 'h10;
mem['h4CA] = 'h10;
mem['h4CB] = 'h10;
mem['h4CC] = 'h10;
mem['h4CD] = 'h38;
mem['h4CE] = 'h10;
mem['h4CF] = 'h00;
mem['h4D0] = 'h00;
mem['h4D1] = 'h00;
mem['h4D2] = 'h08;
mem['h4D3] = 'hFC;
mem['h4D4] = 'h08;
mem['h4D5] = 'h00;
mem['h4D6] = 'h00;
mem['h4D7] = 'h00;
mem['h4D8] = 'h00;
mem['h4D9] = 'h00;
mem['h4DA] = 'h00;
mem['h4DB] = 'h7C;
mem['h4DC] = 'h00;
mem['h4DD] = 'h00;
mem['h4DE] = 'h00;
mem['h4DF] = 'h00;
mem['h4E0] = 'h10;
mem['h4E1] = 'h10;
mem['h4E2] = 'h10;
mem['h4E3] = 'h10;
mem['h4E4] = 'h10;
mem['h4E5] = 'h10;
mem['h4E6] = 'h10;
mem['h4E7] = 'h10;
mem['h4E8] = 'h40;
mem['h4E9] = 'h40;
mem['h4EA] = 'h40;
mem['h4EB] = 'h40;
mem['h4EC] = 'h40;
mem['h4ED] = 'h40;
mem['h4EE] = 'h7C;
mem['h4EF] = 'h00;
mem['h4F0] = 'h00;
mem['h4F1] = 'h00;
mem['h4F2] = 'h00;
mem['h4F3] = 'h7C;
mem['h4F4] = 'h00;
mem['h4F5] = 'h00;
mem['h4F6] = 'h00;
mem['h4F7] = 'h00;
mem['h4F8] = 'h00;
mem['h4F9] = 'h00;
mem['h4FA] = 'h00;
mem['h4FB] = 'h7C;
mem['h4FC] = 'h00;
mem['h4FD] = 'h00;
mem['h4FE] = 'h00;
mem['h4FF] = 'h00;
mem['h500] = 'h00;
mem['h501] = 'h00;
mem['h502] = 'h00;
mem['h503] = 'h00;
mem['h504] = 'h00;
mem['h505] = 'h00;
mem['h506] = 'h00;
mem['h507] = 'h00;
mem['h508] = 'h10;
mem['h509] = 'h10;
mem['h50A] = 'h10;
mem['h50B] = 'h10;
mem['h50C] = 'h10;
mem['h50D] = 'h00;
mem['h50E] = 'h10;
mem['h50F] = 'h00;
mem['h510] = 'h28;
mem['h511] = 'h28;
mem['h512] = 'h28;
mem['h513] = 'h00;
mem['h514] = 'h00;
mem['h515] = 'h00;
mem['h516] = 'h00;
mem['h517] = 'h00;
mem['h518] = 'h28;
mem['h519] = 'h28;
mem['h51A] = 'h7C;
mem['h51B] = 'h28;
mem['h51C] = 'h7C;
mem['h51D] = 'h28;
mem['h51E] = 'h28;
mem['h51F] = 'h00;
mem['h520] = 'h44;
mem['h521] = 'h38;
mem['h522] = 'h44;
mem['h523] = 'h44;
mem['h524] = 'h44;
mem['h525] = 'h38;
mem['h526] = 'h44;
mem['h527] = 'h00;
mem['h528] = 'h60;
mem['h529] = 'h64;
mem['h52A] = 'h08;
mem['h52B] = 'h10;
mem['h52C] = 'h20;
mem['h52D] = 'h4C;
mem['h52E] = 'h0C;
mem['h52F] = 'h00;
mem['h530] = 'h20;
mem['h531] = 'h50;
mem['h532] = 'h50;
mem['h533] = 'h20;
mem['h534] = 'h54;
mem['h535] = 'h48;
mem['h536] = 'h34;
mem['h537] = 'h00;
mem['h538] = 'h10;
mem['h539] = 'h10;
mem['h53A] = 'h10;
mem['h53B] = 'h00;
mem['h53C] = 'h00;
mem['h53D] = 'h00;
mem['h53E] = 'h00;
mem['h53F] = 'h00;
mem['h540] = 'h08;
mem['h541] = 'h10;
mem['h542] = 'h20;
mem['h543] = 'h20;
mem['h544] = 'h20;
mem['h545] = 'h10;
mem['h546] = 'h08;
mem['h547] = 'h00;
mem['h548] = 'h20;
mem['h549] = 'h10;
mem['h54A] = 'h08;
mem['h54B] = 'h08;
mem['h54C] = 'h08;
mem['h54D] = 'h10;
mem['h54E] = 'h20;
mem['h54F] = 'h00;
mem['h550] = 'h10;
mem['h551] = 'h54;
mem['h552] = 'h38;
mem['h553] = 'h10;
mem['h554] = 'h38;
mem['h555] = 'h54;
mem['h556] = 'h10;
mem['h557] = 'h00;
mem['h558] = 'h00;
mem['h559] = 'h10;
mem['h55A] = 'h10;
mem['h55B] = 'h7C;
mem['h55C] = 'h10;
mem['h55D] = 'h10;
mem['h55E] = 'h00;
mem['h55F] = 'h00;
mem['h560] = 'h00;
mem['h561] = 'h00;
mem['h562] = 'h00;
mem['h563] = 'h30;
mem['h564] = 'h30;
mem['h565] = 'h10;
mem['h566] = 'h20;
mem['h567] = 'h00;
mem['h568] = 'h00;
mem['h569] = 'h00;
mem['h56A] = 'h00;
mem['h56B] = 'h7C;
mem['h56C] = 'h00;
mem['h56D] = 'h00;
mem['h56E] = 'h00;
mem['h56F] = 'h00;
mem['h570] = 'h00;
mem['h571] = 'h00;
mem['h572] = 'h00;
mem['h573] = 'h00;
mem['h574] = 'h00;
mem['h575] = 'h30;
mem['h576] = 'h30;
mem['h577] = 'h00;
mem['h578] = 'h00;
mem['h579] = 'h04;
mem['h57A] = 'h08;
mem['h57B] = 'h10;
mem['h57C] = 'h20;
mem['h57D] = 'h40;
mem['h57E] = 'h00;
mem['h57F] = 'h00;
mem['h580] = 'h38;
mem['h581] = 'h44;
mem['h582] = 'h4C;
mem['h583] = 'h54;
mem['h584] = 'h64;
mem['h585] = 'h44;
mem['h586] = 'h38;
mem['h587] = 'h00;
mem['h588] = 'h10;
mem['h589] = 'h30;
mem['h58A] = 'h10;
mem['h58B] = 'h10;
mem['h58C] = 'h10;
mem['h58D] = 'h10;
mem['h58E] = 'h38;
mem['h58F] = 'h00;
mem['h590] = 'h38;
mem['h591] = 'h44;
mem['h592] = 'h04;
mem['h593] = 'h08;
mem['h594] = 'h10;
mem['h595] = 'h20;
mem['h596] = 'h7C;
mem['h597] = 'h00;
mem['h598] = 'h7C;
mem['h599] = 'h04;
mem['h59A] = 'h08;
mem['h59B] = 'h18;
mem['h59C] = 'h04;
mem['h59D] = 'h44;
mem['h59E] = 'h38;
mem['h59F] = 'h00;
mem['h5A0] = 'h08;
mem['h5A1] = 'h18;
mem['h5A2] = 'h28;
mem['h5A3] = 'h48;
mem['h5A4] = 'h7C;
mem['h5A5] = 'h08;
mem['h5A6] = 'h08;
mem['h5A7] = 'h00;
mem['h5A8] = 'h7C;
mem['h5A9] = 'h40;
mem['h5AA] = 'h78;
mem['h5AB] = 'h04;
mem['h5AC] = 'h04;
mem['h5AD] = 'h44;
mem['h5AE] = 'h38;
mem['h5AF] = 'h00;
mem['h5B0] = 'h1C;
mem['h5B1] = 'h20;
mem['h5B2] = 'h40;
mem['h5B3] = 'h78;
mem['h5B4] = 'h44;
mem['h5B5] = 'h44;
mem['h5B6] = 'h38;
mem['h5B7] = 'h00;
mem['h5B8] = 'h7C;
mem['h5B9] = 'h04;
mem['h5BA] = 'h08;
mem['h5BB] = 'h10;
mem['h5BC] = 'h20;
mem['h5BD] = 'h20;
mem['h5BE] = 'h20;
mem['h5BF] = 'h00;
mem['h5C0] = 'h38;
mem['h5C1] = 'h44;
mem['h5C2] = 'h44;
mem['h5C3] = 'h38;
mem['h5C4] = 'h44;
mem['h5C5] = 'h44;
mem['h5C6] = 'h38;
mem['h5C7] = 'h00;
mem['h5C8] = 'h38;
mem['h5C9] = 'h44;
mem['h5CA] = 'h44;
mem['h5CB] = 'h3C;
mem['h5CC] = 'h04;
mem['h5CD] = 'h08;
mem['h5CE] = 'h70;
mem['h5CF] = 'h00;
mem['h5D0] = 'h00;
mem['h5D1] = 'h00;
mem['h5D2] = 'h18;
mem['h5D3] = 'h18;
mem['h5D4] = 'h00;
mem['h5D5] = 'h18;
mem['h5D6] = 'h18;
mem['h5D7] = 'h00;
mem['h5D8] = 'h18;
mem['h5D9] = 'h18;
mem['h5DA] = 'h00;
mem['h5DB] = 'h18;
mem['h5DC] = 'h18;
mem['h5DD] = 'h08;
mem['h5DE] = 'h10;
mem['h5DF] = 'h00;
mem['h5E0] = 'h04;
mem['h5E1] = 'h08;
mem['h5E2] = 'h10;
mem['h5E3] = 'h20;
mem['h5E4] = 'h10;
mem['h5E5] = 'h08;
mem['h5E6] = 'h04;
mem['h5E7] = 'h00;
mem['h5E8] = 'h00;
mem['h5E9] = 'h00;
mem['h5EA] = 'h7C;
mem['h5EB] = 'h00;
mem['h5EC] = 'h7C;
mem['h5ED] = 'h00;
mem['h5EE] = 'h00;
mem['h5EF] = 'h00;
mem['h5F0] = 'h20;
mem['h5F1] = 'h10;
mem['h5F2] = 'h08;
mem['h5F3] = 'h04;
mem['h5F4] = 'h08;
mem['h5F5] = 'h10;
mem['h5F6] = 'h20;
mem['h5F7] = 'h00;
mem['h5F8] = 'h38;
mem['h5F9] = 'h44;
mem['h5FA] = 'h08;
mem['h5FB] = 'h10;
mem['h5FC] = 'h10;
mem['h5FD] = 'h00;
mem['h5FE] = 'h10;
mem['h5FF] = 'h00;
mem['h600] = 'h38;
mem['h601] = 'h44;
mem['h602] = 'h5C;
mem['h603] = 'h54;
mem['h604] = 'h5C;
mem['h605] = 'h40;
mem['h606] = 'h3C;
mem['h607] = 'h00;
mem['h608] = 'h10;
mem['h609] = 'h28;
mem['h60A] = 'h44;
mem['h60B] = 'h44;
mem['h60C] = 'h7C;
mem['h60D] = 'h44;
mem['h60E] = 'h44;
mem['h60F] = 'h00;
mem['h610] = 'h78;
mem['h611] = 'h44;
mem['h612] = 'h44;
mem['h613] = 'h78;
mem['h614] = 'h44;
mem['h615] = 'h44;
mem['h616] = 'h78;
mem['h617] = 'h00;
mem['h618] = 'h38;
mem['h619] = 'h44;
mem['h61A] = 'h40;
mem['h61B] = 'h40;
mem['h61C] = 'h40;
mem['h61D] = 'h44;
mem['h61E] = 'h38;
mem['h61F] = 'h00;
mem['h620] = 'h78;
mem['h621] = 'h44;
mem['h622] = 'h44;
mem['h623] = 'h44;
mem['h624] = 'h44;
mem['h625] = 'h44;
mem['h626] = 'h78;
mem['h627] = 'h00;
mem['h628] = 'h7C;
mem['h629] = 'h40;
mem['h62A] = 'h40;
mem['h62B] = 'h78;
mem['h62C] = 'h40;
mem['h62D] = 'h40;
mem['h62E] = 'h7C;
mem['h62F] = 'h00;
mem['h630] = 'h7C;
mem['h631] = 'h40;
mem['h632] = 'h40;
mem['h633] = 'h78;
mem['h634] = 'h40;
mem['h635] = 'h40;
mem['h636] = 'h40;
mem['h637] = 'h00;
mem['h638] = 'h3C;
mem['h639] = 'h40;
mem['h63A] = 'h40;
mem['h63B] = 'h40;
mem['h63C] = 'h4C;
mem['h63D] = 'h44;
mem['h63E] = 'h3C;
mem['h63F] = 'h00;
mem['h640] = 'h44;
mem['h641] = 'h44;
mem['h642] = 'h44;
mem['h643] = 'h7C;
mem['h644] = 'h44;
mem['h645] = 'h44;
mem['h646] = 'h44;
mem['h647] = 'h00;
mem['h648] = 'h38;
mem['h649] = 'h10;
mem['h64A] = 'h10;
mem['h64B] = 'h10;
mem['h64C] = 'h10;
mem['h64D] = 'h10;
mem['h64E] = 'h38;
mem['h64F] = 'h00;
mem['h650] = 'h04;
mem['h651] = 'h04;
mem['h652] = 'h04;
mem['h653] = 'h04;
mem['h654] = 'h04;
mem['h655] = 'h44;
mem['h656] = 'h38;
mem['h657] = 'h00;
mem['h658] = 'h44;
mem['h659] = 'h48;
mem['h65A] = 'h50;
mem['h65B] = 'h60;
mem['h65C] = 'h50;
mem['h65D] = 'h48;
mem['h65E] = 'h44;
mem['h65F] = 'h00;
mem['h660] = 'h40;
mem['h661] = 'h40;
mem['h662] = 'h40;
mem['h663] = 'h40;
mem['h664] = 'h40;
mem['h665] = 'h40;
mem['h666] = 'h7C;
mem['h667] = 'h00;
mem['h668] = 'h44;
mem['h669] = 'h6C;
mem['h66A] = 'h54;
mem['h66B] = 'h54;
mem['h66C] = 'h44;
mem['h66D] = 'h44;
mem['h66E] = 'h44;
mem['h66F] = 'h00;
mem['h670] = 'h44;
mem['h671] = 'h44;
mem['h672] = 'h64;
mem['h673] = 'h54;
mem['h674] = 'h4C;
mem['h675] = 'h44;
mem['h676] = 'h44;
mem['h677] = 'h00;
mem['h678] = 'h38;
mem['h679] = 'h44;
mem['h67A] = 'h44;
mem['h67B] = 'h44;
mem['h67C] = 'h44;
mem['h67D] = 'h44;
mem['h67E] = 'h38;
mem['h67F] = 'h00;
mem['h680] = 'h78;
mem['h681] = 'h44;
mem['h682] = 'h44;
mem['h683] = 'h78;
mem['h684] = 'h40;
mem['h685] = 'h40;
mem['h686] = 'h40;
mem['h687] = 'h00;
mem['h688] = 'h38;
mem['h689] = 'h44;
mem['h68A] = 'h44;
mem['h68B] = 'h44;
mem['h68C] = 'h54;
mem['h68D] = 'h48;
mem['h68E] = 'h34;
mem['h68F] = 'h00;
mem['h690] = 'h78;
mem['h691] = 'h44;
mem['h692] = 'h44;
mem['h693] = 'h78;
mem['h694] = 'h50;
mem['h695] = 'h48;
mem['h696] = 'h44;
mem['h697] = 'h00;
mem['h698] = 'h38;
mem['h699] = 'h44;
mem['h69A] = 'h40;
mem['h69B] = 'h38;
mem['h69C] = 'h04;
mem['h69D] = 'h44;
mem['h69E] = 'h38;
mem['h69F] = 'h00;
mem['h6A0] = 'h7C;
mem['h6A1] = 'h10;
mem['h6A2] = 'h10;
mem['h6A3] = 'h10;
mem['h6A4] = 'h10;
mem['h6A5] = 'h10;
mem['h6A6] = 'h10;
mem['h6A7] = 'h00;
mem['h6A8] = 'h44;
mem['h6A9] = 'h44;
mem['h6AA] = 'h44;
mem['h6AB] = 'h44;
mem['h6AC] = 'h44;
mem['h6AD] = 'h44;
mem['h6AE] = 'h38;
mem['h6AF] = 'h00;
mem['h6B0] = 'h44;
mem['h6B1] = 'h44;
mem['h6B2] = 'h44;
mem['h6B3] = 'h44;
mem['h6B4] = 'h44;
mem['h6B5] = 'h28;
mem['h6B6] = 'h10;
mem['h6B7] = 'h00;
mem['h6B8] = 'h44;
mem['h6B9] = 'h44;
mem['h6BA] = 'h44;
mem['h6BB] = 'h54;
mem['h6BC] = 'h54;
mem['h6BD] = 'h6C;
mem['h6BE] = 'h44;
mem['h6BF] = 'h00;
mem['h6C0] = 'h44;
mem['h6C1] = 'h44;
mem['h6C2] = 'h28;
mem['h6C3] = 'h10;
mem['h6C4] = 'h28;
mem['h6C5] = 'h44;
mem['h6C6] = 'h44;
mem['h6C7] = 'h00;
mem['h6C8] = 'h44;
mem['h6C9] = 'h44;
mem['h6CA] = 'h28;
mem['h6CB] = 'h10;
mem['h6CC] = 'h10;
mem['h6CD] = 'h10;
mem['h6CE] = 'h10;
mem['h6CF] = 'h00;
mem['h6D0] = 'h7C;
mem['h6D1] = 'h04;
mem['h6D2] = 'h08;
mem['h6D3] = 'h10;
mem['h6D4] = 'h20;
mem['h6D5] = 'h40;
mem['h6D6] = 'h7C;
mem['h6D7] = 'h00;
mem['h6D8] = 'h7C;
mem['h6D9] = 'h60;
mem['h6DA] = 'h60;
mem['h6DB] = 'h60;
mem['h6DC] = 'h60;
mem['h6DD] = 'h60;
mem['h6DE] = 'h7C;
mem['h6DF] = 'h00;
mem['h6E0] = 'h00;
mem['h6E1] = 'h40;
mem['h6E2] = 'h20;
mem['h6E3] = 'h10;
mem['h6E4] = 'h08;
mem['h6E5] = 'h04;
mem['h6E6] = 'h00;
mem['h6E7] = 'h00;
mem['h6E8] = 'h7C;
mem['h6E9] = 'h0C;
mem['h6EA] = 'h0C;
mem['h6EB] = 'h0C;
mem['h6EC] = 'h0C;
mem['h6ED] = 'h0C;
mem['h6EE] = 'h7C;
mem['h6EF] = 'h00;
mem['h6F0] = 'h00;
mem['h6F1] = 'h10;
mem['h6F2] = 'h28;
mem['h6F3] = 'h44;
mem['h6F4] = 'h00;
mem['h6F5] = 'h00;
mem['h6F6] = 'h00;
mem['h6F7] = 'h00;
mem['h6F8] = 'h00;
mem['h6F9] = 'h00;
mem['h6FA] = 'h00;
mem['h6FB] = 'h00;
mem['h6FC] = 'h00;
mem['h6FD] = 'h00;
mem['h6FE] = 'h00;
mem['h6FF] = 'hFF;
mem['h700] = 'h5C;
mem['h701] = 'h54;
mem['h702] = 'h54;
mem['h703] = 'h74;
mem['h704] = 'h54;
mem['h705] = 'h54;
mem['h706] = 'h5C;
mem['h707] = 'h00;
mem['h708] = 'h38;
mem['h709] = 'h44;
mem['h70A] = 'h44;
mem['h70B] = 'h44;
mem['h70C] = 'h7C;
mem['h70D] = 'h44;
mem['h70E] = 'h44;
mem['h70F] = 'h00;
mem['h710] = 'h7C;
mem['h711] = 'h40;
mem['h712] = 'h40;
mem['h713] = 'h78;
mem['h714] = 'h44;
mem['h715] = 'h44;
mem['h716] = 'h78;
mem['h717] = 'h00;
mem['h718] = 'h48;
mem['h719] = 'h48;
mem['h71A] = 'h48;
mem['h71B] = 'h48;
mem['h71C] = 'h48;
mem['h71D] = 'h48;
mem['h71E] = 'h7C;
mem['h71F] = 'h04;
mem['h720] = 'h1C;
mem['h721] = 'h24;
mem['h722] = 'h24;
mem['h723] = 'h24;
mem['h724] = 'h24;
mem['h725] = 'h24;
mem['h726] = 'h7E;
mem['h727] = 'h42;
mem['h728] = 'h7C;
mem['h729] = 'h40;
mem['h72A] = 'h40;
mem['h72B] = 'h78;
mem['h72C] = 'h40;
mem['h72D] = 'h40;
mem['h72E] = 'h7C;
mem['h72F] = 'h00;
mem['h730] = 'h38;
mem['h731] = 'h54;
mem['h732] = 'h54;
mem['h733] = 'h54;
mem['h734] = 'h38;
mem['h735] = 'h10;
mem['h736] = 'h10;
mem['h737] = 'h00;
mem['h738] = 'h7C;
mem['h739] = 'h40;
mem['h73A] = 'h40;
mem['h73B] = 'h40;
mem['h73C] = 'h40;
mem['h73D] = 'h40;
mem['h73E] = 'h40;
mem['h73F] = 'h00;
mem['h740] = 'h44;
mem['h741] = 'h44;
mem['h742] = 'h28;
mem['h743] = 'h10;
mem['h744] = 'h28;
mem['h745] = 'h44;
mem['h746] = 'h44;
mem['h747] = 'h00;
mem['h748] = 'h44;
mem['h749] = 'h44;
mem['h74A] = 'h44;
mem['h74B] = 'h4C;
mem['h74C] = 'h54;
mem['h74D] = 'h64;
mem['h74E] = 'h44;
mem['h74F] = 'h00;
mem['h750] = 'h54;
mem['h751] = 'h54;
mem['h752] = 'h44;
mem['h753] = 'h4C;
mem['h754] = 'h54;
mem['h755] = 'h64;
mem['h756] = 'h44;
mem['h757] = 'h00;
mem['h758] = 'h44;
mem['h759] = 'h48;
mem['h75A] = 'h50;
mem['h75B] = 'h60;
mem['h75C] = 'h50;
mem['h75D] = 'h48;
mem['h75E] = 'h44;
mem['h75F] = 'h00;
mem['h760] = 'h0C;
mem['h761] = 'h14;
mem['h762] = 'h24;
mem['h763] = 'h24;
mem['h764] = 'h24;
mem['h765] = 'h24;
mem['h766] = 'h44;
mem['h767] = 'h00;
mem['h768] = 'h44;
mem['h769] = 'h6C;
mem['h76A] = 'h54;
mem['h76B] = 'h54;
mem['h76C] = 'h44;
mem['h76D] = 'h44;
mem['h76E] = 'h44;
mem['h76F] = 'h00;
mem['h770] = 'h44;
mem['h771] = 'h44;
mem['h772] = 'h44;
mem['h773] = 'h7C;
mem['h774] = 'h44;
mem['h775] = 'h44;
mem['h776] = 'h44;
mem['h777] = 'h00;
mem['h778] = 'h38;
mem['h779] = 'h44;
mem['h77A] = 'h44;
mem['h77B] = 'h44;
mem['h77C] = 'h44;
mem['h77D] = 'h44;
mem['h77E] = 'h38;
mem['h77F] = 'h00;
mem['h780] = 'h7C;
mem['h781] = 'h44;
mem['h782] = 'h44;
mem['h783] = 'h44;
mem['h784] = 'h44;
mem['h785] = 'h44;
mem['h786] = 'h44;
mem['h787] = 'h00;
mem['h788] = 'h3C;
mem['h789] = 'h44;
mem['h78A] = 'h44;
mem['h78B] = 'h3C;
mem['h78C] = 'h14;
mem['h78D] = 'h24;
mem['h78E] = 'h44;
mem['h78F] = 'h00;
mem['h790] = 'h78;
mem['h791] = 'h44;
mem['h792] = 'h44;
mem['h793] = 'h78;
mem['h794] = 'h40;
mem['h795] = 'h40;
mem['h796] = 'h40;
mem['h797] = 'h00;
mem['h798] = 'h38;
mem['h799] = 'h44;
mem['h79A] = 'h40;
mem['h79B] = 'h40;
mem['h79C] = 'h40;
mem['h79D] = 'h44;
mem['h79E] = 'h38;
mem['h79F] = 'h00;
mem['h7A0] = 'h7C;
mem['h7A1] = 'h10;
mem['h7A2] = 'h10;
mem['h7A3] = 'h10;
mem['h7A4] = 'h10;
mem['h7A5] = 'h10;
mem['h7A6] = 'h10;
mem['h7A7] = 'h00;
mem['h7A8] = 'h44;
mem['h7A9] = 'h44;
mem['h7AA] = 'h44;
mem['h7AB] = 'h3C;
mem['h7AC] = 'h04;
mem['h7AD] = 'h44;
mem['h7AE] = 'h38;
mem['h7AF] = 'h00;
mem['h7B0] = 'h54;
mem['h7B1] = 'h54;
mem['h7B2] = 'h54;
mem['h7B3] = 'h38;
mem['h7B4] = 'h54;
mem['h7B5] = 'h54;
mem['h7B6] = 'h54;
mem['h7B7] = 'h00;
mem['h7B8] = 'h78;
mem['h7B9] = 'h44;
mem['h7BA] = 'h44;
mem['h7BB] = 'h78;
mem['h7BC] = 'h44;
mem['h7BD] = 'h44;
mem['h7BE] = 'h78;
mem['h7BF] = 'h00;
mem['h7C0] = 'h40;
mem['h7C1] = 'h40;
mem['h7C2] = 'h40;
mem['h7C3] = 'h78;
mem['h7C4] = 'h44;
mem['h7C5] = 'h44;
mem['h7C6] = 'h78;
mem['h7C7] = 'h00;
mem['h7C8] = 'h44;
mem['h7C9] = 'h44;
mem['h7CA] = 'h44;
mem['h7CB] = 'h74;
mem['h7CC] = 'h54;
mem['h7CD] = 'h54;
mem['h7CE] = 'h74;
mem['h7CF] = 'h00;
mem['h7D0] = 'h38;
mem['h7D1] = 'h44;
mem['h7D2] = 'h04;
mem['h7D3] = 'h18;
mem['h7D4] = 'h04;
mem['h7D5] = 'h44;
mem['h7D6] = 'h38;
mem['h7D7] = 'h00;
mem['h7D8] = 'h54;
mem['h7D9] = 'h54;
mem['h7DA] = 'h54;
mem['h7DB] = 'h54;
mem['h7DC] = 'h54;
mem['h7DD] = 'h54;
mem['h7DE] = 'h7C;
mem['h7DF] = 'h00;
mem['h7E0] = 'h78;
mem['h7E1] = 'h04;
mem['h7E2] = 'h04;
mem['h7E3] = 'h3C;
mem['h7E4] = 'h04;
mem['h7E5] = 'h04;
mem['h7E6] = 'h78;
mem['h7E7] = 'h00;
mem['h7E8] = 'h54;
mem['h7E9] = 'h54;
mem['h7EA] = 'h54;
mem['h7EB] = 'h54;
mem['h7EC] = 'h54;
mem['h7ED] = 'h54;
mem['h7EE] = 'h7C;
mem['h7EF] = 'h04;
mem['h7F0] = 'h44;
mem['h7F1] = 'h44;
mem['h7F2] = 'h44;
mem['h7F3] = 'h3C;
mem['h7F4] = 'h04;
mem['h7F5] = 'h04;
mem['h7F6] = 'h04;
mem['h7F7] = 'h00;
mem['h7F8] = 'h60;
mem['h7F9] = 'h20;
mem['h7FA] = 'h20;
mem['h7FB] = 'h38;
mem['h7FC] = 'h24;
mem['h7FD] = 'h24;
mem['h7FE] = 'h38;
mem['h7FF] = 'h00;
/trunk/juke-box/ag_keyb.v
0,0 → 1,279
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: BMSTU
// Engineer: Oleg Odintsov
//
// Create Date: 00:26:47 02/26/2012
// Design Name:
// Module Name: ag_keyb
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
 
module signal_filter(input clk, input in, output reg out);
always @(posedge clk) begin
out <= in;
end
endmodule
 
 
module ps2_keyb_driver(ps2_clk, ps2_data, ps2_code, ps2_up, ps2_ext, ps2_event);
input wire ps2_clk, ps2_data;
output reg[7:0] ps2_code = 0;
output reg ps2_up = 0, ps2_ext = 0, ps2_event = 0;
reg[10:0] shreg = 11'b11111111111;
wire[10:0] shnew = {ps2_data, shreg[10:1]};
wire start = shnew[0], stop = shnew[10], parity = shnew[9];
wire[7:0] data = shnew[8:1];
always @(negedge ps2_clk) begin
if (!start && stop && (parity == ~^data)) begin
if (data == 8'hE0) begin
ps2_ext <= 1;
end else if (data == 8'hF0) begin
ps2_up <= 1;
end else begin
ps2_code <= data;
ps2_event <= 1;
end
shreg <= 11'b11111111111;
end else begin
if (ps2_event) begin
ps2_up <= 0;
ps2_ext <= 0;
ps2_event <= 0;
end
shreg <= shnew;
end
end
endmodule
 
module ag_reg_decoder(keyb_in, shift, ctrl, keyb_out);
input wire[6:0] keyb_in;
input wire shift, ctrl;
output wire[6:0] keyb_out;
wire is_alpha = keyb_in[6] && !keyb_in[5];
wire is_digit = !keyb_in[6] && keyb_in[5] && keyb_in[3:0];
assign keyb_out =
is_alpha?
(shift?{1'b1,1'b1,keyb_in[4:0]}:
ctrl?{1'b0,1'b0,keyb_in[4:0]}:
keyb_in):
is_digit?
(shift?{1'b0,1'b1,~keyb_in[4],keyb_in[3:0]}:
keyb_in):
keyb_in;
endmodule
 
module ag_keyb_decoder(ps2_code, ps2_ext, shift, ctrl, alt, rus, keyb_code);
input wire[7:0] ps2_code;
input wire ps2_ext, shift, ctrl, alt, rus;
output wire[6:0] keyb_code;
reg[6:0] keyb_table[0:511]; // eng + rus
integer i;
wire[6:0] keyb_in;
assign keyb_in = keyb_table[{rus,ps2_code}];
ag_reg_decoder rd(keyb_in, shift, ctrl, keyb_code);
 
initial begin
for (i = 0; i < 512; i = i + 1) keyb_table[i] = 0;
// eng table
keyb_table['h15] = 'h51; // Q
keyb_table['h1D] = 'h57; // W
keyb_table['h24] = 'h45; // E
keyb_table['h2D] = 'h52; // R
keyb_table['h2C] = 'h54; // T
keyb_table['h35] = 'h59; // Y
keyb_table['h3C] = 'h55; // U
keyb_table['h43] = 'h49; // I
keyb_table['h44] = 'h4F; // O
keyb_table['h4D] = 'h50; // P
keyb_table['h54] = 'h5B; // {
keyb_table['h5B] = 'h5D; // }
keyb_table['h1C] = 'h41; // A
keyb_table['h1B] = 'h53; // S
keyb_table['h23] = 'h44; // D
keyb_table['h2B] = 'h46; // F
keyb_table['h34] = 'h47; // G
keyb_table['h33] = 'h48; // H
keyb_table['h3B] = 'h4A; // J
keyb_table['h42] = 'h4B; // K
keyb_table['h4B] = 'h4C; // L
keyb_table['h4C] = 'h2A; // :
keyb_table['h52] = 'h22; // "
keyb_table['h5D] = 'h5C; // \
keyb_table['h5A] = 'h0D; // enter
keyb_table['h1A] = 'h5A; // Z
keyb_table['h22] = 'h58; // X
keyb_table['h21] = 'h43; // C
keyb_table['h2A] = 'h56; // V
keyb_table['h32] = 'h42; // B
keyb_table['h31] = 'h4E; // N
keyb_table['h3A] = 'h4D; // M
keyb_table['h41] = 'h2C; // <
keyb_table['h49] = 'h2E; // >
keyb_table['h4A] = 'h2F; // ?
 
keyb_table['h05] = 'h04; // F1
keyb_table['h06] = 'h05; // F2
keyb_table['h04] = 'h06; // F3
 
keyb_table['h75] = 'h99; // UP
keyb_table['h74] = 'h95; // RIGHT
keyb_table['h6B] = 'h88; // LEFT
keyb_table['h66] = 'h88; // BS
keyb_table['h72] = 'h9A; // DOWN
keyb_table['h76] = 'h9B; // ESC
keyb_table['h29] = 'h20; // SPACE
keyb_table['h0E] = 'h00; // `
keyb_table['h16] = 'h31; // 1
keyb_table['h1E] = 'h32; // 2
keyb_table['h26] = 'h33; // 3
keyb_table['h25] = 'h34; // 4
keyb_table['h2E] = 'h35; // 5
keyb_table['h36] = 'h36; // 6
keyb_table['h3D] = 'h37; // 7
keyb_table['h3E] = 'h38; // 8
keyb_table['h46] = 'h39; // 9
keyb_table['h45] = 'h30; // 0
keyb_table['h4E] = 'h2D; // -
keyb_table['h55] = 'h3B; // =
 
// rus table + 100h
keyb_table['h115] = 'h4A; // Q
keyb_table['h11D] = 'h43; // W
keyb_table['h124] = 'h55; // E
keyb_table['h12D] = 'h4B; // R
keyb_table['h12C] = 'h45; // T
keyb_table['h135] = 'h4E; // Y
keyb_table['h13C] = 'h47; // U
keyb_table['h143] = 'h5B; // I
keyb_table['h144] = 'h5D; // O
keyb_table['h14D] = 'h5A; // P
keyb_table['h154] = 'h48; // {
keyb_table['h15B] = 'h3A; // }, check
keyb_table['h11C] = 'h46; // A
keyb_table['h11B] = 'h59; // S
keyb_table['h123] = 'h57; // D
keyb_table['h12B] = 'h41; // F
keyb_table['h134] = 'h50; // G
keyb_table['h133] = 'h52; // H
keyb_table['h13B] = 'h4F; // J
keyb_table['h142] = 'h4C; // K
keyb_table['h14B] = 'h44; // L
keyb_table['h14C] = 'h56; // :
keyb_table['h152] = 'h5C; // "
keyb_table['h15D] = 'h2B; // | -> .
keyb_table['h15A] = 'h0D; // enter
keyb_table['h11A] = 'h51; // Z
keyb_table['h122] = 'h5E; // X
keyb_table['h121] = 'h53; // C
keyb_table['h12A] = 'h4D; // V
keyb_table['h132] = 'h49; // B
keyb_table['h131] = 'h54; // N
keyb_table['h13A] = 'h58; // M
keyb_table['h141] = 'h42; // <
keyb_table['h149] = 'h2C; // >
keyb_table['h14A] = 'h2F; // ?
 
keyb_table['h105] = 'h04; // F1
keyb_table['h106] = 'h05; // F2
keyb_table['h104] = 'h06; // F3
 
keyb_table['h175] = 'h99; // UP
keyb_table['h174] = 'h95; // RIGHT
keyb_table['h16B] = 'h88; // LEFT
keyb_table['h166] = 'h88; // BS
keyb_table['h172] = 'h9A; // DOWN
keyb_table['h176] = 'h9B; // ESC
keyb_table['h129] = 'h20; // SPACE
keyb_table['h10E] = 'h00; // `
keyb_table['h116] = 'h31; // 1
keyb_table['h11E] = 'h32; // 2
keyb_table['h126] = 'h33; // 3
keyb_table['h125] = 'h34; // 4
keyb_table['h12E] = 'h35; // 5
keyb_table['h136] = 'h36; // 6
keyb_table['h13D] = 'h37; // 7
keyb_table['h13E] = 'h38; // 8
keyb_table['h146] = 'h39; // 9
keyb_table['h145] = 'h30; // 0
keyb_table['h14E] = 'h2D; // -
keyb_table['h155] = 'h3B; // =
end
endmodule
 
module ag_keyb(clk, ps2_bus, keyb_reg, keyb_clear, keyb_rus, keyb_rst, keyb_pause);
input clk;
input wire[1:0] ps2_bus;
output wire[7:0] keyb_reg;
input wire keyb_clear;
output wire keyb_rus;
output wire keyb_rst;
output wire keyb_pause;
wire ps2_clk, ps2_data;
assign {ps2_clk, ps2_data} = ps2_bus;
reg[7:0] keyb_code;
reg clr = 0, got = 0;
reg lshift = 0, rshift = 0, ctrl = 0, alt = 0, rus = 0, rst = 0, pause = 0;
wire[7:0] ps2_code;
wire ps2_up, ps2_ext, ps2_event;
assign keyb_reg = clr?0:keyb_code;
assign keyb_rus = rus;
assign keyb_rst = rst;
assign keyb_pause = pause;
wire[6:0] dec_code;
ps2_keyb_driver kd(ps2_clk, ps2_data, ps2_code, ps2_up, ps2_ext, ps2_event);
ag_keyb_decoder dec(ps2_code, ps2_ext, lshift | rshift, ctrl, alt, rus, dec_code);
always @(posedge clk) begin
if (keyb_clear) clr <= 1;
if (ps2_event && !got) begin
if (!ps2_up) begin
if (ps2_code == 8'h12 && ctrl) rus <= 0;
else if (ps2_code == 8'h14 && lshift) rus <= 0;
else if (ps2_code == 8'h59 && ctrl) rus <= 1;
else if (ps2_code == 8'h14 && rshift) rus <= 1;
clr <= 0;
keyb_code <= {|dec_code, dec_code};
end
if (ps2_code == 8'h12) lshift <= ~ps2_up;
else if (ps2_code == 8'h59) rshift <= ~ps2_up;
else if (ps2_code == 8'h14 || ps2_code == 8'h0D) ctrl <= ~ps2_up; // ctrl or tab
else if (ps2_code == 8'h11) alt <= ~ps2_up;
else if (ps2_code == 8'h7E) pause <= ~ps2_up;
if (ps2_code == 8'h76 && ctrl) rst <= ~ps2_up;
got <= 1;
end
if (!ps2_event) got <= 0;
end
endmodule
/trunk/juke-box/ag_6502.v
0,0 → 1,346
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: BMSTU
// Engineer: Oleg Odintsov
//
// Create Date: 10:50:36 02/15/2012
// Design Name:
// Module Name: my6502
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Revision 0.02 - Fixed NMI bug
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
 
// Specify following define to allow external
// clocking for phi1 and phi2
// In such case you may use ag6502_ext_clock module
// with baseclk frequency ~ 10 x phi_0
`define AG6502_EXTERNAL_CLOCK
 
 
`ifndef AG6502_EXTERNAL_CLOCK
module ag6502_clock(input phi_0, output phi_1, output phi_2);
wire phi_01;
not#3(phi_1,phi_0);
or(phi_01,~phi_0, phi_1);
not#1(phi_2, phi_01);
endmodule
 
 
`else
 
module ag6502_phase_shift(input baseclk, input phi_0, output reg phi_1);
parameter DELAY = 1; // delay in waves of baseclk
initial phi_1 = 0;
integer cnt = 0;
always @(posedge baseclk) begin
if (phi_0 != phi_1) begin
if (!cnt) begin phi_1 <= phi_0; cnt <= DELAY; end
else cnt <= cnt - 1;
end
end
endmodule
 
// baseclk is used to simulate delays on a real hardware
module ag6502_ext_clock(input baseclk, input phi_0, output phi_1, output phi_2);
parameter DELAY1 = 3, DELAY2 = 1; // delays in waves of baseclk
wire phi_1_neg, phi_01;
ag6502_phase_shift#DELAY1 d1(baseclk, phi_0, phi_1_neg);
assign phi_1 = ~phi_1_neg;
and(phi_01, phi_0, phi_1_neg);
ag6502_phase_shift#DELAY2 d2(baseclk, phi_01, phi_2);
endmodule
 
`endif
 
 
`define ALU_ORA 3'd0
`define ALU_AND 3'd1
`define ALU_EOR 3'd2
`define ALU_ADC 3'd3
`define ALU_ASL 3'd4
`define ALU_LSR 3'd5
`define ALU_ROL 3'd6
`define ALU_ROR 3'd7
 
 
module ag6502_decimal(ADD, D_IN, NEG, CORR);
input wire[4:0] ADD;
input wire D_IN, NEG;
output wire[4:0] CORR;
wire C9 = {ADD[4]^NEG, ADD[3:0]} > 5'd9;
assign CORR = D_IN?{C9^NEG, C9?ADD[3:0] + (NEG?4'd10:4'd6): ADD[3:0]}: ADD;
endmodule
 
 
module ag6502_alu(A, B, OP, NEG, C_IN, D_IN, R, C_OUT, V_OUT);
input wire[7:0] A, B;
input wire[2:0] OP;
input wire C_IN, D_IN, NEG;
output wire[7:0] R;
output wire C_OUT, V_OUT;
wire[4:0] ADD_L;
ag6502_decimal DL({1'b0, A[3:0]} + {1'b0, B[3:0]} + C_IN, D_IN, NEG, ADD_L);
wire CF_H = ADD_L[4];
 
wire[4:0] ADD_H;
ag6502_decimal DH({1'b0, A[7:4]} + {1'b0, B[7:4]} + CF_H, D_IN, NEG, ADD_H);
 
assign
{C_OUT,R} = (OP==`ALU_ORA)? A | B:
(OP==`ALU_AND)? A & B:
(OP==`ALU_EOR)? A ^ B:
(OP==`ALU_ADC)? {ADD_H, ADD_L[3:0]}:
(OP==`ALU_ASL)? {A[7], A[6:0], 1'b0}:
(OP==`ALU_LSR)? {A[0], 1'b0, A[7:1]}:
(OP==`ALU_ROL)? {A[7], A[6:0], C_IN}:
(OP==`ALU_ROR)? {A[0], C_IN, A[7:1]}:
8'bX;
assign V_OUT = (A[7] == B[7]) && (A[7] != R[7]);
endmodule
 
/*
System AB/DB discipline:
1. For CPU
Phi1 up => CPU set ab/db_out buses
Phi2 down => CPU reads data from db_in
2. For Memory / other devices
Phi2 up => perform read/write operation
*/
 
 
module ag6502(input phi_0,
`ifdef AG6502_EXTERNAL_CLOCK
input phi_1, input phi_2,
`else
output phi_1, output phi_2,
`endif
output reg[15:0] ab,
output wire read,
input[7:0] db_in, output reg[7:0] db_out,
input rdy,
input rst, input irq, input nmi,
input so,
output sync);
`ifndef AG6502_EXTERNAL_CLOCK
ag6502_clock cgen(phi_0, phi_1, phi_2);
`endif
 
reg rdyg = 1;
reg[2:0] T = 7;
reg[7:0] IR ='h00;
reg[15:0] PC = 0;
wire[7:0] PCH = PC[15:8], PCL = PC[7:0];
reg[7:0] EAL, EAH;
wire[15:0] EA = {EAH, EAL};
reg FLAG_C, FLAG_Z, FLAG_I, FLAG_D, FLAG_B, FLAG_V, FLAG_N;
reg[7:0] AC, X, Y, S = 0;
wire[7:0] P = {FLAG_N, FLAG_V, 1'b1, FLAG_B, FLAG_D, FLAG_I, FLAG_Z, FLAG_C};
wire[7:0] SB;
wire[7:0] ALU_A, ALU_B;
wire[7:0] RES;
wire[2:0] ALU_OP;
reg[8:0] eALU; // with carry
wire[7:0] ALU = eALU;
wire ALU_CF = eALU[8];
wire CF_IN, DF_IN;
wire CF_OUT, VF_OUT;
reg so_prev = 0;
reg nmi_prev = 0;
wire irq_active = ~irq & ~FLAG_I;
wire nmi_active = ~nmi & nmi_prev;
wire int_active = irq_active | nmi_active;
wire rst_active = ~rst;
wire so_active = so & ~so_prev;
wire[7:0] IR_in = int_active?8'b0:db_in;
 
wire[1:0] vec_bits=
nmi_active?2'b01:
rst_active?2'b10:
2'b11;
wire[15:0] vec_addr = {{13{1'b1}}, vec_bits, 1'b0};
wire[10:0] L = {T, IR};
`include "states.v"
assign read = ~A_RW_W;
assign sync = !T;
assign SB = A_SB_DB? db_in:
A_SB_AC? AC:
A_SB_X? X:
A_SB_Y? Y:
A_SB_S? S:
A_SB_P? P:
A_SB_ALU? ALU:
A_SB_0? 8'b0:
A_SB_PCH? PCH:
A_SB_PCL? PCL:
8'bX;
assign CF_IN = A_ALU_CF_0? 1'b0:
A_ALU_CF_1? 1'b1:
A_ALU_CF_ALUC? ALU_CF:
FLAG_C;
assign DF_IN = A_ALU_DF_D? FLAG_D: 1'b0;
assign ALU_A =
A_ALU_A_AC? AC:
A_ALU_A_X? X:
A_ALU_A_Y? Y:
A_ALU_A_DB? db_in:
A_ALU_A_EAL? EAL:
A_ALU_A_ALU? ALU:
A_ALU_A_S? S:
A_ALU_A_SIGN? (EAL[7]?8'b11111111:8'b00000001):
8'bX;
assign ALU_B = A_ALU_B_SB? SB:
A_ALU_B_NOTSB? ~SB:
8'bX;
 
assign ALU_OP = A_ALU_OP_ADC? `ALU_ADC:
A_ALU_OP_ORA? `ALU_ORA:
A_ALU_OP_EOR? `ALU_EOR:
A_ALU_OP_AND? `ALU_AND:
A_ALU_OP_ASL? `ALU_ASL:
A_ALU_OP_LSR? `ALU_LSR:
A_ALU_OP_ROL? `ALU_ROL:
A_ALU_OP_ROR? `ALU_ROR:
8'bX;
 
ag6502_alu alu(ALU_A, ALU_B, ALU_OP, A_ALU_B_NOTSB, CF_IN, DF_IN, RES, CF_OUT, VF_OUT);
always @(posedge phi_1) begin
if (E_AB__PC) ab <= PC;
else if (E_AB__EA) ab <= EA;
else if (E_AB__S) ab <= {8'b1, S};
 
if (E_DB__SB) db_out <= SB;
else if (E_DB__PCH) db_out <= PCH;
else if (E_DB__PCL) db_out <= PCL;
else if (E_DB__P) db_out <= P;
else if (E_DB__ALU) db_out <= ALU;
if (read) rdyg <= rdy;
end
 
 
wire cond;
assign cond =
E_T__0IFNF__IR_5_?(FLAG_N != IR[5]):
E_T__0IFVF__IR_5_?(FLAG_V != IR[5]):
E_T__0IFCF__IR_5_?(FLAG_C != IR[5]):
E_T__0IFZF__IR_5_?(FLAG_Z != IR[5]):
E_T__0IFZF__IR_5_?(FLAG_Z != IR[5]):
E_T__0IF_C7F? CF_OUT == EAL[7]:
E_T__0;
always @(negedge phi_2) if (rdyg) begin
if (E_PC__PC_1) begin
if (T || (!int_active && !rst_active)) PC <= PC + 1;
end else if (E_PC__EA) PC <= EA;
else begin
if (E_PCH__RES) PC[15:8] <= RES;
if (E_PCL__ALU) PC[7:0] <= ALU;
else if (E_PCL__RES) PC[7:0] <= RES;
else if (E_PCL__EAL) PC[7:0] <= EAL;
else if (E_PCL__DB) PC[7:0] <= db_in;
end
if (!T) begin
IR <= IR_in;
if (!IR_in) begin // BRK instruction
{EAH, EAL} <= vec_addr;
end
nmi_prev <= nmi;
end
if (E_N_Z__SB) begin FLAG_Z <= !SB; FLAG_N <= SB[7]; end
else if (E_N_Z__RES) begin FLAG_Z <= !RES; FLAG_N <= RES[7]; end
else if (E_N_Z__SB_RES) begin FLAG_Z <= !RES; FLAG_N <= SB[7]; end
if (E_C__RES) FLAG_C <= CF_OUT;
if (E_V__RES) FLAG_V <= VF_OUT;
else if (E_V__SB_6_) FLAG_V <= SB[6];
if (E_EAL__DB) EAL <= db_in;
else if (E_EAL__ALU) EAL <= ALU;
 
if (E_EA__DB) {EAH, EAL} <= { 8'b0, db_in };
else if (E_EAH__DB) EAH <= db_in;
else if (E_EAH__ALU) EAH <= ALU;
if (E_AC__SB) AC <= SB;
else if (E_AC__RES) AC <= RES;
if (E_S__ALU) S <= ALU;
if (E_X__SB) X <= SB;
else if (E_X__RES) X <= RES;
if (E_Y__SB) Y <= SB;
else if (E_Y__RES) Y <= RES;
if (E_S__SB) S <= SB;
if (E_P__SB) {FLAG_N, FLAG_V, FLAG_B, FLAG_D, FLAG_I, FLAG_Z, FLAG_C} <= {SB[7], SB[6], SB[4], SB[3], SB[2], SB[1], SB[0]};
else if (E_P__DB) {FLAG_N, FLAG_V, FLAG_B, FLAG_D, FLAG_I, FLAG_Z, FLAG_C} <= {db_in[7], db_in[6], db_in[4], db_in[3], db_in[2], db_in[1], db_in[0]};
if (E_CF__IR_5_) FLAG_C <= IR[5];
if (E_IF__IR_5_) FLAG_I <= IR[5];
if (E_DF__IR_5_) FLAG_D <= IR[5];
if (E_VF__0) FLAG_V <= 0;
else if (so_active) FLAG_V <= 1;
so_prev <= so;
eALU <= {CF_OUT, RES};
if (cond) begin
T <= 0;
if (!IR) begin
FLAG_B <= !int_active;
FLAG_I <= 1;
end
end else T <= T + ((E_T__T_1IF_ALUCZ && !ALU_CF)?2: 1);
 
if (rst_active) begin
T <= 1;
IR <= 0;
{EAH, EAL} <= vec_addr;
end
end
 
 
endmodule
 
/trunk/juke-box/states.v
0,0 → 1,337
// This file has been generated automatically
// by the GenStates tool
// Copyright (c) Oleg Odintsov
// This tool is a part of Agat hardware project
 
// Level of optimization: infinite
// Total number of actions: 82
wire E_AB__PC;
wire E_AB__EA;
wire E_AB__S;
wire E_PC__PC_1;
wire E_T__0;
wire E_N_Z__SB;
wire E_N_Z__RES;
wire E_N_Z__SB_RES;
wire E_C__RES;
wire E_V__RES;
wire E_V__SB_6_;
wire A_ALU_CF_0;
wire A_ALU_DF_0;
wire A_ALU_OP_ADC;
wire A_SB_0;
wire A_ALU_B_SB;
wire A_ALU_CF_1;
wire A_ALU_CF_ALUC;
wire A_ALU_B_NOTSB;
wire A_ALU_OP_ORA;
wire A_ALU_A_DB;
wire A_SB_X;
wire A_ALU_A_EAL;
wire A_SB_PCL;
wire A_SB_Y;
wire A_ALU_A_ALU;
wire A_ALU_A_S;
wire E_CF__IR_5_;
wire E_IF__IR_5_;
wire E_DF__IR_5_;
wire E_VF__0;
wire E_T__0IFNF__IR_5_;
wire E_T__0IFVF__IR_5_;
wire E_T__0IFCF__IR_5_;
wire E_T__0IFZF__IR_5_;
wire E_EA__DB;
wire E_EAL__DB;
wire E_PCL__RES;
wire E_T__0IF_C7F;
wire A_ALU_A_SIGN;
wire A_SB_PCH;
wire E_PCH__RES;
wire E_EAH__DB;
wire E_EAL__ALU;
wire E_T__T_1IF_ALUCZ;
wire E_EAH__ALU;
wire E_PCL__ALU;
wire A_SB_DB;
wire E_AC__SB;
wire A_ALU_A_AC;
wire E_AC__RES;
wire A_ALU_OP_AND;
wire A_ALU_OP_EOR;
wire A_ALU_A_X;
wire A_ALU_A_Y;
wire A_ALU_DF_D;
wire A_ALU_CF_C;
wire A_ALU_OP_ASL;
wire A_RW_W;
wire A_SB_ALU;
wire E_DB__SB;
wire A_ALU_OP_LSR;
wire A_ALU_OP_ROL;
wire A_ALU_OP_ROR;
wire A_SB_AC;
wire E_X__SB;
wire E_Y__SB;
wire A_SB_S;
wire E_S__SB;
wire E_PC__EA;
wire E_S__ALU;
wire A_SB_P;
wire E_P__SB;
wire E_X__RES;
wire E_Y__RES;
wire E_DB__ALU;
wire E_DB__PCH;
wire E_PCL__EAL;
wire E_DB__PCL;
wire E_DB__P;
wire E_P__DB;
wire E_PCL__DB;
 
// Actions assignments
 
// action: AB <= PC:
assign E_AB__PC = (!L[10] && ((!L[0] && ((!L[1] && ((!L[2] && ((!L[9] && (!L[3] || (L[3] && ((!L[4] && (!L[7] || ({L[7],L[8]} == 2'b10))) || (L[4] && ((!L[5] && ((!L[6] && (!L[8] || ({L[7],L[8]} == 2'b01))) || L[6])) || L[5])))))) || ({L[3],L[4],L[9]} == 3'b011))) || (L[2] && (!L[9] || ({L[3],L[8],L[9]} == 3'b101))))) || (L[1] && ((!L[9] && ((!L[2] && ((!L[8] && (({L[3],L[4],L[7]} == 3'b001) || L[3])) || ({L[3],L[4],L[7],L[8]} == 4'b0011))) || L[2])) || ({L[2],L[3],L[8],L[9]} == 4'b1101))))) || (L[0] && ((!L[9] && (!L[1] || (L[1] && ((!L[2] && (!L[3] || (L[3] && ((!L[4] && ((!L[5] && ((!L[6] && (!L[8] || ({L[7],L[8]} == 2'b01))) || L[6])) || L[5])) || L[4])))) || L[2])))) || (({L[3],L[8],L[9]} == 3'b101) && (({L[2],L[4]} == 2'b01) || L[2])))))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[7],L[8],L[9],L[10]} == 10'b0000010101);
 
// action: AB <= EA:
assign E_AB__EA = (({L[9],L[10]} == 2'b01) && ((!L[2] && (({L[0],L[1],L[3],L[4],L[5],L[6],L[7],L[8]} == 8'b00000001) || (L[0] && (!L[3] || ({L[3],L[4],L[8]} == 3'b110))))) || (({L[2],L[3],L[8]} == 3'b110) && (({L[0],L[1],L[4],L[5],L[6],L[7]} == 6'b000110) || L[4])))) || (L[9] && ((!L[10] && ((({L[0],L[2]} == 2'b01) && ((!L[3] && (({L[4],L[8]} == 2'b00) || L[4])) || ({L[3],L[8]} == 2'b11))) || (L[0] && ((!L[3] && ((!L[1] && (!L[2] || (L[2] && (({L[4],L[8]} == 2'b00) || L[4])))) || (L[1] && (!L[2] || (L[2] && (({L[4],L[8]} == 2'b00) || L[4])))))) || (({L[3],L[8]} == 2'b11) && (({L[2],L[4]} == 2'b01) || L[2])))))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[10]} == 10'b0000000001)));
 
// action: AB <= S:
assign E_AB__S = (({L[0],L[1],L[2],L[3],L[4],L[7],L[9],L[10]} == 8'b00000001) && (!L[8] || ({L[5],L[6],L[8]} == 3'b011))) || (({L[0],L[1],L[2],L[4],L[7],L[9],L[10]} == 7'b0000010) && (!L[3] || (L[3] && (({L[5],L[8]} == 2'b00) || L[5]))));
 
// action: PC <= PC + 1:
assign E_PC__PC_1 = (!L[10] && ((!L[9] && ((!L[0] && ((!L[1] && ((!L[2] && (!L[8] || (({L[3],L[8]} == 2'b01) && ((!L[4] && (({L[5],L[6],L[7]} == 3'b100) || L[7])) || L[4])))) || L[2])) || (L[1] && ((!L[2] && ((!L[8] && (({L[3],L[4],L[7]} == 3'b001) || L[3])) || ({L[3],L[4],L[7],L[8]} == 4'b0011))) || L[2])))) || (L[0] && (!L[1] || (L[1] && ((!L[2] && (!L[3] || (L[3] && ((!L[4] && ((!L[5] && ((!L[6] && (!L[8] || ({L[7],L[8]} == 2'b01))) || L[6])) || L[5])) || L[4])))) || L[2])))))) || (({L[3],L[8],L[9]} == 3'b101) && (({L[0],L[2],L[4]} == 3'b101) || (L[2] && ((!L[0] && ((!L[1] && ((!L[4] && (!L[5] || (L[5] && (({L[6],L[7]} == 2'b00) || L[7])))) || L[4])) || L[1])) || L[0])))))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000110101);
 
// action: T <= 0:
assign E_T__0 = (!L[0] && ((!L[1] && ((!L[2] && ((!L[10] && ((({L[3],L[8],L[9]} == 3'b101) && (({L[4],L[5],L[7]} == 3'b000) || (L[4] && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))) || (L[8] && ((({L[7],L[9]} == 2'b01) && (({L[3],L[4],L[5]} == 3'b101) || ({L[3],L[4]} == 2'b01))) || (L[7] && ((!L[9] && (!L[4] || ({L[3],L[4],L[5],L[6]} == 4'b1100))) || ({L[3],L[4],L[9]} == 3'b011))))))) || (({L[3],L[4],L[7],L[10]} == 4'b0001) && (({L[5],L[6],L[8],L[9]} == 4'b0001) || (({L[8],L[9]} == 2'b10) && (({L[5],L[6]} == 2'b01) || L[5])))))) || (L[2] && ((({L[3],L[8],L[9],L[10]} == 4'b1001) && (({L[4],L[5],L[6],L[7]} == 4'b0110) || L[4])) || (({L[9],L[10]} == 2'b10) && ((!L[4] && (({L[3],L[8]} == 2'b00) || (({L[3],L[8]} == 2'b11) && (!L[5] || (L[5] && (({L[6],L[7]} == 2'b00) || L[7])))))) || ({L[3],L[4],L[8]} == 3'b011))))))) || (L[1] && ((({L[2],L[8],L[9],L[10]} == 4'b0100) && (({L[3],L[4],L[7]} == 3'b001) || L[3])) || (L[2] && ((({L[6],L[7],L[9],L[10]} == 4'b0110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))) || (L[10] && ((!L[9] && ((!L[3] && ((({L[4],L[8]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[4],L[8]} == 2'b11) && (({L[6],L[7]} == 2'b00) || L[6])))) || (L[3] && (({L[4],L[6],L[7],L[8]} == 4'b1010) || (({L[4],L[8]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (({L[3],L[4],L[8],L[9]} == 4'b1101) && (({L[6],L[7]} == 2'b00) || L[6])))))))))) || (L[0] && ((!L[9] && ((!L[2] && (({L[3],L[4],L[8],L[10]} == 4'b1101) || (L[8] && ((!L[4] && (({L[3],L[10]} == 2'b01) || ({L[3],L[10]} == 2'b10))) || ({L[3],L[4],L[10]} == 3'b011))))) || ({L[2],L[3],L[4],L[8],L[10]} == 5'b11101))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b101)))));
 
// action: N,Z <= SB:
assign E_N_Z__SB = (({L[6],L[7]} == 2'b01) && ((({L[0],L[2],L[3],L[5],L[8],L[9],L[10]} == 7'b0010100) && (({L[1],L[4]} == 2'b01) || ({L[1],L[4]} == 2'b10))) || (L[5] && ((!L[9] && ((!L[2] && (({L[0],L[1],L[3],L[4],L[8],L[10]} == 6'b101101) || (L[8] && ((!L[10] && ((!L[4] && (({L[0],L[3]} == 2'b00) || L[3])) || ({L[0],L[1],L[3],L[4]} == 4'b0111))) || ({L[0],L[3],L[10]} == 3'b101))))) || ({L[2],L[3],L[4],L[8],L[10]} == 5'b11101))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b101))))))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010110110);
 
// action: N,Z <= RES:
assign E_N_Z__RES = (!L[9] && ((({L[2],L[4],L[8],L[10]} == 4'b0010) && (({L[0],L[1],L[3],L[6],L[7]} == 5'b00011) || (L[3] && ((!L[0] && ((({L[1],L[7]} == 2'b01) && (({L[5],L[6]} == 2'b00) || L[6])) || (L[1] && (!L[7] || ({L[5],L[6],L[7]} == 3'b011))))) || (L[0] && (({L[1],L[6],L[7]} == 3'b000) || (L[6] && (({L[1],L[5]} == 2'b00) || (L[5] && (({L[1],L[7]} == 2'b00) || L[7])))))))))) || (L[10] && ((({L[0],L[1],L[2]} == 3'b011) && ((({L[3],L[4],L[8]} == 3'b010) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[3] && ((({L[4],L[8]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[4],L[8]} == 2'b11) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (({L[0],L[1]} == 2'b10) && ((({L[2],L[3],L[4],L[8]} == 4'b0001) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[4] && ((({L[2],L[3],L[8]} == 3'b001) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[3],L[8]} == 2'b10) && (({L[6],L[7]} == 2'b00) || L[6])))))))))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[1] && ((({L[0],L[4],L[6],L[7]} == 4'b0011) && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || (L[0] && ((!L[4] && ((({L[3],L[8]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[3],L[8]} == 2'b11) && (({L[6],L[7]} == 2'b00) || L[6])))) || (({L[3],L[4],L[8]} == 3'b011) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (({L[0],L[1],L[3],L[4],L[8]} == 5'b01001) && (({L[6],L[7]} == 2'b00) || L[6]))));
 
// action: N,Z <= SB,RES:
assign E_N_Z__SB_RES = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00100100010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00110100110);
 
// action: C <= RES:
assign E_C__RES = (({L[0],L[1],L[6],L[7]} == 4'b0100) && (({L[2],L[3],L[4],L[8],L[9],L[10]} == 6'b010100) || (L[2] && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110))))) || (L[6] && ((!L[9] && ((({L[2],L[4],L[8],L[10]} == 4'b0010) && (({L[0],L[1],L[3],L[7]} == 4'b0001) || (L[3] && (({L[0],L[1],L[7]} == 3'b010) || (L[0] && (({L[1],L[5],L[7]} == 3'b001) || (L[5] && (({L[1],L[7]} == 2'b00) || L[7])))))))) || (L[10] && ((({L[0],L[1],L[2],L[7]} == 4'b0110) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || (({L[0],L[1]} == 2'b10) && ((({L[2],L[3],L[4],L[8]} == 4'b0001) && (({L[5],L[7]} == 2'b01) || L[5])) || (L[4] && ((({L[2],L[3],L[8]} == 3'b001) && (({L[5],L[7]} == 2'b01) || L[5])) || (({L[3],L[8]} == 2'b10) && (({L[5],L[7]} == 2'b01) || L[5])))))))))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[1] && ((!L[4] && ((({L[0],L[5],L[7]} == 3'b110) && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || (L[7] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))))) || (({L[0],L[3],L[4],L[8]} == 4'b1011) && (({L[5],L[7]} == 2'b01) || L[5])))) || ({L[0],L[1],L[3],L[4],L[7],L[8]} == 6'b010001)))));
 
// action: V <= RES:
assign E_V__RES = (({L[0],L[5],L[6],L[9]} == 4'b1110) && ((!L[2] && (({L[1],L[3],L[4],L[8],L[10]} == 5'b01101) || (L[8] && ((!L[4] && (({L[1],L[3],L[10]} == 3'b001) || (({L[3],L[10]} == 2'b10) && (({L[1],L[7]} == 2'b00) || L[7])))) || ({L[1],L[3],L[4],L[10]} == 4'b0011))))) || ({L[1],L[2],L[3],L[4],L[8],L[10]} == 6'b011101))) || (({L[0],L[1],L[2],L[5],L[6],L[9],L[10]} == 7'b1011110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011)));
 
// action: V <= SB[6]:
assign E_V__SB_6_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00100100010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00110100110);
 
// action: ALU_CF = 0:
assign A_ALU_CF_0 = (!L[10] && ((({L[2],L[3],L[8],L[9]} == 4'b0001) && (({L[0],L[1],L[4],L[6],L[7]} == 5'b00000) || (L[4] && (({L[0],L[1]} == 2'b00) || L[0])))) || (L[8] && ((!L[9] && ((!L[2] && ((({L[0],L[4],L[5]} == 3'b000) && (({L[1],L[3],L[6],L[7]} == 4'b0000) || (L[3] && (({L[1],L[6]} == 2'b00) || (L[6] && (({L[1],L[7]} == 2'b00) || ({L[1],L[7]} == 2'b11))))))) || (L[0] && (({L[3],L[4]} == 2'b00) || ({L[3],L[4]} == 2'b11))))) || ({L[2],L[4]} == 2'b11))) || (({L[0],L[3],L[9]} == 3'b001) && ((({L[1],L[2]} == 2'b00) && (({L[4],L[6],L[7]} == 3'b000) || L[4])) || ({L[1],L[2],L[4],L[5],L[6],L[7]} == 6'b110011))))))) || (({L[0],L[1],L[2],L[5],L[6],L[7],L[9],L[10]} == 8'b01101101) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11)))));
 
// action: ALU_DF = 0:
assign A_ALU_DF_0 = (!L[9] && ((({L[8],L[10]} == 2'b01) && (({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7]} == 8'b00000000) || (L[6] && (({L[0],L[1],L[2],L[3],L[4],L[5],L[7]} == 7'b0000000) || (L[7] && (({L[0],L[1],L[2],L[3],L[4],L[5]} == 6'b100110) || (L[2] && (({L[0],L[1],L[3],L[4],L[5]} == 5'b10110) || (({L[0],L[1]} == 2'b01) && (({L[3],L[4]} == 2'b01) || ({L[3],L[4]} == 2'b10))))))))))) || (L[8] && ((!L[10] && ((!L[2] && ((({L[0],L[4]} == 2'b00) && ((({L[1],L[3]} == 2'b00) && (({L[5],L[6],L[7]} == 3'b000) || L[6])) || (L[3] && ((!L[5] && (({L[1],L[6]} == 2'b00) || (L[6] && (({L[1],L[7]} == 2'b00) || L[7])))) || (({L[1],L[5]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (L[0] && ((!L[1] && (!L[3] || (L[3] && (({L[4],L[5],L[6],L[7]} == 4'b0011) || L[4])))) || (L[1] && (({L[3],L[4]} == 2'b00) || L[4])))))) || ({L[2],L[4]} == 2'b11))) || (({L[6],L[7],L[10]} == 3'b111) && (({L[0],L[1],L[2],L[3],L[4],L[5]} == 6'b100000) || (L[4] && (({L[0],L[1],L[2],L[3],L[5]} == 5'b10000) || ({L[0],L[1],L[2],L[3]} == 4'b0111))))))))) || (({L[9],L[10]} == 2'b10) && ((!L[0] && ((({L[1],L[2],L[3]} == 3'b000) && ((({L[4],L[7]} == 2'b00) && (!L[5] || (L[5] && (!L[8] || ({L[6],L[8]} == 2'b01))))) || L[4])) || (L[2] && ((({L[3],L[4],L[6],L[7]} == 4'b0011) && (({L[1],L[8]} == 2'b00) || ({L[1],L[8]} == 2'b11))) || (L[3] && ((!L[8] && (({L[1],L[4],L[5],L[6],L[7]} == 5'b00110) || L[4])) || ({L[1],L[4],L[6],L[7],L[8]} == 5'b00111))))))) || (L[0] && ((!L[1] && ((!L[2] && (({L[3],L[4],L[8]} == 3'b000) || (L[4] && (!L[8] || ({L[3],L[8]} == 2'b01))))) || (L[2] && ((({L[3],L[5],L[6],L[7]} == 4'b0011) && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || (L[3] && (({L[4],L[5],L[6],L[7],L[8]} == 5'b00111) || ({L[4],L[8]} == 2'b10))))))) || (L[1] && (({L[2],L[3],L[4],L[8]} == 4'b0000) || (L[4] && ((!L[8] && (({L[2],L[3]} == 2'b00) || L[3])) || ({L[2],L[3],L[8]} == 3'b001)))))))));
 
// action: ALU_OP = ADC:
assign A_ALU_OP_ADC = (!L[9] && ((({L[8],L[10]} == 2'b01) && (({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7]} == 8'b00000000) || (L[6] && ((!L[1] && (({L[0],L[2],L[3],L[4],L[5],L[7]} == 6'b000000) || (({L[0],L[3],L[4]} == 3'b111) && (({L[5],L[7]} == 2'b01) || L[5])))) || (({L[0],L[1],L[2],L[7]} == 4'b0111) && (({L[3],L[4]} == 2'b01) || ({L[3],L[4]} == 2'b10))))))) || (L[8] && ((!L[2] && ((!L[10] && ((({L[0],L[4]} == 2'b00) && ((({L[1],L[3]} == 2'b00) && (({L[5],L[6],L[7]} == 3'b000) || L[6])) || (L[3] && ((!L[5] && (({L[1],L[6]} == 2'b00) || (L[6] && (({L[1],L[7]} == 2'b00) || L[7])))) || (({L[1],L[5]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (L[0] && ((!L[1] && (!L[3] || (L[3] && ((({L[4],L[6]} == 2'b01) && (({L[5],L[7]} == 2'b01) || L[5])) || L[4])))) || (L[1] && (!L[3] || (L[3] && (({L[4],L[5],L[6],L[7]} == 4'b0111) || L[4])))))))) || (({L[0],L[1],L[3],L[6],L[10]} == 5'b10011) && (({L[5],L[7]} == 2'b01) || L[5])))) || (({L[2],L[4]} == 2'b11) && (!L[10] || ({L[0],L[1],L[3],L[6],L[7],L[10]} == 6'b011111))))))) || (({L[9],L[10]} == 2'b10) && ((!L[0] && ((({L[1],L[2],L[3]} == 3'b000) && ((({L[4],L[7]} == 2'b00) && (!L[5] || (L[5] && (!L[8] || ({L[6],L[8]} == 2'b01))))) || L[4])) || (L[2] && ((({L[3],L[4],L[6],L[7]} == 4'b0011) && (({L[1],L[8]} == 2'b00) || ({L[1],L[8]} == 2'b11))) || (L[3] && ((!L[8] && (({L[1],L[4],L[5],L[6],L[7]} == 5'b00110) || L[4])) || ({L[1],L[4],L[6],L[7],L[8]} == 5'b00111))))))) || (L[0] && ((!L[1] && ((!L[2] && (({L[3],L[4],L[8]} == 3'b000) || (L[4] && (!L[8] || ({L[3],L[8]} == 2'b01))))) || (L[2] && (({L[3],L[4],L[6],L[8]} == 4'b1100) || (L[6] && ((!L[3] && ((({L[4],L[8]} == 2'b00) && (({L[5],L[7]} == 2'b01) || L[5])) || (({L[4],L[8]} == 2'b11) && (({L[5],L[7]} == 2'b01) || L[5])))) || (L[3] && ((({L[4],L[8]} == 2'b01) && (({L[5],L[7]} == 2'b01) || L[5])) || ({L[4],L[8]} == 2'b10))))))))) || (L[1] && (({L[2],L[3],L[4],L[8]} == 4'b0000) || (L[4] && ((!L[8] && (({L[2],L[3]} == 2'b00) || L[3])) || ({L[2],L[3],L[8]} == 3'b001)))))))));
 
// action: SB = 0:
assign A_SB_0 = (!L[10] && ((({L[2],L[8],L[9]} == 3'b010) && ((!L[3] && ((({L[0],L[1],L[4],L[7]} == 4'b0000) && (({L[5],L[6]} == 2'b00) || L[6])) || ({L[0],L[4]} == 2'b11))) || (({L[0],L[3],L[4]} == 3'b010) && ((!L[5] && (({L[1],L[6]} == 2'b00) || (L[6] && (({L[1],L[7]} == 2'b00) || L[7])))) || (({L[1],L[5]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (L[9] && ((!L[0] && (({L[1],L[2],L[3],L[4],L[7]} == 5'b00000) || (L[2] && ((({L[1],L[3]} == 2'b01) && ((!L[8] && (({L[4],L[5],L[6],L[7]} == 4'b0110) || L[4])) || ({L[4],L[5],L[6],L[7],L[8]} == 5'b01101))) || (L[1] && ((!L[3] && ((({L[6],L[7]} == 2'b00) && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || (L[6] && (({L[4],L[8]} == 2'b00) || (L[8] && (({L[4],L[7]} == 2'b01) || L[4])))))) || (L[3] && ((({L[4],L[8]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])) || ({L[4],L[8]} == 2'b10))))))))) || (L[0] && ((!L[2] && ((!L[3] && (!L[4] || ({L[4],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b110))) || ({L[2],L[3],L[4],L[8]} == 4'b1110))))))) || (({L[0],L[10]} == 2'b01) && ((!L[9] && ((({L[1],L[2],L[3],L[4],L[7]} == 5'b00000) && (!L[5] || (L[5] && (({L[6],L[8]} == 2'b01) || ({L[6],L[8]} == 2'b10))))) || (L[2] && (({L[1],L[3],L[4],L[5],L[6],L[7],L[8]} == 7'b0101100) || (L[1] && (({L[3],L[4],L[6],L[7],L[8]} == 5'b01110) || (L[3] && (({L[4],L[6],L[7],L[8]} == 4'b0110) || (L[4] && (({L[6],L[7],L[8]} == 3'b000) || (L[6] && (({L[7],L[8]} == 2'b00) || L[7])))))))))))) || ({L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9]} == 9'b000000001)));
 
// action: ALU_B = SB:
assign A_ALU_B_SB = (!L[0] && ((({L[1],L[2]} == 2'b00) && ((!L[4] && ((!L[7] && ((({L[3],L[5]} == 2'b00) && ((({L[6],L[10]} == 2'b01) && (!L[9] || ({L[8],L[9]} == 2'b01))) || (L[6] && ((!L[9] && (({L[8],L[10]} == 2'b01) || L[8])) || ({L[9],L[10]} == 2'b10))))) || (L[5] && ((!L[9] && (({L[3],L[6],L[8],L[10]} == 4'b0101) || (L[8] && ((!L[10] && (({L[3],L[6]} == 2'b01) || L[3])) || ({L[3],L[6],L[10]} == 3'b001))))) || ({L[3],L[6],L[9],L[10]} == 4'b0110))))) || ({L[3],L[6],L[7],L[8],L[9],L[10]} == 6'b111100))) || ({L[3],L[4],L[9],L[10]} == 4'b0110))) || (L[2] && ((!L[9] && ((({L[3],L[4],L[5],L[6],L[8],L[10]} == 6'b101101) && (({L[1],L[7]} == 2'b00) || ({L[1],L[7]} == 2'b11))) || (L[4] && (({L[1],L[8],L[10]} == 3'b010) || (L[1] && ((({L[8],L[10]} == 2'b01) && (({L[3],L[5],L[6],L[7]} == 4'b0111) || (L[3] && (({L[6],L[7]} == 2'b00) || L[6])))) || (L[8] && (!L[10] || ({L[3],L[5],L[6],L[7],L[10]} == 5'b11111))))))))) || (({L[9],L[10]} == 2'b10) && ((!L[1] && (({L[3],L[4],L[5],L[6],L[7],L[8]} == 6'b001000) || (L[3] && ((!L[8] && (({L[4],L[5],L[6],L[7]} == 4'b0110) || L[4])) || ({L[4],L[5],L[7],L[8]} == 4'b0101))))) || (L[1] && ((!L[3] && ((({L[6],L[7]} == 2'b00) && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || (L[6] && (({L[4],L[8]} == 2'b00) || (L[8] && (({L[4],L[5],L[7]} == 3'b011) || L[4])))))) || (L[3] && ((({L[4],L[8]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])) || ({L[4],L[8]} == 2'b10))))))))))) || (L[0] && ((!L[10] && ((({L[8],L[9]} == 2'b01) && ((!L[3] && (!L[2] || ({L[1],L[2],L[4],L[7]} == 4'b0100))) || ({L[3],L[4]} == 2'b11))) || (L[8] && ((!L[1] && ((!L[2] && ((!L[9] && (!L[3] || (L[3] && (({L[4],L[7]} == 2'b00) || L[4])))) || ({L[3],L[9]} == 2'b01))) || (L[2] && (({L[3],L[4],L[7],L[9]} == 4'b1001) || (L[4] && (!L[9] || ({L[3],L[7],L[9]} == 3'b001))))))) || (L[1] && ((!L[3] && (({L[2],L[4]} == 2'b00) || (L[4] && (!L[9] || ({L[2],L[9]} == 2'b01))))) || ({L[3],L[4],L[9]} == 3'b110))))))) || (({L[1],L[7],L[9],L[10]} == 4'b0001) && (({L[2],L[3],L[4],L[8]} == 4'b0001) || (L[4] && (({L[2],L[3],L[8]} == 3'b001) || ({L[3],L[8]} == 2'b10)))))));
 
// action: ALU_CF = 1:
assign A_ALU_CF_1 = (!L[2] && ((!L[1] && ((!L[9] && ((!L[5] && ((!L[3] && (({L[0],L[4],L[7],L[8],L[10]} == 5'b00001) || (L[8] && (({L[0],L[4],L[6],L[10]} == 4'b0010) || (L[0] && (({L[4],L[6],L[7],L[10]} == 4'b0111) || (L[4] && (!L[10] || ({L[6],L[7],L[10]} == 3'b111))))))))) || (({L[3],L[6],L[7]} == 3'b111) && (({L[0],L[4],L[8],L[10]} == 4'b0010) || (L[0] && (({L[4],L[8],L[10]} == 3'b010) || ({L[4],L[8],L[10]} == 3'b101))))))) || (({L[5],L[8],L[10]} == 3'b110) && ((!L[3] && (({L[0],L[4],L[6]} == 3'b001) || ({L[0],L[4]} == 2'b11))) || (({L[0],L[3],L[4]} == 3'b010) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (({L[3],L[4],L[9],L[10]} == 4'b0010) && ((!L[8] && (({L[0],L[6],L[7]} == 3'b010) || L[0])) || ({L[0],L[5],L[6],L[7],L[8]} == 5'b00101))))) || (({L[0],L[1],L[3],L[10]} == 4'b1100) && (({L[4],L[8],L[9]} == 3'b001) || ({L[4],L[8],L[9]} == 3'b110))))) || (({L[2],L[6]} == 2'b11) && (({L[0],L[1],L[3],L[4],L[5],L[7],L[8],L[9],L[10]} == 9'b001010010) || (L[7] && ((!L[1] && (({L[0],L[3],L[4],L[5],L[8],L[9],L[10]} == 7'b1110001) || (({L[9],L[10]} == 2'b10) && ((!L[4] && ((({L[3],L[8]} == 2'b00) && (!L[5] || ({L[0],L[5]} == 2'b01))) || (({L[3],L[8]} == 2'b11) && (!L[5] || ({L[0],L[5]} == 2'b01))))) || ({L[0],L[3],L[4],L[5],L[8]} == 5'b10101))))) || (({L[0],L[1],L[5]} == 3'b011) && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110)))))));
 
// action: ALU_CF = ALUC:
assign A_ALU_CF_ALUC = ({L[0],L[2],L[3],L[4],L[8],L[9],L[10]} == 7'b0111010) || (({L[0],L[4],L[9],L[10]} == 4'b1110) && ((!L[2] && (({L[3],L[8]} == 2'b01) || ({L[3],L[8]} == 2'b10))) || ({L[2],L[3],L[8]} == 3'b110)));
 
// action: ALU_B = NOT SB:
assign A_ALU_B_NOTSB = (({L[0],L[1],L[2],L[4],L[6],L[10]} == 6'b000000) && ((!L[7] && ((!L[5] && (({L[3],L[8],L[9]} == 3'b001) || (L[8] && (!L[9] || ({L[3],L[9]} == 2'b01))))) || ({L[3],L[5],L[9]} == 3'b011))) || ({L[3],L[5],L[7],L[8],L[9]} == 5'b10110))) || (L[6] && (({L[0],L[1],L[2],L[3],L[4],L[5],L[7],L[8],L[9],L[10]} == 10'b0001000100) || (L[7] && ((!L[9] && ((({L[2],L[4],L[8],L[10]} == 4'b0010) && (({L[0],L[1],L[3]} == 3'b000) || (L[3] && (({L[0],L[1],L[5]} == 3'b010) || (L[0] && (({L[1],L[5]} == 2'b00) || L[5])))))) || (L[10] && ((({L[0],L[1],L[2],L[5]} == 4'b0110) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || (({L[0],L[1]} == 2'b10) && (({L[2],L[3],L[4],L[8]} == 4'b0001) || (L[4] && (({L[2],L[3],L[8]} == 3'b001) || ({L[3],L[8]} == 2'b10))))))))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[1] && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[0],L[3],L[4],L[8]} == 4'b1011))) || ({L[0],L[1],L[3],L[4],L[5],L[8]} == 6'b010001)))))));
 
// action: ALU_OP = ORA:
assign A_ALU_OP_ORA = (!L[0] && ((({L[1],L[2],L[3],L[4],L[7]} == 5'b00000) && (({L[5],L[6],L[8],L[9],L[10]} == 5'b11110) || (L[10] && ((!L[9] && (({L[5],L[6],L[8]} == 3'b110) || (L[8] && (!L[6] || ({L[5],L[6]} == 2'b01))))) || ({L[5],L[6],L[8],L[9]} == 4'b0001))))) || (L[2] && ((({L[1],L[3],L[4],L[5],L[6],L[7]} == 6'b010110) && (({L[8],L[9],L[10]} == 3'b001) || ({L[8],L[9],L[10]} == 3'b110))) || (L[1] && ((({L[3],L[4],L[8],L[9],L[10]} == 5'b11001) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[9],L[10]} == 2'b10) && ((!L[4] && ((({L[3],L[8]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[3],L[8]} == 2'b11) && (({L[6],L[7]} == 2'b00) || L[6])))) || (({L[3],L[4],L[8]} == 3'b011) && (({L[6],L[7]} == 2'b00) || L[6])))))))))) || (L[0] && ((!L[5] && ((!L[6] && ((!L[7] && ((!L[10] && ((!L[4] && (({L[1],L[2],L[3],L[8],L[9]} == 5'b01001) || (L[8] && ((!L[2] && (({L[1],L[3],L[9]} == 3'b010) || ({L[3],L[9]} == 2'b01))) || ({L[1],L[2],L[3],L[9]} == 4'b0111))))) || ({L[1],L[2],L[3],L[4],L[8],L[9]} == 6'b010111))) || (({L[1],L[9],L[10]} == 3'b001) && (({L[2],L[3],L[4],L[8]} == 4'b0001) || (L[4] && (({L[2],L[3],L[8]} == 3'b001) || ({L[3],L[8]} == 2'b10))))))) || ({L[2],L[3],L[4],L[7],L[8],L[9],L[10]} == 7'b0001110))) || ({L[2],L[3],L[4],L[6],L[8],L[9],L[10]} == 7'b0001110))) || ({L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 7'b0001110)));
 
// action: ALU_A = DB:
assign A_ALU_A_DB = (!L[10] && ((({L[8],L[9]} == 2'b01) && ((({L[0],L[1],L[2],L[3],L[4]} == 5'b01100) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[4] && (({L[0],L[2],L[3]} == 3'b011) || (L[0] && (!L[2] || ({L[2],L[3]} == 2'b11))))))) || (L[8] && ((!L[0] && (({L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[9]} == 8'b00001101) || (L[2] && ((({L[3],L[4],L[9]} == 3'b101) && (({L[1],L[5],L[6],L[7]} == 4'b0110) || (L[1] && (({L[6],L[7]} == 2'b00) || L[6])))) || (L[4] && (!L[9] || (({L[1],L[3],L[9]} == 3'b101) && (({L[6],L[7]} == 2'b00) || L[6])))))))) || (L[0] && ((!L[2] && (!L[3] || ({L[3],L[4],L[9]} == 3'b110))) || ({L[2],L[4],L[9]} == 3'b110))))))) || (({L[0],L[10]} == 2'b01) && ((!L[9] && ((!L[7] && ((({L[1],L[4]} == 2'b00) && ((({L[2],L[3]} == 2'b00) && (({L[5],L[6],L[8]} == 3'b110) || (L[8] && (!L[6] || ({L[5],L[6]} == 2'b01))))) || ({L[2],L[3],L[5],L[6],L[8]} == 5'b11110))) || ({L[1],L[2],L[3],L[4],L[8]} == 5'b11110))) || ({L[1],L[2],L[3],L[4],L[6],L[7],L[8]} == 7'b1111110))) || ({L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9]} == 9'b000000001)));
 
// action: SB = X:
assign A_SB_X = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01100001010) || (({L[8],L[10]} == 2'b10) && ((!L[9] && ((!L[2] && ((!L[4] && (({L[0],L[1],L[3],L[5],L[6],L[7]} == 6'b011001) || ({L[0],L[3]} == 2'b10))) || ({L[0],L[1],L[3],L[4],L[5],L[6],L[7]} == 7'b0111001))) || (({L[2],L[4]} == 2'b11) && ((!L[0] && (!L[1] || (L[1] && (({L[6],L[7]} == 2'b00) || L[6])))) || (L[0] && (!L[1] || (L[1] && (({L[6],L[7]} == 2'b00) || L[6])))))))) || (({L[0],L[1],L[2],L[5],L[6],L[7],L[9]} == 7'b0110011) && (({L[3],L[4]} == 2'b01) || ({L[3],L[4]} == 2'b10)))));
 
// action: ALU_A = EAL:
assign A_ALU_A_EAL = (({L[0],L[1],L[2],L[3],L[8]} == 5'b00000) && (({L[4],L[5],L[6],L[7],L[9],L[10]} == 6'b000001) || ({L[4],L[9],L[10]} == 3'b110))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00110110010);
 
// action: SB = PCL:
assign A_SB_PCL = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000100001) || ({L[0],L[1],L[2],L[3],L[4],L[8],L[9],L[10]} == 8'b00001010);
 
// action: SB = Y:
assign A_SB_Y = (({L[0],L[1],L[2],L[4],L[5],L[6],L[7],L[9],L[10]} == 9'b001000110) && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || (({L[4],L[10]} == 2'b10) && (({L[0],L[2],L[3],L[8],L[9]} == 5'b10001) || (L[8] && ((!L[9] && (({L[1],L[2],L[3],L[6],L[7]} == 5'b11001) || (L[3] && ((!L[2] && (({L[0],L[1],L[5],L[6],L[7]} == 5'b00001) || L[0])) || ({L[1],L[2],L[6],L[7]} == 4'b1101))))) || ({L[0],L[1],L[2],L[3],L[5],L[6],L[7],L[9]} == 8'b00100011)))));
 
// action: ALU_A = ALU:
assign A_ALU_A_ALU = (!L[3] && ((!L[4] && (({L[0],L[1],L[2],L[5],L[6],L[7],L[8],L[9],L[10]} == 9'b000010001) || (({L[9],L[10]} == 2'b10) && ((!L[2] && ((!L[8] && ((({L[0],L[1],L[7]} == 3'b000) && (({L[5],L[6]} == 2'b00) || L[6])) || L[0])) || (({L[0],L[1],L[7],L[8]} == 4'b0001) && (!L[6] || ({L[5],L[6]} == 2'b01))))) || (({L[0],L[1],L[2],L[8]} == 4'b0111) && (({L[6],L[7]} == 2'b00) || L[6])))))) || (({L[0],L[1],L[2],L[4],L[8],L[9],L[10]} == 7'b0111001) && (({L[6],L[7]} == 2'b00) || L[6])))) || (({L[0],L[1],L[2],L[3],L[9],L[10]} == 6'b011101) && ((({L[4],L[8]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[4],L[8]} == 2'b11) && (({L[6],L[7]} == 2'b00) || L[6]))));
 
// action: ALU_A = S:
assign A_ALU_A_S = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000100010) || (({L[0],L[1],L[2],L[4],L[7],L[8],L[9],L[10]} == 8'b00000100) && ((!L[3] && (({L[5],L[6]} == 2'b00) || L[6])) || L[3]));
 
// action: CF <= IR[5]:
assign E_CF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011000010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011100010);
 
// action: IF <= IR[5]:
assign E_IF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011010010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011110010);
 
// action: DF <= IR[5]:
assign E_DF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011011010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011111010);
 
// action: VF <= 0:
assign E_VF__0 = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00011101010);
 
// action: T <= 0 IF NF != IR[5]:
assign E_T__0IFNF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001000100) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001100100);
 
// action: T <= 0 IF VF != IR[5]:
assign E_T__0IFVF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001010100) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001110100);
 
// action: T <= 0 IF CF != IR[5]:
assign E_T__0IFCF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001001100) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001101100);
 
// action: T <= 0 IF ZF == IR[5]:
assign E_T__0IFZF__IR_5_ = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001011100) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00001111100);
 
// action: EA <= DB:
assign E_EA__DB = ({L[0],L[2],L[3],L[8],L[9],L[10]} == 6'b010100) || ({L[0],L[3],L[8],L[9],L[10]} == 5'b10100);
 
// action: EAL <= DB:
assign E_EAL__DB = (({L[0],L[1],L[2],L[3],L[8],L[9],L[10]} == 7'b0000100) && (({L[4],L[5],L[6],L[7]} == 4'b0100) || L[4])) || (({L[3],L[8],L[9],L[10]} == 4'b1100) && (({L[0],L[2],L[4]} == 3'b101) || L[2]));
 
// action: PCL <= RES:
assign E_PCL__RES = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000110110) || ({L[0],L[1],L[2],L[3],L[4],L[8],L[9],L[10]} == 8'b00001010);
 
// action: T <= 0 IF_C7F:
assign E_T__0IF_C7F = ({L[0],L[1],L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 9'b000010010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 9'b000011010);
 
// action: ALU_A = SIGN:
assign A_ALU_A_SIGN = ({L[0],L[1],L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 9'b000010110) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 9'b000011110);
 
// action: SB = PCH:
assign A_SB_PCH = ({L[0],L[1],L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 9'b000010110) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[8],L[9],L[10]} == 9'b000011110);
 
// action: PCH <= RES:
assign E_PCH__RES = (({L[0],L[1],L[2],L[3]} == 4'b0000) && ((!L[7] && (({L[4],L[8],L[9],L[10]} == 4'b1110) || (({L[4],L[10]} == 2'b01) && ((!L[9] && (({L[5],L[6],L[8]} == 3'b011) || (L[5] && (({L[6],L[8]} == 2'b01) || ({L[6],L[8]} == 2'b10))))) || ({L[5],L[6],L[8],L[9]} == 4'b0001))))) || ({L[4],L[7],L[8],L[9],L[10]} == 5'b11110))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00110110001);
 
// action: EAH <= DB:
assign E_EAH__DB = (!L[8] && (({L[0],L[2],L[3],L[4],L[9],L[10]} == 6'b100001) || (({L[3],L[9],L[10]} == 3'b110) && (({L[0],L[2],L[4]} == 3'b101) || L[2])))) || ({L[0],L[2],L[3],L[4],L[8],L[9],L[10]} == 7'b1001110);
 
// action: EAL <= ALU:
assign E_EAL__ALU = (({L[2],L[3],L[4],L[9],L[10]} == 5'b00001) && (({L[0],L[1],L[5],L[6],L[7],L[8]} == 6'b000001) || ({L[0],L[8]} == 2'b10))) || (({L[9],L[10]} == 2'b10) && ((({L[0],L[2]} == 2'b01) && (({L[1],L[3],L[4],L[5],L[6],L[7],L[8]} == 7'b0101101) || ({L[4],L[8]} == 2'b10))) || (L[0] && ((!L[2] && (!L[3] || ({L[3],L[4],L[8]} == 3'b110))) || ({L[2],L[4],L[8]} == 3'b110)))));
 
// action: T <= T + 1 IF_ALUCZ:
assign E_T__T_1IF_ALUCZ = (({L[0],L[2],L[3],L[4],L[8],L[9],L[10]} == 7'b0111010) && ((({L[1],L[5]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[5] && ((!L[6] && (({L[1],L[7]} == 2'b00) || L[7])) || ({L[1],L[6]} == 2'b01))))) || (({L[0],L[4],L[9],L[10]} == 4'b1110) && ((!L[2] && ((({L[3],L[8]} == 2'b01) && (({L[1],L[7]} == 2'b00) || (L[7] && (({L[5],L[6]} == 2'b01) || L[5])))) || (({L[3],L[8]} == 2'b10) && (({L[1],L[7]} == 2'b00) || (L[7] && (({L[5],L[6]} == 2'b01) || L[5])))))) || (({L[2],L[3],L[8]} == 3'b110) && ((({L[1],L[5]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[5] && (({L[1],L[7]} == 2'b00) || L[7]))))));
 
// action: EAH <= ALU:
assign E_EAH__ALU = ({L[0],L[2],L[3],L[4],L[8],L[9],L[10]} == 7'b0111110) || (({L[0],L[4]} == 2'b11) && ((!L[2] && (({L[3],L[8],L[9],L[10]} == 4'b0001) || ({L[3],L[8],L[9],L[10]} == 4'b1110))) || ({L[2],L[3],L[8],L[9],L[10]} == 5'b11110)));
 
// action: PCL <= ALU:
assign E_PCL__ALU = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000000011) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00110110001);
 
// action: SB = DB:
assign A_SB_DB = (!L[1] && ((!L[9] && ((!L[2] && ((({L[0],L[3],L[4],L[7],L[8],L[10]} == 6'b000110) && (({L[5],L[6]} == 2'b01) || L[5])) || (L[0] && ((({L[3],L[4],L[8],L[10]} == 4'b1101) && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])) || (L[8] && ((!L[4] && ((({L[3],L[10]} == 2'b01) && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])) || (({L[3],L[10]} == 2'b10) && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))) || (({L[3],L[4],L[10]} == 3'b011) && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))))))) || (({L[2],L[3],L[4],L[8],L[10]} == 5'b11101) && (({L[0],L[5],L[6],L[7]} == 4'b0101) || (L[0] && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))))) || (({L[9],L[10]} == 2'b10) && (({L[0],L[2],L[3],L[4],L[5],L[7],L[8]} == 7'b0010101) || (L[2] && ((!L[3] && ((({L[4],L[8]} == 2'b00) && ((!L[0] && (({L[5],L[6],L[7]} == 3'b011) || (L[5] && (({L[6],L[7]} == 2'b00) || L[7])))) || (L[0] && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))) || (({L[4],L[8]} == 2'b11) && (({L[0],L[5],L[6],L[7]} == 4'b0101) || (L[0] && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))))) || (({L[3],L[4],L[8]} == 3'b101) && ((!L[0] && (({L[5],L[6],L[7]} == 3'b011) || (L[5] && (({L[6],L[7]} == 2'b00) || L[7])))) || (L[0] && ((!L[5] && (({L[6],L[7]} == 2'b00) || L[6])) || L[5])))))))))) || (({L[1],L[5],L[7]} == 3'b111) && ((!L[6] && ((({L[2],L[8],L[9]} == 3'b010) && (({L[0],L[3],L[4],L[10]} == 4'b0000) || (L[0] && ((!L[4] && (({L[3],L[10]} == 2'b01) || ({L[3],L[10]} == 2'b10))) || ({L[3],L[4],L[10]} == 3'b011))))) || (L[2] && (({L[3],L[4],L[8],L[9],L[10]} == 5'b11001) || (({L[9],L[10]} == 2'b10) && ((!L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b101))))))) || ({L[0],L[2],L[3],L[4],L[6],L[8],L[9],L[10]} == 8'b10101100)));
 
// action: AC <= SB:
assign E_AC__SB = (({L[6],L[7]} == 2'b01) && ((({L[0],L[2],L[3],L[5],L[8],L[9],L[10]} == 7'b0010100) && (({L[1],L[4]} == 2'b01) || ({L[1],L[4]} == 2'b10))) || (({L[0],L[5]} == 2'b11) && ((!L[9] && ((!L[2] && (({L[1],L[3],L[4],L[8],L[10]} == 5'b01101) || (L[8] && ((!L[4] && (({L[3],L[10]} == 2'b01) || ({L[3],L[10]} == 2'b10))) || ({L[3],L[4],L[10]} == 3'b011))))) || ({L[2],L[3],L[4],L[8],L[10]} == 5'b11101))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b101))))))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010110110);
 
// action: ALU_A = AC:
assign A_ALU_A_AC = (!L[1] && ((({L[0],L[2],L[4],L[5],L[6],L[7],L[9],L[10]} == 8'b01010010) && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || (L[0] && ((!L[9] && ((({L[2],L[3],L[4],L[8],L[10]} == 5'b01010) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[10] && ((({L[2],L[3],L[4],L[8]} == 4'b0001) && (({L[6],L[7]} == 2'b00) || L[6])) || (L[4] && ((({L[2],L[3],L[8]} == 3'b001) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[3],L[8]} == 2'b10) && (({L[6],L[7]} == 2'b00) || L[6])))))))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[4] && ((({L[3],L[8]} == 2'b00) && (({L[6],L[7]} == 2'b00) || L[6])) || (({L[3],L[8]} == 2'b11) && (({L[6],L[7]} == 2'b00) || L[6])))) || (({L[3],L[4],L[8]} == 3'b011) && (({L[6],L[7]} == 2'b00) || L[6])))))))) || (({L[1],L[2],L[3],L[4],L[8],L[9],L[10]} == 7'b1010100) && (({L[0],L[7]} == 2'b00) || ({L[0],L[5],L[6],L[7]} == 4'b1111)));
 
// action: AC <= RES:
assign E_AC__RES = ({L[0],L[1],L[2],L[3],L[4],L[7],L[8],L[9],L[10]} == 9'b010100100) || (L[0] && ((!L[9] && ((!L[2] && ((({L[1],L[3],L[4],L[8],L[10]} == 5'b01101) && (!L[7] || ({L[5],L[6],L[7]} == 3'b111))) || (L[8] && ((!L[4] && ((({L[1],L[3],L[10]} == 3'b001) && (!L[7] || ({L[5],L[6],L[7]} == 3'b111))) || (({L[3],L[10]} == 2'b10) && (({L[1],L[5],L[7]} == 3'b000) || (L[5] && (({L[1],L[6],L[7]} == 3'b000) || (L[6] && (({L[1],L[7]} == 2'b00) || L[7])))))))) || (({L[1],L[3],L[4],L[10]} == 4'b0011) && (!L[7] || ({L[5],L[6],L[7]} == 3'b111))))))) || (({L[1],L[2],L[3],L[4],L[8],L[10]} == 6'b011101) && (!L[7] || ({L[5],L[6],L[7]} == 3'b111))))) || (({L[1],L[2],L[9],L[10]} == 4'b0110) && ((!L[4] && ((!L[7] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || (({L[5],L[6],L[7]} == 3'b111) && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))))) || (({L[3],L[4],L[8]} == 3'b011) && (!L[7] || ({L[5],L[6],L[7]} == 3'b111)))))));
 
// action: ALU_OP = AND:
assign A_ALU_OP_AND = (({L[0],L[1],L[2],L[4],L[5],L[6],L[7],L[9],L[10]} == 9'b001010010) && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || (({L[0],L[1],L[5],L[6],L[7]} == 5'b10100) && ((!L[9] && (({L[2],L[3],L[4],L[8],L[10]} == 5'b01010) || (L[10] && (({L[2],L[3],L[4],L[8]} == 4'b0001) || (L[4] && (({L[2],L[3],L[8]} == 3'b001) || ({L[3],L[8]} == 2'b10))))))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011)))));
 
// action: ALU_OP = EOR:
assign A_ALU_OP_EOR = (({L[0],L[1],L[5],L[6],L[7],L[9]} == 6'b100100) && (({L[2],L[3],L[4],L[8],L[10]} == 5'b01010) || (L[10] && (({L[2],L[3],L[4],L[8]} == 4'b0001) || (L[4] && (({L[2],L[3],L[8]} == 3'b001) || ({L[3],L[8]} == 2'b10))))))) || (({L[0],L[1],L[2],L[5],L[6],L[7],L[9],L[10]} == 8'b10101010) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011)));
 
// action: ALU_A = X:
assign A_ALU_A_X = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010011100) || (({L[0],L[1],L[4],L[5],L[6],L[7],L[10]} == 7'b0001110) && (({L[2],L[3],L[8],L[9]} == 4'b1001) || (L[8] && (({L[2],L[3],L[9]} == 3'b000) || (L[3] && (({L[2],L[9]} == 2'b00) || ({L[2],L[9]} == 2'b11)))))));
 
// action: ALU_A = Y:
assign A_ALU_A_Y = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010001100) || (({L[0],L[1],L[4],L[5],L[6],L[7],L[10]} == 7'b0000110) && (({L[2],L[3],L[8],L[9]} == 4'b1001) || (L[8] && (({L[2],L[3],L[9]} == 3'b000) || (L[3] && (({L[2],L[9]} == 2'b00) || ({L[2],L[9]} == 2'b11)))))));
 
// action: ALU_DF = D:
assign A_ALU_DF_D = (({L[0],L[5],L[6],L[9]} == 4'b1110) && ((!L[2] && (({L[1],L[3],L[4],L[8],L[10]} == 5'b01101) || (L[8] && ((!L[4] && (({L[1],L[3],L[10]} == 3'b001) || (({L[3],L[10]} == 2'b10) && (({L[1],L[7]} == 2'b00) || L[7])))) || ({L[1],L[3],L[4],L[10]} == 4'b0011))))) || ({L[1],L[2],L[3],L[4],L[8],L[10]} == 6'b011101))) || (({L[0],L[1],L[2],L[5],L[6],L[9],L[10]} == 7'b1011110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011)));
 
// action: ALU_CF = C:
assign A_ALU_CF_C = (({L[0],L[1],L[5],L[6]} == 4'b1011) && ((!L[9] && (({L[2],L[3],L[4],L[8],L[10]} == 5'b01010) || (L[10] && (({L[2],L[3],L[4],L[8]} == 4'b0001) || (L[4] && (({L[2],L[3],L[8]} == 3'b001) || ({L[3],L[8]} == 2'b10))))))) || (({L[2],L[9],L[10]} == 3'b110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))))) || (L[1] && ((({L[0],L[7]} == 2'b00) && (({L[2],L[3],L[4],L[8],L[9],L[10]} == 6'b010100) || (L[2] && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110))))) || ({L[0],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 10'b1010111100)));
 
// action: ALU_OP = ASL:
assign A_ALU_OP_ASL = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010000100) || (({L[0],L[1],L[2],L[5],L[6],L[7]} == 6'b011000) && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110)));
 
// action: RW = W:
assign A_RW_W = (!L[1] && ((!L[6] && ((!L[5] && ((({L[0],L[2],L[4],L[7]} == 4'b0000) && ((!L[8] && (({L[3],L[9],L[10]} == 3'b001) || ({L[9],L[10]} == 2'b10))) || ({L[3],L[8],L[9],L[10]} == 4'b0110))) || (L[7] && ((({L[0],L[2],L[9],L[10]} == 4'b0110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))) || (L[0] && ((({L[2],L[9],L[10]} == 3'b001) && (({L[3],L[4],L[8]} == 3'b001) || (L[4] && (({L[3],L[8]} == 2'b01) || ({L[3],L[8]} == 2'b10))))) || (L[2] && (({L[3],L[4],L[8],L[9],L[10]} == 5'b11001) || (({L[9],L[10]} == 2'b10) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))))))))))) || (({L[0],L[2],L[3],L[4],L[5],L[7]} == 6'b000010) && (({L[8],L[9],L[10]} == 3'b001) || ({L[8],L[9],L[10]} == 3'b110))))) || ({L[0],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 10'b0010010010))) || (({L[0],L[1],L[2]} == 3'b011) && ((({L[9],L[10]} == 2'b01) && ((({L[6],L[7]} == 2'b00) && ((!L[3] && (({L[4],L[8]} == 2'b00) || L[4])) || (L[3] && (({L[4],L[8]} == 2'b00) || L[8])))) || (L[6] && ((!L[3] && (({L[4],L[8]} == 2'b00) || L[4])) || (L[3] && (({L[4],L[8]} == 2'b00) || L[8])))))) || (L[9] && ((!L[10] && ((!L[4] && (({L[3],L[5],L[6],L[7],L[8]} == 5'b00010) || (L[8] && ((!L[5] && ((!L[6] && (({L[3],L[7]} == 2'b00) || ({L[3],L[7]} == 2'b11))) || ({L[3],L[6]} == 2'b01))) || (({L[3],L[5]} == 2'b01) && (({L[6],L[7]} == 2'b00) || L[6])))))) || ({L[3],L[4],L[5],L[6],L[7],L[8]} == 6'b010011))) || (({L[3],L[4],L[8],L[10]} == 4'b1101) && (({L[6],L[7]} == 2'b00) || L[6]))))));
 
// action: SB = ALU:
assign A_SB_ALU = ({L[0],L[1],L[2],L[3],L[4],L[7],L[8],L[9],L[10]} == 9'b011000110) || (({L[0],L[1],L[2],L[7],L[10]} == 5'b01101) && ((!L[9] && ((!L[3] && (({L[4],L[8]} == 2'b00) || L[4])) || (L[3] && (({L[4],L[8]} == 2'b00) || L[8])))) || ({L[3],L[4],L[8],L[9]} == 4'b1101)));
 
// action: DB <= SB:
assign E_DB__SB = (!L[1] && ((!L[5] && ((!L[6] && (({L[0],L[2],L[3],L[4],L[7],L[8],L[9],L[10]} == 8'b00100010) || (L[7] && ((({L[0],L[2],L[9],L[10]} == 4'b0110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))) || (L[0] && ((({L[2],L[9],L[10]} == 3'b001) && (({L[3],L[4],L[8]} == 3'b001) || (L[4] && (({L[3],L[8]} == 2'b01) || ({L[3],L[8]} == 2'b10))))) || (L[2] && (({L[3],L[4],L[8],L[9],L[10]} == 5'b11001) || (({L[9],L[10]} == 2'b10) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))))))))))) || ({L[0],L[2],L[3],L[4],L[6],L[7],L[8],L[9],L[10]} == 9'b001010010))) || ({L[0],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 10'b0000100001))) || (({L[0],L[1],L[2]} == 3'b011) && ((!L[7] && (({L[3],L[4],L[8],L[9],L[10]} == 5'b00110) || (L[10] && ((!L[9] && ((!L[3] && (({L[4],L[8]} == 2'b00) || L[4])) || (L[3] && (({L[4],L[8]} == 2'b00) || L[8])))) || ({L[3],L[4],L[8],L[9]} == 4'b1101))))) || (({L[5],L[6],L[7],L[9],L[10]} == 5'b00110) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011)))));
 
// action: ALU_OP = LSR:
assign A_ALU_OP_LSR = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010010100) || (({L[0],L[1],L[2],L[5],L[6],L[7]} == 6'b011010) && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110)));
 
// action: ALU_OP = ROL:
assign A_ALU_OP_ROL = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010100100) || (({L[0],L[1],L[2],L[5],L[6],L[7]} == 6'b011100) && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110)));
 
// action: ALU_OP = ROR:
assign A_ALU_OP_ROR = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010110100) || (({L[0],L[1],L[2],L[5],L[6],L[7]} == 6'b011110) && ((({L[9],L[10]} == 2'b01) && (({L[3],L[4],L[8]} == 3'b010) || (L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))))) || ({L[3],L[4],L[8],L[9],L[10]} == 5'b00110)));
 
// action: SB = AC:
assign A_SB_AC = (!L[1] && ((!L[5] && (({L[0],L[2],L[3],L[4],L[6],L[7],L[8],L[9],L[10]} == 9'b001010010) || (({L[0],L[6],L[7]} == 3'b101) && ((({L[2],L[9],L[10]} == 3'b001) && (({L[3],L[4],L[8]} == 3'b001) || (L[4] && (({L[3],L[8]} == 2'b01) || ({L[3],L[8]} == 2'b10))))) || (L[2] && (({L[3],L[4],L[8],L[9],L[10]} == 5'b11001) || (({L[9],L[10]} == 2'b10) && ((!L[4] && (({L[3],L[8]} == 2'b00) || ({L[3],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b011))))))))) || ({L[0],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 10'b0010101100))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010101100);
 
// action: X <= SB:
assign E_X__SB = (({L[1],L[2],L[5],L[6],L[7],L[8],L[9]} == 7'b1010110) && ((!L[10] && (({L[0],L[3],L[4]} == 3'b000) || (L[3] && (!L[4] || ({L[0],L[4]} == 2'b01))))) || ({L[0],L[3],L[10]} == 3'b101))) || (({L[1],L[2],L[5],L[6],L[7]} == 5'b11101) && (({L[3],L[4],L[8],L[9],L[10]} == 5'b11001) || (({L[9],L[10]} == 2'b10) && ((!L[3] && (({L[4],L[8]} == 2'b00) || ({L[4],L[8]} == 2'b11))) || ({L[3],L[4],L[8]} == 3'b101)))));
 
// action: Y <= SB:
assign E_Y__SB = (({L[0],L[1],L[5],L[6],L[7],L[10]} == 6'b001010) && ((!L[4] && (({L[2],L[3],L[8],L[9]} == 4'b1001) || (L[8] && (({L[2],L[3],L[9]} == 3'b000) || (L[3] && (({L[2],L[9]} == 2'b00) || ({L[2],L[9]} == 2'b11))))))) || ({L[2],L[3],L[4],L[8],L[9]} == 5'b10111))) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00111101001);
 
// action: SB = S:
assign A_SB_S = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01011101100);
 
// action: S <= SB:
assign E_S__SB = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01011001100);
 
// action: PC <= EA:
assign E_PC__EA = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00110010110);
 
// action: S <= ALU:
assign E_S__ALU = (({L[0],L[1],L[2],L[4],L[7],L[8]} == 6'b000000) && ((({L[3],L[9],L[10]} == 3'b001) && (!L[6] || ({L[5],L[6]} == 2'b01))) || (({L[9],L[10]} == 2'b10) && ((!L[3] && (({L[5],L[6]} == 2'b00) || L[6])) || L[3])))) || ({L[0],L[1],L[2],L[3],L[4],L[7],L[8],L[9],L[10]} == 9'b000000110);
 
// action: SB = P:
assign A_SB_P = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010000010);
 
// action: P <= SB:
assign E_P__SB = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010100110);
 
// action: X <= RES:
assign E_X__RES = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010111100) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b01010011100);
 
// action: Y <= RES:
assign E_Y__RES = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010001100) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00010011100);
 
// action: DB <= ALU:
assign E_DB__ALU = ({L[0],L[1],L[2],L[3],L[4],L[6],L[7],L[8],L[9],L[10]} == 10'b0110011110) || (({L[0],L[1],L[2],L[6],L[7],L[10]} == 6'b011111) && ((!L[9] && ((!L[3] && (({L[4],L[8]} == 2'b00) || L[4])) || (L[3] && (({L[4],L[8]} == 2'b00) || L[8])))) || ({L[3],L[4],L[8],L[9]} == 4'b1101)));
 
// action: DB <= PCH:
assign E_DB__PCH = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000000010) || ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000100110);
 
// action: PCL <= EAL:
assign E_PCL__EAL = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000100101);
 
// action: DB <= PCL:
assign E_DB__PCL = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000000110);
 
// action: DB <= P:
assign E_DB__P = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000000001);
 
// action: P <= DB:
assign E_P__DB = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000010110);
 
// action: PCL <= DB:
assign E_PCL__DB = ({L[0],L[1],L[2],L[3],L[4],L[5],L[6],L[7],L[8],L[9],L[10]} == 11'b00000010001);
/trunk/juke-box/chip1.v
0,0 → 1,116
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: BMSTU
// Engineer: Oleg Odintsov
//
// Create Date: 18:21:00 01/17/2012
// Design Name:
// Project Name: Agat Hardware Project
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
 
 
module rot_driver(input clk,
input rot_a, input rot_b,
output wire rot_dir, output wire rot_event_out);
 
reg rot_a_latch = 0, rot_b_latch = 0;
assign rot_dir = rot_b_latch, rot_event_out = rot_a_latch;
always @(posedge clk) begin
case ({rot_a, rot_b})
2'b00: rot_a_latch <= 1;
2'b11: rot_a_latch <= 0;
2'b10: rot_b_latch <= 1;
2'b01: rot_b_latch <= 0;
endcase
end
endmodule
 
module btn_driver(input clk, input btn, output reg sig = 0);
parameter nskip = 'hfff;
integer counter = 0;
wire lock = counter?1:0;
always @(posedge clk) begin
if (counter) counter <= counter - 1;
if (!lock && sig != btn) begin
sig <= btn;
counter <= nskip;
end
end
endmodule
 
 
module chip1(
input clk,
input b1,
input b2,
input b3,
input b4,
input rot_a, rot_b, rot_center,
output[7:0] led,
output vga_red,
output vga_green,
output vga_blue,
output vga_hsync,
output vga_vsync,
output [3:0]j4,
input spi_miso, output spi_mosi, output spi_sck, output dac_cs, output dac_clr,
output spi_rom_cs,
output spi_amp_cs,
output spi_adc_conv,
output strataflash_oe,
output strataflash_ce,
output strataflash_we,
output platformflash_oe,
input ps2_clk,
input ps2_data
);
// access to DAC
assign spi_mosi = 0, spi_sck = 0, dac_cs = 0, dac_clr = 0;
// block other devices to access to DAC
assign spi_rom_cs = 1, spi_amp_cs = 1, spi_adc_conv = 0;
assign strataflash_oe = 1, strataflash_ce = 1, strataflash_we = 1;
assign platformflash_oe = 0;
 
wire[4:0] vga_bus;
assign {vga_red, vga_green, vga_blue, vga_hsync, vga_vsync} = vga_bus;
wire[1:0] ps2_bus = {ps2_clk, ps2_data};
wire rot_dir, rot_event;
wire clk_cpu;
wire b1v, b2v, b3v, b4v, brc;
rot_driver rot(clk_cpu, rot_a, rot_b, rot_dir, rot_event);
btn_driver b1d(clk_cpu, b1, b1v);
btn_driver b2d(clk_cpu, b2, b2v);
btn_driver b3d(clk_cpu, b3, b3v);
btn_driver b4d(clk_cpu, b4, b4v);
btn_driver rrd(clk_cpu, rot_center, brc);
reg rot_v = 0;
 
always @(posedge rot_event) begin
rot_v <= rot_dir;
end
 
// assign j4 = 0, vga_bus = 0;
wire[3:0] btns = {b4v | (rot_event & ~rot_v), b3v | brc, b2v, b1v | (rot_event & rot_v)};
ag_main agate(clk, btns, led, j4, vga_bus, ps2_bus, clk_cpu);
endmodule
/trunk/juke-box/juke-box.v
0,0 → 1,1073
parameter
D_0_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_0C = 256'h8BDC4E481E38F5A0F4602982F50F73AA68450014102C001100C9200002066673,
D_0_0D = 256'h7E01020D1B40403658A68494A4B34903A2A5349BCD374CFE2690D70CE35C338A,
D_0_0E = 256'h048200A50338EC1C97873A44107C00D69A4E0310D53C32870290F80892E6007F,
D_0_0F = 256'h003D053674239959D157CDCB78F00A1AA97D401802184838370415400FFD2040,
D_0_10 = 256'h0482010080412683800010000000000000000030000000241200040200008040,
D_0_11 = 256'h920201A09B6984D2001C00092000090040490020000000016000009040202490,
D_0_12 = 256'h102096C8081E424812094C841265104804920930920000000006041000040009,
D_0_13 = 256'h04E20C40000104000100700080000804024000122CA082408202080000CA4D64,
D_0_14 = 256'h0292000000041238002200C00000180048048024300049241249000208280130,
D_0_15 = 256'h000400009200000824A000000400000300000408029041080000C92490000400,
D_0_16 = 256'h000000000138080500001410400000824138000904000000076DB28000001230,
D_0_17 = 256'h800A000C00008000070001201000208001000008260040241000249390000098,
D_0_18 = 256'h01041040C080400412382010C0030000200001C0004804000824804124004004,
D_0_19 = 256'h000000000003206690200001C000480400082090011800480000310014000000,
D_0_1A = 256'h0081800310083020100020000004500000004000000000418120020020800000,
D_0_1B = 256'hE00044020020120103124900000804F2010001C9208200201030006201041001,
D_0_1C = 256'h0490A100504000401904904040240206000C4020803008924F201009E0924804,
D_0_1D = 256'h00204049002240000E8268240040211209008000003000001000125744800249,
D_0_1E = 256'h07200008C0900120118820003000204000900040820008104001904924200120,
D_0_1F = 256'h82D000A3480480490100F00000802D000C0D040380A400252082380010413212,
D_0_20 = 256'h001000008201A2494003211A406423DA49041009820828C00000028A051A4120,
D_0_21 = 256'h0000000000000000000040200208201000241000008000048000208001008009,
D_0_22 = 256'h0000000000000000000000000900004A00040000128004A04B28000000000000,
D_0_23 = 256'h0080082000010010400080400400402000410000410002000012080000490010,
D_0_24 = 256'h9000208081000000080040011091040000000000000000000000000000000000,
D_0_25 = 256'h0200000009000009004A40000000000000030000000000000000000001349248,
D_0_26 = 256'h0400082000080002080002480000000000020000000802500000004800004000,
D_0_27 = 256'h8000001248249200000000201248000000000200240000000208001008008008,
D_0_28 = 256'h000082012410082594004004004024924D804820101220800000220840040001,
D_0_29 = 256'h0002011810010080400490000402308000200010082080002402000000402082,
D_0_2A = 256'h0000000400010000000000402080704009146001008208000241000000040248,
D_0_2B = 256'h4800041965841965841841041041041041041041041030001090448440000000,
D_0_2C = 256'h418410410082082ACB2CB41041040001040017FF65B402000280400000480000,
D_0_2D = 256'h2082ACB2CB01041040001040017FF65B40200068040000048000419658419658,
D_0_2E = 256'h30000009201206000000001208E492492000001C9249241041052FB441041008,
D_0_2F = 256'h1C9200000041078000008000007000001249249C492490002491800000400000,
D_0_30 = 256'h3333333333333333333333333361200000008243000049040000E09209208048,
D_0_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_0_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_1_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_0C = 256'h224B68C603270810201001200000425001215A0318C00C0540D2480000822211,
D_1_0D = 256'h30C0013CE820C10400B04B1259E0A20080788340388B800648006223A1888E83,
D_1_0E = 256'h5640003105C3434AF040A3C582500400291024880043800001242448320CFF8A,
D_1_0F = 256'h0045C4E040EE53512D23090BA2AFFF927F7FFFF41D22AE04CAE140E040039008,
D_1_10 = 256'h2490693008040483880259049249001001049281008104265308000001000001,
D_1_11 = 256'h24900C04014024104932594120901B408249002010010080C10004920D00B6D8,
D_1_12 = 256'h9341105040224800340A2D30CA68964165A24809A2802C20C00534084D90990C,
D_1_13 = 256'h048004800000264008001949820B2C06104800030830DB0000020800105B4DA0,
D_1_14 = 256'h04B282020186504824C200B0000824004804110080004924936800CA20100020,
D_1_15 = 256'h048820829B0410496590410494000090010014820C1041080001693488042400,
D_1_16 = 256'h0120060001A04825B2CB24924800000325304108A45000200A69A28020048000,
D_1_17 = 256'h104400002520490C82100010012CB400822400C0650488080402099090000094,
D_1_18 = 256'h05A01041864128041005148140000948124320840004004B2D00102420000020,
D_1_19 = 256'h200400020102000888124320840004004B2D000000B200410000040289003612,
D_1_1A = 256'h2010010410082820320830070005100121824180054885810200C00100004800,
D_1_1B = 256'h404184020120004022120414D344960008800000000201040200208201041008,
D_1_1C = 256'h12014C26824000002D04D0404020804004104020890482410000992CA0004000,
D_1_1D = 256'h8068A4934DB44040169B69B0CB4CB6016024C128005324164100020B40001000,
D_1_1E = 256'h6412516C84034804914904CB4196D001008000A41249101040029241B6C00000,
D_1_1F = 256'h06802DB40820829849A45040201221204129369148048001B44B48920B0DB601,
D_1_20 = 256'h001000240659E82C804925924924B24924B64B2506506D104100200000100020,
D_1_21 = 256'h00002420124924800124C1201201601000241000049000249013209489009009,
D_1_22 = 256'h0008208208208200000000000820001040044A0104012CB2DA00008B2C000000,
D_1_23 = 256'h0584584800010000012000010000004800100000030006800C000928200001B0,
D_1_24 = 256'h92012400000000930820004D10D1000400242012492480459600000000000000,
D_1_25 = 256'h0008200009000000005A41040008000949020800048001041041041040100000,
D_1_26 = 256'h2412092082080592880006DA4900100002524020000802D00000004000824820,
D_1_27 = 256'hA6C000164A4DB4D00820802012410000002926926C1058008209009009048209,
D_1_28 = 256'h480480812410092490000000000024DB6D000000101A20008000800808000041,
D_1_29 = 256'h80000102102100000804D100000209009209209248209201200200A402492082,
D_1_2A = 256'hDA49A4941209000DA11249402181148041045209248209201209008225A49268,
D_1_2B = 256'h48000419658419658418410410410410410410410410510110020CA0C0090080,
D_1_2C = 256'h41965965B2CB2CB2CB2CB41041040001040002EB25FD060000820208004A0800,
D_1_2D = 256'hB2CA2CB2CB41041040001040002EB25FD0600048202080048000419658419658,
D_1_2E = 256'h20000001201204925248000924A492490000001492492092492434996596592C,
D_1_2F = 256'h12DB0000002CB2800000104104500000020820896DA490001249000000000000,
D_1_30 = 256'h333333333333333333333333336D92904000CB29249048041008A00008009048,
D_1_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_1_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_2_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_0C = 256'h62380BA4B532E32024300581A1066F2A6C00E02E383C0C3546C20492488AA884,
D_2_0D = 256'h000081556AE1861A3885CB1E59D1498323C5A103C7E811FF26D0750761541D82,
D_2_0E = 256'h500501801BF9A912A644B92C100C09CC0E14E7808028A004012401ACE9BB80D8,
D_2_0F = 256'h00614473605750D59455E789F8780AB0AAD1501C3FB28126DA6140206DA81062,
D_2_10 = 256'h3B16EAE920B5C83C89000400000401000400008524434C00002926934524D268,
D_2_11 = 256'h69FDDA7F7C9E5BACD361F6DA4D94924136104092132932830E934762DD45924E,
D_2_12 = 256'hACFFEF27F7E537B3E9E5B3DDAC9EEF2D9B5D658E6D6596EF6491D9A7D3CDFED6,
D_2_13 = 256'h5B049A096C93CB6697ED8DDB6FBCB6FBAE974925D35B7D936925B34DA1A5B20D,
D_2_14 = 256'h00B25124D34B6F86C984920DA6BEE7FDB7FBE7DBCDB6B24965B25F34BEE5B4C2,
D_2_15 = 256'h22000004094D92414110414C92100090190400820800000104102010080D2058,
D_2_16 = 256'h1B2012010486D368B6DB40820820004124000100B05340200020824124849241,
D_2_17 = 256'h5960000225A0522C80120C8001289400926C00C0411298000012010084110004,
D_2_18 = 256'h64B22021340128900003148800008968148B20048320004A25001D2410000022,
D_2_19 = 256'h648265A6E548040D20148B20048320004A250000002001000000068080242412,
D_2_1A = 256'h00800504000009012E9F596698496D1235E6B3D936DACDEC4FEDB61169D6C640,
D_2_1B = 256'h014100000904820100000C32DB6492892CA40049000048201000A08000000241,
D_2_1C = 256'hFB24164B24964924866966900904020014100000090492CB2892C92510120804,
D_2_1D = 256'hE69E192496C934D3417D97D9ED97D826937D6DBEDB85FF7FE7FF6DF09249B5B6,
D_2_1E = 256'hD95BE7B70DA5D24D241349268A4D16934D24920924DB41249B6826924905B24B,
D_2_1F = 256'h79269758F7FF7F749EC905BA6B66925F62925B6E5A69A4FED96DC2DBAD96C926,
D_2_20 = 256'h3682002414DBECB62DFC96C5BF92D825B6DBFFB6ED67923DB6FBC934D245F6DB,
D_2_21 = 256'h800024DBC12490124924C9041041048249000002441090201013041488241000,
D_2_22 = 256'h091FFBFFBFFBFFA40009096C9369200168005A44A401291690400019266A0124,
D_2_23 = 256'h0410410000000000012900030000004800100000024250D04D004120848005A2,
D_2_24 = 256'h25F24D24100400930130020C204048000024DBC12490020C9335009240000000,
D_2_25 = 256'h000820000000000104000904816800494900D80004C905ED36D36D36D2000025,
D_2_26 = 256'h2092414C825205D8C04014924804104002D00800000020024000800822500800,
D_2_27 = 256'h0480048D2269269008B2E48000080000006D24D249905A689041008241041241,
D_2_28 = 256'hEE0D268000024000092492492492420000922C00000809000000A29229220040,
D_2_29 = 256'h492698C06CBA49A657C32C924D308989B7BB79E4424B3B8348159EF70691092C,
D_2_2A = 256'h488080001248000489000001010014C4D2D9179E4424B3B8348857FEFF793196,
D_2_2B = 256'h80001450410650410650410410410410410410410410099B492EDA6DA09B49B0,
D_2_2C = 256'h6516596592CB2CA2CB2CB0104104000104002580400800012402016132816132,
D_2_2D = 256'hB2CB2CB2CB010410400010400258040080001200201613280001450410650410,
D_2_2E = 256'h40000000000001B6D2480009650000000410410000000082082236D165965B2C,
D_2_2F = 256'h06490000002594000000104104000000000000032480000016D8000000000400,
D_2_30 = 256'h333333333333333333333333332C96900000592D249000000008001000001001,
D_2_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_2_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_3_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_0C = 256'hE8B321A6393EFBD4D4400EC355997FEEFF405815F0AE551750904800021BBB9D,
D_3_0D = 256'h3940045C7120820200945E9275000681A1861220037100FFA7F4D52BD354AF48,
D_3_0E = 256'h02C20114EEFA25B2A8EEA161982412DEA7D6EF8100151000049549A5F9FFFF0C,
D_3_0F = 256'h00150D257800B5D04087838B2027FE087813CFF001806056038815266256A07A,
D_3_10 = 256'hDF6696CDB7F3EFAF810034C24904410414000910F6EAE8924907B5DAF0F6BB5E,
D_3_11 = 256'hFB77DFD9ECB6DB6693C5BE9B4D6DADB72DFDF6492E9AED770E93DBECD2C90006,
D_3_12 = 256'h65FADB2FDFC5AFDFEB75DFC936B7796C9BDF2D8E7D25B3EF2DB0CBFFD66F77D2,
D_3_13 = 256'h7B0692096EDAC92ED6FF9492496493F9ADF7492EFFCFA6BBDFA5F26DA124B209,
D_3_14 = 256'h91924DA4925D3D87C98CD30D34F6C36DF7FF6EFF5FB7BB6D76DA5F3696C1AF82,
D_3_15 = 256'h7FF1B6DF76B3892CAC8026DA4B34DA48BC9F496CB0D965934D345F6DA59B437C,
D_3_16 = 256'hBE97F9379765FEDEDF7DCFFFFEFB6F64D3E1249A5F2DB25923FFFB3EB2893E87,
D_3_17 = 256'hC92832120080802004420DA012002090910800082000702433102490977D9FC1,
D_3_18 = 256'h6912346012C24094120A6B182C848020200801108368048008240D4194004082,
D_3_19 = 256'hC69E6DA4F658051320200801108368048008241001044948008043C0506C0000,
D_3_1A = 256'h41202408A45202CB5C9E6961BF6E7DB2DAF4F25B21FB7EFE5DE9E7D669E5F659,
D_3_1B = 256'h8102291480306482401403022CB0240B642D800065030648240481148A401832,
D_3_1C = 256'hEDB43349749B69F68B6DB6D060C90480902291480081603CF0B6404831A00029,
D_3_1D = 256'h6696096C924BB49B45E6DE6924D368349B592C96DB94DB69A6FA7DF0D6C9A4DF,
D_3_1E = 256'h9069A69B09B49349341A696DC2DB84D24DA6DA09A4924134924824936D04926B,
D_3_1F = 256'hFBF692E8F6DF6D65934986BA4BE49F4FA3B74D2412E924FF69A48249B4D27BFC,
D_3_20 = 256'h8134024A8283E49A2DB5B347F6B668FED24924DAED2DBA2DB6FBCBBEFFE7BFFF,
D_3_21 = 256'hD9249200A5925B36DA4940B24B2CF25D6CB24922D2C9B496C904B2C92592C89B,
D_3_22 = 256'h64C592592592591EFBE789249FCB3BEFBA4D35BEFBA497E96FFEC93490212492,
D_3_23 = 256'h4AE9AEBACBE596596C9FC96E36596DB2D9699659617C821041769A408DED9059,
D_3_24 = 256'hB4D2EBE4E5964D249F59669379B7D77B249200A5925B269A481092496C924925,
D_3_25 = 256'h26D24D248FEDA69A4D24D7E9EDF34DC4DB4CF596C96D902002002002017FFFDF,
D_3_26 = 256'hD65B2C7ADB3E06B609608A4824DFE6D249A6BF4926BF6B74DA4BF4F76B74F749,
D_3_27 = 256'hC936DFF2CD96D92492DB597FFFF6DB6DB6C0CB2CB65B6FDECB2C92592C8BCB2E,
D_3_28 = 256'hFE4F2425B6D7ACB6B6DB6DB6DB6DBDB6DF404130D816FAEF36B249ACD3CD2C93,
D_3_29 = 256'hEDB6D7C7FC926DB5D6CFFDDB6DAE8BCDBFFFEFF5DB6FBF93C92FF77F27976DBE,
D_3_2A = 256'h0000000C92090000014000C8208015E6D7FF9EFF5DB6FBF93CBB7BEE93EF77FE,
D_3_2B = 256'hFDB6CD7DF7CD7DF7CD7CD34D34D34D34D34D34D34D34ACBA5BF4D6CD65965970,
D_3_2C = 256'hD7DF7DF7DBEFBEE3EFBEF934D34DE4934DE48D8419645A2D908040926DFC926D,
D_3_2D = 256'hFBEE3EFBEF934D34DE4934DE48D8419645A2D908040926DFDB6CD7DF7CD7DF7C,
D_3_2E = 256'h824924936936916DA4924926DB2DB6DB4D34D345B6DB6934D34C2491F7DF7DBE,
D_3_2F = 256'h41B69249249248249249269A6984924926DB6DB2DB6DB4924924124924926926,
D_3_30 = 256'h33333333333333333333333333236924924936D149249249A6D209A69B49A49A,
D_3_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_3_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_4_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_0C = 256'hD66F2B6EA7264A41B4881A3A0B404A44B6252005C82E0507569368000097777B,
D_4_0D = 256'h110180210881412C702111488832C002974244D812C90496B3654163F5858FD7,
D_4_0E = 256'hA938D84A1A942102A9548888301840D965D8A7B555004D5789B0D964D93700D0,
D_4_0F = 256'h00008080CBA45938098121250BA00B382CC9601021495B5D270CAAB540004DD1,
D_4_10 = 256'h60A030328C4E2301891020B2490021828022098449A2DA7F7FA24B25B44964B6,
D_4_11 = 256'hB2526DB4936D86D201869B0021DB76DA0B249249B49349AC01200C1406080000,
D_4_12 = 256'h914904DB49A24949B2484904920924000D040008B6082034082006DA64121368,
D_4_13 = 256'h24920C00024920C24924992482090D20924104036594CB0DA692482480CB6D24,
D_4_14 = 256'h20692A5800865249241A4936184000004124836D94DA0924136884DB28248300,
D_4_15 = 256'h86812496090554C1535D4325B00B48941360928B0982082104106934C8043849,
D_4_16 = 256'h536812C021A4D268B6DB44924920820344024820A0D101A4D104141A21D4C900,
D_4_17 = 256'hB6D94DE09369EDDFDC74937DBDF7DDECA7B7DBEDD14DCCFE7CA6BF4888034904,
D_4_18 = 256'hD6C9879B0FF5FE49EE8D7DB6737824DA7B77F71D24DF6F7DF77F30FF4D24D6E9,
D_4_19 = 256'h5015BC921E04B106D27B77F71D24DF6F7DF77B3493E3ECBEFF7F814FB192FFBF,
D_4_1A = 256'h3E9E72D0D2E94E48130814810A141B84489840B4814C849A7C80C88300605019,
D_4_1B = 256'h84B434BA52594A7D3C229D49D347FB96DAE4B65B2C3594A7D3CE5A1A5D29ACA5,
D_4_1C = 256'h16902502500920D204204202B294FA79CB434BA52E47A3D3496DAFF708969B64,
D_4_1D = 256'h0B2000492012DA0902492490490590132800412800016D36C348368304808049,
D_4_1E = 256'h4932C32500116500000020494092904804024800800004820000904092924824,
D_4_1F = 256'hB05200109A69A6090080900D00812C04C12C00024884004920CB48B299458092,
D_4_20 = 256'h005924B5CD7DFB6536D84CA49B09949365B6DB6C364900249269829A6DA6DB4D,
D_4_21 = 256'h900000201349368000001308B08B4000DA041045041048201073001498001524,
D_4_22 = 256'h400CB2CB2CB2CB04924112012030445A00004A05B2CB2CB2916C808208000000,
D_4_23 = 256'h2506506C00134092412092418482406C02576002D6800FA69E9B25B1A0490130,
D_4_24 = 256'hD8441489814804930134D1451040051600002013493680410400000048000002,
D_4_25 = 256'hD208900020000009005A0104000820494920082024C92104104104104136DB4C,
D_4_26 = 256'h201201C892129D93EFFA65BEDAB6504802500822D02D04804800006D06D00822,
D_4_27 = 256'h26C004965B6DB6D049B2CB2492490000002926926836DB6DA49349A001540201,
D_4_28 = 256'h7D7682DA00124924964964964964924924BFDBEB27EA00A28800A20049260049,
D_4_29 = 256'h944826234000120980AED928904C4F56D24924D1FDB69F5DA322403EBB47F6DA,
D_4_2A = 256'h49009246DB3D93648580246DB3C817AB6124924D1FDB69F5DA3F3ADB25A2576C,
D_4_2B = 256'h1000045A41045A41045A410412410412410412410410154510D209209C29828A,
D_4_2C = 256'h45B6596596CB2CA6CB2CB09041041909041900364B652301017FF60C84120C84,
D_4_2D = 256'hB2CA6CB2CB09041041909041900364B652301017FF60C841000045A41045A410,
D_4_2E = 256'h01041040008009B6D248000B6D0000000410410000000000000024936596596C,
D_4_2F = 256'h06490004102594800000020820900000004104132480000016D8082082002002,
D_4_30 = 256'h333333333333333333333333333CB28040205969040048040041209209001040,
D_4_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_4_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_5_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_0C = 256'h0090D25108EC1090453200685119DAE0276B46D2A68504CD4B7D924926822633,
D_5_0D = 256'hC51FF882441E38E1C7483061824E107CA881950D6010020312D2069A489A6920,
D_5_0E = 256'h0B55515AE801506805004413D7838D62003321C1BBD69000509E001B24407F1F,
D_5_0F = 256'h0052734DB876C9AFD71892B0C45FF4FDD28A9FEFDE6EE031DB6F4A849255D702,
D_5_10 = 256'h2492481088492692AD8834C24004A5004C1000D700034C743A3806032700C064,
D_5_11 = 256'h96C0009009248240482241492496C92536496D964B6CB24B090004924906DB6C,
D_5_12 = 256'h0220B2490086D30096D924B24924924924B2490192800500C021324009B6880C,
D_5_13 = 256'h00004510000012100000026DA49160024000A4802C9059048240010000492400,
D_5_14 = 256'h292012106DA0890480000010C22926DB24924024104804024000324845801144,
D_5_15 = 256'hA20249241A48B2496492D948925049B01A4D32594092492596582410090D00DB,
D_5_16 = 256'h1A4932934C069B6C24924924926D36026124D34834936C90424920534C869A41,
D_5_17 = 256'hB6D9848065929B69041025B4904D2680912C964B20045A2D14102C9036190DA2,
D_5_18 = 256'h613292FB109A49B6920DA4BE41201964A6DA4104096D241349A479DB54196000,
D_5_19 = 256'hD36926932D24008B64A6DA4104096D241349A010418281482412059FB1251252,
D_5_1A = 256'h92484D24492481148161349A4922CB00340B09B4DA01B2484DA6122122D20012,
D_5_1B = 256'h0349124921248924901B00960820040924000000001248924909A48924909244,
D_5_1C = 256'h00006824C2000040090490424912492134912492034804082092400834000000,
D_5_1D = 256'h996924DB6D964B64A6D26D20924824816924124124120000080012534DA41000,
D_5_1E = 256'h2004004824902D06DA4DA09201240049208000241049049209209241B6924824,
D_5_1F = 256'h02816DA44804805B4936924124036520000D169001A492249012082402413649,
D_5_20 = 256'h6C824824B2CBE10812012102402420480000000092DB2D124904140000000020,
D_5_21 = 256'h24926DB6DA6DA4924924AD65965924920124100A449092249081249009249009,
D_5_22 = 256'h092824824824826104186DB6DB69245A44A45A4116DB6916CB29009B2DB6DB6D,
D_5_23 = 256'hB596596492482492400992424C925224924124924165B4594592492264C927A2,
D_5_24 = 256'h269B6DA4930930910800D14C00D14C04926DB6DA6DA4824D96DB6DB692492490,
D_5_25 = 256'h522520825924824000DA48008128207B0020982036802796D96D96D96DA49269,
D_5_26 = 256'h2480496C005A2100004096D36CB6404822D24026524022D20022D20020824826,
D_5_27 = 256'h84000000000000020004000000000000007F945944A4924936DB489249049049,
D_5_28 = 256'h25A28549240C8000648248248248249249000004925829809A29809A60849A60,
D_5_29 = 256'h22934DA4DA6CA4D345B20A45269A40A20820824120824968A0110D92D1448209,
D_5_2A = 256'h00A4000000402480180000000410105104100824120824968A24164848064905,
D_5_2B = 256'hCB2C96116596116596104104104104104104104104100A00829B6CB6C9209208,
D_5_2C = 256'h6116596592CB2CA2CB2CB01041040B01040B0924000990DA6892436DB2CB6DB2,
D_5_2D = 256'hB2CA2CB2CB01041040B01040B0924000990DA6892436DB2CB2C9611659611659,
D_5_2E = 256'h49249241249248000001B6C00024924912CB2CA492492092492424916596592C,
D_5_2F = 256'h20924926DB0820924924596596124924820820804924936D80024924922D96D9,
D_5_30 = 256'h333333333333333333333333333120124CB6024120904896DB2D240040049049,
D_5_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_5_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_6_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_0C = 256'hBC8042840025001C09D8077D0F404E7027A9A4D91950522886D2F800008888C4,
D_6_0D = 256'h5A40077DBBE1C71E38B7CF9E7DB1EF83CC00972001001227DA41DA020728081C,
D_6_0E = 256'hF25AFE14EC0644A80038BBEC707CFB01C021446200039088180524C80200FFE0,
D_6_0F = 256'h003DADB7DF99FFFC68E76F6F3BA00B022D75601020E3BB8BCBF1FF352000EFA5,
D_6_10 = 256'h924924B41B249049E02024824920484D90C0090324C50412491920906324120C,
D_6_11 = 256'h0009240240001008000249000524924924904904924924920349B24924824925,
D_6_12 = 256'h0904000024000824000000000000000000000004004924924020924924924924,
D_6_13 = 256'h9200201248249249249209001249249249249249000200201049200000000000,
D_6_14 = 256'h0096468124924004800104104024824924924900820124924120024824800804,
D_6_15 = 256'h34D020824124A4922D820A2402596D24C904109269249240208200824029B210,
D_6_16 = 256'hC92480492480000000000000010492512C824924924809269000041249220805,
D_6_17 = 256'h4920B2136CB64924A08B6C9003249212DA49048241969309860B090004502926,
D_6_18 = 256'h2C92482026492492484492080C84DB2D92492822DB2400C924804B2490DB2932,
D_6_19 = 256'h0924820160908E992592492822DB2400C924840B48A6130000804CB2436D36C9,
D_6_1A = 256'h8040000009048092482482492490002092412402492400002012496C06092496,
D_6_1B = 256'h0800024124000100800904904104920000904800100000100800000120900000,
D_6_1C = 256'hB200040200240200048048000002010000002412190482410000092402002480,
D_6_1D = 256'h4004120004900124A0090090490490012010492C928124124925800000120124,
D_6_1E = 256'h00124124000100024A04804940929200020025004004A0080094010092812002,
D_6_1F = 256'h0000001001201200249201240248009243601248240000000049419209048000,
D_6_20 = 256'h492492492493E824004804800900900124924924000000000000000000000000,
D_6_21 = 256'h249249249249249249248041041049249249A6DB6002DB0002DA0006D0000692,
D_6_22 = 256'h004104104104104924924924924DB29128129129001001001001009209249249,
D_6_23 = 256'h49249249249249249B6D000B68001B48001A4000924924924924924036802000,
D_6_24 = 256'h2492493642042042042002402002402492492492492482490492492492492491,
D_6_25 = 256'h8049249264801004A49004A4C96104800004D104800000208208208208000001,
D_6_26 = 256'h4900020000004824920920000092DB2500800024802500802500802500800024,
D_6_27 = 256'h0092492492492492492492492492492492402082090000000000252000690002,
D_6_28 = 256'h0092049200800000001001001001000000249249248048048048048008008008,
D_6_29 = 256'h9048248209249209241041209048041041041001041040248049248049041041,
D_6_2A = 256'h4924924800100124904924800100120820820100104104024820800124924820,
D_6_2B = 256'h924904104104104104104104104104104104104104100B6DA4000100124D24DA,
D_6_2C = 256'h4116596592CB2CA2CB2CB2596596C26596C24000924B000001249A4924924924,
D_6_2D = 256'hB2CA2CB2CB2596596C26596C24000924B000001249A492492490410410410410,
D_6_2E = 256'h000000000000009252489249240000001249248000000000000024916596592C,
D_6_2F = 256'h0249000249249000000049249200000000000001248001249248000000249249,
D_6_30 = 256'h333333333333333333333333332C96924D924929249200B24924000000000000,
D_6_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_6_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_7_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_0C = 256'hBC924280183DB194DCF801C0FFBF7BFA6D47E25F88FC087307B6D80002066673,
D_7_0D = 256'h14DFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE481E7BFE130106E7ED1FE0E47F8391C,
D_7_0E = 256'hF241FE940C6DCCC80730FFFFBFFF7267C2060520FFFFE0004EDD480020C8FF00,
D_7_0F = 256'h007FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE7FBB29FDF7FFB71FFD9F9C,
D_7_10 = 256'h0000000240000000800900100924804904924914924820800024924904924920,
D_7_11 = 256'h0000000000000000008000000100000000020000000000010824000000000000,
D_7_12 = 256'h4000000000000000000000000000000000000000000000000900800000000000,
D_7_13 = 256'h0000000001000000000000000000000000000000000000000000000000000000,
D_7_14 = 256'h4800604900000900120924020900000000000000000000000804900100000000,
D_7_15 = 256'h0001041000000000000492492082000000208000000000000000000002400082,
D_7_16 = 256'h0000000000000000000000000000000800000000000000000000000000104108,
D_7_17 = 256'h00000041000000001049000248000048800020100820004020904020A0824000,
D_7_18 = 256'h0000490410000000010000402010400000000412400092000012000002400490,
D_7_19 = 256'h000010000000B200000000041240009200001249240048249249000000008000,
D_7_1A = 256'h0000249000000400000000000000000400000000000000000000000000000000,
D_7_1B = 256'h0924000004924000004020020820000924020024820924000004920000004920,
D_7_1C = 256'h004A008008009409401001012480000092400000000000082092400010490012,
D_7_1D = 256'h0000000000000000000000000000000000000000000000000000000000004000,
D_7_1E = 256'h0000000000000000000000000000002490090012012002402400480000000000,
D_7_1F = 256'h0000000000000000000008000000000000000000000000000000000000000000,
D_7_20 = 256'h000000000001E000000000000000000000000000000000000000000000000000,
D_7_21 = 256'h0000000000000000000052082082000000000000000000000000000000000000,
D_7_22 = 256'h0000000000000000000000000000000001000000000000000000040040000000,
D_7_23 = 256'h0000000000000000000000000000000000000000000000000000000100000000,
D_7_24 = 256'h0000000000400400400400000400000000000000000010002000000000000002,
D_7_25 = 256'h0024900000000000000000001000000000000000000000000000000000000000,
D_7_26 = 256'h0000000000000000000000000000092524002500002524002524002524002500,
D_7_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_29 = 256'h0201000000000040000000040200000000000000000000001200000000000000,
D_7_2A = 256'h0000000000000000000000000000100000000000000000000000000000000000,
D_7_2B = 256'h1041249249249249249249249249249249249249249200000000000000000008,
D_7_2C = 256'h4936DB6D96DB6DA4924920924924104924104000000020924800004104104104,
D_7_2D = 256'hB6DA492492092492410492410400000002092480000410410412492492492492,
D_7_2E = 256'h049249249249200009240000001249248000000249249249249024936DB6D96D,
D_7_2F = 256'h8000249000000049249200000009249249249240001248000000249249000000,
D_7_30 = 256'h3333333333333333333333333320004920000001924924000000124924924B24,
D_7_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_7_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_8_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_0C = 256'h53620DACE66E0E668D76F43C184CFEE17CA019C00A00A72CD341000001000000,
D_8_0D = 256'h2500047B11238E0C29604A5253014482120D08465A8FFDF906EB906F8641BE13,
D_8_0E = 256'h6A50001011C2A18634E7136C08001F07B56B770650410D53C340EC2010840070,
D_8_0F = 256'h0020D6D922F4CF811F1C342C93A0012D05FC2007E184038600122832184EA443,
D_8_10 = 256'h824D07000004820000000800000000000000006000010502C100080400010083,
D_8_11 = 256'h480002102D8632490010002498012400080480602002002040201049A0E01248,
D_8_12 = 256'h4814D94900D901A44923B25069F45004564B24A2580008000004020100000823,
D_8_13 = 256'h0241360001148C09240240208803008C40088070007205D008402000133DB692,
D_8_14 = 256'h12488042000001201000248000001200180010106104E492C9270000208004A0,
D_8_15 = 256'h0000000180008021926800004C00024200240C04020000180000000030000C00,
D_8_16 = 256'h0004844000102013000004104104118000120903000000000492498000000020,
D_8_17 = 256'h0020904804100020824000020100000604820000040004900000104B00000010,
D_8_18 = 256'h000C0122800804100020800024120104000820900000804000018800E000000C,
D_8_19 = 256'h48008008200220C00C0008209000008040000180001200018241201041000008,
D_8_1A = 256'h8040040240206020002000000000200100400080000011410000000000000800,
D_8_1B = 256'h41001008180031008200C022493C8040278249201380011008008048040C0008,
D_8_1C = 256'h0000800100C0802804904900006201001009008189248000040279008000E490,
D_8_1D = 256'h00100124006161040801800E000480000491C8248201001230000901B2024600,
D_8_1E = 256'h24001800824B046209008401380200241230200006040000E410001800092312,
D_8_1F = 256'h85200043211210A480004004801812020836A001225200940408249201080901,
D_8_20 = 256'h0040000241004000124E901908F693211C1040378000508000002104021B45A2,
D_8_21 = 256'h0000000000000000000000100104000020020800100800800804000820000820,
D_8_22 = 256'h0000000000000026924912000410102000000100080022122080000000000000,
D_8_23 = 256'h0200208201000241000008000048000208001008009001000008200800000000,
D_8_24 = 256'h0000900004A00040000128004A04B28000000000000000000000000000000004,
D_8_25 = 256'h0800000004000000802000000000000100020490010000000000000000000000,
D_8_26 = 256'h0008000048000049040001200180000000000400080001002000000000000400,
D_8_27 = 256'hD000000004024900000124824920000000900800900904920000000000000000,
D_8_28 = 256'h00000820000024830B24B24B24B2480012000000000096500000896500000802,
D_8_29 = 256'h0008009000030200088000001001208208A08202100200000C40040000084008,
D_8_2A = 256'h10010010000000010010410002006041180848202100200000C0800000008000,
D_8_2B = 256'h2000022CB2C22CB2C228208208208208208208208208C0000000000004924910,
D_8_2C = 256'h22820820E208208965965441041200041200152496D80C040008000000200000,
D_8_2D = 256'h8208965965C41041200041200152496D80C0400080000002000022CB2C22CB2C,
D_8_2E = 256'h24904918020024000000003000820820E000001041041E4924924B2020820E20,
D_8_2F = 256'h1249041000E08248208380000049041078208208000000006001248248C00000,
D_8_30 = 256'h3333333333333333333333333384800000038000800023000000904120E04120,
D_8_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_8_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_9_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_0C = 256'h4828002031A841040000090116291282CB002210442241101B41A0000019198C,
D_9_0D = 256'h3B81847CC6808000108D892C4A10C80009628010026002901591002CA000B288,
D_9_0E = 256'h231A3110A68544008A003901A800801C001482F000A0800405A0010400007E9E,
D_9_0F = 256'h00F39881E4D830B1BA73238BB87FFB816F677FED3CA2982AFCE13701C92CA382,
D_9_10 = 256'h080906080024906812420804100012012000820400410548A4200A05040140A0,
D_9_11 = 256'h904130804C24D2082091650402D924009805A042202210244C02010120801248,
D_9_12 = 256'h01800A40040160001304A6CB2C86C924825104960A2410926084984C06D84034,
D_9_13 = 256'h020012800004CA4014420020D805000B2012934000500400034024002369A482,
D_9_14 = 256'h96090005020001065840248125800240100020100000B4936924012020900030,
D_9_15 = 256'h0008A29B0482D32410010412082400900D244800040000149249A0C204020804,
D_9_16 = 256'h0124880024412092000020000000000092110C00D26800004982090034000000,
D_9_17 = 256'h6086000010012C260200005A4092500641320020801021000200224B00000011,
D_9_18 = 256'h060201368149849009121261000004004B09808000169024940000944A012000,
D_9_19 = 256'h80300040001220B5704B0980800016902494000806594102000006090C840800,
D_9_1A = 256'h8040240008045050C120C002A442C00200C820C01C0014410100200010081000,
D_9_1B = 256'h01008201001041008224120904000264B2800100010106100804800100880830,
D_9_1C = 256'h0901100800A412413001000020C201009000201109020A69A24B000440000000,
D_9_1D = 256'h48148004125829009A24A25265825A09849169A4924D944940800108A4900000,
D_9_1E = 256'h944B20B6924404124124886C00D840248009048004041248A492000048492012,
D_9_1F = 256'h0900124861A61B0400504104902910802480594100800826582C02D825B25900,
D_9_20 = 256'h00D0018001254412816092592C124B2580D10C16CB2CB25145004000001000A0,
D_9_21 = 256'h9008B2C000000000000000B08B09000020000024000020000009000200000060,
D_9_22 = 256'h00208208208208020000124024800000001261040009A21A2000800484024924,
D_9_23 = 256'h1201201601000241000049000249013209489009009001000240659001000090,
D_9_24 = 256'h0000820001040044A0104012CB2DA00008B2C00000000002420124924800124C,
D_9_25 = 256'h0800900004000020026000000000002D000200001B0000820820820820000000,
D_9_26 = 256'h000800004801244B4C0491200290002003000402480001002002000000010002,
D_9_27 = 256'h5901041004024820000164A4DB4D00000090080090090C020820000000000000,
D_9_28 = 256'h34904900824000008000000000005165940000020025B4000002D22500000802,
D_9_29 = 256'h100800004032020010030C20100004820820820D20104D241048261A48348041,
D_9_2A = 256'hB009001124E2480B029041124A20224104824820D20104D24124900036414986,
D_9_2B = 256'h2000022CB2C22CB2C228208208208208208208208208A1021000820824804810,
D_9_2C = 256'h22CB2CB2CB2CB2D965965041041200041200273CB3D808040408210400210400,
D_9_2D = 256'hCB2D965965841041200041200273CB3D8080404082104002000022CB2C22CB2C,
D_9_2E = 256'h04904910020022490104002492124924C000000249249A492490592CB2CB2CB2,
D_9_2F = 256'h0924000208B2C840000100000008000028208204920000004924248248800000,
D_9_30 = 256'h3333333333333333333333333396C80900922C94804926020800124900C24024,
D_9_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_9_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_A_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_0C = 256'h6638389BBC5C58C40000A02A0040D8C16C0121507207AB088B4C124922111148,
D_A_0D = 256'h470182F2D2608E1C386D8F2C7811410217E80BE5739AABE616C8406B6501AD96,
D_A_0E = 256'h281BE1423359E000AEA601E00800C03763F5E39400A0080285A001B1FCFC018C,
D_A_0F = 256'h0088FDF94AF5911A3B31892503900D2035DDA018F8A0DB7826003F8252263E41,
D_A_10 = 256'h6B9078749A3B16EA081200041000418000448202934820DA6D54984C2A930986,
D_A_11 = 256'h35BF4DEFF3798DF66D6EFF49A2DA09025049209B01B019443A482D720F02C927,
D_A_12 = 256'hD67BE6F66F2E965BBCD05D37921BACB239BCB25DA7B243E7F249F4DAED74B3C8,
D_A_13 = 256'h2493492C924962B259E49A4D74F84B61FA637F8E6D06932D35B249B4C0C64B24,
D_A_14 = 256'h824844995FB7F6C924924934DB492DFFC76DCF6D96FB1B2C1658B4D34B669B5B,
D_A_15 = 256'h0820249204825B04B6814412012424902D109000000000069A68A0C204020044,
D_A_16 = 256'h21201149A64904800820841041841069B6000400DA6880004182082992120000,
D_A_17 = 256'h60800200124128960000021040A4500440300060A09860000001228000008481,
D_A_18 = 256'h96D210064841804009111240808004904A2580000084102914003486024920C0,
D_A_19 = 256'hFB6D845A75B020B7A04A2580000084102914000924004D80000807490036C000,
D_A_1A = 256'h000120904020049AF359EC9B6D66F64884BA7D659A6125B40324132D372A4173,
D_A_1B = 256'h00241008005040000024124B2CA24B2494404820100504000024120804002820,
D_A_1C = 256'h2DD2592C922F36D359259240A0800004824100800006196DB249449652002480,
D_A_1D = 256'hB24B76937B169A69A7FE7FF0BFEFFCDB496E36CB6C9ED97F82D9249349A490DF,
D_A_1E = 256'h697D82FB24996904D26920D241A49A4924824924904926DA09A4DB412496DC25,
D_A_1F = 256'h32DF6FBDD6DD6C7B6FF497C92F8269ADB34D0FFE6DA693FBF0F64B6CBEE37693,
D_A_20 = 256'h4A1A09A008254F7F25B16FE4B6096C96C366FE487FB72D74926996FBEDA5D249,
D_A_21 = 256'h00419266A0124800000000820820000000000025200060000009000200000048,
D_A_22 = 256'h20BDA6DA6DA6DA400004A4BE49A482008012602600418408090000049B782492,
D_A_23 = 256'h90410410482490000024410902010130414882410003682002414DA21B000099,
D_A_24 = 256'h96C9369200168005A44A401291690400019266A0124800024DBC12490124924C,
D_A_25 = 256'h0000900000800120124000900094906C209048005A2091FFBFFBFFBFFA400090,
D_A_26 = 256'h8000002000092426680492000010002481000012012000400480090001010012,
D_A_27 = 256'h8001165C900001000048D2269269000249241141048009B40820820000900000,
D_A_28 = 256'h67B4C30092502490ADB6DB6DB6DB184106009000002D208000025B4894094000,
D_A_29 = 256'hB4C24BA47C98309243EEBB6984934C2496C965993135D9ED301E7B93DA64C4D7,
D_A_2A = 256'hA24800008060008A218000090000221245EE965993135D9ED32439A27F8C6F5D,
D_A_2B = 256'h40000308208B08208B082082082082082082082082082B5B35B4DB6DB34D34D0,
D_A_2C = 256'hB0CB2CB28B2CB2C965965841041200041200121369064120020024B0D944B0D9,
D_A_2D = 256'hCB2C965965041041200041200121369064120020024B0D940000308208B08208,
D_A_2E = 256'h00000000000002DB4924820DB6104104000000020820800000015FF4B2CB28B2,
D_A_2F = 256'h0B6D000208165800000000000000000000000005B68000009B6C000000208208,
D_A_30 = 256'h33333333333333333333333333124A09048124B0904904020800000800020004,
D_A_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_A_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_B_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_0C = 256'h375B9C9DCE7EDEE24C9A55961640FFE96F0379465BACB92A1105300003044466,
D_B_0D = 256'h6A0102C2E2008000198D493A4820410016C410C0799D576F36CDD44EFF513BF7,
D_B_0E = 256'hA9480942F4DEF0E41F195B01EC00ED3CF7F1F7A2000010014B612595FD7DFF28,
D_B_0F = 256'h00EAF6F700908A0ACC088000580FE7961F54FFC26100C0B4063061A3202200B9,
D_B_10 = 256'hE7DF5C749EDF66960810092104014180184404076C16D8365B3B6FB7E76DF6FC,
D_B_11 = 256'h6F9F5F77B2DB0CB76F6FDA69BC27BFD92EDEDB94B34B24F2336DFCFBEB808003,
D_B_12 = 256'hB2FD75F3E9ECBFFDFCB9FD64FB3DF4963DFFB2CDF6964567965B77F7EF27BBD8,
D_B_13 = 256'h34926D2C9B5B22BB6B2F9A69A4B06BE09FE1ECCFD994963BBCBA49A680865B24,
D_B_14 = 256'h580806D05977FEC9249ADB26DA692FBFC37FCFFF97DF2FBE5F7CE69BEBE4FFCB,
D_B_15 = 256'hEDA6DF6C3B59A4FB2488D24963D2FF64B27D20B65B7DF7C1659679A683E920D2,
D_B_16 = 256'hB24DA1D2EFA5F35C24925F7DF3CD3C324966936CBFDFD92C96FBFE1F7DB6B31D,
D_B_17 = 256'h04309841265200B091602602010000000482004020825490050114C85BF6CFE4,
D_B_18 = 256'h904051224908045200018480B6104994802C24580980804000023E02804804C1,
D_B_19 = 256'h7A79F59A7974B60084802C24580980804000002120822C84924101504132C008,
D_B_1A = 256'h2290060C9048110D7A792D90FDBF7F482D7279A586FDB9F68E34F36D27B2C377,
D_B_1B = 256'h8183241202408A4520020580F3C2D90120C68000A60408A45200C19209002045,
D_B_1C = 256'h24D2EDA7DA09A4BA4DB4DB5081148A40183241200A018116581205B216C00032,
D_B_1D = 256'hB24B37FB6D87D36D279379329A6924D249FE164B6C93492482592C935B26D04F,
D_B_1E = 256'h49B4CA4926906D069A49A0B7416E9A4D36826936D04D249209249241249B6827,
D_B_1F = 256'hB3FF6DF59359347BEDA492C9AF8A6F2796FF869A4F7693FDA0DA4D36DB412FFE,
D_B_20 = 256'h9042082ED3494B6D24D1FDAD9A3FB5B3436493FCB6921D24926997FFFFEEBFFF,
D_B_21 = 256'h64D3490212492D924924A95D35D7597CB2CB2D93F92DC6CB2DB65B2D32CB2C2F,
D_B_22 = 256'hB20400400400402FFFFBF69A5D7C9CB2C9A493EB2CD26F36FAEF64924014B24B,
D_B_23 = 256'h0B24B2CF25D6CB24922D2C9B496C904B2C92592C89B8134024A828205EB2D92D,
D_B_24 = 256'h9249FCB3BEFBA4D35BEFBA497E96FFEC93490212492D9249200A5925B36DA494,
D_B_25 = 256'h924924925B24906DA4926B34F6DDB4934D20DED905964C592592592591EFBE78,
D_B_26 = 256'h8B2CB2796CB801D904904F6090EDB24DA4935D349A7D25DA69A5937925925D34,
D_B_27 = 256'h76925B6B2FFFFEDB6DFF2CD96D924926DBB7BEFBFF2D976F2492D32CB2DD64B3,
D_B_28 = 256'h7FBC8A36492FD248524924924924E69A79C924894412DFFDD2DDA4BF6BF4BF4B,
D_B_29 = 256'h36BA6FA6B6CCAE9B47FFFE6D74DB5DB6FFFFBFD979B7DFEF20FFFD3FDE45E6DF,
D_B_2A = 256'h90090010902000890192410902092EDB67FFBBFD979B7DFEF22DBFFB6D767FFF,
D_B_2B = 256'hFEDB67BEFBE7BEFBE7BA69A69A69A69A69A69A69A69A0A7925BAC92C9FFFFFF8,
D_B_2C = 256'h7BEFBEFB8FBEFBEDF7DF70D34D37B24D37B256020C9721945848024936FA4936,
D_B_2D = 256'hEFBEDF7DF70D34D37B24D37B256020C9721945848024936FEDB67BEFBE7BEFBE,
D_B_2E = 256'h4DB4DB41269269B6DA69A68B6D269A6984924924D34D32DB6DB54DB6FBEFB8FB,
D_B_2F = 256'h24926DB4D32DB4DB6DB61249249B6DB6C24924936DA4936D16DA6DA6DA0D24D2,
D_B_30 = 256'h333333333333333333333333330DA6924D265249B4926824924D24D369849369,
D_B_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_B_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_C_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_0C = 256'hD4B5B3932838D29619940C81650C738CD82A5962E80815065B6D200000044466,
D_C_0D = 256'h6B00840404C0051401408444220088028D901480275002CB25A0A40E4290790C,
D_C_0E = 256'h4480442128D8831A4E60408058005B2C4EA24B09AAF3555017E46C95655B01F0,
D_C_0F = 256'h00A0888089812161A8A25E76C1E0111945262031A5F5A465FDCAE5561F790044,
D_C_10 = 256'h9C4600090060A030011A4085940080C810849F0549079410082A4723E548E47C,
D_C_11 = 256'h490996D24DB692692603682416FC924935B36D06B26B36960CA31388C00C0000,
D_C_12 = 256'h48A49B2934C125B4D12126124924900026920406DA04800A04821B6D36090D30,
D_C_13 = 256'h120136400914D04934420D12480120836922814902920134DB4924820349B412,
D_C_14 = 256'h81FE116022124906DB09B6436CA0800900124924934D34D26924C329A4804D90,
D_C_15 = 256'h8874B6DA4482D305CB0F0C92426C02D84D82434DA20208249248A0C30D221004,
D_C_16 = 256'h01B0032034C10080924912CB2CA28A00828B6980D268A4D26514400434536CC6,
D_C_17 = 256'hFBEBB5F24DB5F74FEDF2497CF7DBF6B457F97CBEC934A7DD22927B2536408003,
D_C_18 = 256'h4F238A5F25D3DB24FB5EBEFA7D7C936D7DD3FB7C925F3DF6FDAC0AFD8E936920,
D_C_19 = 256'h203220C01814E493657DD3FB7C925F3DF6FDAC3A4F6FF378EFF7CC3FF7CD3C9E,
D_C_1A = 256'h974A4B294FA791044C205A40A6424D00204C20520428506ECA80ADE490F0205F,
D_C_1B = 256'h1ACA53E9E72D0D2E94B91E8F4D25B6BFDC225A6D9212D0D2E9496529F4F09686,
D_C_1C = 256'h0940B48B48008028149149025A1A5D292CA53E9E114EA4E9A3FDCB6D725B2D96,
D_C_1D = 256'h04901325A00B60240B25B2502CA6C848840068A48204905B00800900B2024004,
D_C_1E = 256'h20D948920049B00008000025004A0020120020124120800024100004DA000010,
D_C_1F = 256'h926D24982082084DA4C008140240B60224B2820826500124906406CA6CA6C249,
D_C_20 = 256'h01F4D3D364B75DB65B2926C26524D84CA6D24924DB2404000020936DB6CB6D16,
D_C_21 = 256'hD008208000000900000044A0CA0D80026812482412483090480D804AEC005AD0,
D_C_22 = 256'h2420820820820826DB699B0882913029009260269A28A20800A2C00004026926,
D_C_23 = 256'h308B08B4000DA041045041048201073001498001524005924B5CD7C081040499,
D_C_24 = 256'h2012030445A00004A05B2CB2CB2916C808208000000900000201349368000001,
D_C_25 = 256'h0820DA4824104824822100004804902504080490130400CB2CB2CB2CB0492411,
D_C_26 = 256'hD00804A0480F6C4BFFFDB2B34C59682413080003403000002012013001402403,
D_C_27 = 256'h8901365964924920004965B6DB6D249000100800801B4DB6934DAEC005B20004,
D_C_28 = 256'h3EDA496882492480CB24B24B24B25965967F6FE4BBE522D96522DB48008B4800,
D_C_29 = 256'h51351001E2404D44204B6CA26A2017DB49249349EADB4FB690C9203F6D27AB6D,
D_C_2A = 256'hF9299B588270012F90DB65890794AFEDA49209349EADB4FB693F957C36607DB6,
D_C_2B = 256'h0800032920832920832920820920820920820920820801861363A21A21121112,
D_C_2C = 256'h32DB2CB29B2CB2CB65965241041244A4124480DB259201060125B10602090602,
D_C_2D = 256'hCB2CB65965241041244A4124480DB259201060125B1060208000329208329208,
D_C_2E = 256'h00000004104102DB4104820DB6000000000000000000000000006925B2CB29B2,
D_C_2F = 256'h0B6D249041165809249241041001249248208205B68009241B6C000000040040,
D_C_30 = 256'h3333333333333333333333333312480800826590804904100000104920804100,
D_C_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_C_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_D_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_0C = 256'h09094444432AC42087135A55442C56ADFF58003541A0A3417D92492493022255,
D_D_0D = 256'h113F7930C81C70E3C61E30C184CE327D0864084008A554829DA60312B80C4AE1,
D_D_0E = 256'h01800442C2280D7B90418413CBFFA494115812CA00040BBD7138266C9A007E3F,
D_D_0F = 256'h006F6B6051661B1FB739952584BFEAFFAA895FD81F00388C00300E1A80088044,
D_D_10 = 256'h924D24480024924848336D37D92449800456D28001C5945A6D00000020000004,
D_D_11 = 256'hDB402240249200200080052492492DB6496C92994D94C96404221249A4876DB6,
D_D_12 = 256'h01104920004B4C904B6892C92412492412492492482004906480892000DB4024,
D_D_13 = 256'h4108124104300100009021B69A4894100004130026004C104904101041049200,
D_D_14 = 256'hB2484849B4882492480000192594CB64A6C90010012400402410196012420490,
D_D_15 = 256'h9A2024924D244925A4896406C34026482934D12482C92486DB6C945045A6824C,
D_D_16 = 256'h2524934982082490DB6D849249B4DA4934834D240801B6DA20000029821A6906,
D_D_17 = 256'hDB6AD24016D84DB48041925A41369B040592C864A08065B0124112C9C34C86C8,
D_D_18 = 256'h94D2CF7F486D04DB490EF27EA49005B6136D20106496904DA6C02C7D8A05A050,
D_D_19 = 256'h69848848B480202586136D20106496904DA6C008064B45A092491E76D592CB28,
D_D_1A = 256'h492424912492069A0584DA6D00D92410D20584D269248B2CD69B493499692053,
D_D_1B = 256'h0924492484D24492480D20102082490020D00000000D24492484922492406922,
D_D_1C = 256'h920880010024126100000001A4892490924492480D804B041002049200000000,
D_D_1D = 256'h4DB4016C969929928948948241001001A4904924920924804D249B41B6900120,
D_D_1E = 256'h90020124124096936836D24904920024800904000124824824904904DA092012,
D_D_1F = 256'h0100924169369224801B0924904992900036994002D248924208049001049924,
D_D_20 = 256'hB68B28B2492550804840900908120121000924900049325B6D140800000000A0,
D_D_21 = 256'h9049B2DB6DB6D249249216B2CB2C924904924801324849924A4492482492482C,
D_D_22 = 256'h04F2DB2DB2DB2DB4924D24D36DB49261261221001A29801A2980924DB6DB4DB4,
D_D_23 = 256'hD65965924920124100A4490922490812490092490096C824824B2CA3330406D0,
D_D_24 = 256'hDB6DB69245A44A45A4116DB6916CB29009B2DB6DB6D24926DB6DA6DA4924924A,
D_D_25 = 256'h4816000024924B00006124824094926C20944C927A2092824824824826104186,
D_D_26 = 256'h924124B2012D36024924DB0490D9202483092411490411490483480410092411,
D_D_27 = 256'h5008008000000000000000000000000000EE516516526924DB6DA24924924924,
D_D_28 = 256'h820A47A492524010924124124124104104000012492D96522D96502596502596,
D_D_29 = 256'h8A69A6CA6DB49A6926D82114D34912082082090014412082910416C105205104,
D_D_2A = 256'h02542480800900C02900080900092904020820900144120829000B2100922410,
D_D_2B = 256'h65964A0CB2CA0CB2CA082082082082082082082082082C00D845325325965946,
D_D_2C = 256'hA0CB2CB28B2CB2C96596504104120C84120C8C9200245269B2DB6DB6D965B6D9,
D_D_2D = 256'hCB2C96596504104120C84120C8C9200245269B2DB6DB6D965964A0CB2CA0CB2C,
D_D_2E = 256'h849249249249200000025940001249249B6DB6C24924924924916924B2CB28B2,
D_D_2F = 256'h8000000B2C20804000006DB6DB0800000924924000124C92800024924932DB2D,
D_D_30 = 256'h3333333333333333333333333304804112D809009001245B6DB6120004124124,
D_D_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_D_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_E_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_0C = 256'h88CF022010A8801941180803E78F528EDB4902A4B58D48500B6D680004088880,
D_E_0D = 256'h020086CF37E38F1C39E1CF3E7B31CD83226424000400009605B5718095C60248,
D_E_0E = 256'h390C01850C1C0AEC91187BECF800A00409188C72440E2000112F910608027FC0,
D_E_0F = 256'h00FBBFBFAF99EFE8CCCEFEFE7B4015005576A027E2F57CD9FBDAB0E75B5500F8,
D_E_10 = 256'h4920901A4D92492400000001060100149920040692CCB0C82434924906924920,
D_E_11 = 256'h0024900900000904004924000D92092412492492492492402D06C92412012492,
D_E_12 = 256'h0482000492002002000000000000000000000000012482492480492492492490,
D_E_13 = 256'h4900800924824124924924804120924124824804900920020024900000000000,
D_E_14 = 256'h00920A0092490012482000092492492482490482080012082490092012402002,
D_E_15 = 256'hD341820820921248368021B00364B4916410424930924920000002090134D160,
D_E_16 = 256'h6C92402492424924000000000412482092492490492400014124920924882014,
D_E_17 = 256'h24924805B24B2492100DB6C808924941E120914832D941225B05A0801A60148B,
D_E_18 = 256'hB24020121324B2492012492402016C92C92484036DB2022492526592196C8493,
D_E_19 = 256'h04925B018240BB2CA2C92484036DB20224925045A2C90C84000012C904B6DB65,
D_E_1A = 256'h482480002010120920920124920000904920920924924000B04924100B048208,
D_E_1B = 256'h0000080400000090486412090400002490080092002000090490000402010000,
D_E_1C = 256'h0900100800120100120120140001209200008040048248208249000048240008,
D_E_1D = 256'h20024800120800920024024024824800804A2482480490490490400000480092,
D_E_1E = 256'h004900920000028120125024004809000940100128020025004004A048049481,
D_E_1F = 256'h0000000804804800124904900904004925800924900000000025024824A24000,
D_E_20 = 256'h2492492492496412012002402400480480000000492400000000000000000000,
D_E_21 = 256'h904920924924924924922924924924924924936DA0016D000369000348001249,
D_E_22 = 256'h0004104104104100000024924926C84084084084004804004804924924924924,
D_E_23 = 256'h041041049249249A6DB6002DB0002DA0006D000069249249249249205A209000,
D_E_24 = 256'h924924DB29128129129001001001001009209249249249249249249249249248,
D_E_25 = 256'h41249248120004021240021265B0020000016802000004104104104104924924,
D_E_26 = 256'h240009000000009000000049244B6D9002000012401080001002001080000012,
D_E_27 = 256'h0209249249249249249249249249249249A49249248000000000148001240001,
D_E_28 = 256'h9048024800000000000800800800820820924924924020020020020020020020,
D_E_29 = 256'h4124124904904904820104824820104104104000820824120024924824020820,
D_E_2A = 256'h2010090412490082090000402490282080410400082082412012480412480082,
D_E_2B = 256'h492482082082082082082082082082082082082082080DB68208048048248260,
D_E_2C = 256'h20CB2CB28B2CB2C965965165965B29165B290000492400000000012492492492,
D_E_2D = 256'hCB2C965965165965B29165B29000049240000000001249249248208208208208,
D_E_2E = 256'h80000000000002490926490492000000092492400000000000004924B2CB28B2,
D_E_2F = 256'h0924000924124800000024924900000000000004920004920924000000124924,
D_E_30 = 256'h33333333333333333333333333325A49164824B0924800C92492000000000000,
D_E_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_E_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000,
 
D_F_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_0C = 256'h9BCF2E0EC6EE0C7B4F1FF03C07E3DEE7FF3023D46E2BE71CFFDFF80001111108,
D_F_0D = 256'h5ABFFFFFFFFFFFFFFFFFFFFFFFFFFFFE3A780C401C8FFDB217FD30E3B4C38EDB,
D_F_0E = 256'h19000885DB1C671FE1C7FFFFFBFFAD143851BCFE00020FFFFA47272098267E00,
D_F_0F = 256'h00FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFCF53F49F9FAAA7F9B5EC080,
D_F_10 = 256'h0000004120000000492000400400490490400482490000000012412082482410,
D_F_11 = 256'h0000000000000000020000000C00400000000000000000080090000000080000,
D_F_12 = 256'h2000000000000000000000000000000000000000000000000012400000000000,
D_F_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_14 = 256'h2000112000002480012492400000000000000000000000000000400480000000,
D_F_15 = 256'h0004104000000000000249249009000000820000000000000000000008000209,
D_F_16 = 256'h0000000000000000000000000000000400000000000000000000004000410480,
D_F_17 = 256'h0000012480000000492400012400002408040201000208048048040190092000,
D_F_18 = 256'h0001248248000000048000009049200000001249000049000008000001201240,
D_F_19 = 256'h000000000000E900000000124900004900000824900020104924800020000000,
D_F_1A = 256'h0000924800000000000000000000000000000000000000000000008000000000,
D_F_1B = 256'h0492000002490000000000002082490000412400482490000012490000012480,
D_F_1C = 256'h0020025025004004004A04B49200000249200000201001041000049201001241,
D_F_1D = 256'h0000000000000000000000000000000000000000000000000000000000012800,
D_F_1E = 256'h0000000000000000000000000000009240048048009009001201200000000000,
D_F_1F = 256'h0000000000000000000020000000000000000000000000000000000000000000,
D_F_20 = 256'h0000000000014000000000000000000000000000000000000000000000000000,
D_F_21 = 256'h0200040000000000000040000000000000000000000000000000000000000000,
D_F_22 = 256'h0000000000000000000000000000000800800800800000800000000000000000,
D_F_23 = 256'h2082082000000000000000000000000000000000000000000000000080000000,
D_F_24 = 256'h0000000000001000000000000000000040040000000000000000000000000005,
D_F_25 = 256'h0012480100000400000800000800000000080000000000000000000000000000,
D_F_26 = 256'h0000000000000000000000000000049090401080001092401090401092401080,
D_F_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_29 = 256'h0800800000000020000000100100000000000000000000004100000000000000,
D_F_2A = 256'h0000000000000000000000000000200000000000000000000000000000000000,
D_F_2B = 256'h0820924924924924924924924924924924924924924900000000000000000000,
D_F_2C = 256'h24DB6DB69B6DB6C2492492492492412492410000000092492092482082082082,
D_F_2D = 256'hDB6C249249249249241249241000000009249209248208208209249249249249,
D_F_2E = 256'h12492482492490002490000000492492000000092492412492490005B6DB69B6,
D_F_2F = 256'h4000924000000124924800000024924904924920004920000000924924000000,
D_F_30 = 256'h33333333333333333333333333000124A0000002C92490000000492492092C92,
D_F_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000,
D_F_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
 
RAM16Kx1#(D_0_00,D_0_01,D_0_02,D_0_03,D_0_04,D_0_05,D_0_06,D_0_07,D_0_08,D_0_09,D_0_0A,D_0_0B,D_0_0C,D_0_0D,D_0_0E,D_0_0F,D_0_10,D_0_11,D_0_12,D_0_13,D_0_14,D_0_15,D_0_16,D_0_17,D_0_18,D_0_19,D_0_1A,D_0_1B,D_0_1C,D_0_1D,D_0_1E,D_0_1F,D_0_20,D_0_21,D_0_22,D_0_23,D_0_24,D_0_25,D_0_26,D_0_27,D_0_28,D_0_29,D_0_2A,D_0_2B,D_0_2C,D_0_2D,D_0_2E,D_0_2F,D_0_30,D_0_31,D_0_32,D_0_33,D_0_34,D_0_35,D_0_36,D_0_37,D_0_38,D_0_39,D_0_3A,D_0_3B,D_0_3C,D_0_3D,D_0_3E,D_0_3F)
ram0(CLK1, AB1x, CSM[0], READ, DO1[0], DI1[0], CLK2, AB2, CS2, DO2[0]);
RAM16Kx1#(D_1_00,D_1_01,D_1_02,D_1_03,D_1_04,D_1_05,D_1_06,D_1_07,D_1_08,D_1_09,D_1_0A,D_1_0B,D_1_0C,D_1_0D,D_1_0E,D_1_0F,D_1_10,D_1_11,D_1_12,D_1_13,D_1_14,D_1_15,D_1_16,D_1_17,D_1_18,D_1_19,D_1_1A,D_1_1B,D_1_1C,D_1_1D,D_1_1E,D_1_1F,D_1_20,D_1_21,D_1_22,D_1_23,D_1_24,D_1_25,D_1_26,D_1_27,D_1_28,D_1_29,D_1_2A,D_1_2B,D_1_2C,D_1_2D,D_1_2E,D_1_2F,D_1_30,D_1_31,D_1_32,D_1_33,D_1_34,D_1_35,D_1_36,D_1_37,D_1_38,D_1_39,D_1_3A,D_1_3B,D_1_3C,D_1_3D,D_1_3E,D_1_3F)
ram1(CLK1, AB1x, CSM[0], READ, DO1[1], DI1[1], CLK2, AB2, CS2, DO2[1]);
RAM16Kx1#(D_2_00,D_2_01,D_2_02,D_2_03,D_2_04,D_2_05,D_2_06,D_2_07,D_2_08,D_2_09,D_2_0A,D_2_0B,D_2_0C,D_2_0D,D_2_0E,D_2_0F,D_2_10,D_2_11,D_2_12,D_2_13,D_2_14,D_2_15,D_2_16,D_2_17,D_2_18,D_2_19,D_2_1A,D_2_1B,D_2_1C,D_2_1D,D_2_1E,D_2_1F,D_2_20,D_2_21,D_2_22,D_2_23,D_2_24,D_2_25,D_2_26,D_2_27,D_2_28,D_2_29,D_2_2A,D_2_2B,D_2_2C,D_2_2D,D_2_2E,D_2_2F,D_2_30,D_2_31,D_2_32,D_2_33,D_2_34,D_2_35,D_2_36,D_2_37,D_2_38,D_2_39,D_2_3A,D_2_3B,D_2_3C,D_2_3D,D_2_3E,D_2_3F)
ram2(CLK1, AB1x, CSM[0], READ, DO1[2], DI1[2], CLK2, AB2, CS2, DO2[2]);
RAM16Kx1#(D_3_00,D_3_01,D_3_02,D_3_03,D_3_04,D_3_05,D_3_06,D_3_07,D_3_08,D_3_09,D_3_0A,D_3_0B,D_3_0C,D_3_0D,D_3_0E,D_3_0F,D_3_10,D_3_11,D_3_12,D_3_13,D_3_14,D_3_15,D_3_16,D_3_17,D_3_18,D_3_19,D_3_1A,D_3_1B,D_3_1C,D_3_1D,D_3_1E,D_3_1F,D_3_20,D_3_21,D_3_22,D_3_23,D_3_24,D_3_25,D_3_26,D_3_27,D_3_28,D_3_29,D_3_2A,D_3_2B,D_3_2C,D_3_2D,D_3_2E,D_3_2F,D_3_30,D_3_31,D_3_32,D_3_33,D_3_34,D_3_35,D_3_36,D_3_37,D_3_38,D_3_39,D_3_3A,D_3_3B,D_3_3C,D_3_3D,D_3_3E,D_3_3F)
ram3(CLK1, AB1x, CSM[0], READ, DO1[3], DI1[3], CLK2, AB2, CS2, DO2[3]);
RAM16Kx1#(D_4_00,D_4_01,D_4_02,D_4_03,D_4_04,D_4_05,D_4_06,D_4_07,D_4_08,D_4_09,D_4_0A,D_4_0B,D_4_0C,D_4_0D,D_4_0E,D_4_0F,D_4_10,D_4_11,D_4_12,D_4_13,D_4_14,D_4_15,D_4_16,D_4_17,D_4_18,D_4_19,D_4_1A,D_4_1B,D_4_1C,D_4_1D,D_4_1E,D_4_1F,D_4_20,D_4_21,D_4_22,D_4_23,D_4_24,D_4_25,D_4_26,D_4_27,D_4_28,D_4_29,D_4_2A,D_4_2B,D_4_2C,D_4_2D,D_4_2E,D_4_2F,D_4_30,D_4_31,D_4_32,D_4_33,D_4_34,D_4_35,D_4_36,D_4_37,D_4_38,D_4_39,D_4_3A,D_4_3B,D_4_3C,D_4_3D,D_4_3E,D_4_3F)
ram4(CLK1, AB1x, CSM[0], READ, DO1[4], DI1[4], CLK2, AB2, CS2, DO2[4]);
RAM16Kx1#(D_5_00,D_5_01,D_5_02,D_5_03,D_5_04,D_5_05,D_5_06,D_5_07,D_5_08,D_5_09,D_5_0A,D_5_0B,D_5_0C,D_5_0D,D_5_0E,D_5_0F,D_5_10,D_5_11,D_5_12,D_5_13,D_5_14,D_5_15,D_5_16,D_5_17,D_5_18,D_5_19,D_5_1A,D_5_1B,D_5_1C,D_5_1D,D_5_1E,D_5_1F,D_5_20,D_5_21,D_5_22,D_5_23,D_5_24,D_5_25,D_5_26,D_5_27,D_5_28,D_5_29,D_5_2A,D_5_2B,D_5_2C,D_5_2D,D_5_2E,D_5_2F,D_5_30,D_5_31,D_5_32,D_5_33,D_5_34,D_5_35,D_5_36,D_5_37,D_5_38,D_5_39,D_5_3A,D_5_3B,D_5_3C,D_5_3D,D_5_3E,D_5_3F)
ram5(CLK1, AB1x, CSM[0], READ, DO1[5], DI1[5], CLK2, AB2, CS2, DO2[5]);
RAM16Kx1#(D_6_00,D_6_01,D_6_02,D_6_03,D_6_04,D_6_05,D_6_06,D_6_07,D_6_08,D_6_09,D_6_0A,D_6_0B,D_6_0C,D_6_0D,D_6_0E,D_6_0F,D_6_10,D_6_11,D_6_12,D_6_13,D_6_14,D_6_15,D_6_16,D_6_17,D_6_18,D_6_19,D_6_1A,D_6_1B,D_6_1C,D_6_1D,D_6_1E,D_6_1F,D_6_20,D_6_21,D_6_22,D_6_23,D_6_24,D_6_25,D_6_26,D_6_27,D_6_28,D_6_29,D_6_2A,D_6_2B,D_6_2C,D_6_2D,D_6_2E,D_6_2F,D_6_30,D_6_31,D_6_32,D_6_33,D_6_34,D_6_35,D_6_36,D_6_37,D_6_38,D_6_39,D_6_3A,D_6_3B,D_6_3C,D_6_3D,D_6_3E,D_6_3F)
ram6(CLK1, AB1x, CSM[0], READ, DO1[6], DI1[6], CLK2, AB2, CS2, DO2[6]);
RAM16Kx1#(D_7_00,D_7_01,D_7_02,D_7_03,D_7_04,D_7_05,D_7_06,D_7_07,D_7_08,D_7_09,D_7_0A,D_7_0B,D_7_0C,D_7_0D,D_7_0E,D_7_0F,D_7_10,D_7_11,D_7_12,D_7_13,D_7_14,D_7_15,D_7_16,D_7_17,D_7_18,D_7_19,D_7_1A,D_7_1B,D_7_1C,D_7_1D,D_7_1E,D_7_1F,D_7_20,D_7_21,D_7_22,D_7_23,D_7_24,D_7_25,D_7_26,D_7_27,D_7_28,D_7_29,D_7_2A,D_7_2B,D_7_2C,D_7_2D,D_7_2E,D_7_2F,D_7_30,D_7_31,D_7_32,D_7_33,D_7_34,D_7_35,D_7_36,D_7_37,D_7_38,D_7_39,D_7_3A,D_7_3B,D_7_3C,D_7_3D,D_7_3E,D_7_3F)
ram7(CLK1, AB1x, CSM[0], READ, DO1[7], DI1[7], CLK2, AB2, CS2, DO2[7]);
RAM16Kx1#(D_8_00,D_8_01,D_8_02,D_8_03,D_8_04,D_8_05,D_8_06,D_8_07,D_8_08,D_8_09,D_8_0A,D_8_0B,D_8_0C,D_8_0D,D_8_0E,D_8_0F,D_8_10,D_8_11,D_8_12,D_8_13,D_8_14,D_8_15,D_8_16,D_8_17,D_8_18,D_8_19,D_8_1A,D_8_1B,D_8_1C,D_8_1D,D_8_1E,D_8_1F,D_8_20,D_8_21,D_8_22,D_8_23,D_8_24,D_8_25,D_8_26,D_8_27,D_8_28,D_8_29,D_8_2A,D_8_2B,D_8_2C,D_8_2D,D_8_2E,D_8_2F,D_8_30,D_8_31,D_8_32,D_8_33,D_8_34,D_8_35,D_8_36,D_8_37,D_8_38,D_8_39,D_8_3A,D_8_3B,D_8_3C,D_8_3D,D_8_3E,D_8_3F)
ram8(CLK1, AB1x, CSM[1], READ, DO1[0], DI1[0], CLK2, AB2, CS2, DO2[8]);
RAM16Kx1#(D_9_00,D_9_01,D_9_02,D_9_03,D_9_04,D_9_05,D_9_06,D_9_07,D_9_08,D_9_09,D_9_0A,D_9_0B,D_9_0C,D_9_0D,D_9_0E,D_9_0F,D_9_10,D_9_11,D_9_12,D_9_13,D_9_14,D_9_15,D_9_16,D_9_17,D_9_18,D_9_19,D_9_1A,D_9_1B,D_9_1C,D_9_1D,D_9_1E,D_9_1F,D_9_20,D_9_21,D_9_22,D_9_23,D_9_24,D_9_25,D_9_26,D_9_27,D_9_28,D_9_29,D_9_2A,D_9_2B,D_9_2C,D_9_2D,D_9_2E,D_9_2F,D_9_30,D_9_31,D_9_32,D_9_33,D_9_34,D_9_35,D_9_36,D_9_37,D_9_38,D_9_39,D_9_3A,D_9_3B,D_9_3C,D_9_3D,D_9_3E,D_9_3F)
ram9(CLK1, AB1x, CSM[1], READ, DO1[1], DI1[1], CLK2, AB2, CS2, DO2[9]);
RAM16Kx1#(D_A_00,D_A_01,D_A_02,D_A_03,D_A_04,D_A_05,D_A_06,D_A_07,D_A_08,D_A_09,D_A_0A,D_A_0B,D_A_0C,D_A_0D,D_A_0E,D_A_0F,D_A_10,D_A_11,D_A_12,D_A_13,D_A_14,D_A_15,D_A_16,D_A_17,D_A_18,D_A_19,D_A_1A,D_A_1B,D_A_1C,D_A_1D,D_A_1E,D_A_1F,D_A_20,D_A_21,D_A_22,D_A_23,D_A_24,D_A_25,D_A_26,D_A_27,D_A_28,D_A_29,D_A_2A,D_A_2B,D_A_2C,D_A_2D,D_A_2E,D_A_2F,D_A_30,D_A_31,D_A_32,D_A_33,D_A_34,D_A_35,D_A_36,D_A_37,D_A_38,D_A_39,D_A_3A,D_A_3B,D_A_3C,D_A_3D,D_A_3E,D_A_3F)
ramA(CLK1, AB1x, CSM[1], READ, DO1[2], DI1[2], CLK2, AB2, CS2, DO2[10]);
RAM16Kx1#(D_B_00,D_B_01,D_B_02,D_B_03,D_B_04,D_B_05,D_B_06,D_B_07,D_B_08,D_B_09,D_B_0A,D_B_0B,D_B_0C,D_B_0D,D_B_0E,D_B_0F,D_B_10,D_B_11,D_B_12,D_B_13,D_B_14,D_B_15,D_B_16,D_B_17,D_B_18,D_B_19,D_B_1A,D_B_1B,D_B_1C,D_B_1D,D_B_1E,D_B_1F,D_B_20,D_B_21,D_B_22,D_B_23,D_B_24,D_B_25,D_B_26,D_B_27,D_B_28,D_B_29,D_B_2A,D_B_2B,D_B_2C,D_B_2D,D_B_2E,D_B_2F,D_B_30,D_B_31,D_B_32,D_B_33,D_B_34,D_B_35,D_B_36,D_B_37,D_B_38,D_B_39,D_B_3A,D_B_3B,D_B_3C,D_B_3D,D_B_3E,D_B_3F)
ramB(CLK1, AB1x, CSM[1], READ, DO1[3], DI1[3], CLK2, AB2, CS2, DO2[11]);
RAM16Kx1#(D_C_00,D_C_01,D_C_02,D_C_03,D_C_04,D_C_05,D_C_06,D_C_07,D_C_08,D_C_09,D_C_0A,D_C_0B,D_C_0C,D_C_0D,D_C_0E,D_C_0F,D_C_10,D_C_11,D_C_12,D_C_13,D_C_14,D_C_15,D_C_16,D_C_17,D_C_18,D_C_19,D_C_1A,D_C_1B,D_C_1C,D_C_1D,D_C_1E,D_C_1F,D_C_20,D_C_21,D_C_22,D_C_23,D_C_24,D_C_25,D_C_26,D_C_27,D_C_28,D_C_29,D_C_2A,D_C_2B,D_C_2C,D_C_2D,D_C_2E,D_C_2F,D_C_30,D_C_31,D_C_32,D_C_33,D_C_34,D_C_35,D_C_36,D_C_37,D_C_38,D_C_39,D_C_3A,D_C_3B,D_C_3C,D_C_3D,D_C_3E,D_C_3F)
ramC(CLK1, AB1x, CSM[1], READ, DO1[4], DI1[4], CLK2, AB2, CS2, DO2[12]);
RAM16Kx1#(D_D_00,D_D_01,D_D_02,D_D_03,D_D_04,D_D_05,D_D_06,D_D_07,D_D_08,D_D_09,D_D_0A,D_D_0B,D_D_0C,D_D_0D,D_D_0E,D_D_0F,D_D_10,D_D_11,D_D_12,D_D_13,D_D_14,D_D_15,D_D_16,D_D_17,D_D_18,D_D_19,D_D_1A,D_D_1B,D_D_1C,D_D_1D,D_D_1E,D_D_1F,D_D_20,D_D_21,D_D_22,D_D_23,D_D_24,D_D_25,D_D_26,D_D_27,D_D_28,D_D_29,D_D_2A,D_D_2B,D_D_2C,D_D_2D,D_D_2E,D_D_2F,D_D_30,D_D_31,D_D_32,D_D_33,D_D_34,D_D_35,D_D_36,D_D_37,D_D_38,D_D_39,D_D_3A,D_D_3B,D_D_3C,D_D_3D,D_D_3E,D_D_3F)
ramD(CLK1, AB1x, CSM[1], READ, DO1[5], DI1[5], CLK2, AB2, CS2, DO2[13]);
RAM16Kx1#(D_E_00,D_E_01,D_E_02,D_E_03,D_E_04,D_E_05,D_E_06,D_E_07,D_E_08,D_E_09,D_E_0A,D_E_0B,D_E_0C,D_E_0D,D_E_0E,D_E_0F,D_E_10,D_E_11,D_E_12,D_E_13,D_E_14,D_E_15,D_E_16,D_E_17,D_E_18,D_E_19,D_E_1A,D_E_1B,D_E_1C,D_E_1D,D_E_1E,D_E_1F,D_E_20,D_E_21,D_E_22,D_E_23,D_E_24,D_E_25,D_E_26,D_E_27,D_E_28,D_E_29,D_E_2A,D_E_2B,D_E_2C,D_E_2D,D_E_2E,D_E_2F,D_E_30,D_E_31,D_E_32,D_E_33,D_E_34,D_E_35,D_E_36,D_E_37,D_E_38,D_E_39,D_E_3A,D_E_3B,D_E_3C,D_E_3D,D_E_3E,D_E_3F)
ramE(CLK1, AB1x, CSM[1], READ, DO1[6], DI1[6], CLK2, AB2, CS2, DO2[14]);
RAM16Kx1#(D_F_00,D_F_01,D_F_02,D_F_03,D_F_04,D_F_05,D_F_06,D_F_07,D_F_08,D_F_09,D_F_0A,D_F_0B,D_F_0C,D_F_0D,D_F_0E,D_F_0F,D_F_10,D_F_11,D_F_12,D_F_13,D_F_14,D_F_15,D_F_16,D_F_17,D_F_18,D_F_19,D_F_1A,D_F_1B,D_F_1C,D_F_1D,D_F_1E,D_F_1F,D_F_20,D_F_21,D_F_22,D_F_23,D_F_24,D_F_25,D_F_26,D_F_27,D_F_28,D_F_29,D_F_2A,D_F_2B,D_F_2C,D_F_2D,D_F_2E,D_F_2F,D_F_30,D_F_31,D_F_32,D_F_33,D_F_34,D_F_35,D_F_36,D_F_37,D_F_38,D_F_39,D_F_3A,D_F_3B,D_F_3C,D_F_3D,D_F_3E,D_F_3F)
ramF(CLK1, AB1x, CSM[1], READ, DO1[7], DI1[7], CLK2, AB2, CS2, DO2[15]);
/trunk/juke-box/ag_ram.v
0,0 → 1,253
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: BMSTU
// Engineer: Odintsov Oleg
//
// Create Date: 11:15:41 02/24/2012
// Design Name:
// Module Name: ag_ram
// Project Name: Agat Hardware Project
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
 
// Enable the following define to use synchronous memory instead of
// asynchronous (which has been used in real Agats).
// The use of the synchronous memory will improve hardware design on FPGA
`define AG_RAM_SYNCHRONOUS
 
 
`ifdef AG_RAM_SYNCHRONOUS
 
module RAM16Kx1(input CLK1, input[13:0] AB1, input CS1, input READ,
output DO1, input DI1,
input CLK2, input[13:0] AB2, input CS2, output DO2);
parameter
D_00 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_01 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_02 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_03 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_04 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_05 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_06 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_07 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_08 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_09 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_0A = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_0B = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_0C = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_0D = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_0E = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_0F = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
// Address 4096 to 8191
D_10 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_11 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_12 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_13 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_14 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_15 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_16 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_17 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_18 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_19 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_1A = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_1B = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_1C = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_1D = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_1E = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_1F = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
// Address 8192 to 12287
D_20 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_21 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_22 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_23 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_24 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_25 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_26 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_27 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_28 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_29 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_2A = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_2B = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_2C = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_2D = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_2E = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_2F = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
// Address 12288 to 16383
D_30 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_31 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_32 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_33 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_34 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_35 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_36 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_37 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_38 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_39 = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_3A = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_3B = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_3C = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_3D = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_3E = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC,
D_3F = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC;
wire DO1x, DO2x;
assign DO1 = CS1? DO1x: 1'bZ;
assign DO2 = CS2? DO2x: 1'bZ;
// RAMB16_S1_S1: 16k x 1 Dual-Port RAM
// Spartan-3E
// Xilinx HDL Language Template, version 13.3
 
RAMB16_S1_S1 #(
.INIT_A(1'b0), // Value of output RAM registers on Port A at startup
.INIT_B(1'b0), // Value of output RAM registers on Port B at startup
.SRVAL_A(1'b0), // Port A output value upon SSR assertion
.SRVAL_B(1'b0), // Port B output value upon SSR assertion
.WRITE_MODE_A("WRITE_FIRST"), // WRITE_FIRST, READ_FIRST or NO_CHANGE
.WRITE_MODE_B("WRITE_FIRST"), // WRITE_FIRST, READ_FIRST or NO_CHANGE
.SIM_COLLISION_CHECK("ALL"), // "NONE", "WARNING_ONLY", "GENERATE_X_ONLY", "ALL"
 
// The following INIT_xx declarations specify the initial contents of the RAM
// Address 0 to 4095
.INIT_00(D_00), .INIT_01(D_01), .INIT_02(D_02), .INIT_03(D_03),
.INIT_04(D_04), .INIT_05(D_05), .INIT_06(D_06), .INIT_07(D_07),
.INIT_08(D_08), .INIT_09(D_09), .INIT_0A(D_0A), .INIT_0B(D_0B),
.INIT_0C(D_0C), .INIT_0D(D_0D), .INIT_0E(D_0E), .INIT_0F(D_0F),
// Address 4096 to 8191
.INIT_10(D_10), .INIT_11(D_11), .INIT_12(D_12), .INIT_13(D_13),
.INIT_14(D_14), .INIT_15(D_15), .INIT_16(D_16), .INIT_17(D_17),
.INIT_18(D_18), .INIT_19(D_19), .INIT_1A(D_1A), .INIT_1B(D_1B),
.INIT_1C(D_1C), .INIT_1D(D_1D), .INIT_1E(D_1E), .INIT_1F(D_1F),
// Address 8192 to 12287
.INIT_20(D_20), .INIT_21(D_21), .INIT_22(D_22), .INIT_23(D_23),
.INIT_24(D_24), .INIT_25(D_25), .INIT_26(D_26), .INIT_27(D_27),
.INIT_28(D_28), .INIT_29(D_29), .INIT_2A(D_2A), .INIT_2B(D_2B),
.INIT_2C(D_2C), .INIT_2D(D_2D), .INIT_2E(D_2E), .INIT_2F(D_2F),
// Address 12288 to 16383
.INIT_30(D_30), .INIT_31(D_31), .INIT_32(D_32), .INIT_33(D_33),
.INIT_34(D_34), .INIT_35(D_35), .INIT_36(D_36), .INIT_37(D_37),
.INIT_38(D_38), .INIT_39(D_39), .INIT_3A(D_3A), .INIT_3B(D_3B),
.INIT_3C(D_3C), .INIT_3D(D_3D), .INIT_3E(D_3E), .INIT_3F(D_3F)
) RAMB16_S1_S1_inst (
.DOA(DO1x), // Port A 1-bit Data Output
.DOB(DO2x), // Port B 1-bit Data Output
.ADDRA(AB1), // Port A 14-bit Address Input
.ADDRB(AB2), // Port B 14-bit Address Input
.CLKA(CLK1), // Port A Clock
.CLKB(CLK2), // Port B Clock
.DIA(DI1), // Port A 1-bit Data Input
.DIB(1'bZ), // Port B 1-bit Data Input
.ENA(CS1), // Port A RAM Enable Input
.ENB(CS2), // Port B RAM Enable Input
.SSRA(1'b0), // Port A Synchronous Set/Reset Input
.SSRB(1'b0), // Port B Synchronous Set/Reset Input
.WEA(~READ), // Port A Write Enable Input
.WEB(1'b0) // Port B Write Enable Input
);
endmodule
 
 
`else
 
 
module RAM1Kx1(input CLK1, input[9:0] AB1, input CS1, input READ,
output DO1, input DI1,
input CLK2, input[9:0] AB2, input CS2, output DO2);
parameter FILL = 256'h33333333333333333333333333333333CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC;
reg mem[0:'h3FF];
integer i;
 
initial
for (i = 0; i < 'h400; i = i + 1)
mem[i] = (FILL&(256'b01<<(i&'hFF)))?1'b1:1'b0;
 
assign DO1 = (CS1 && READ)? mem[AB1]: 1'bZ;
assign DO2 = CS2? mem[AB2]: 1'bZ;
always @(posedge CLK1) if (CS1 && !READ) mem[AB1] <= DI1;
endmodule
 
 
 
module RAM16Kx1(input CLK1, input[13:0] AB1, input CS1, input READ,
output DO1, input DI1,
input CLK2, input[13:0] AB2, input CS2, output DO2);
wire[3:0] SEL1 = AB1[13:10];
wire[3:0] SEL2 = AB2[13:10];
 
RAM1Kx1 ram0(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h0), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h0), DO2);
RAM1Kx1 ram1(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h1), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h1), DO2);
RAM1Kx1 ram2(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h2), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h2), DO2);
RAM1Kx1 ram3(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h3), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h3), DO2);
RAM1Kx1 ram4(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h4), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h4), DO2);
RAM1Kx1 ram5(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h5), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h5), DO2);
RAM1Kx1 ram6(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h6), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h6), DO2);
RAM1Kx1 ram7(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h7), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h7), DO2);
RAM1Kx1 ram8(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h8), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h8), DO2);
RAM1Kx1 ram9(CLK1, AB1[9:0], CS1 && (SEL1 == 4'h9), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'h9), DO2);
RAM1Kx1 ramA(CLK1, AB1[9:0], CS1 && (SEL1 == 4'hA), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'hA), DO2);
RAM1Kx1 ramB(CLK1, AB1[9:0], CS1 && (SEL1 == 4'hB), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'hB), DO2);
RAM1Kx1 ramC(CLK1, AB1[9:0], CS1 && (SEL1 == 4'hC), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'hC), DO2);
RAM1Kx1 ramD(CLK1, AB1[9:0], CS1 && (SEL1 == 4'hD), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'hD), DO2);
RAM1Kx1 ramE(CLK1, AB1[9:0], CS1 && (SEL1 == 4'hE), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'hE), DO2);
RAM1Kx1 ramF(CLK1, AB1[9:0], CS1 && (SEL1 == 4'hF), READ, DO1, DI1,
CLK2, AB2[9:0], CS2 && (SEL2 == 4'hF), DO2);
endmodule
 
`endif // synchronous
 
 
/*
Data bus for video controller:
A0=0, DO2: A0=1, DO2:
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Data bus for processor:
A0=0, DO1/DI1: A0=1, DO1/DI1:
07 06 05 04 03 02 01 00 07 06 05 04 03 02 01 00
*/
module RAM32Kx8x16(input CLK1, input[14:0] AB1, input CS1,
input READ, output[7:0] DO1, input[7:0] DI1,
input CLK2, input[13:0] AB2, input CS2, output[15:0] DO2);
wire[1:0] CSM = {(~AB1[0]) & CS1, AB1[0] & CS1}; // CS for modules
wire[13:0] AB1x = AB1[14:1];
`include "juke-box.v"
/* RAM16Kx1 ram0(CLK1, AB1x, CSM[0], READ, DO1[0], DI1[0], CLK2, AB2, CS2, DO2[0]);
RAM16Kx1 ram1(CLK1, AB1x, CSM[0], READ, DO1[1], DI1[1], CLK2, AB2, CS2, DO2[1]);
RAM16Kx1 ram2(CLK1, AB1x, CSM[0], READ, DO1[2], DI1[2], CLK2, AB2, CS2, DO2[2]);
RAM16Kx1 ram3(CLK1, AB1x, CSM[0], READ, DO1[3], DI1[3], CLK2, AB2, CS2, DO2[3]);
RAM16Kx1 ram4(CLK1, AB1x, CSM[0], READ, DO1[4], DI1[4], CLK2, AB2, CS2, DO2[4]);
RAM16Kx1 ram5(CLK1, AB1x, CSM[0], READ, DO1[5], DI1[5], CLK2, AB2, CS2, DO2[5]);
RAM16Kx1 ram6(CLK1, AB1x, CSM[0], READ, DO1[6], DI1[6], CLK2, AB2, CS2, DO2[6]);
RAM16Kx1 ram7(CLK1, AB1x, CSM[0], READ, DO1[7], DI1[7], CLK2, AB2, CS2, DO2[7]);
RAM16Kx1 ram8(CLK1, AB1x, CSM[1], READ, DO1[0], DI1[0], CLK2, AB2, CS2, DO2[8]);
RAM16Kx1 ram9(CLK1, AB1x, CSM[1], READ, DO1[1], DI1[1], CLK2, AB2, CS2, DO2[9]);
RAM16Kx1 ramA(CLK1, AB1x, CSM[1], READ, DO1[2], DI1[2], CLK2, AB2, CS2, DO2[10]);
RAM16Kx1 ramB(CLK1, AB1x, CSM[1], READ, DO1[3], DI1[3], CLK2, AB2, CS2, DO2[11]);
RAM16Kx1 ramC(CLK1, AB1x, CSM[1], READ, DO1[4], DI1[4], CLK2, AB2, CS2, DO2[12]);
RAM16Kx1 ramD(CLK1, AB1x, CSM[1], READ, DO1[5], DI1[5], CLK2, AB2, CS2, DO2[13]);
RAM16Kx1 ramE(CLK1, AB1x, CSM[1], READ, DO1[6], DI1[6], CLK2, AB2, CS2, DO2[14]);
RAM16Kx1 ramF(CLK1, AB1x, CSM[1], READ, DO1[7], DI1[7], CLK2, AB2, CS2, DO2[15]);*/
endmodule
/trunk/juke-box/juke-box.xise
0,0 → 1,405
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
 
<header>
<!-- ISE source project file created by Project Navigator. -->
<!-- -->
<!-- This file contains project source information including a list of -->
<!-- project source files, project and process properties. This file, -->
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
<!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. -->
</header>
 
<version xil_pn:ise_version="13.3" xil_pn:schema_version="2"/>
 
<files>
<file xil_pn:name="ag_6502.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="6"/>
<association xil_pn:name="Implementation" xil_pn:seqID="6"/>
</file>
<file xil_pn:name="ag_keyb.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="5"/>
<association xil_pn:name="Implementation" xil_pn:seqID="5"/>
</file>
<file xil_pn:name="ag_main.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="7"/>
<association xil_pn:name="Implementation" xil_pn:seqID="7"/>
</file>
<file xil_pn:name="ag_ram.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="4"/>
<association xil_pn:name="Implementation" xil_pn:seqID="4"/>
</file>
<file xil_pn:name="ag_video.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="3"/>
<association xil_pn:name="Implementation" xil_pn:seqID="3"/>
</file>
<file xil_pn:name="chip1.ucf" xil_pn:type="FILE_UCF">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="chip1.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
<association xil_pn:name="Implementation" xil_pn:seqID="8"/>
</file>
<file xil_pn:name="clkdiv.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
<association xil_pn:name="Implementation" xil_pn:seqID="2"/>
</file>
<file xil_pn:name="videoctl.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
<association xil_pn:name="Implementation" xil_pn:seqID="1"/>
</file>
</files>
 
<properties>
<property xil_pn:name="Add I/O Buffers" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Logic Optimization Across Hierarchy" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow SelectMAP Pins to Persist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unexpanded Blocks" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unmatched LOC Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unmatched Timing Group Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Asynchronous To Synchronous" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Auto Implementation Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Auto Implementation Top" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Automatic BRAM Packing" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Automatically Insert glbl Module in the Netlist" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Automatically Run Generate Target PROM/ACE File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="BRAM Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Bring Out Global Set/Reset Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bring Out Global Tristate Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bus Delimiter" xil_pn:value="&lt;>" xil_pn:valueState="default"/>
<property xil_pn:name="CLB Pack Factor Percentage" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Case" xil_pn:value="Maintain" xil_pn:valueState="default"/>
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Change Device Speed To" xil_pn:value="-4" xil_pn:valueState="default"/>
<property xil_pn:name="Change Device Speed To Post Trace" xil_pn:value="-4" xil_pn:valueState="default"/>
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Input Limit (4-40)" xil_pn:value="32" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Pterm Limit (3-56)" xil_pn:value="28" xil_pn:valueState="default"/>
<property xil_pn:name="Combinatorial Logic Optimization" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile EDK Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile XilinxCoreLib (CORE Generator) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile for HDL Debugging" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile uni9000 (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin Done" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin Program" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Rate" xil_pn:value="Default (1)" xil_pn:valueState="default"/>
<property xil_pn:name="Correlate Output to Input Design" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create ASCII Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Binary Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Bit File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Create I/O Pads from Ports" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create IEEE 1532 Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Logic Allocation File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Mask File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create ReadBack Data Files" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Cross Clock Analysis" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Custom Simulation Command File" xil_pn:value="test1" xil_pn:valueState="non-default"/>
<property xil_pn:name="Custom Waveform Configuration File Behav" xil_pn:value="Default.wcfg" xil_pn:valueState="non-default"/>
<property xil_pn:name="Decoder Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Default Powerup Value of Registers" xil_pn:value="Low" xil_pn:valueState="default"/>
<property xil_pn:name="Delay Values To Be Read from SDF" xil_pn:value="Setup Time" xil_pn:valueState="default"/>
<property xil_pn:name="Device" xil_pn:value="xc3s500e" xil_pn:valueState="non-default"/>
<property xil_pn:name="Device Family" xil_pn:value="Spartan3E" xil_pn:valueState="non-default"/>
<property xil_pn:name="Device Speed Grade/Select ABS Minimum" xil_pn:value="-4" xil_pn:valueState="default"/>
<property xil_pn:name="Do Not Escape Signal and Instance Names in Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Done (Output Events)" xil_pn:value="Default (4)" xil_pn:valueState="default"/>
<property xil_pn:name="Drive Done Pin High" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Cyclic Redundancy Checking (CRC)" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Debugging of Serial Mode BitStream" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Hardware Co-Simulation" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Internal Done Pipe" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Message Filtering" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Outputs (Output Events)" xil_pn:value="Default (5)" xil_pn:valueState="default"/>
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Evaluation Development Board" xil_pn:value="Spartan-3E Starter Board" xil_pn:valueState="non-default"/>
<property xil_pn:name="Exclude Compilation of Deprecated EDK Cores" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Exclude Compilation of EDK Sub-Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Extra Effort" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Extra Effort (Highest PAR level only)" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="FPGA Start-Up Clock" xil_pn:value="CCLK" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Style" xil_pn:value="LUT" xil_pn:valueState="default"/>
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Flatten Output Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Function Block Input Limit (4-40)" xil_pn:value="38" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Schematic" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Architecture Only (No Entity Declaration)" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Asynchronous Delay Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Clock Region Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Constraints Interaction Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Constraints Interaction Report Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Datasheet Section" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Datasheet Section Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Detailed MAP Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Multiple Hierarchical Netlist Files" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Fit Power Data" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Fit Simulation Model" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Place &amp; Route Power Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Place &amp; Route Simulation Model" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate RTL Schematic" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Generate SAIF File for Power Optimization/Estimation Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Testbench File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Timegroups Section" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Timegroups Section Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generics, Parameters" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Global Optimization Goal" xil_pn:value="AllClockNets" xil_pn:valueState="default"/>
<property xil_pn:name="Global Set/Reset Port Name" xil_pn:value="GSR_PORT" xil_pn:valueState="default"/>
<property xil_pn:name="Global Tristate Port Name" xil_pn:value="GTS_PORT" xil_pn:valueState="default"/>
<property xil_pn:name="HDL Equations Style" xil_pn:value="Source" xil_pn:valueState="default"/>
<property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
<property xil_pn:name="I/O Voltage Standard" xil_pn:value="LVCMOS18" xil_pn:valueState="default"/>
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Ignore User Timing Constraints Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Ignore User Timing Constraints Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Template" xil_pn:value="Optimize Density" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Top" xil_pn:value="Module|chip1" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top File" xil_pn:value="chip1.v" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/chip1" xil_pn:valueState="non-default"/>
<property xil_pn:name="Include 'uselib Directive in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include SIMPRIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include UNISIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include sdf_annotate task in Verilog File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Incremental Compilation" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Input and tristate I/O Termination Mode" xil_pn:value="Keeper" xil_pn:valueState="default"/>
<property xil_pn:name="Insert Buffers to Prevent Pulse Swallowing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Instantiation Template Target Language Xps" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TCK" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TDI" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TDO" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TMS" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Keep Hierarchy CPLD" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Logic Optimization" xil_pn:value="Density" xil_pn:valueState="default"/>
<property xil_pn:name="Logical Shifter Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Map Effort Level" xil_pn:value="High" xil_pn:valueState="default"/>
<property xil_pn:name="Map Slice Logic into Unused Block RAMs" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Max Fanout" xil_pn:value="500" xil_pn:valueState="default"/>
<property xil_pn:name="Maximum Number of Lines in Report" xil_pn:value="1000" xil_pn:valueState="default"/>
<property xil_pn:name="Maximum Signal Name Length" xil_pn:value="20" xil_pn:valueState="default"/>
<property xil_pn:name="Move First Flip-Flop Stage" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Move Last Flip-Flop Stage" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Multiplier Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Mux Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
<property xil_pn:name="Netlist Translation Type" xil_pn:value="Timestamp" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="24" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Paths in Error/Verbose Report" xil_pn:value="3" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Paths in Error/Verbose Report Post Trace" xil_pn:value="3" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Strategy (Cover Mode)" xil_pn:value="Area" xil_pn:valueState="default"/>
<property xil_pn:name="Optimize Instantiated Primitives" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Other Bitgen Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Map" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Par" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Translate" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compxlib Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Map Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other NETGEN Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Ngdbuild Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Place &amp; Route Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Programming Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Fit" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Timing Report Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Output File Name" xil_pn:value="chip1" xil_pn:valueState="default"/>
<property xil_pn:name="Output Slew Rate" xil_pn:value="Fast" xil_pn:valueState="default"/>
<property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Pack I/O Registers into IOBs" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Pack I/O Registers/Latches into IOBs" xil_pn:value="Off" xil_pn:valueState="default"/>
<property xil_pn:name="Package" xil_pn:value="fg320" xil_pn:valueState="non-default"/>
<property xil_pn:name="Perform Advanced Analysis" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Perform Advanced Analysis Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Perform Timing-Driven Packing and Placement" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Place &amp; Route Effort Level (Overall)" xil_pn:value="High" xil_pn:valueState="default"/>
<property xil_pn:name="Place And Route Mode" xil_pn:value="Normal Place and Route" xil_pn:valueState="default"/>
<property xil_pn:name="Placer Effort Level (Overrides Overall Level)" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
<property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="chip1_map.v" xil_pn:valueState="default"/>
<property xil_pn:name="Post Place &amp; Route Simulation Model Name" xil_pn:value="chip1_timesim.v" xil_pn:valueState="default"/>
<property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="chip1_synthesis.v" xil_pn:valueState="default"/>
<property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="chip1_translate.v" xil_pn:valueState="default"/>
<property xil_pn:name="Power Reduction Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Power Reduction Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Preferred Language" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Preserve Unused Inputs" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Priority Encoder Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Produce Verbose Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Project Description" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Property Specification in Project File" xil_pn:value="Store all values" xil_pn:valueState="default"/>
<property xil_pn:name="RAM Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="RAM Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="ROM Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="ROM Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Read Cores" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Regenerate Core" xil_pn:value="Under Current Project Setting" xil_pn:valueState="default"/>
<property xil_pn:name="Register Balancing" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Register Duplication" xil_pn:value="Off" xil_pn:valueState="default"/>
<property xil_pn:name="Register Duplication Xst" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Release Write Enable (Output Events)" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Entity to" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Report Fastest Path(s) in Each Constraint" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Report Fastest Path(s) in Each Constraint Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Report Paths by Endpoint" xil_pn:value="3" xil_pn:valueState="default"/>
<property xil_pn:name="Report Paths by Endpoint Post Trace" xil_pn:value="3" xil_pn:valueState="default"/>
<property xil_pn:name="Report Type" xil_pn:value="Verbose Report" xil_pn:valueState="default"/>
<property xil_pn:name="Report Type Post Trace" xil_pn:value="Verbose Report" xil_pn:valueState="default"/>
<property xil_pn:name="Report Unconstrained Paths" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Report Unconstrained Paths Post Trace" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Reset DCM if SHUTDOWN &amp; AGHIGH performed" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Reset On Configuration Pulse Width" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Resource Sharing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Retain Hierarchy" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Router Effort Level (Overrides Overall Level)" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Run Design Rules Checker (DRC)" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time" xil_pn:value="false" xil_pn:valueState="non-default"/>
<property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="/ag_test" xil_pn:valueState="non-default"/>
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.ag_test" xil_pn:valueState="non-default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Source Node" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Shift Register Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Show All Models" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Model Target" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time ISim" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Map" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Par" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Translate" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Slice Packing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Slice Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="work.ag_test" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Fit" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Post-Map" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Speed Grade" xil_pn:value="-4" xil_pn:valueState="non-default"/>
<property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="1" xil_pn:valueState="default"/>
<property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="1" xil_pn:valueState="default"/>
<property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Mode Map" xil_pn:value="Non Timing Driven" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Mode Par" xil_pn:value="Performance Evaluation" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Report Format" xil_pn:value="Summary" xil_pn:valueState="default"/>
<property xil_pn:name="Top-Level Module Name in Output Netlist" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
<property xil_pn:name="Trim Unconnected Signals" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Tristate On Configuration Pulse Width" xil_pn:value="0" xil_pn:valueState="default"/>
<property xil_pn:name="Unused I/O Pad Termination Mode" xil_pn:value="Keeper" xil_pn:valueState="default"/>
<property xil_pn:name="Unused IOB Pins" xil_pn:value="Pull Down" xil_pn:valueState="default"/>
<property xil_pn:name="Use 64-bit PlanAhead on 64-bit Systems" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Clock Enable" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Fit" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Post-Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Post-Route" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Post-Translate" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Behavioral" xil_pn:value="true" xil_pn:valueState="non-default"/>
<property xil_pn:name="Use Custom Simulation Command File Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Behav" xil_pn:value="true" xil_pn:valueState="non-default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Fit" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Data Gate" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Direct Input for Input Registers" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Clocks" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Output Enables" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Set/Reset" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use LOC Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Location Constraints" xil_pn:value="Always" xil_pn:valueState="default"/>
<property xil_pn:name="Use Multi-level Logic Optimization" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use RLOC Constraints" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synchronous Reset" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synchronous Set" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="UserID Code (8 Digit Hexadecimal)" xil_pn:value="0xFFFFFFFF" xil_pn:valueState="default"/>
<property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
<property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Wait for DLL Lock (Output Events)" xil_pn:value="Default (NoWait)" xil_pn:valueState="default"/>
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
<property xil_pn:name="Write Timing Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="XOR Collapsing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<!-- -->
<!-- The following properties are for internal use only. These should not be modified.-->
<!-- -->
<property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="Module|ag_test" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_DesignName" xil_pn:value="juke-box" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="spartan3e" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_FPGAConfiguration" xil_pn:value="FPGAConfiguration" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostFitSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostMapSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostParSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostSynthSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostXlateSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PreSynthesis" xil_pn:value="PreSynthesis" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2012-04-07T00:51:29" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="75A73CF067B446E8995B4DC2DDE59E35" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
</properties>
 
<bindings/>
 
<libraries/>
 
<autoManagedFiles>
<!-- The following files are identified by `include statements in verilog -->
<!-- source files and are automatically managed by Project Navigator. -->
<!-- -->
<!-- Do not hand-edit this section, as it will be overwritten when the -->
<!-- project is analyzed based on files automatically identified as -->
<!-- include files. -->
<file xil_pn:name="AGATHE7.V" xil_pn:type="FILE_VERILOG"/>
<file xil_pn:name="juke-box.v" xil_pn:type="FILE_VERILOG"/>
<file xil_pn:name="monitor7.v" xil_pn:type="FILE_VERILOG"/>
<file xil_pn:name="states.v" xil_pn:type="FILE_VERILOG"/>
</autoManagedFiles>
 
</project>
/trunk/juke-box/juke-box.bin Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
trunk/juke-box/juke-box.bin Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/juke-box/videoctl.v =================================================================== --- trunk/juke-box/videoctl.v (nonexistent) +++ trunk/juke-box/videoctl.v (revision 4) @@ -0,0 +1,68 @@ +`timescale 1ns / 1ps +////////////////////////////////////////////////////////////////////////////////// +// Company: BMSTU +// Engineer: Oleg Odintsov +// +// Create Date: 20:41:53 01/18/2012 +// Design Name: +// Module Name: videoctl +// Project Name: Agat Hardware Project +// Target Devices: +// Tool versions: +// Description: +// +// Dependencies: +// +// Revision: +// Revision 0.01 - File Created +// Additional Comments: +// +////////////////////////////////////////////////////////////////////////////////// + +module video_counters( + input clk, + output reg video_vsync = 1, + output reg video_hsync = 1, + output video_on, + output reg [10:1] hpos = 0, + output reg [9:1] vpos = 0); + + integer hcnt = 0, vcnt = 0; + + reg video_von = 0, video_hon = 0; + assign video_on = video_von & video_hon; + + always @(posedge video_hsync) begin + vcnt <= vcnt + 1; + vpos <= video_von?vpos + 1: 0; + case (vcnt) + 2: video_vsync = 1; + 31: video_von = 1; + 511: video_von = 0; + 521: begin vcnt <=0; video_vsync = 0; end + endcase + end + + always @(posedge clk) begin + if (!video_hon) hcnt <= hcnt - 1; + else hpos <= hpos + 1; + + if (hpos == 639) video_hon <= 0; + + if (hpos == 640) begin + if (!hcnt) begin + hcnt <= 96; + video_hsync <= 0; + hpos <= 0; + end + end else if (!hcnt) begin + if (!video_hsync) begin + video_hsync <= 1; + hcnt <= 48; + end else if (!video_hon) begin + video_hon <= 1; + hcnt <= 16; + end + end + end +endmodule Index: trunk/fighter/ag_6502.v =================================================================== --- trunk/fighter/ag_6502.v (revision 3) +++ trunk/fighter/ag_6502.v (revision 4) @@ -15,6 +15,7 @@ // // Revision: // Revision 0.01 - File Created +// Revision 0.02 - Fixed NMI bug // Additional Comments: // ////////////////////////////////////////////////////////////////////////////////// @@ -39,13 +40,13 @@ `else module ag6502_phase_shift(input baseclk, input phi_0, output reg phi_1); - parameter DELAY = 1; // delay in semi-waves of baseclk + parameter DELAY = 1; // delay in waves of baseclk initial phi_1 = 0; integer cnt = 0; always @(posedge baseclk) begin if (phi_0 != phi_1) begin - if (!cnt) begin phi_1 <= ~phi_1; cnt <= DELAY; end + if (!cnt) begin phi_1 <= phi_0; cnt <= DELAY; end else cnt <= cnt - 1; end end @@ -53,7 +54,7 @@ // baseclk is used to simulate delays on a real hardware module ag6502_ext_clock(input baseclk, input phi_0, output phi_1, output phi_2); - parameter DELAY1 = 3, DELAY2 = 1; // delays in semi-waves of baseclk + parameter DELAY1 = 3, DELAY2 = 1; // delays in waves of baseclk wire phi_1_neg, phi_01; @@ -145,7 +146,7 @@ reg rdyg = 1; reg[2:0] T = 7; - reg[7:0] IR ='h18; + reg[7:0] IR ='h00; reg[15:0] PC = 0; wire[7:0] PCH = PC[15:8], PCL = PC[7:0]; @@ -177,6 +178,8 @@ wire rst_active = ~rst; wire so_active = so & ~so_prev; + wire[7:0] IR_in = int_active?8'b0:db_in; + wire[1:0] vec_bits= nmi_active?2'b01: rst_active?2'b10: @@ -184,10 +187,8 @@ wire[15:0] vec_addr = {{13{1'b1}}, vec_bits, 1'b0}; - wire[7:0] IR_eff = int_active?8'b0:IR; + wire[10:0] L = {T, IR}; - wire[10:0] L = {T, IR_eff}; - `include "states.v" assign read = ~A_RW_W; @@ -266,8 +267,9 @@ E_T__0; always @(negedge phi_2) if (rdyg) begin - if (E_PC__PC_1) PC <= PC + 1; - else if (E_PC__EA) PC <= EA; + if (E_PC__PC_1) begin + if (T || (!int_active && !rst_active)) PC <= PC + 1; + end else if (E_PC__EA) PC <= EA; else begin if (E_PCH__RES) PC[15:8] <= RES; if (E_PCL__ALU) PC[7:0] <= ALU; @@ -277,8 +279,8 @@ end if (!T) begin - IR <= db_in; - if (!db_in) begin // BRK instruction + IR <= IR_in; + if (!IR_in) begin // BRK instruction {EAH, EAL} <= vec_addr; end nmi_prev <= nmi; @@ -326,8 +328,8 @@ if (cond) begin T <= 0; - if (!IR_eff) begin - FLAG_B <= !IR; + if (!IR) begin + FLAG_B <= !int_active; FLAG_I <= 1; end end else T <= T + ((E_T__T_1IF_ALUCZ && !ALU_CF)?2: 1);

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