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URL https://opencores.org/ocsvn/ahb_master/ahb_master/trunk

Subversion Repositories ahb_master

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  • This comparison shows the changes necessary to convert path 
    /ahb_master
    from Rev 12 to Rev 13
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Rev 12 → Rev 13

/trunk/src/base/def_axi2ahb_static.txt
29,13 → 29,14
 
SWAP.GLOBAL MODEL_NAME AXI2AHB bridge
 
VERIFY ((DATA_BITS==32) || (DATA_BITS==64))
VERIFY (DATA_BITS in 32, 64) ##Supports 32 or 64 bits data bus
VERIFY (SIZE_BITS in 2, 3) ##stub supports 32 or 64 bits data bus
GROUP AXI_A is {
ID ID_BITS input
ADDR ADDR_BITS input
LEN 4 input
SIZE 2 input
SIZE SIZE_BITS input
VALID 1 input
READY 1 output
}
/trunk/src/base/def_ic.txt
31,6 → 31,8
 
INCLUDE def_ic_static.txt
 
STARTUSER
SWAP.GLOBAL #FFD #1 ##flip-flop delay
 
SWAP.USER PREFIX fabric_MASTER_NUM_SLAVE_NUM ##prefix for all module and file names
44,6 → 46,8
SWAP.USER DATA_BITS 64 ##AXI data bits
SWAP.USER ADDR_BITS 32 ##AXI address bits
 
SWAP.USER SIZE_BITS 2 ##AXI size bits
DEFINE.USER DEF_DECERR_SLV ##use interanl decode slave error
SWAP.USER USER_BITS 4 ##AXI user bits
/trunk/src/base/def_axi_master.txt
31,6 → 31,8
 
INCLUDE def_axi_master_static.txt
 
STARTUSER
SWAP.GLOBAL #FFD #1 ##Flip-Flop simulation delay
 
SWAP.USER PREFIX axi_master ##prefix for all module and file names
/trunk/src/base/def_ic_static.txt
27,6 → 27,10
//// ////
//////////////////////////////////////////////////////////////////##>
VERIFY (DATA_BITS in 32, 64) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS in 2, 3) ##stub supports 32 or 64 bits data bus
 
SWAP.GLOBAL MODEL_NAME AXI interconnect fabric
 
SWAP MSTRS MASTER_NUM
52,7 → 56,7
ID ID_BITS input SON(CHANGE 1)
ADDR ADDR_BITS input
LEN 4 input
SIZE 2 input
SIZE SIZE_BITS input
BURST 2 input
CACHE 4 input
PROT 3 input
/trunk/src/base/ic_registry_wr.v
84,6 → 84,9
reg MMX_pending;
reg MMX_pending_d;
wire MMX_pending_rise;
reg SSX_pending;
reg SSX_pending_d;
wire SSX_pending_rise;
97,7 → 100,7
assign cmd_pop_MMX = MMX_WVALID & MMX_WREADY & MMX_WLAST;
assign cmd_pop_MMX_IDGROUP_MMX_ID.IDX = cmd_pop_MMX & Wmatch_MMX_IDGROUP_MMX_ID.IDX;
 
assign cmd_push_SSX = SSX_AWVALID & SSX_AWREADY;
assign cmd_push_SSX = SSX_AWVALID & (SSX_pending ? SSX_pending_rise : SSX_AWREADY);
assign cmd_pop_SSX = SSX_WVALID & SSX_WREADY & SSX_WLAST;
assign master_in_SSX = SSX_AWMSTR;
105,6 → 108,7
 
 
assign MMX_pending_rise = MMX_pending & (~MMX_pending_d);
assign SSX_pending_rise = SSX_pending & (~SSX_pending_d);
always @(posedge clk or posedge reset)
if (reset)
111,14 → 115,19
begin
MMX_pending <= #FFD 1'b0;
MMX_pending_d <= #FFD 1'b0;
SSX_pending <= #FFD 1'b0;
SSX_pending_d <= #FFD 1'b0;
end
else
begin
MMX_pending <= #FFD MMX_AWVALID & (~MMX_AWREADY);
MMX_pending_d <= #FFD MMX_pending;
SSX_pending <= #FFD SSX_AWVALID & (~SSX_AWREADY);
SSX_pending_d <= #FFD SSX_pending;
end
LOOP MX
always @(*)
begin
/trunk/src/base/def_axi_master_static.txt
29,8 → 29,8
 
SWAP.GLOBAL MODEL_NAME AXI master stub
 
VERIFY (DATA_BITS <= 64) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS <= 3) ##stub supports 32 or 64 bits data bus
VERIFY (DATA_BITS in 32, 64) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS in 2, 3) ##stub supports 32 or 64 bits data bus
 
GROUP STUB_AXI_A is {
ID ID_BITS output
/trunk/src/base/axi_master.v
182,7 → 182,7
DEFCMD(SWAP.GLOBAL CONST(PREFIX) PREFIX) \\
DEFCMD(SWAP.GLOBAL MASTER_NUM ID_NUM) \\
DEFCMD(SWAP.GLOBAL SLAVE_NUM 1) \\
DEFCMD(SWAP.GLOBAL CONST(ID_BITS) ID_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(MSTR_ID_BITS) ID_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(CMD_DEPTH) CMD_DEPTH) \\
DEFCMD(SWAP.GLOBAL CONST(DATA_BITS) DATA_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(ADDR_BITS) ADDR_BITS) \\
/trunk/src/base/def_ahb_master.txt
31,7 → 31,9
 
INCLUDE def_axi_master_rand.txt
INCLUDE def_axi2ahb.txt
 
STARTUSER
SWAP.GLOBAL MODEL_NAME AHB master stub
 
SWAP.GLOBAL #FFD #1 ## flip-flop delay
/trunk/src/base/ahb_master.v
151,6 → 151,7
DEFCMD(SWAP.GLOBAL CONST(ID_BITS) ID_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(ADDR_BITS) ADDR_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(DATA_BITS) DATA_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(SIZE_BITS) SIZE_BITS) \\
DEFCMD(GROUP.USER AXI_ID overrides {) \\
DEFCMD(0) \\
DEFCMD(})
169,6 → 170,7
DEFCMD(SWAP.GLOBAL CONST(CMD_DEPTH) 4) \\
DEFCMD(SWAP.GLOBAL CONST(ADDR_BITS) ADDR_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(DATA_BITS) DATA_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(SIZE_BITS) SIZE_BITS) \\
DEFCMD(SWAP.GLOBAL CONST(ID_BITS) ID_BITS)
PREFIX_axi2ahb axi2ahb(
.clk(clk),
/trunk/src/base/def_axi2ahb.txt
31,6 → 31,8
 
INCLUDE def_axi2ahb_static.txt
 
STARTUSER
SWAP.GLOBAL #FFD #1 ## flip-flop delay
 
SWAP.USER PREFIX axi2ahb ##Prefix for all modules and file names
39,4 → 41,5
 
SWAP.USER ADDR_BITS 24 ##AXI and AHB address bits
SWAP.USER DATA_BITS 32 ##AXI and AHB data bits
SWAP.USER SIZE_BITS 2 ##AXI size bits
SWAP.USER ID_BITS 4 ##AXI ID bits

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