OpenCores
URL https://opencores.org/ocsvn/ahb_master/ahb_master/trunk

Subversion Repositories ahb_master

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /ahb_master
    from Rev 6 to Rev 7
    Reverse comparison

Rev 6 → Rev 7

/trunk/run/run.bat
1,6 → 1,4
 
echo off
 
..\..\..\robust.exe ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header
 
echo Completed RobustVerilog ahb master run - results in run/out/
..\..\..\robust.exe ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui
/trunk/run/run.sh
1,5 → 1,3
#!/bin/bash
 
../../../robust ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header ${@}
 
echo Completed RobustVerilog ahb master run - results in run/out/
../../../robust ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui ${@}
/trunk/src/base/def_axi2ahb_static.txt
1,4 → 1,6
 
SWAP MODEL_NAME AXI2AHB bridge
 
VERIFY ((DATA_BITS==32) || (DATA_BITS==64))
GROUP AXI_A is {
/trunk/src/base/def_ahb_master.txt
2,12 → 2,14
INCLUDE def_axi_master_rand.txt
INCLUDE def_axi2ahb.txt
 
SWAP.GLOBAL #FFD #1 ## flip-flop delay
SWAP MODEL_NAME AHB master stub
 
SWAP PREFIX ahb_master ## prefix for all modules and file names
SWAP.GLOBAL #FFD #1 ## flip-flop delay
 
SWAP ADDR_BITS 24 ## AXI and AHB address bits
SWAP DATA_BITS 32 ## AXI and AHB data bits
SWAP.USER PREFIX ahb_master ## Prefix for all modules and file names
 
SWAP SIZE_BITS 2
SWAP.USER ADDR_BITS 24 ## AHB address bits
SWAP.USER DATA_BITS 32 ## AHB data bits
 
SWAP SIZE_BITS 2
/trunk/src/base/def_axi2ahb.txt
3,10 → 3,10
 
SWAP #FFD #1 ## flip-flop delay
 
SWAP PREFIX soc ## prefix for all modules and file names
SWAP.USER PREFIX axi2ahb ## prefix for all modules and file names
 
SWAP CMD_DEPTH 4 ## number of AXI command FIFO
SWAP.USER CMD_DEPTH 4 ## number of AXI command FIFO
 
SWAP ADDR_BITS 24 ## AXI and AHB address bits
SWAP DATA_BITS 32 ## AXI and AHB data bits
SWAP ID_BITS 4 ## AXI ID bits
SWAP.USER ADDR_BITS 24 ## AXI and AHB address bits
SWAP.USER DATA_BITS 32 ## AXI and AHB data bits
SWAP.USER ID_BITS 4 ## AXI ID bits

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