URL
https://opencores.org/ocsvn/ahb_slave/ahb_slave/trunk
Subversion Repositories ahb_slave
Compare Revisions
- This comparison shows the changes necessary to convert path
/ahb_slave/trunk
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/run/run.bat
1,6 → 1,4
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echo off |
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..\..\..\robust.exe ../src/base/ahb_slave.v -od out -I ../src/gen -list list.txt -listpath -header |
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echo Completed RobustVerilog ahb slave run - results in run/out/ |
..\..\..\robust.exe ../src/base/ahb_slave.v -od out -I ../src/gen -list list.txt -listpath -header -gui |
/run/run.sh
1,5 → 1,3
#!/bin/bash |
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../../../robust ../src/base/ahb_slave.v -od out -I ../src/gen -list list.txt -listpath -header ${@} |
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echo Completed RobustVerilog ahb slave run - results in run/out/ |
../../../robust ../src/base/ahb_slave.v -od out -I ../src/gen -list list.txt -listpath -header -gui ${@} |
/src/base/def_ahb_slave.txt
3,10 → 3,10
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SWAP.GLOBAL #FFD #1 ##Flip-Flop simulation delay |
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SWAP PREFIX ahb_slave ##prefix for all module and file names |
SWAP.USER PREFIX ahb_slave ##Prefix for all module and file names |
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SWAP ADDR_BITS 24 ##AHB address bits |
SWAP DATA_BITS 32 ##AHB data bits |
SWAP.USER ADDR_BITS 24 ##AHB address bits |
SWAP.USER DATA_BITS 32 ##AHB data bits |
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##DEFINE TRACE ##print memory trace to file |
UNDEF.USER TRACE ##Print memory trace to file |
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/src/base/def_ahb_slave_static.txt
1,4 → 1,6
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SWAP MODEL_NAME AHB slave stub |
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VERIFY ((DATA_BITS == 64) || (DATA_BITS == 32)) else stub supports 32 or 64 bits data bus |
VERIFY (ADDR_BITS<=24) else Memory size should not be too big to prevent maloc fail |
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