OpenCores
URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /amber/trunk/hw/vlog/tb
    from Rev 11 to Rev 15
    ↔ Reverse comparison
  •

Rev 11 → Rev 15

/global_defines.v
46,7 → 46,7
`ifndef _GLOBAL_DEFINES
`define _GLOBAL_DEFINES
 
`define AMBER_INIT_ZERO = `d0
`define AMBER_TIMEOUT 0
 
`define U_TB tb
`define U_SYSTEM `U_TB.u_system
55,9 → 55,9
`define U_FETCH `U_AMBER.u_fetch
`define U_MMU `U_FETCH.u_mmu
`define U_CACHE `U_FETCH.u_cache
`define U_WISHBONE `U_FETCH.u_wishbone
`define U_COPRO15 `U_AMBER.u_coprocessor
`define U_EXECUTE `U_AMBER.u_execute
`define U_WB `U_AMBER.u_write_back
`define U_REGISTER_BANK `U_EXECUTE.u_register_bank
`define U_DECODE `U_AMBER.u_decode
`define U_DECOMPILE `U_DECODE.u_decompile
64,6 → 64,13
`define U_L2CACHE `U_SYSTEM.u_l2cache
`define U_TEST_MODULE `U_SYSTEM.u_test_module
 
`ifdef AMBER_A25_CORE
`define U_MEM `U_AMBER.u_mem
`define U_DCACHE `U_MEM.u_dcache
`define U_WISHBONE `U_AMBER.u_wishbone
`else
`define U_WISHBONE `U_FETCH.u_wishbone
`endif
// ---------------------------------------------------------------
 
`define TB_DEBUG_MESSAGE $display("\nDEBUG in %m @ tick %8d ", `U_TB.clk_count );
/dumpvcd.v
59,22 → 59,10
$dumpfile(`AMBER_VCD_FILE);
$dumpvars(1, `U_TB.clk_count);
$dumpvars(1, `U_FETCH.o_read_data);
$dumpvars(1, `U_DECOMPILE.xINSTRUCTION_EXECUTE);
$dumpvars(1, `U_DECODE.firq_request);
$dumpvars(1, `U_DECODE.irq_request);
$dumpvars(1, `U_DECODE.swi_request);
$dumpvars(1, `U_DECODE.interrupt);
$dumpvars(1, `U_DECODE.next_interrupt);
$dumpvars(1, `U_DECODE.interrupt_mode);
$dumpvars(1, `U_DECODE.instruction_valid);
$dumpvars(1, `U_DECODE.instruction_execute);
$dumpvars(1, `U_DECODE.instruction);
$dumpvars(1, `U_EXECUTE.i_fetch_stall);
$dumpvars(1, `U_EXECUTE.o_write_enable);
$dumpvars(1, `U_EXECUTE.o_exclusive);
$dumpvars(1, `U_EXECUTE.o_write_data);
$dumpvars(1, `U_EXECUTE.o_address);
$dumpvars(1, `U_EXECUTE.base_address);
$dumpvars(1, `U_EXECUTE.u_register_bank.r0);
$dumpvars(1, `U_EXECUTE.u_register_bank.r1);
94,13 → 82,18
$dumpvars(1, `U_EXECUTE.u_register_bank.r15);
 
 
$dumpvars(1, `U_COPRO15);
$dumpvars(1, `U_FETCH);
$dumpvars(1, `U_CACHE);
$dumpvars(1, `U_DECODE);
// $dumpvars(1, `U_COPRO15);
$dumpvars(1, `U_WISHBONE);
$dumpvars(1, `U_AMBER);
 
$dumpvars(1, `U_SYSTEM.u_main_mem);
 
`ifdef AMBER_A25_CORE
$dumpvars(1, `U_MEM);
$dumpvars(1, `U_DCACHE);
`endif
$dumpoff;
end
/tb.v
54,7 → 54,7
`endif
reg clk_200mhz;
reg clk_25mhz;
reg [31:0] clk_count;
reg [31:0] clk_count = 'd0;
 
integer log_file;
 
254,7 → 254,7
initial
begin
sysrst = 1'd1;
#15002500
#40000
sysrst = 1'd0;
end
 
263,10 → 263,7
// Counter of system clock ticks
// ======================================
always @ ( posedge `U_SYSTEM.sys_clk )
if ( `U_SYSTEM.sys_rst )
clk_count <= 'd0;
else
clk_count <= clk_count + 1'd1;
clk_count <= clk_count + 1'd1;
 
 
437,8 → 434,13
// ======================================
// Terminate Test
// ======================================
`include "amber_localparams.v"
`include "amber_functions.v"
`ifdef AMBER_A25_CORE
`include "a25_localparams.v"
`include "a25_functions.v"
`else
`include "a23_localparams.v"
`include "a23_functions.v"
`endif
 
reg testfail;
wire test_status_set;
458,9 → 460,9
begin
display_registers;
$display("++++++++++++++++++++");
$write("Passed %s\n", `AMBER_TEST_NAME);
$write("Passed %s %0d ticks\n", `AMBER_TEST_NAME, `U_TB.clk_count);
$display("++++++++++++++++++++");
$fwrite(`U_TB.log_file,"Passed %s\n", `AMBER_TEST_NAME);
$fwrite(`U_TB.log_file,"Passed %s %0d ticks\n", `AMBER_TEST_NAME, `U_TB.clk_count);
$finish;
end
else
469,9 → 471,9
if ( testfail )
begin
$display("++++++++++++++++++++");
$write("Failed %s - assertion error\n", `AMBER_TEST_NAME);
$write("Failed %s\n", `AMBER_TEST_NAME);
$display("++++++++++++++++++++");
$fwrite(`U_TB.log_file,"Failed %s - assertion error\n", `AMBER_TEST_NAME);
$fwrite(`U_TB.log_file,"Failed %s\n", `AMBER_TEST_NAME);
$finish;
end
else
493,8 → 495,18
end
 
 
 
// ======================================
// Timeout
// ======================================
always @ ( posedge `U_SYSTEM.sys_clk )
if ( `AMBER_TIMEOUT != 0 )
if (`U_TB.clk_count >= `AMBER_TIMEOUT)
begin
`TB_ERROR_MESSAGE
$display("Timeout Error");
end
// ======================================
// Tasks
// ======================================
task display_registers;
569,54 → 581,7
endcase
end
endfunction
endmodule
 
 
endmodule
 
 
module WireDelay # (
parameter Delay_g = 0,
parameter Delay_rd = 0
)
(
inout A,
inout B,
input reset
);
 
reg A_r;
reg B_r;
reg line_en;
 
assign A = A_r;
assign B = B_r;
 
always @(*) begin
if (!reset) begin
A_r <= 1'bz;
B_r <= 1'bz;
line_en <= 1'b0;
end else begin
if (line_en) begin
A_r <= #Delay_rd B;
B_r <= 1'bz;
end else begin
B_r <= #Delay_g A;
A_r <= 1'bz;
end
end
end
 
always @(A or B) begin
if (!reset) begin
line_en <= 1'b0;
end else if (A !== A_r) begin
line_en <= 1'b0;
end else if (B_r !== B) begin
line_en <= 1'b1;
end else begin
line_en <= line_en;
end
end
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.