URL
https://opencores.org/ocsvn/amber/amber/trunk
Subversion Repositories amber
Compare Revisions
- This comparison shows the changes necessary to convert path
/amber/trunk/hw
- from Rev 6 to Rev 7
- ↔ Reverse comparison
Rev 6 → Rev 7
/vlog/system/memory_configuration.v
125,24 → 125,6
endfunction |
|
|
// Core Module address space |
function in_cm; |
input [31:0] address; |
begin |
in_cm = address [31:16] == AMBER_CM_BASE; |
end |
endfunction |
|
|
// System Controller address space |
function in_sc; |
input [31:0] address; |
begin |
in_sc = address [31:16] == AMBER_SC_BASE; |
end |
endfunction |
|
|
// Timer Module address space |
function in_tm; |
input [31:0] address; |
152,33 → 134,6
endfunction |
|
|
// Real Time Clock address space |
function in_rtc; |
input [31:0] address; |
begin |
in_rtc = address [31:16] == AMBER_RTC_BASE; |
end |
endfunction |
|
|
// Keyboard address space |
function in_kbd; |
input [31:0] address; |
begin |
in_kbd = address [31:16] == AMBER_KBD_BASE; |
end |
endfunction |
|
|
// Mouse address space |
function in_mouse; |
input [31:0] address; |
begin |
in_mouse = address [31:16] == AMBER_MOUSE_BASE; |
end |
endfunction |
|
|
// Test module |
function in_test; |
input [31:0] address; |
/sim/veritak_src_files.txt
0,0 → 1,61
-include_dir |
../vlog/system |
-include_dir |
../vlog/amber |
-include_dir |
../vlog/ethmac |
-include_dir |
../vlog/tb |
../vlog/tb/tb.v |
../vlog/tb/dumpvcd.v |
../vlog/tb/tb_uart.v |
../vlog/amber/alu.v |
../vlog/amber/amber.v |
../vlog/amber/barrel_shift.v |
../vlog/amber/cache.v |
../vlog/amber/coprocessor.v |
../vlog/amber/decode.v |
../vlog/amber/decompile.v |
../vlog/amber/execute.v |
../vlog/amber/fetch.v |
../vlog/amber/multiply.v |
../vlog/amber/register_bank.v |
../vlog/amber/wishbone.v |
../vlog/ethmac/eth_clockgen.v |
../vlog/ethmac/eth_cop.v |
../vlog/ethmac/eth_crc.v |
../vlog/ethmac/eth_fifo.v |
../vlog/ethmac/eth_maccontrol.v |
../vlog/ethmac/eth_macstatus.v |
../vlog/ethmac/eth_miim.v |
../vlog/ethmac/eth_outputcontrol.v |
../vlog/ethmac/eth_random.v |
../vlog/ethmac/eth_receivecontrol.v |
../vlog/ethmac/eth_register.v |
../vlog/ethmac/eth_registers.v |
../vlog/ethmac/eth_rxaddrcheck.v |
../vlog/ethmac/eth_rxcounters.v |
../vlog/ethmac/eth_rxethmac.v |
../vlog/ethmac/eth_rxstatem.v |
../vlog/ethmac/eth_shiftreg.v |
../vlog/ethmac/eth_spram_256x32.v |
../vlog/ethmac/eth_top.v |
../vlog/ethmac/eth_transmitcontrol.v |
../vlog/ethmac/eth_txcounters.v |
../vlog/ethmac/eth_txethmac.v |
../vlog/ethmac/eth_txstatem.v |
../vlog/ethmac/eth_wishbone.v |
../vlog/ethmac/xilinx_dist_ram_16x32.v |
../vlog/lib/generic_iobuf.v |
../vlog/lib/generic_sram_byte_en.v |
../vlog/lib/generic_sram_line_en.v |
../vlog/system/boot_mem.v |
../vlog/system/clocks_resets.v |
../vlog/system/interrupt_controller.v |
../vlog/system/main_mem.v |
../vlog/system/system.v |
../vlog/system/test_module.v |
../vlog/system/timer_module.v |
../vlog/system/uart.v |
../vlog/system/wb_ddr3_bridge.v |
../vlog/system/wishbone_arbiter.v |
sim
Property changes :
Modified: svn:ignore
## -4,3 +4,10 ##
vsim.wlf
transcript
*.log
+veritak_command.txt
+p_temp*.txt
+jumps
+*.vtakdisk
+*.vtakprj
+prepre_processed.v
+*.vtakwave