OpenCores
URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

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  • This comparison shows the changes necessary to convert path
    /an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/aeMB/sw/aemb
    from Rev 17 to Rev 48
    Reverse comparison

Rev 17 → Rev 48

/__main.c
0,0 → 1,25
#ifndef _AEMB_MAIN_HH
#define _AEMB_MAIN_HH
 
extern char __rodata_end, __data_start, __sdata_end;
 
extern int main ();
 
extern "C" int __main (void){ //initial_global_data
char *src = &__rodata_end; //start of Data section in Rom
char *dst = &__data_start;
 
/* ROM has data at end of rodata; copy it. */
while (dst < &__sdata_end) {
*dst++ = *src++;
}
main(); //call the main function
return 0;
}
 
 
 
 
 
#endif
/core.cc
0,0 → 1,7
 
#ifdef __MICROBLAZE__
#include "hook.cc"
#include "semaphore.cc"
#endif
 
/core.hh
31,9 → 31,11
#include "heap.hh"
#include "thread.hh"
#include "hook.hh"
#include "stdio.hh"
//#include "stdio.hh"
#include "semaphore.hh"
 
 
 
#endif
 
/*
/custom_crt/_exception_handler.s
0,0 → 1,40
/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Xilinx nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.text
.align 2
.weakext _exception_handler
.ent _exception_handler
.type _exception_handler, @function
_exception_handler:
addi r11,r11,8
bra r11
 
/custom_crt/_hw_exception_handler.s
0,0 → 1,37
/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Xilinx nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.text
.globl _hw_exception_handler # HW Exception Handler Label
.align 2
_hw_exception_handler:
rted r17, 0
nop
/custom_crt/_interrupt_handler (copy).s
0,0 → 1,36
/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Xilinx nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.text
.globl _interrupt_handler # Interrupt Handler Label
.align 2
_interrupt_handler:
rtid r14, 0
nop
/custom_crt/_interrupt_handler.s
0,0 → 1,36
/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Xilinx nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.text
.globl _interrupt_handler # Interrupt Handler Label
.align 2
_interrupt_handler:
rtid r14, 0
nop
/custom_crt/crt0.s
0,0 → 1,103
###################################-*-asm*-
#
# Copyright (c) 2001 Xilinx, Inc. All rights reserved.
#
# Xilinx, Inc.
#
# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
# AND FITNESS FOR A PARTICULAR PURPOSE.
#
# crt0.s
#
# Default C run-time initialization for MicroBlaze standalone
# executables (compiled with -xl-mode-executable or no switches)
#
# $Id: crt0.s,v 1.7.2.6 2005/11/15 23:32:53 salindac Exp $
#
#######################################
 
/*
MicroBlaze Vector Map for standalone executables
 
Address Vector type Label
------- ----------- ------
 
# 0x00 # (-- IMM --)
# 0x04 # Reset _start1
# 0x08 # (-- IMM --)
# 0x0c # Software Exception _exception_handler
# 0x10 # (-- IMM --)
# 0x14 # Hardware Interrupt _interrupt_handler
# 0x18 # (-- IMM --)
# 0x1C # Breakpoint Exception (-- Don't Care --)
# 0x20 # (-- IMM --)
# 0x24 # Hardware Exception _hw_exception_handler
 
*/
 
.globl _start
.section .vectors.reset, "ax"
.align 2
_start:
brai _start1
 
.section .vectors.sw_exception, "ax"
.align 2
_vector_sw_exception:
brai _exception_handler
 
.section .vectors.interrupt, "ax"
.align 2
_vector_interrupt:
brai _interrupt_handler
 
.section .vectors.hw_exception, "ax"
.align 2
_vector_hw_exception:
brai _hw_exception_handler
 
.section .text
.globl _start1
.align 2
_start1:
la r13, r0, _SDA_BASE_ /* Set the Small Data Anchors and the stack pointer */
la r2, r0, _SDA2_BASE_
la r1, r0, _stack-16 /* 16 bytes (4 words are needed by crtinit for args and link reg */
 
brlid r15, _crtinit /* Initialize BSS and run program */
nop
 
brlid r15, _exit /* Call exit with the return value of main */
addik r5, r3, 0
 
/* Control does not reach here */
 
/*
_exit
Our simple _exit
*/
.globl _exit
.align 2
.ent _exit
_exit:
bri 0
.end _exit
 
 
 
 
custom_crt/crt0.s Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: custom_crt/crtinit.s =================================================================== --- custom_crt/crtinit.s (nonexistent) +++ custom_crt/crtinit.s (revision 48) @@ -0,0 +1,85 @@ +###################################-*-asm*- +# +# Copyright (c) 2001 Xilinx, Inc. All rights reserved. +# +# Xilinx, Inc. +# +# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A +# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS +# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR +# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION +# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE +# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. +# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO +# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO +# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE +# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY +# AND FITNESS FOR A PARTICULAR PURPOSE. +# +# crtinit.s +# +# Default second stage of C run-time initialization +# +# $Id: crtinit.s,v 1.5.2.7 2006/07/05 18:53:54 vasanth Exp $ +# +####################################### + + + + .globl _crtinit + .align 2 + .ent _crtinit + +_crtinit: + addi r1, r1, -20 /* Save Link register */ + swi r15, r1, 0 + + addi r6, r0, __sbss_start /* clear SBSS */ + addi r7, r0, __sbss_end + rsub r18, r6, r7 + blei r18, .Lendsbss + +.Lloopsbss: + swi r0, r6, 0 + addi r6, r6, 4 + rsub r18, r6, r7 + bgti r18, .Lloopsbss +.Lendsbss: + + addi r6, r0, __bss_start /* clear BSS */ + addi r7, r0, __bss_end + rsub r18, r6, r7 + blei r18, .Lendbss +.Lloopbss: + swi r0, r6, 0 + addi r6, r6, 4 + rsub r18, r6, r7 + bgti r18, .Lloopbss +.Lendbss: + + brlid r15, _program_init /* Initialize the program */ + nop + +# brlid r15, __init /* Invoke language initialization functions */ +# nop + + addi r6, r0, 0 /* Initialize argc = 1 and argv = NULL and envp = NULL */ + addi r7, r0, 0 + brlid r15, (__main) /*initial_global_data first and then call main + addi r5, r0, 0 + + addik r19, r3, 0 /* Save return value */ + +# brlid r15, __fini /* Invoke language cleanup functions */ +# nop + + brlid r15, _program_clean /* Cleanup the program */ + nop + + lw r15, r1, r0 /* Return back to CRT */ + + addik r3, r19, 0 /* Restore return value */ + rtsd r15, 8 + addi r1, r1, 20 + .end _crtinit +
custom_crt/crtinit.s Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: heap.hh =================================================================== --- heap.hh (revision 17) +++ heap.hh (revision 48) @@ -36,7 +36,7 @@ @return heap size */ - inline int aembGetHeapSize() + static inline int aembGetHeapSize() { int tmp; asm ("la %0, r0, _HEAP_SIZE":"=r"(tmp)); @@ -48,7 +48,7 @@ @return heap end */ - inline int aembGetHeapEnd() + static inline int aembGetHeapEnd() { int tmp; asm ("la %0, r0, _heap_end":"=r"(tmp)); @@ -60,7 +60,7 @@ @return heap top */ - inline int aembGetHeapTop() + static inline int aembGetHeapTop() { int tmp; asm ("la %0, r0, _heap":"=r"(tmp));
/hook.cc
0,0 → 1,162
/* $Id: hook.hh,v 1.11 2008-04-28 20:31:40 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
**
** This file is part of AEMB.
**
** AEMB is free software: you can redistribute it and/or modify it
** under the terms of the GNU General Public License as published by
** the Free Software Foundation, either version 3 of the License, or
** (at your option) any later version.
**
** AEMB is distributed in the hope that it will be useful, but WITHOUT
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
** License for more details.
**
** You should have received a copy of the GNU General Public License
** along with AEMB. If not, see <http://www.gnu.org/licenses/>.
*/
 
/**
Basic begin/end hooks
@file hook.hh
 
These routines hook themselves onto parts of the main programme to
enable the hardware threads to work properly.
*/
 
#include "stack.hh"
#include "heap.hh"
#include "thread.hh"
 
#ifndef _AEMB_HOOK_HH
#define _AEMB_HOOK_HH
 
#ifdef __cplusplus
extern "C" {
#endif
 
/**
Finalisation hook
This function executes during the shutdown phase after the
finalisation routine is called. It will merge the changes made
during initialisation.
*/
 
void _program_clean()
{
_aembLockMTX(); // enter critical section
 
// unify the stack backwards
if (aembIsThread0())
{
aembSetStack(aembGetStack() + (aembGetStackSize() >> 1));
}
_aembFreeMTX(); // exit critical section
}
/**
Initialisation hook
This function executes during the startup phase before the
initialisation routine is called. It splits the stack between the
threads. For now, it will lock up T0 for compatibility purposes.
*/
 
void _program_init()
{
_aembLockMTX(); // enter critical section
 
// split and shift the stack for thread 1
if (aembIsThread0()) // main thread
{
// NOTE: Dupe the stack otherwise it will FAIL!
int oldstk = aembGetStack();
int newstk = aembSetStack(aembGetStack() - (aembGetStackSize() >> 1));
aembDupStack((unsigned int *)newstk,
(unsigned int *)oldstk,
(unsigned int *)aembGetStackTop());
_aembFreeMTX(); // exit critical section
while (1) asm volatile ("nop"); // lock thread
}
 
_aembFreeMTX(); // exit critical section
}
 
/**
Heap Lock
 
This function is called during malloc() to lock out the shared
heap to avoid data corruption.
*/
 
void __malloc_lock(struct _reent *reent)
{
_aembLockMTX();
}
 
/**
Heap Unlock
 
This function is called during malloc() to indicate that the
shared heap is now available for another thread.
*/
 
void __malloc_unlock(struct _reent *reent)
{
_aembFreeMTX();
}
 
#ifdef __cplusplus
}
#endif
 
#endif
 
#ifndef __OPTIMIZE__
// The main programme needs to be compiled with optimisations turned
// on (at least -O1). If not, the MUTEX value will be written to the
// same RAM location, giving both threads the same value.
OPTIMISATION_REQUIRED OPTIMISATION_REQUIRED
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.10 2008/04/28 20:29:15 sybreon
Made files C compatible under C++.
 
Revision 1.9 2008/04/27 16:33:42 sybreon
License change to GPL3.
 
Revision 1.8 2008/04/27 16:04:42 sybreon
Minor cosmetic changes.
 
Revision 1.7 2008/04/26 19:31:35 sybreon
Made headers C compatible.
 
Revision 1.6 2008/04/26 18:04:31 sybreon
Updated software to freeze T0 and run T1.
 
Revision 1.5 2008/04/23 14:19:39 sybreon
Fixed minor bugs.
Initial use of hardware mutex.
 
Revision 1.4 2008/04/20 16:35:53 sybreon
Added C/C++ compatible #ifdef statements
 
Revision 1.3 2008/04/12 13:46:02 sybreon
Added malloc() lock and unlock routines
 
Revision 1.2 2008/04/11 15:20:31 sybreon
added static assert hack
 
Revision 1.1 2008/04/09 19:48:37 sybreon
Added new C++ files
 
*/
hook.cc Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: hook.hh =================================================================== --- hook.hh (revision 17) +++ hook.hh (revision 48) @@ -1,169 +1,15 @@ -/* $Id: hook.hh,v 1.11 2008-04-28 20:31:40 sybreon Exp $ -** -** AEMB2 HI-PERFORMANCE CPU -** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap -** -** This file is part of AEMB. -** -** AEMB is free software: you can redistribute it and/or modify it -** under the terms of the GNU General Public License as published by -** the Free Software Foundation, either version 3 of the License, or -** (at your option) any later version. -** -** AEMB is distributed in the hope that it will be useful, but WITHOUT -** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -** License for more details. -** -** You should have received a copy of the GNU General Public License -** along with AEMB. If not, see . -*/ - -/** - Basic begin/end hooks - @file hook.hh - - These routines hook themselves onto parts of the main programme to - enable the hardware threads to work properly. - */ - -#include "stack.hh" -#include "heap.hh" -#include "thread.hh" - -#ifndef _AEMB_HOOK_HH -#define _AEMB_HOOK_HH - #ifdef __cplusplus extern "C" { #endif - - void _program_init(); + void _program_init(); void _program_clean(); // newlib locks void __malloc_lock(struct _reent *reent); void __malloc_unlock(struct _reent *reent); - //void __env_lock(struct _reent *reent); - //void __env_unlock(struct _reent *reent); - - /** - Finalisation hook - - This function executes during the shutdown phase after the - finalisation routine is called. It will merge the changes made - during initialisation. - */ - void _program_clean() - { - _aembLockMTX(); // enter critical section - - // unify the stack backwards - if (aembIsThread0()) - { - aembSetStack(aembGetStack() + (aembGetStackSize() >> 1)); - } - - _aembFreeMTX(); // exit critical section - } - /** - Initialisation hook - - This function executes during the startup phase before the - initialisation routine is called. It splits the stack between the - threads. For now, it will lock up T0 for compatibility purposes. - */ - - void _program_init() - { - _aembLockMTX(); // enter critical section - - // split and shift the stack for thread 1 - if (aembIsThread0()) // main thread - { - // NOTE: Dupe the stack otherwise it will FAIL! - int oldstk = aembGetStack(); - int newstk = aembSetStack(aembGetStack() - (aembGetStackSize() >> 1)); - aembDupStack((unsigned int *)newstk, - (unsigned int *)oldstk, - (unsigned int *)aembGetStackTop()); - _aembFreeMTX(); // exit critical section - while (1) asm volatile ("nop"); // lock thread - } - - _aembFreeMTX(); // exit critical section - } - - /** - Heap Lock - - This function is called during malloc() to lock out the shared - heap to avoid data corruption. - */ - - void __malloc_lock(struct _reent *reent) - { - _aembLockMTX(); - } - - /** - Heap Unlock - - This function is called during malloc() to indicate that the - shared heap is now available for another thread. - */ - - void __malloc_unlock(struct _reent *reent) - { - _aembFreeMTX(); - } - -#ifdef __cplusplus + #ifdef __cplusplus } -#endif - -#endif - -#ifndef __OPTIMIZE__ -// The main programme needs to be compiled with optimisations turned -// on (at least -O1). If not, the MUTEX value will be written to the -// same RAM location, giving both threads the same value. -OPTIMISATION_REQUIRED OPTIMISATION_REQUIRED -#endif - -/* - $Log: not supported by cvs2svn $ - Revision 1.10 2008/04/28 20:29:15 sybreon - Made files C compatible under C++. - - Revision 1.9 2008/04/27 16:33:42 sybreon - License change to GPL3. - - Revision 1.8 2008/04/27 16:04:42 sybreon - Minor cosmetic changes. - - Revision 1.7 2008/04/26 19:31:35 sybreon - Made headers C compatible. - - Revision 1.6 2008/04/26 18:04:31 sybreon - Updated software to freeze T0 and run T1. - - Revision 1.5 2008/04/23 14:19:39 sybreon - Fixed minor bugs. - Initial use of hardware mutex. - - Revision 1.4 2008/04/20 16:35:53 sybreon - Added C/C++ compatible #ifdef statements - - Revision 1.3 2008/04/12 13:46:02 sybreon - Added malloc() lock and unlock routines - - Revision 1.2 2008/04/11 15:20:31 sybreon - added static assert hack - - Revision 1.1 2008/04/09 19:48:37 sybreon - Added new C++ files - -*/ +#endif +
/msr.hh
57,7 → 57,7
@return register contents
*/
inline int aembGetMSR()
static inline int aembGetMSR()
{
int rmsr;
asm volatile ("mfs %0, rmsr":"=r"(rmsr));
69,7 → 69,7
@param rmsr value to write
*/
 
inline void aembPutMSR(int rmsr)
static inline void aembPutMSR(int rmsr)
{
asm volatile ("mts rmsr, %0"::"r"(rmsr));
}
80,7 → 80,7
@return msr value
*/
 
inline int aembClrMSR(const short rmsk)
static inline int aembClrMSR(const short rmsk)
{
int tmp;
//asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(rmsk):"memory");
93,7 → 93,7
@return msr value
*/
 
inline int aembSetMSR(const short rmsk)
static inline int aembSetMSR(const short rmsk)
{
int tmp;
//asm volatile ("msrset %0, %1":"=r"(tmp):"K"(rmsk):"memory");
101,7 → 101,7
}
 
/** Enable global interrupts */
inline int aembEnableInterrupts()
static inline int aembEnableInterrupts()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_IE));
109,7 → 109,7
}
 
/** Disable global interrupts */
inline int aembDisableInterrupts()
static inline int aembDisableInterrupts()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_IE));
117,7 → 117,7
}
 
/** Enable global exception */
inline int aembEnableException()
static inline int aembEnableException()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_EE));
125,7 → 125,7
}
 
/** Disable global exception */
inline int aembDisableException()
static inline int aembDisableException()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_EE));
133,7 → 133,7
}
 
/** Enable data caches */
inline int aembEnableDataTag()
static inline int aembEnableDataTag()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_DTE));
141,7 → 141,7
}
 
/** Disable data caches */
inline int aembDisableDataTag()
static inline int aembDisableDataTag()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_DTE));
149,7 → 149,7
}
 
/** Enable inst caches */
inline int aembEnableInstTag()
static inline int aembEnableInstTag()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_ITE));
157,7 → 157,7
}
 
/** Disable inst caches */
inline int aembDisableInstTag()
static inline int aembDisableInstTag()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_ITE));
/semaphore.cc
0,0 → 1,11
 
#ifdef __cplusplus
extern "C" {
#endif
semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex
semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex
 
 
#ifdef __cplusplus
}
#endif
/semaphore.hh
49,7 → 49,7
 
Increment the semaphore and run. This is a software mechanism.
*/
inline void aembSignal(volatile semaphore _sem)
static inline void aembSignal(volatile semaphore _sem)
{
_aembLockMTX();
_sem++;
62,7 → 62,7
Decrement the semaphore and block if < 0. This is a software
mechanism.
*/
inline void aembWait(volatile semaphore _sem)
static inline void aembWait(volatile semaphore _sem)
{
_aembLockMTX();
_sem--;
70,14 → 70,13
while (_sem < 0);
}
 
semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex
semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex
 
/**
Implements a simple rendezvous mechanism
*/
/*
inline void aembRendezvous()
static inline void aembRendezvous()
{
if (isThread1())
{
/stack.hh
36,7 → 36,7
@return size of stack
*/
inline int aembGetStackSize()
static inline int aembGetStackSize()
{
int tmp;
asm ("la %0, r0, _STACK_SIZE":"=r"(tmp));
49,7 → 49,7
@return end of stack
*/
inline int aembGetStackEnd()
static inline int aembGetStackEnd()
{
int tmp;
asm ("la %0, r0, _stack_end":"=r"(tmp));
62,7 → 62,7
@return top of stack
*/
inline int aembGetStackTop()
static inline int aembGetStackTop()
{
int tmp;
asm ("la %0, r0, _stack":"=r"(tmp));
74,7 → 74,7
@return stack pointer
*/
inline int aembGetStack()
static inline int aembGetStack()
{
int tmp;
asm ("addk %0, r0, r1":"=r"(tmp));
87,7 → 87,7
@return new stack pointer
*/
inline int aembSetStack(int stk)
static inline int aembSetStack(int stk)
{
asm ("addk r1, r0, %0"::"r"(stk));
return stk;
100,7 → 100,7
@param endp end of the stack
*/
 
inline void aembDupStack(unsigned int *newp, unsigned int *oldp, unsigned int *endp)
static inline void aembDupStack(unsigned int *newp, unsigned int *oldp, unsigned int *endp)
{
while (oldp < endp)
{
/thread.hh
41,7 → 41,7
@return true if is Thread 1
*/
inline int aembIsThread1()
static inline int aembIsThread1()
{
int rmsr = aembGetMSR();
return ((rmsr & AEMB_MSR_PHA));
52,7 → 52,7
@return true if is Thread 0
*/
inline int aembIsThread0()
static inline int aembIsThread0()
{
int rmsr = aembGetMSR();
return (!(rmsr & AEMB_MSR_PHA));
62,7 → 62,7
Checks to see if it is multi-threaded or not.
@return true if thread capable
*/
inline int aembIsThreaded()
static inline int aembIsThreaded()
{
int rmsr = aembGetMSR();
return (rmsr & AEMB_MSR_HTX);
72,7 → 72,7
Hardware Mutex Signal.
Unlock the hardware mutex, which is unlocked on reset.
*/
inline void _aembFreeMTX()
static inline void _aembFreeMTX()
{
int tmp;
asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(AEMB_MSR_MTX));
84,7 → 84,7
Waits until the hardware mutex is unlocked. This should be used
as part of a larger software mutex mechanism.
*/
inline void _aembLockMTX()
static inline void _aembLockMTX()
{
int rmsr;
do

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