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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

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  • This comparison shows the changes necessary to convert path
    /an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/aeMB/sw
    from Rev 29 to Rev 34
    Reverse comparison

Rev 29 → Rev 34

/Makefile
1,4 → 1,6
all:
cd compile; sh gccrom ../main.c;
cd compile; cp ram.mif ../ram0.mif; cp ram.bin ../ram0.bin;
rm -Rf ./RAM
mkdir -p ./RAM
cd compile; cp ram.mif ../RAM/ram0.mif; cp ram.bin ../RAM/ram0.bin; cp ram.hex ../RAM/ram0.hex;
/compile/gccrom
40,6 → 40,9
$TOOLCHAIN/bin/ihex2bin -i $ELFFILE.ihex -o ram.bin && \
echo "ihex2bin=$?"
 
$TOOLCHAIN/bin/bin2str -f ram.bin -h && \
echo "bin2str=$?"
 
# echo the checksum
#MD5=$(sha1sum $ELFFILE | cut -c1-32) && \
#echo "sha1=$MD5"

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