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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

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  • This comparison shows the changes necessary to convert path
    /an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/aeMB/sw
    from Rev 38 to Rev 45
    Reverse comparison

Rev 38 → Rev 45

/Makefile
1,5 → 1,5
all:
cd compile; sh gccrom ../main.c;
cd compile; bash gccrom ../main.c;
rm -Rf ./RAM
mkdir -p ./RAM
cd compile; cp ram.mif ../RAM/ram0.mif; cp ram.bin ../RAM/ram0.bin; cp ram.hex ../RAM/ram0.hex;
/compile/gccrom
1,4 → 1,4
#!/bin/sh
#!/bin/bash
# $Id: gccrom,v 1.18 2008-05-01 08:35:04 sybreon Exp $
 
TOOLCHAIN="$PRONOC_WORK/toolchain"
12,7 → 12,7
LNKFLAGS="-Wl,-defsym -Wl,_STACK_SIZE=${STACK_SIZE} -Wl,-defsym -Wl,_HEAP_SIZE=${HEAP_SIZE}"
LIBFLAGS=""
INCFLAGS="-Icc/"
RAMSIZE="3FFF" #for aeMB ramwith of 12
#RAMSIZE="3FFF" #for aeMB ramwith of 12
 
$TOOLCHAIN/aemb/bin/mb-g++ $XILFLAGS $CXXFLAGS $LNKFLAGS $LIBFLAGS $INCFLAGS -specs=aemb.specs $@ -o $ELFFILE && \
echo "xgcc=$?" && \
35,7 → 35,8
#echo "copy2ihex=$?" && \
 
# Generate a MIF & BIN files from the IHEX file
$TOOLCHAIN/bin/ihex2mif -f $ELFFILE.ihex -e $RAMSIZE -o ram.mif && \
#$TOOLCHAIN/bin/ihex2mif -f $ELFFILE.ihex -e $RAMSIZE -o ram.mif && \
$TOOLCHAIN/bin/ihex2mif -f $ELFFILE.ihex -o ram.mif && \
echo "ihex2mif=$?"
$TOOLCHAIN/bin/ihex2bin -i $ELFFILE.ihex -o ram.bin && \
echo "ihex2bin=$?"

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