OpenCores
URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

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  • This comparison shows the changes necessary to convert path 
    /an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/aeMB
    from Rev 16 to Rev 17
    ↔ Reverse comparison
  •

Rev 16 → Rev 17

/verilog/aemb.v
6,10 → 6,11
dwb_sel_o,
dwb_stb_o,
dwb_tag_o,
dwb_wre_o,
dwb_wre_o,
dwb_cti_o,
dwb_bte_o,
dwb_ack_i,
dwb_dat_i,
dwb_dat_i,
dwb_err_i,
dwb_rty_i,
18,10 → 19,13
iwb_sel_o,
iwb_stb_o,
iwb_tag_o,
iwb_wre_o,
iwb_wre_o,
iwb_dat_o,
iwb_cti_o,
iwb_bte_o,
iwb_ack_i,
iwb_dat_i,
iwb_dat_o,
iwb_err_i,
iwb_rty_i,
53,7 → 57,11
output [3:0] dwb_sel_o;
output dwb_stb_o;
output [2:0] dwb_tag_o;
output dwb_wre_o;
output dwb_wre_o;
output [2:0] dwb_cti_o;
output [1:0] dwb_bte_o;
input dwb_ack_i;
input [31:0] dwb_dat_i;
68,12 → 76,17
output iwb_wre_o;
input iwb_ack_i;
input [31:0] iwb_dat_i;
output[31:0] iwb_dat_o;
output[31:0] iwb_dat_o;
output [2:0] iwb_cti_o;
output [1:0] iwb_bte_o;
input clk;
input sys_ena_i;
input sys_int_i;
input reset;
wire i_tag,d_tag;
// not used but added to prevent warning
input dwb_err_i, dwb_rty_i, iwb_err_i, iwb_rty_i;
 
99,7 → 112,7
.xwb_cyc_o() , // xwb_cyc_o
.xwb_adr_o() , // [AEMB_XWB-1:2] xwb_adr_o
.iwb_wre_o(iwb_wre_o) , // iwb_wre_o
.iwb_tag_o() , // iwb_tag_o
.iwb_tag_o(i_tag) , // iwb_tag_o
.iwb_stb_o(iwb_stb_o) , // iwb_stb_o
.iwb_sel_o(iwb_sel_o) , // [3:0] iwb_sel_o
.iwb_cyc_o(iwb_cyc_o) , // iwb_cyc_o
106,7 → 119,7
.iwb_adr_o(iwb_adr_o[29:0]) , // [AEMB_IWB-1:2] iwb_adr_o
.dwb_wre_o(dwb_wre_o) , // dwb_wre_o
.dwb_tag_o() , // dwb_tag_o
.dwb_tag_o(d_tag) , // dwb_tag_o
.dwb_stb_o(dwb_stb_o) , // dwb_stb_o
.dwb_sel_o(dwb_sel_o) , // [3:0] dwb_sel_o
.dwb_dat_o(dwb_dat_o) , // [31:0] dwb_dat_o
127,10 → 140,17
);
 
assign iwb_dat_o = 0;
assign iwb_tag_o = 3'b000; // clasic wishbone without burst
assign dwb_tag_o = 3'b000; // clasic wishbone without burst
assign iwb_adr_o[31:30] = 2'b00;
assign dwb_adr_o[31:30] = 2'b00;
// I have no idea which tag (a,b or c) is used in aemb. I assume it is address tag (taga)
assign iwb_tag_o = {i_tag,2'b00};
assign dwb_tag_o = {d_tag,2'b00};
assign iwb_adr_o[31:30] = 2'b00;
assign dwb_adr_o[31:30] = 2'b00;
assign dwb_cti_o = 3'd0;
assign dwb_bte_o = 2'd0;
assign iwb_cti_o = 3'd0;
assign iwb_bte_o = 2'd0;
 
endmodule
/sw/aemb/msr.hh
0,0 → 1,171
/* $Id: msr.hh,v 1.9 2008-04-28 20:29:15 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
**
** This file is part of AEMB.
**
** AEMB is free software: you can redistribute it and/or modify it
** under the terms of the GNU General Public License as published by
** the Free Software Foundation, either version 3 of the License, or
** (at your option) any later version.
**
** AEMB is distributed in the hope that it will be useful, but WITHOUT
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
** License for more details.
**
** You should have received a copy of the GNU General Public License
** along with AEMB. If not, see <http://www.gnu.org/licenses/>.
*/
 
/**
Basic MSR functions
@file msr.hh
These functions provide read/write access to the Machine Status
Register. It also contains the bit definitions of the register.
*/
 
#ifndef _AEMB_MSR_HH
#define _AEMB_MSR_HH
 
// STANDARD BITS
#define AEMB_MSR_BE (1 << 0) ///< Buslock Enable
#define AEMB_MSR_IE (1 << 1) ///< Interrupt Enable
#define AEMB_MSR_C (1 << 2) ///< Arithmetic Carry
#define AEMB_MSR_BIP (1 << 3) ///< Break in Progress
#define AEMB_MSR_EE (1 << 8) ///< Exception Enable
#define AEMB_MSR_EIP (1 << 9) ///< Exception in Progress
#define AEMB_MSR_ITE (1 << 5) ///< Instruction Cache Enable
#define AEMB_MSR_DZ (1 << 6) ///< Division by Zero
#define AEMB_MSR_DTE (1 << 7) ///< Data Cache Enable
// CUSTOM BITS
#define AEMB_MSR_MTX (1 << 4) ///< Hardware Mutex
#define AEMB_MSR_PHA (1 << 29) ///< Hardware Thread Phase
#define AEMB_MSR_HTX (1 << 30) ///< Hardware Threads Extension
#define AEMB_MSR_CC (1 << 31) ///< Carry Copy
 
#ifdef __cplusplus
extern "C" {
#endif
 
/**
Read the value of the MSR register
@return register contents
*/
inline int aembGetMSR()
{
int rmsr;
asm volatile ("mfs %0, rmsr":"=r"(rmsr));
return rmsr;
}
/**
Write a value to the MSR register
@param rmsr value to write
*/
 
inline void aembPutMSR(int rmsr)
{
asm volatile ("mts rmsr, %0"::"r"(rmsr));
}
 
/**
Read and clear the MSR
@param rmsk clear mask
@return msr value
*/
 
inline int aembClrMSR(const short rmsk)
{
int tmp;
//asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(rmsk):"memory");
return tmp;
}
 
/**
Read and set the MSR
@param rmsk set mask
@return msr value
*/
 
inline int aembSetMSR(const short rmsk)
{
int tmp;
//asm volatile ("msrset %0, %1":"=r"(tmp):"K"(rmsk):"memory");
return tmp;
}
 
/** Enable global interrupts */
inline int aembEnableInterrupts()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_IE));
return msr;
}
 
/** Disable global interrupts */
inline int aembDisableInterrupts()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_IE));
return msr;
}
 
/** Enable global exception */
inline int aembEnableException()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_EE));
return msr;
}
 
/** Disable global exception */
inline int aembDisableException()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_EE));
return msr;
}
 
/** Enable data caches */
inline int aembEnableDataTag()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_DTE));
return msr;
}
 
/** Disable data caches */
inline int aembDisableDataTag()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_DTE));
return msr;
}
 
/** Enable inst caches */
inline int aembEnableInstTag()
{
int msr;
asm volatile ("msrset %0, %1":"=r"(msr):"K"(AEMB_MSR_ITE));
return msr;
}
 
/** Disable inst caches */
inline int aembDisableInstTag()
{
int msr;
asm volatile ("msrclr %0, %1":"=r"(msr):"K"(AEMB_MSR_ITE));
return msr;
}
 
#ifdef __cplusplus
}
#endif
 
#endif
sw/aemb/msr.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/stdio.hh =================================================================== --- sw/aemb/stdio.hh (nonexistent) +++ sw/aemb/stdio.hh (revision 17) @@ -0,0 +1,77 @@ +/* $Id: stdio.hh,v 1.5 2008-04-28 20:29:15 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + Basic standard I/O functions + @file stdio.hh + + These functions provide function prototypes for outbyte/inbyte + which are required by the linker during compile time. These + functions can be defined anywhere else in code but should not be + inlined. + */ + +#ifndef _AEMB_STDIO_HH +#define _AEMB_STDIO_HH + +#ifdef __cplusplus +extern "C" { +#endif + + /** + Default stdout prototype. + @param c char + + This is used to output characters to LCD or UART. + */ + + void outbyte(char c); + + /** + Default stdin prototype. + @return char + + This is used to read characters in from UART or keyboard. + */ + + char inbyte(); + +#ifdef __cplusplus +} +#endif + +#endif + +/* + $Log: not supported by cvs2svn $ + Revision 1.4 2008/04/27 16:33:42 sybreon + License change to GPL3. + + Revision 1.3 2008/04/26 19:31:35 sybreon + Made headers C compatible. + + Revision 1.2 2008/04/26 18:05:22 sybreon + Minor cosmetic changes. + + Revision 1.1 2008/04/09 19:48:37 sybreon + Added new C++ files + +*/
sw/aemb/stdio.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/semaphore.hh =================================================================== --- sw/aemb/semaphore.hh (nonexistent) +++ sw/aemb/semaphore.hh (revision 17) @@ -0,0 +1,103 @@ +/* $Id: semaphore.hh,v 1.1 2008-04-28 20:29:15 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + General semaphore library + @file semaphore.hh + */ + +#include "thread.hh" + +#ifndef _AEMB_SEMAPHORE_HH +#define _AEMB_SEMAPHORE_HH + +#ifdef __cplusplus +extern "C" { +#endif + + // TODO: Extend this library to include threading mechanisms such as + // semaphores, mutexes and such. + + /** + Semaphore struct. + Presently implemented as software solution but a hardware one may be + required as the threads are hardware. + */ + + typedef int semaphore; + + /** + Software Semaphore Signal. + + Increment the semaphore and run. This is a software mechanism. + */ + inline void aembSignal(volatile semaphore _sem) + { + _aembLockMTX(); + _sem++; + _aembFreeMTX(); + } + + /** + Software Semaphore Wait. + + Decrement the semaphore and block if < 0. This is a software + mechanism. + */ + inline void aembWait(volatile semaphore _sem) + { + _aembLockMTX(); + _sem--; + _aembFreeMTX(); + while (_sem < 0); + } + + semaphore __mutex_rendezvous0 = 0; ///< internal rendezvous mutex + semaphore __mutex_rendezvous1 = 1; ///< internal rendezvous mutex + + /** + Implements a simple rendezvous mechanism + */ + /* + inline void aembRendezvous() + { + if (isThread1()) + { + wait(__mutex_rendezvous0); + signal(__mutex_rendezvous1); + } + else + { + signal(__mutex_rendezvous0); + wait(__mutex_rendezvous1); + } + } + */ + +#ifdef __cplusplus +} +#endif + +#endif + +/* +$log$ +*/
sw/aemb/semaphore.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/stack.hh =================================================================== --- sw/aemb/stack.hh (nonexistent) +++ sw/aemb/stack.hh (revision 17) @@ -0,0 +1,145 @@ +/* $Id: stack.hh,v 1.8 2008-04-28 20:29:15 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + Basic stack related functions + @file stack.hh + */ + +#ifndef _AEMB_STACK_HH +#define _AEMB_STACK_HH + +#ifdef __cplusplus +extern "C" { +#endif + + /** + Reads the size of the memory space allocated for the stack in bytes. + @return size of stack + */ + + inline int aembGetStackSize() + { + int tmp; + asm ("la %0, r0, _STACK_SIZE":"=r"(tmp)); + return tmp; + } + + /** + Reads the end of the memory space allocated for the stack. This is + where the stack ends. + @return end of stack + */ + + inline int aembGetStackEnd() + { + int tmp; + asm ("la %0, r0, _stack_end":"=r"(tmp)); + return tmp; + } + + /** + Reads the top of the memory space allocated for the stack. This is + where the stack starts. + @return top of stack + */ + + inline int aembGetStackTop() + { + int tmp; + asm ("la %0, r0, _stack":"=r"(tmp)); + return tmp; + } + + /** + Reads register R1 which is the designated stack pointer. + @return stack pointer + */ + + inline int aembGetStack() + { + int tmp; + asm ("addk %0, r0, r1":"=r"(tmp)); + return tmp; + } + + /** + Sets register R1 to the new stack pointer. + @param stk new stack pointer + @return new stack pointer + */ + + inline int aembSetStack(int stk) + { + asm ("addk r1, r0, %0"::"r"(stk)); + return stk; + } + + /** + Duplicates the stack + @param newp new stack pointer + @param oldp old stack pointer + @param endp end of the stack + */ + + inline void aembDupStack(unsigned int *newp, unsigned int *oldp, unsigned int *endp) + { + while (oldp < endp) + { + // copy the stack content + *newp = *oldp; + // this increments 1 word (not 1 byte) + newp++; + oldp++; + } + } + +#ifdef __cplusplus +} +#endif + +#endif + +/* + $Log: not supported by cvs2svn $ + Revision 1.7 2008/04/27 16:33:42 sybreon + License change to GPL3. + + Revision 1.6 2008/04/27 16:04:42 sybreon + Minor cosmetic changes. + + Revision 1.5 2008/04/26 19:31:35 sybreon + Made headers C compatible. + + Revision 1.4 2008/04/26 18:04:31 sybreon + Updated software to freeze T0 and run T1. + + Revision 1.3 2008/04/23 14:19:39 sybreon + Fixed minor bugs. + Initial use of hardware mutex. + + Revision 1.2 2008/04/20 16:35:53 sybreon + Added C/C++ compatible #ifdef statements + + Revision 1.1 2008/04/09 19:48:37 sybreon + Added new C++ files + +*/
sw/aemb/stack.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/thread.hh =================================================================== --- sw/aemb/thread.hh (nonexistent) +++ sw/aemb/thread.hh (revision 17) @@ -0,0 +1,101 @@ +/* $Id: thread.hh,v 1.10 2008-04-28 20:29:15 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + Basic thread functions + @file thread.hh + + These functions deal with the various hardware threads. It also + provides simple mechanisms for toggling semaphores. + */ + +#include "msr.hh" + +#ifndef _AEMB_THREAD_HH +#define _AEMB_THREAD_HH + +#ifdef __cplusplus +extern "C" { +#endif + + /** + Checks to see if currently executing Thread 1 + @return true if is Thread 1 + */ + + inline int aembIsThread1() + { + int rmsr = aembGetMSR(); + return ((rmsr & AEMB_MSR_PHA)); + } + + /** + Checks to see if currently executing Thread 0 + @return true if is Thread 0 + */ + + inline int aembIsThread0() + { + int rmsr = aembGetMSR(); + return (!(rmsr & AEMB_MSR_PHA)); + } + + /** + Checks to see if it is multi-threaded or not. + @return true if thread capable + */ + inline int aembIsThreaded() + { + int rmsr = aembGetMSR(); + return (rmsr & AEMB_MSR_HTX); + } + + /** + Hardware Mutex Signal. + Unlock the hardware mutex, which is unlocked on reset. + */ + inline void _aembFreeMTX() + { + int tmp; + asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(AEMB_MSR_MTX)); + } + + /** + Hardware Mutex Wait. + + Waits until the hardware mutex is unlocked. This should be used + as part of a larger software mutex mechanism. + */ + inline void _aembLockMTX() + { + int rmsr; + do + { + asm volatile ("msrset %0, %1":"=r"(rmsr):"K"(AEMB_MSR_MTX)); + } + while (rmsr & AEMB_MSR_MTX); + } + +#ifdef __cplusplus +} +#endif + +#endif
sw/aemb/thread.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/core.hh =================================================================== --- sw/aemb/core.hh (nonexistent) +++ sw/aemb/core.hh (revision 17) @@ -0,0 +1,53 @@ +/* $Id: core.hh,v 1.5 2008-05-31 17:02:04 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + General AEMB2 core library + @file core.hh + */ + +#ifdef __MICROBLAZE__ + +#include "msr.hh" +#include "stack.hh" +#include "heap.hh" +#include "thread.hh" +#include "hook.hh" +#include "stdio.hh" +#include "semaphore.hh" + +#endif + +/* + $Log: not supported by cvs2svn $ + Revision 1.4 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + + Revision 1.3 2008/04/27 16:33:42 sybreon + License change to GPL3. + + Revision 1.2 2008/04/26 19:31:35 sybreon + Made headers C compatible. + + Revision 1.1 2008/04/09 19:48:37 sybreon + Added new C++ files + + */
sw/aemb/core.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/heap.hh =================================================================== --- sw/aemb/heap.hh (nonexistent) +++ sw/aemb/heap.hh (revision 17) @@ -0,0 +1,93 @@ +/* $Id: heap.hh,v 1.6 2008-04-28 20:29:15 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + Basic heap related functions + @file heap.hh + */ + +#ifndef _AEMB_HEAP_HH +#define _AEMB_HEAP_HH + +#ifdef __cplusplus +extern "C" { +#endif + + /** + Extracts the heap size from the linker + @return heap size + */ + + inline int aembGetHeapSize() + { + int tmp; + asm ("la %0, r0, _HEAP_SIZE":"=r"(tmp)); + return tmp; + } + + /** + Extracts the heap end from the linker + @return heap end + */ + + inline int aembGetHeapEnd() + { + int tmp; + asm ("la %0, r0, _heap_end":"=r"(tmp)); + return tmp; + } + + /** + Extracts the heap top from the linker + @return heap top + */ + + inline int aembGetHeapTop() + { + int tmp; + asm ("la %0, r0, _heap":"=r"(tmp)); + return tmp; + } + +#ifdef __cplusplus +} +#endif + +#endif + +/* + $Log: not supported by cvs2svn $ + Revision 1.5 2008/04/27 16:33:42 sybreon + License change to GPL3. + + Revision 1.4 2008/04/26 19:31:35 sybreon + Made headers C compatible. + + Revision 1.3 2008/04/26 18:05:22 sybreon + Minor cosmetic changes. + + Revision 1.2 2008/04/20 16:35:53 sybreon + Added C/C++ compatible #ifdef statements + + Revision 1.1 2008/04/09 19:48:37 sybreon + Added new C++ files + +*/
sw/aemb/heap.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/aemb/hook.hh =================================================================== --- sw/aemb/hook.hh (nonexistent) +++ sw/aemb/hook.hh (revision 17) @@ -0,0 +1,169 @@ +/* $Id: hook.hh,v 1.11 2008-04-28 20:31:40 sybreon Exp $ +** +** AEMB2 HI-PERFORMANCE CPU +** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap +** +** This file is part of AEMB. +** +** AEMB is free software: you can redistribute it and/or modify it +** under the terms of the GNU General Public License as published by +** the Free Software Foundation, either version 3 of the License, or +** (at your option) any later version. +** +** AEMB is distributed in the hope that it will be useful, but WITHOUT +** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +** License for more details. +** +** You should have received a copy of the GNU General Public License +** along with AEMB. If not, see . +*/ + +/** + Basic begin/end hooks + @file hook.hh + + These routines hook themselves onto parts of the main programme to + enable the hardware threads to work properly. + */ + +#include "stack.hh" +#include "heap.hh" +#include "thread.hh" + +#ifndef _AEMB_HOOK_HH +#define _AEMB_HOOK_HH + +#ifdef __cplusplus +extern "C" { +#endif + + void _program_init(); + void _program_clean(); + + // newlib locks + void __malloc_lock(struct _reent *reent); + void __malloc_unlock(struct _reent *reent); + //void __env_lock(struct _reent *reent); + //void __env_unlock(struct _reent *reent); + + /** + Finalisation hook + + This function executes during the shutdown phase after the + finalisation routine is called. It will merge the changes made + during initialisation. + */ + + void _program_clean() + { + _aembLockMTX(); // enter critical section + + // unify the stack backwards + if (aembIsThread0()) + { + aembSetStack(aembGetStack() + (aembGetStackSize() >> 1)); + } + + _aembFreeMTX(); // exit critical section + } + + /** + Initialisation hook + + This function executes during the startup phase before the + initialisation routine is called. It splits the stack between the + threads. For now, it will lock up T0 for compatibility purposes. + */ + + void _program_init() + { + _aembLockMTX(); // enter critical section + + // split and shift the stack for thread 1 + if (aembIsThread0()) // main thread + { + // NOTE: Dupe the stack otherwise it will FAIL! + int oldstk = aembGetStack(); + int newstk = aembSetStack(aembGetStack() - (aembGetStackSize() >> 1)); + aembDupStack((unsigned int *)newstk, + (unsigned int *)oldstk, + (unsigned int *)aembGetStackTop()); + _aembFreeMTX(); // exit critical section + while (1) asm volatile ("nop"); // lock thread + } + + _aembFreeMTX(); // exit critical section + } + + /** + Heap Lock + + This function is called during malloc() to lock out the shared + heap to avoid data corruption. + */ + + void __malloc_lock(struct _reent *reent) + { + _aembLockMTX(); + } + + /** + Heap Unlock + + This function is called during malloc() to indicate that the + shared heap is now available for another thread. + */ + + void __malloc_unlock(struct _reent *reent) + { + _aembFreeMTX(); + } + +#ifdef __cplusplus +} +#endif + +#endif + +#ifndef __OPTIMIZE__ +// The main programme needs to be compiled with optimisations turned +// on (at least -O1). If not, the MUTEX value will be written to the +// same RAM location, giving both threads the same value. +OPTIMISATION_REQUIRED OPTIMISATION_REQUIRED +#endif + +/* + $Log: not supported by cvs2svn $ + Revision 1.10 2008/04/28 20:29:15 sybreon + Made files C compatible under C++. + + Revision 1.9 2008/04/27 16:33:42 sybreon + License change to GPL3. + + Revision 1.8 2008/04/27 16:04:42 sybreon + Minor cosmetic changes. + + Revision 1.7 2008/04/26 19:31:35 sybreon + Made headers C compatible. + + Revision 1.6 2008/04/26 18:04:31 sybreon + Updated software to freeze T0 and run T1. + + Revision 1.5 2008/04/23 14:19:39 sybreon + Fixed minor bugs. + Initial use of hardware mutex. + + Revision 1.4 2008/04/20 16:35:53 sybreon + Added C/C++ compatible #ifdef statements + + Revision 1.3 2008/04/12 13:46:02 sybreon + Added malloc() lock and unlock routines + + Revision 1.2 2008/04/11 15:20:31 sybreon + added static assert hack + + Revision 1.1 2008/04/09 19:48:37 sybreon + Added new C++ files + +*/
sw/aemb/hook.hh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/program/prog.tcl =================================================================== --- sw/program/prog.tcl (nonexistent) +++ sw/program/prog.tcl (revision 17) @@ -0,0 +1,80 @@ +#/usr/bin/tclsh + +proc hold_reset {} { + global device_name usb + start_insystem_source_probe -device_name $device_name -hardware_name $usb + write_source_data -instance_index 127 -value 0x1 -value_in_hex + end_insystem_source_probe +} + +proc release_reset {} { + global device_name usb + start_insystem_source_probe -device_name $device_name -hardware_name $usb + write_source_data -instance_index 127 -value 0x0 -value_in_hex + end_insystem_source_probe +} + +## Setup USB hardware - assumes only USB Blaster is installed and +## an FPGA is the only device in the JTAG chain +set usb [lindex [get_hardware_names] 0] +set device_name [lindex [get_device_names -hardware_name $usb] 0] + +puts $usb +puts $device_name + +#reset all processors +hold_reset + + +# Initiate a editing sequence +begin_memory_edit -hardware_name $usb -device_name $device_name + +foreach instance \ + [get_editable_mem_instances -hardware_name $usb -device_name $device_name] { + set inst_name [lindex $instance 5] + set inst_index [lindex $instance 0] + puts $inst_name + puts $inst_index + #set xx [string range $inst_name 0 1] + #set yy [string range $inst_name 2 end] + #puts $xx + #puts $yy + set ram_file_name ../ram${inst_name}.mif + +#update prog memory + if {[file exists $ram_file_name] == 1} { + puts "memory ${inst_name} is programed with $ram_file_name" + update_content_to_memory_from_file -instance_index $inst_index -mem_file_path $ram_file_name -mem_file_type mif + } else { + puts "file $ram_file_name does not exist! memory ${inst_name} left unprogramed" + } + +} + + + + +#set xx 0 +#set yy 0 +# for {set yy 0} {$yy<$Y_NODE_NUM} {incr yy} { +# for {set xx 0} {$xx<$X_NODE_NUM} {incr xx} { +# set ram_file_name [format "ram/cpu%02d_%02d.mif" $xx $yy] +# set mem_index [format "%02d%02d" $xx $yy] + +#update prog memory +# update_content_to_memory_from_file -instance_index $mem_index -mem_file_path $ram_file_name -mem_file_type mif + +#puts $ram_file_name\n +#puts $mem_index\n + +# }} + + + + + +#End the editing sequence +end_memory_edit + +#release reset +release_reset
sw/program/prog.tcl Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/compile/aemb.specs =================================================================== --- sw/compile/aemb.specs (nonexistent) +++ sw/compile/aemb.specs (revision 17) @@ -0,0 +1,178 @@ +*asm: +%{microblaze1} %(target_asm_spec) %(subtarget_asm_spec) + +*asm_debug: +%{gstabs*:--gstabs}%{!gstabs*:%{g*:--gdwarf2}} + +*asm_final: + + +*asm_options: +%a %Y %{c:%W{o*}%{!o*:-o %w%b%O}}%{!c:-o %d%w%u%O} + +*invoke_as: +%{!S:-o %|.s | + as %(asm_options) %m.s %A } + +*cpp: +%{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} %{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} %{!.S: %{!.s: %{!.cc: %{!.cxx: %{!.C: %{!.m: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}}}}} %{mno-xl-soft-mul: -DHAVE_HW_MUL} %{mxl-multiply-high: -DHAVE_HW_MUL_HIGH} %{mno-xl-soft-div: -DHAVE_HW_DIV} %{mxl-barrel-shift: -DHAVE_HW_BSHIFT} %{mxl-pattern-compare: -DHAVE_HW_PCMP} %{mhard-float: -DHAVE_HW_FPU} %{mxl-float-convert: -DHAVE_HW_FPU_CONVERT} %{mxl-float-sqrt: -DHAVE_HW_FPU_SQRT} + +*cpp_options: +%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w} %{f*} %{g*:%{!g0:%{!fno-working-directory:-fworking-directory}}} %{O*} %{undef} %{save-temps:-fpch-preprocess} + +*cpp_debug_options: +%{d*} + +*cpp_unique_options: +%{C|CC:%{!E:%eGCC does not support -C or -CC without -E}} %{!Q:-quiet} %{nostdinc*} %{C} %{CC} %{v} %{I*&F*} %{P} %I %{MD:-MD %{!o:%b.d}%{o*:%.d%*}} %{MMD:-MMD %{!o:%b.d}%{o*:%.d%*}} %{M} %{MM} %{MF*} %{MG} %{MP} %{MQ*} %{MT*} %{!E:%{!M:%{!MM:%{MD|MMD:%{o*:-MQ %*}}}}} %{remap} %{g3:-dD} %{H} %C %{D*&U*&A*} %{i*} %Z %i %{fmudflap:-D_MUDFLAP -include mf-runtime.h} %{fmudflapth:-D_MUDFLAP -D_MUDFLAPTH -include mf-runtime.h} %{E|M|MM:%W{o*}} + +*trad_capable_cpp: +cc1 -E %{traditional|ftraditional|traditional-cpp:-traditional-cpp} + +*cc1: + %{G*} %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} %{save-temps: } %(subtarget_cc1_spec) %{Zxl-blazeit: -mno-xl-soft-mul -mno-xl-soft-div -mxl-barrel-shift -mxl-pattern-compare -mxl-multiply-high} + +*cc1_options: +%{pg:%{fomit-frame-pointer:%e-pg and -fomit-frame-pointer are incompatible}} %1 %{!Q:-quiet} -dumpbase %B %{d*} %{m*} %{a*} %{c|S:%{o*:-auxbase-strip %*}%{!o*:-auxbase %b}}%{!c:%{!S:-auxbase %b}} %{g*} %{O*} %{W*&pedantic*} %{w} %{std*&ansi&trigraphs} %{v:-version} %{pg:-p} %{p} %{f*} %{undef} %{Qn:-fno-ident} %{--help:--help} %{--target-help:--target-help} %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %b.s}}} %{fsyntax-only:-o %j} %{-param*} %{fmudflap|fmudflapth:-fno-builtin -fno-merge-constants} %{coverage:-fprofile-arcs -ftest-coverage} + +*cc1plus: + + +*link_gcc_c_sequence: +%G %L %G + +*link_ssp: +%{fstack-protector|fstack-protector-all:-lssp_nonshared -lssp} + +*endfile: +crtend.o%s crtn.o%s + +*link: +%{shared:-shared} -N -relax %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} %{!mxl-gp-opt: -G 0} %{!Wl,-T*: %{!T*: -T xilinx.ld%s}} + +*lib: +%{!pg:%{!nostdlib:%{!Zxl-no-libxil:-start-group -lxil -lc_m_bs -lm_m_bs -end-group }}} %{pg:%{!nostdlib:-start-group -lxilprofile -lxil -lc_m_bs -lm_m_bs -end-group }} %{Zxl-no-libxil: %{!nostdlib: -start-group -lc_m_bs -lm_m_bs -end-group }} + +*mfwrap: + %{static: %{fmudflap|fmudflapth: --wrap=malloc --wrap=free --wrap=calloc --wrap=realloc --wrap=mmap --wrap=munmap --wrap=alloca} %{fmudflapth: --wrap=pthread_create}} %{fmudflap|fmudflapth: --wrap=main} + +*mflib: +%{fmudflap|fmudflapth: -export-dynamic} + +*libgcc: +-lgcc + +*startfile: +%{Zxl-mode-executable : %(startfile_executable) ; Zxl-mode-xmdstub : %(startfile_xmdstub) ; Zxl-mode-bootstrap : %(startfile_bootstrap) ; Zxl-mode-novectors : %(startfile_novectors) ; Zxl-mode-xilkernel : %(startfile_xilkernel) ; : %(startfile_default) } %(startfile_crtinit) + +*switches_need_spaces: + + +*cross_compile: +1 + +*version: +4.1.1 + +*multilib: +. !mxl-barrel-shift !mno-xl-soft-mul !mxl-multiply-high;bs mxl-barrel-shift !mno-xl-soft-mul !mxl-multiply-high;m !mxl-barrel-shift mno-xl-soft-mul !mxl-multiply-high;m/mh !mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high;bs/m mxl-barrel-shift mno-xl-soft-mul !mxl-multiply-high;bs/m/mh mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high; + +*multilib_defaults: + + +*multilib_extra: + + +*multilib_matches: +mxl-barrel-shift mxl-barrel-shift;mno-xl-soft-mul mno-xl-soft-mul;mxl-multiply-high mxl-multiply-high; + +*multilib_exclusions: + + +*multilib_options: +mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high + +*linker: +collect2 + +*link_libgcc: +%D + +*md_exec_prefix: + + +*md_startfile_prefix: + + +*md_startfile_prefix_1: + + +*startfile_prefix_spec: + + +*sysroot_spec: +--sysroot=%R + +*sysroot_suffix_spec: + + +*sysroot_hdrs_suffix_spec: + + +*subtarget_cc1_spec: + + +*subtarget_cpp_spec: + + +*subtarget_cpp_size_spec: +-D__SIZE_TYPE__=unsigned\ int -D__PTRDIFF_TYPE__=int + +*microblaze_as_asm_spec: +%{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} %{pipe: %e-pipe is not supported.} %{K} %(subtarget_microblaze_as_asm_spec) + +*gas_asm_spec: +%{v} + +*target_asm_spec: + + +*subtarget_microblaze_as_asm_spec: +%{v} + +*subtarget_asm_optimizing_spec: + + +*subtarget_asm_debugging_spec: +%{g} %{g0} %{g1} %{g2} %{g3} %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} + +*subtarget_asm_spec: + + +*linker_endian_spec: + + +*startfile_executable: +crt0.o%s crti.o%s crtbegin.o%s + +*startfile_xmdstub: +crt1.o%s crti.o%s crtbegin.o%s + +*startfile_bootstrap: +crt2.o%s crti.o%s crtbegin.o%s + +*startfile_novectors: +crt3.o%s crti.o%s crtbegin.o%s + +*startfile_xilkernel: +crt4.o%s crti.o%s crtbegin.o%s + +*startfile_crtinit: +%{!pg: %{!mno-clearbss: crtinit.o%s} %{mno-clearbss: sim-crtinit.o%s}} %{pg: %{!mno-clearbss: pgcrtinit.o%s} %{mno-clearbss: sim-pgcrtinit.o%s}} + +*startfile_default: +crt0.o%s crti.o%s crtbegin.o%s + +*link_command: +%{!fsyntax-only:%{!c:%{!M:%{!MM:%{!E:%{!S: %(linker) %l %{pie:-pie} %X %{o*} %{A} %{d} %{e*} %{m} %{N} %{n} %{r} %{s} %{t} %{u*} %{x} %{z} %{Z} %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:} %{L*} %(mfwrap) %(link_libgcc) %o %(mflib) %{fprofile-arcs|fprofile-generate|coverage:-lgcov} %{!nostdlib:%{!nodefaultlibs:%(link_ssp) %(link_gcc_c_sequence)}} %{!A:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} }}}}}} +
sw/compile/aemb.specs Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/compile/custom_crt/crt0.s =================================================================== --- sw/compile/custom_crt/crt0.s (nonexistent) +++ sw/compile/custom_crt/crt0.s (revision 17) @@ -0,0 +1,100 @@ +###################################-*-asm*- +# +# Copyright (c) 2001 Xilinx, Inc. All rights reserved. +# +# Xilinx, Inc. +# +# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A +# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS +# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR +# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION +# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE +# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. +# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO +# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO +# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE +# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY +# AND FITNESS FOR A PARTICULAR PURPOSE. +# +# crt0.s +# +# Default C run-time initialization for MicroBlaze standalone +# executables (compiled with -xl-mode-executable or no switches) +# +# $Id: crt0.s,v 1.7.2.6 2005/11/15 23:32:53 salindac Exp $ +# +####################################### + +/* + + MicroBlaze Vector Map for standalone executables + + Address Vector type Label + ------- ----------- ------ + + # 0x00 # (-- IMM --) + # 0x04 # Reset _start1 + + # 0x08 # (-- IMM --) + # 0x0c # Software Exception _exception_handler + + # 0x10 # (-- IMM --) + # 0x14 # Hardware Interrupt _interrupt_handler + + # 0x18 # (-- IMM --) + # 0x1C # Breakpoint Exception (-- Don't Care --) + + # 0x20 # (-- IMM --) + # 0x24 # Hardware Exception _hw_exception_handler + +*/ + + + .globl _start + .section .vectors.reset, "ax" + .align 2 +_start: + brai _start1 + + .section .vectors.sw_exception, "ax" + .align 2 +_vector_sw_exception: + brai _exception_handler + + .section .vectors.interrupt, "ax" + .align 2 +_vector_interrupt: + brai _interrupt_handler + + .section .vectors.hw_exception, "ax" + .align 2 +_vector_hw_exception: + brai _hw_exception_handler + + .section .text + .globl _start1 + .align 2 +_start1: + la r13, r0, _SDA_BASE_ /* Set the Small Data Anchors and the stack pointer */ + la r2, r0, _SDA2_BASE_ + la r1, r0, _stack-16 /* 16 bytes (4 words are needed by crtinit for args and link reg */ + + brlid r15, _crtinit /* Initialize BSS and run program */ + nop + + brlid r15, exit /* Call exit with the return value of main */ + addik r5, r3, 0 + + /* Control does not reach here */ + +/* + _exit + Our simple _exit +*/ + .globl _exit + .align 2 + .ent _exit +_exit: + bri 0 + .end _exit +
sw/compile/custom_crt/crt0.s Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/compile/custom_crt/crtinit.s =================================================================== --- sw/compile/custom_crt/crtinit.s (nonexistent) +++ sw/compile/custom_crt/crtinit.s (revision 17) @@ -0,0 +1,83 @@ +###################################-*-asm*- +# +# Copyright (c) 2001 Xilinx, Inc. All rights reserved. +# +# Xilinx, Inc. +# +# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A +# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS +# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR +# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION +# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE +# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. +# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO +# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO +# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE +# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY +# AND FITNESS FOR A PARTICULAR PURPOSE. +# +# crtinit.s +# +# Default second stage of C run-time initialization +# +# $Id: crtinit.s,v 1.5.2.7 2006/07/05 18:53:54 vasanth Exp $ +# +####################################### + + .globl _crtinit + .align 2 + .ent _crtinit + +_crtinit: + addi r1, r1, -20 /* Save Link register */ + swi r15, r1, 0 + + addi r6, r0, __sbss_start /* clear SBSS */ + addi r7, r0, __sbss_end + rsub r18, r6, r7 + blei r18, .Lendsbss + +.Lloopsbss: + swi r0, r6, 0 + addi r6, r6, 4 + rsub r18, r6, r7 + bgti r18, .Lloopsbss +.Lendsbss: + + addi r6, r0, __bss_start /* clear BSS */ + addi r7, r0, __bss_end + rsub r18, r6, r7 + blei r18, .Lendbss +.Lloopbss: + swi r0, r6, 0 + addi r6, r6, 4 + rsub r18, r6, r7 + bgti r18, .Lloopbss +.Lendbss: + + brlid r15, _program_init /* Initialize the program */ + nop + +# brlid r15, __init /* Invoke language initialization functions */ +# nop + + addi r6, r0, 0 /* Initialize argc = 1 and argv = NULL and envp = NULL */ + addi r7, r0, 0 + brlid r15, main /* Execute the program */ + addi r5, r0, 0 + + addik r19, r3, 0 /* Save return value */ + +# brlid r15, __fini /* Invoke language cleanup functions */ +# nop + + brlid r15, _program_clean /* Cleanup the program */ + nop + + lw r15, r1, r0 /* Return back to CRT */ + + addik r3, r19, 0 /* Restore return value */ + rtsd r15, 8 + addi r1, r1, 20 + .end _crtinit +
sw/compile/custom_crt/crtinit.s Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/compile/gccrom =================================================================== --- sw/compile/gccrom (nonexistent) +++ sw/compile/gccrom (revision 17) @@ -0,0 +1,45 @@ +#!/bin/sh +# $Id: gccrom,v 1.18 2008-05-01 08:35:04 sybreon Exp $ + +TOOLCHAIN="$PRONOC_WORK/toolchain" + + +# Compile using C pre-processor +ELFFILE="rom" +XILFLAGS="-mtune=v5.00 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul" +CXXFLAGS="-O1" +LNKFLAGS="-Wl,-defsym -Wl,_STACK_SIZE=0x400 -Wl,-defsym -Wl,_HEAP_SIZE=0x400" +LIBFLAGS="" +INCFLAGS="-Icc/" +RAMSIZE="3FFF" #for aeMB ramwith of 12 + +$TOOLCHAIN/aemb/bin/mb-g++ $XILFLAGS $CXXFLAGS $LNKFLAGS $LIBFLAGS $INCFLAGS -specs=aemb.specs $@ -o $ELFFILE && \ +echo "xgcc=$?" && \ + +# Create a text listing of the compiled code +#$TOOLCHAIN/mb-objdump -DSCz $ELFFILE > $ELFFILE.dump && \ +#echo "dump=$?" && \ + +# Convert the ELF file to an SREC file +#$TOOLCHAIN/mb-objcopy -O srec $ELFFILE $ELFFILE.srec && \ +#echo "copy=$?" && \ + +# Generate a Verilog VMEM file from the SREC file +#srec_cat $ELFFILE.srec -fill 0xFF -within $ELFFILE.srec --range-pad 4 -o out/dump.vmem -vmem 32 && \ +#echo "srec=$?" && \ + + +# Convert the ELF file to an IHEX file +$TOOLCHAIN/aemb/bin/mb-objcopy -O ihex $ELFFILE $ELFFILE.ihex && \ +#echo "copy2ihex=$?" && \ + +# Generate a MIF file from the IHEX file +$TOOLCHAIN/ihex2mif/ihex2mif -f $ELFFILE.ihex -e $RAMSIZE -o ram.mif && \ +echo "ihex2mif=$?" + +# echo the checksum +#MD5=$(sha1sum $ELFFILE | cut -c1-32) && \ +#echo "sha1=$MD5" + +# Cleanup code +#rm $ELFFILE.srec && rm $ELFFILE
sw/compile/gccrom Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/Makefile =================================================================== --- sw/Makefile (nonexistent) +++ sw/Makefile (revision 17) @@ -0,0 +1,4 @@ +all: + cd compile; ./gccrom ../main.c; + cd compile; cp ram.mif ../ram00.mif; +

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