URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/aeMB
- from Rev 29 to Rev 34
- ↔ Reverse comparison
Rev 29 → Rev 34
/sw/Makefile
1,4 → 1,6
all: |
cd compile; sh gccrom ../main.c; |
cd compile; cp ram.mif ../ram0.mif; cp ram.bin ../ram0.bin; |
rm -Rf ./RAM |
mkdir -p ./RAM |
cd compile; cp ram.mif ../RAM/ram0.mif; cp ram.bin ../RAM/ram0.bin; cp ram.hex ../RAM/ram0.hex; |
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/sw/compile/gccrom
40,6 → 40,9
$TOOLCHAIN/bin/ihex2bin -i $ELFFILE.ihex -o ram.bin && \ |
echo "ihex2bin=$?" |
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$TOOLCHAIN/bin/bin2str -f ram.bin -h && \ |
echo "bin2str=$?" |
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# echo the checksum |
#MD5=$(sha1sum $ELFFILE | cut -c1-32) && \ |
#echo "sha1=$MD5" |
/verilog/aemb.v
1,3 → 1,5
`timescale 1ns/1ps |
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module aeMB_top ( |
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dwb_adr_o, |