URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/lm32/verilog/src
- from Rev 25 to Rev 34
- ↔ Reverse comparison
Rev 25 → Rev 34
/lm32_simtrace.v
87,42 → 87,42
|
if ((valid_w == `TRUE) && (!kill_w)) begin |
// $write ( $stime/10 ); |
$writeh( " [", pc_w << 2); |
$writeh( "]\t" ); |
|
//$writeh( " [", pc_w << 2); |
//$writeh( "]\t" ); |
$write ( " [0x%h]\t", pc_w << 2); |
case ( instruction[`LM32_OPCODE_RNG] ) |
6'h00: $display( "srui r%0d, r%0d, 0x%0x", r2, r3, imm5 ); |
6'h01: $display( "nori r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h02: $display( "muli r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h03: $display( "sh (r%0d + 0x%0x), r%0d", r3, r2, imm16 ); |
6'h04: $display( "lb r%0d, (r%0d + 0x%0x)", r2, r3, imm16 ); |
6'h05: $display( "sri r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h06: $display( "xori r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h07: $display( "lh r%0d, (r%0d + 0x%0x)", r2, r3, imm16 ); |
6'h08: $display( "andi r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h09: $display( "xnori r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h0a: $display( "lw r%0d, (r%0d + 0x%0x)", r2, r3, imm16 ); |
6'h0b: $display( "lhu r%0d, (r%0d + 0x%0x)", r2, r3, imm16 ); |
6'h0c: $display( "sb (r%0d + 0x%0x), r%0d", r3, r2, imm16 ); |
6'h0d: $display( "addi r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h0e: $display( "ori r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h0f: $display( "sli r%0d, r%0d, 0x%0x", r2, r3, imm5 ); |
6'h10: $display( "lbu r%0d, (r%0d + 0x%0x)", r2, r3, imm16 ); |
6'h11: $display( "be r%0d, r%0d, 0x%x", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h12: $display( "bg r%0d, r%0d, 0x%x", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h13: $display( "bge r%0d, r%0d, 0x%x", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h14: $display( "bgeu r%0d, r%0d, 0x%x", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h15: $display( "bgu r%0d, r%0d, 0x%x", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h16: $display( "sw (r%0d + 0x%0x), r%0d", r3, r2, imm16 ); |
6'h17: $display( "bne r%0d, r%0d, 0x%x", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h18: $display( "andhi r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h19: $display( "cmpei r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h1a: $display( "cmpgi r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h1b: $display( "cmpgei r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h1c: $display( "cmpgeui r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h1d: $display( "cmpgui r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h1e: $display( "orhi r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h1f: $display( "cmpnei r%0d, r%0d, 0x%0x", r2, r3, imm16 ); |
6'h00: $display( "srui r%0d, r%0d, 0x%0h", r2, r3, imm5 ); |
6'h01: $display( "nori r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h02: $display( "muli r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h03: $display( "sh (r%0d + 0x%0h), r%0d", r3, r2, imm16 ); |
6'h04: $display( "lb r%0d, (r%0d + 0x%0h)", r2, r3, imm16 ); |
6'h05: $display( "sri r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h06: $display( "xori r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h07: $display( "lh r%0d, (r%0d + 0x%0h)", r2, r3, imm16 ); |
6'h08: $display( "andi r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h09: $display( "xnori r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h0a: $display( "lw r%0d, (r%0d + 0x%0h)", r2, r3, imm16 ); |
6'h0b: $display( "lhu r%0d, (r%0d + 0x%0h)", r2, r3, imm16 ); |
6'h0c: $display( "sb (r%0d + 0x%0h), r%0d", r3, r2, imm16 ); |
6'h0d: $display( "addi r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h0e: $display( "ori r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h0f: $display( "sli r%0d, r%0d, 0x%0h", r2, r3, imm5 ); |
6'h10: $display( "lbu r%0d, (r%0d + 0x%0h)", r2, r3, imm16 ); |
6'h11: $display( "be r%0d, r%0d, 0x%h", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h12: $display( "bg r%0d, r%0d, 0x%h", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h13: $display( "bge r%0d, r%0d, 0x%h", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h14: $display( "bgeu r%0d, r%0d, 0x%h", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h15: $display( "bgu r%0d, r%0d, 0x%h", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h16: $display( "sw (r%0d + 0x%0h), r%0d", r3, r2, imm16 ); |
6'h17: $display( "bne r%0d, r%0d, 0x%h", r2, r3, (pc_w + branch_imm ) << 2 ); |
6'h18: $display( "andhi r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h19: $display( "cmpei r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h1a: $display( "cmpgi r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h1b: $display( "cmpgei r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h1c: $display( "cmpgeui r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h1d: $display( "cmpgui r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h1e: $display( "orhi r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h1f: $display( "cmpnei r%0d, r%0d, 0x%0h", r2, r3, imm16 ); |
6'h20: $display( "sru r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h21: $display( "nor r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h22: $display( "mul r%0d, r%0d, r%0d", r1, r3, r2 ); |
147,13 → 147,13
6'h35: $display( "modu r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h36: $display( "call r%0d", r3 ); |
6'h37: $display( "sexth r%0d, r%0d", r1, r3 ); |
6'h38: $display( "bi 0x%x", (pc_w + call_imm) << 2 ); |
6'h38: $display( "bi 0x%h", (pc_w + call_imm) << 2 ); |
6'h39: $display( "cmpe r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h3a: $display( "cmpg r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h3b: $display( "cmpge r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h3c: $display( "cmpgeu r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h3d: $display( "cmpgu r%0d, r%0d, r%0d", r1, r3, r2 ); |
6'h3e: $display( "calli 0x%x", (pc_w + call_imm) << 2 ); |
6'h3e: $display( "calli 0x%h", (pc_w + call_imm) << 2 ); |
6'h3f: $display( "cmpne r%0d, r%0d, r%0d", r1, r3, r2 ); |
endcase |
end |