URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/lm32/verilog
- from Rev 38 to Rev 48
- ↔ Reverse comparison
Rev 38 → Rev 48
/src/lm32_cpu.v
104,7 → 104,12
D_WE_O, |
D_CTI_O, |
D_LOCK_O, |
D_BTE_O |
D_BTE_O, |
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snoop_adr_i, |
d_snoop_valid |
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); |
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///////////////////////////////////////////////////// |
278,6 → 283,10
output [`LM32_BTYPE_RNG] D_BTE_O; // Data Wishbone interface burst type |
wire [`LM32_BTYPE_RNG] D_BTE_O; |
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input [31:0] snoop_adr_i; |
input d_snoop_valid; |
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///////////////////////////////////////////////////// |
// Internal nets and registers |
///////////////////////////////////////////////////// |
901,7 → 910,11
.d_we_o (D_WE_O), |
.d_cti_o (D_CTI_O), |
.d_lock_o (D_LOCK_O), |
.d_bte_o (D_BTE_O) |
.d_bte_o (D_BTE_O), |
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.snoop_adr_i (snoop_adr_i), |
.d_snoop_valid (d_snoop_valid) |
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); |
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// Adder |
/src/lm32_load_store_unit.v
74,7 → 74,9
d_we_o, |
d_cti_o, |
d_lock_o, |
d_bte_o |
d_bte_o, |
snoop_adr_i, |
d_snoop_valid |
); |
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///////////////////////////////////////////////////// |
165,6 → 167,10
output [`LM32_BTYPE_RNG] d_bte_o; // Data Wishbone interface burst type |
wire [`LM32_BTYPE_RNG] d_bte_o; |
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input [31:0] snoop_adr_i; |
input d_snoop_valid; |
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///////////////////////////////////////////////////// |
// Internal nets and registers |
///////////////////////////////////////////////////// |
278,7 → 284,10
.refill_request (dcache_refill_request), |
.refill_address (dcache_refill_address), |
.refilling (dcache_refilling), |
.load_data (dcache_data_m) |
.load_data (dcache_data_m), |
.snoop_adr_i (snoop_adr_i), |
.d_snoop_valid (d_snoop_valid) |
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); |
`endif |
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