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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

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  • This comparison shows the changes necessary to convert path
    /an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/lm32
    from Rev 21 to Rev 25
    Reverse comparison

Rev 21 → Rev 25

/sw/Makefile
1,5 → 1,6
TOOLCHAIN=$(PRONOC_WORK)/toolchain/lm32
IHEX2MIF =$(PRONOC_WORK)/toolchain/ihex2mif/ihex2mif
IHEX2MIF =$(PRONOC_WORK)/toolchain/bin/ihex2mif
IHEX2BIN =$(PRONOC_WORK)/toolchain/bin/ihex2bin
 
 
#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram
51,7 → 52,8
 
$(VRAMFILE): image.srec
#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE)
$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o ram00.mif
$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o ram0.mif
$(IHEX2BIN) -i image.ihex -o ram0.bin
 
clean:
rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex *.o *.d
/sw/program/prog.tcl
0,0 → 1,80
#/usr/bin/tclsh
 
proc hold_reset {} {
global device_name usb
start_insystem_source_probe -device_name $device_name -hardware_name $usb
write_source_data -instance_index 127 -value 0x1 -value_in_hex
end_insystem_source_probe
}
 
proc release_reset {} {
global device_name usb
start_insystem_source_probe -device_name $device_name -hardware_name $usb
write_source_data -instance_index 127 -value 0x0 -value_in_hex
end_insystem_source_probe
}
 
## Setup USB hardware - assumes only USB Blaster is installed and
## an FPGA is the only device in the JTAG chain
set usb [lindex [get_hardware_names] 0]
set device_name [lindex [get_device_names -hardware_name $usb] 0]
 
puts $usb
puts $device_name
 
#reset all processors
hold_reset
 
 
# Initiate a editing sequence
begin_memory_edit -hardware_name $usb -device_name $device_name
 
foreach instance \
[get_editable_mem_instances -hardware_name $usb -device_name $device_name] {
set inst_name [lindex $instance 5]
set inst_index [lindex $instance 0]
puts $inst_name
puts $inst_index
#set xx [string range $inst_name 0 1]
#set yy [string range $inst_name 2 end]
#puts $xx
#puts $yy
set ram_file_name ../ram${inst_name}.mif
#update prog memory
if {[file exists $ram_file_name] == 1} {
puts "memory ${inst_name} is programed with $ram_file_name"
update_content_to_memory_from_file -instance_index $inst_index -mem_file_path $ram_file_name -mem_file_type mif
} else {
puts "file $ram_file_name does not exist! memory ${inst_name} left unprogramed"
}
 
}
 
 
 
 
#set xx 0
#set yy 0
# for {set yy 0} {$yy<$Y_NODE_NUM} {incr yy} {
# for {set xx 0} {$xx<$X_NODE_NUM} {incr xx} {
# set ram_file_name [format "ram/cpu%02d_%02d.mif" $xx $yy]
# set mem_index [format "%02d%02d" $xx $yy]
#update prog memory
# update_content_to_memory_from_file -instance_index $mem_index -mem_file_path $ram_file_name -mem_file_type mif
 
#puts $ram_file_name\n
#puts $mem_index\n
# }}
 
 
 
 
 
#End the editing sequence
end_memory_edit
 
#release reset
release_reset
sw/program/prog.tcl Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: verilog/src/lm32.v =================================================================== --- verilog/src/lm32.v (revision 21) +++ verilog/src/lm32.v (revision 25) @@ -14,6 +14,7 @@ clk_i, rst_i, interrupt, + en_i, // Instruction Wishbone master I_DAT_I, I_ACK_I, @@ -50,7 +51,13 @@ input clk_i; // Clock input rst_i; // Reset +input en_i; + +wire reset; + +assign reset = rst_i | ~ en_i; + //`ifdef CFG_INTERRUPTS_ENABLED input [`LM32_INTERRUPT_RNG] interrupt; // Interrupt pins //`endif @@ -136,7 +143,7 @@ lm32_top the_lm32_top( .clk_i(clk_i), - .rst_i(rst_i), + .rst_i(reset ), .interrupt_n(~interrupt), .I_DAT_I(I_DAT_I), .I_ACK_I(I_ACK_I), @@ -176,3 +183,4 @@ endmodule +

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