Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

/sw/lm32_system.h File deleted

sw/lm32_system.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/program/prog.tcl =================================================================== --- sw/program/prog.tcl (revision 45) +++ sw/program/prog.tcl (nonexistent) @@ -1,80 +0,0 @@ -#/usr/bin/tclsh - -proc hold_reset {} { - global device_name usb - start_insystem_source_probe -device_name $device_name -hardware_name $usb - write_source_data -instance_index 127 -value 0x1 -value_in_hex - end_insystem_source_probe -} - -proc release_reset {} { - global device_name usb - start_insystem_source_probe -device_name $device_name -hardware_name $usb - write_source_data -instance_index 127 -value 0x0 -value_in_hex - end_insystem_source_probe -} - -## Setup USB hardware - assumes only USB Blaster is installed and -## an FPGA is the only device in the JTAG chain -set usb [lindex [get_hardware_names] 0] -set device_name [lindex [get_device_names -hardware_name $usb] 0] - -puts $usb -puts $device_name - -#reset all processors -hold_reset - - -# Initiate a editing sequence -begin_memory_edit -hardware_name $usb -device_name $device_name - -foreach instance \ - [get_editable_mem_instances -hardware_name $usb -device_name $device_name] { - set inst_name [lindex $instance 5] - set inst_index [lindex $instance 0] - puts $inst_name - puts $inst_index - #set xx [string range $inst_name 0 1] - #set yy [string range $inst_name 2 end] - #puts $xx - #puts $yy - set ram_file_name ../ram${inst_name}.mif - -#update prog memory - if {[file exists $ram_file_name] == 1} { - puts "memory ${inst_name} is programed with $ram_file_name" - update_content_to_memory_from_file -instance_index $inst_index -mem_file_path $ram_file_name -mem_file_type mif - } else { - puts "file $ram_file_name does not exist! memory ${inst_name} left unprogramed" - } - -} - - - - -#set xx 0 -#set yy 0 -# for {set yy 0} {$yy<$Y_NODE_NUM} {incr yy} { -# for {set xx 0} {$xx<$X_NODE_NUM} {incr xx} { -# set ram_file_name [format "ram/cpu%02d_%02d.mif" $xx $yy] -# set mem_index [format "%02d%02d" $xx $yy] - -#update prog memory -# update_content_to_memory_from_file -instance_index $mem_index -mem_file_path $ram_file_name -mem_file_type mif - -#puts $ram_file_name\n -#puts $mem_index\n - -# }} - - - - - -#End the editing sequence -end_memory_edit - -#release reset -release_reset

sw/program/prog.tcl Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/crt0ram.S =================================================================== --- sw/crt0ram.S (revision 45) +++ sw/crt0ram.S (nonexistent) @@ -1,286 +0,0 @@ -/* - * LatticeMico32 C startup code. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* Exception handlers - Must be 32 bytes long. */ - .section .text, "ax", @progbits - .global _start - .global irq_enable, irq_disable, irq_set_mask, irq_get_mask - .global jump, halt - .global get_sp, get_gp - -_start: -_reset_handler: - bi _crt0 - nop - nop - nop - nop - nop - nop - nop - -_breakpoint_handler: - nop - nop - nop - nop - nop - nop - nop - nop - -_ibuserror_handler: - nop - nop - nop - nop - nop - nop - nop - nop - -_watchpoint_handler: - nop - nop - nop - nop - nop - nop - nop - nop - -_dbuserror_handler: - nop - nop - nop - nop - nop - nop - nop - nop - -_divzero_handler: - nop - nop - nop - nop - nop - nop - nop - nop - -_interrupt_handler: - sw (sp+0), ra - calli _save_all - rcsr r1, IP - calli irq_handler - mvhi r1, 0xffff - ori r1, r1, 0xffff - wcsr IP, r1 - bi _restore_all_and_eret - -_scall_handler: - nop - nop - nop - nop - nop - nop - nop - nop - -_crt0: - /* Clear r0 */ - xor r0, r0, r0 - - /* Clear all other regs (needed so that simulations match) */ - mvi r1, 0 - mvi r2, 0 - mvi r3, 0 - mvi r4, 0 - mvi r5, 0 - mvi r6, 0 - mvi r7, 0 - mvi r8, 0 - mvi r9, 0 - mvi r10, 0 - mvi r11, 0 - mvi r12, 0 - mvi r13, 0 - mvi r14, 0 - mvi r15, 0 - mvi r16, 0 - mvi r17, 0 - mvi r18, 0 - mvi r19, 0 - mvi r20, 0 - mvi r21, 0 - mvi r22, 0 - mvi r23, 0 - mvi r24, 0 - mvi r25, 0 - mvi r26, 0 - mvi r27, 0 - mvi r28, 0 - mvi r29, 0 - mvi r30, 0 - mvi r31, 0 - - /* Setup stack and global pointer */ - mvhi sp, hi(_fstack) - ori sp, sp, lo(_fstack) - mvhi gp, hi(_gp) - ori gp, gp, lo(_gp) - - /* Clear BSS */ - mvhi r1, hi(_fbss) - ori r1, r1, lo(_fbss) - mvhi r3, hi(_ebss) - ori r3, r3, lo(_ebss) -.clearBSS: - be r1, r3, .callMain - sw (r1+0), r0 - addi r1, r1, 4 - bi .clearBSS - - -.callMain: - mvi r1, 0 - mvi r2, 0 - mvi r3, 0 - calli main - -irq_enable: - mvi r1, 1 - wcsr IE, r1 - ret - -irq_disable: - mvi r1, 0 - wcsr IE, r1 - ret - -irq_set_mask: - wcsr IM, r1 - ret - -irq_get_mask: - rcsr r1, IM - ret - -jump: - b r1 - -halt: - bi halt - - /* Save all registers onto the stack */ -_save_all: - addi sp, sp, -128 - sw (sp+4), r1 - sw (sp+8), r2 - sw (sp+12), r3 - sw (sp+16), r4 - sw (sp+20), r5 - sw (sp+24), r6 - sw (sp+28), r7 - sw (sp+32), r8 - sw (sp+36), r9 - sw (sp+40), r10 -#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE - sw (sp+44), r11 - sw (sp+48), r12 - sw (sp+52), r13 - sw (sp+56), r14 - sw (sp+60), r15 - sw (sp+64), r16 - sw (sp+68), r17 - sw (sp+72), r18 - sw (sp+76), r19 - sw (sp+80), r20 - sw (sp+84), r21 - sw (sp+88), r22 - sw (sp+92), r23 - sw (sp+96), r24 - sw (sp+100), r25 - sw (sp+104), r26 - sw (sp+108), r27 -#endif - sw (sp+120), ea - sw (sp+124), ba - /* ra and sp need special handling, as they have been modified */ - lw r1, (sp+128) - sw (sp+116), r1 - mv r1, sp - addi r1, r1, 128 - sw (sp+112), r1 - ret - - /* Restore all registers and return from exception */ -_restore_all_and_eret: - lw r1, (sp+4) - lw r2, (sp+8) - lw r3, (sp+12) - lw r4, (sp+16) - lw r5, (sp+20) - lw r6, (sp+24) - lw r7, (sp+28) - lw r8, (sp+32) - lw r9, (sp+36) - lw r10, (sp+40) -#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE - lw r11, (sp+44) - lw r12, (sp+48) - lw r13, (sp+52) - lw r14, (sp+56) - lw r15, (sp+60) - lw r16, (sp+64) - lw r17, (sp+68) - lw r18, (sp+72) - lw r19, (sp+76) - lw r20, (sp+80) - lw r21, (sp+84) - lw r22, (sp+88) - lw r23, (sp+92) - lw r24, (sp+96) - lw r25, (sp+100) - lw r26, (sp+104) - lw r27, (sp+108) -#endif - lw ra, (sp+116) - lw ea, (sp+120) - lw ba, (sp+124) - /* Stack pointer must be restored last, in case it has been updated */ - lw sp, (sp+112) - eret - -get_sp: - mv r1, sp - ret - -get_gp: - mv r1, gp - ret -

sw/crt0ram.S Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/define_printf.h =================================================================== --- sw/define_printf.h (revision 45) +++ sw/define_printf.h (nonexistent) @@ -1,6 +0,0 @@ -#ifndef DEF_PRINTF_h -#define DEF_PRINTF_h - - #include "simple-printf/printf.h" - -#endif Index: sw/Makefile =================================================================== --- sw/Makefile (revision 45) +++ sw/Makefile (revision 48) @@ -1,67 +1,85 @@ +include cpu_flags + +SOURCE_LIB = +include SOURCE_LIB + +HDR_SOURCE_DIR=lm32 + TOOLCHAIN=$(PRONOC_WORK)/toolchain/lm32 IHEX2MIF =$(PRONOC_WORK)/toolchain/bin/ihex2mif IHEX2BIN =$(PRONOC_WORK)/toolchain/bin/ihex2bin BIN2HEX =$(PRONOC_WORK)/toolchain/bin/bin2str +BIN2MIF=$(PRONOC_WORK)/toolchain/bin/bin2mif +BIN2MEM=$(PRONOC_WORK)/toolchain/bin/bin2mem -#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram +LM32_TOOL_PREFIX=${TOOLCHAIN}/bin/lm32-elf- -#RAMSIZE=3FFF -#CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled -msign-extend-enabled -mdivide-enabled -CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled - -LM32_CC=${TOOLCHAIN}/bin/lm32-elf-gcc -LM32_LD=${TOOLCHAIN}/bin/lm32-elf-ld -LM32_OBJCOPY=${TOOLCHAIN}/bin/lm32-elf-objcopy -LM32_OBJDUMP=${TOOLCHAIN}/bin/lm32-elf-objdump +LM32_LD=$(LM32_TOOL_PREFIX)ld +LM32_AS=$(LM32_TOOL_PREFIX)as +LM32_CC=$(LM32_TOOL_PREFIX)gcc +LM32_AR=$(LM32_TOOL_PREFIX)ar +LM32_OBJDUMP=$(LM32_TOOL_PREFIX)objdump +LM32_OBJCOPY=$(LM32_TOOL_PREFIX)objcopy LM32_LIB1=${TOOLCHAIN}/lm32-elf/lib LM32_LIB2=${TOOLCHAIN}/lib/gcc/lm32-elf/4.5.3 -LIBRARIES = -L${LM32_LIB1} -lc -lg -L${LM32_LIB2} -lgcc +LIBRARIES = -L${LM32_LIB1} -L${LM32_LIB2} -L. -L./$(HDR_SOURCE_DIR) -lc -lg -lorlib -lgcc -VRAMFILE=image.ram +CFLAGS := -Wall -Os -ggdb ${CPU_FLAGS} +LDFLAGS=-nostdlib -nodefaultlibs -Tlinker.ld -#CFLAGS=-MMD -O2 -Wall -g -s -fomit-frame-pointer ${CPU_FLAGS} -CFLAGS := -Wall -Os -ggdb -ffreestanding ${CPU_FLAGS} -LDFLAGS=-nostdlib -nodefaultlibs -Tlinker.ld + +# Sources to go into the liborpsoc.a support library +COMPILE_SRCS= $(SOURCE_LIB) + +#CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled + + #LDFLAGS=-nostdlib -T -Tlinker.ld SEGMENTS = -j .text -j .rodata -j .data -all: image.srec $(VRAMFILE) - -crt0ram.o: crt0ram.S - $(LM32_CC) $(CFLAGS) -c crt0ram.S +all: image.ihex -main.o: main.c - $(LM32_CC) $(CFLAGS) -c main.c +lib: +#compile all source code + $(LM32_CC) -Wall $(CFLAGS) -c $(HDR_SOURCE_DIR)/crt0ram.S -o crt0ram.o + $(LM32_CC) -Wall $(CFLAGS) -c $(COMPILE_SRCS) +#add them to liborlib.a + $(LM32_AR) -cvq liborlib.a *.o -#soc-hw.o: soc-hw.c -#$(LM32_CC) $(CFLAGS) -c soc-hw.c -image: crt0ram.o main.o linker.ld Makefile - $(LM32_LD) $(LDFLAGS) -Map image.map -N -o image crt0ram.o main.o ${LIBRARIES} +main.o: lib main.c + $(LM32_CC) -Wall $(CFLAGS) -c main.c -o main.o + +image: main.o linker.ld Makefile + $(LM32_LD) $(LDFLAGS) -Map image.map -N -o image crt0ram.o main.o $(LIBRARIES) image.lst: image $(LM32_OBJDUMP) -h -S $< > $@ -image.bin: image - $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image.bin -image.srec: image image.lst image.bin -#$(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec - $(LM32_OBJCOPY) $(SEGMENTS) -O ihex image image.ihex - -$(VRAMFILE): image.srec -#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE) - rm -Rf ./RAM +image.ihex: image image.lst +# Convert the ELF file to an IHEX file mkdir -p ./RAM - #$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif - $(IHEX2MIF) -f image.ihex -o RAM/ram0.mif - $(IHEX2BIN) -i image.ihex -o RAM/ram0.bin - $(BIN2HEX) -f RAM/ram0.bin -h + $(LM32_OBJCOPY) -O ihex image image.ihex +# $(LM32_OBJCOPY) --keep-file-symbols -O binary image image.bin +# Generate a MIF & BIN files from the IHEX file +# $(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif +# $(IHEX2MIF) -f image.ihex -o RAM/ram0.mif + $(IHEX2BIN) -i image.ihex -o RAM/ram0.bin + $(BIN2MIF) -f RAM/ram0.bin -o RAM/ram0.mif -w 32 + $(BIN2MEM) -f RAM/ram0.bin -o RAM/ram0.mem -w 32 + $(BIN2HEX) -f RAM/ram0.bin -h + rm *.o *.a + + + clean: - rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex *.o *.d + rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex RAM/* *.o *.a + + DEPS := $(wildcard *.d) ifneq ($(DEPS),) include $(DEPS)

/sw/linker.ld

/sw/linkvar.ld

/sw/lm32/crt0ram.S

sw/lm32/crt0ram.S Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/lm32/lm32_system.c =================================================================== --- sw/lm32/lm32_system.c (nonexistent) +++ sw/lm32/lm32_system.c (revision 48) @@ -0,0 +1,95 @@ + +#ifndef LM32_SYS_C + #define LM32_SYS_C + +/*************************************************************************** + * IRQ handling + */ + +/**************************************************************************** + * Types + */ +#include + +/****************************************************************************/ + + + + +isr_ptr_t isr_table[32]; + + + +void isr_null() +{ + +} + +void irq_handler(uint32_t pending) +{ + int i; + + for(i=0; i<32; i++) { + if (pending & 0x01) (*isr_table[i])(); + pending >>= 1; + } +} + +void isr_init() +{ + int i; + for(i=0; i<32; i++) + isr_table[i] = &isr_null; +} + +void isr_register(int irq, isr_ptr_t isr) +{ + isr_table[irq] = isr; +} + +void isr_unregister(int irq) +{ + isr_table[irq] = &isr_null; +} + + + + + +/****************** +* General inttrupt functions for all CPUs added to ProNoC +*******************/ + + + +int general_int_add(unsigned long irq, isr_ptr_t handler, void *arg) +{ + + isr_register(irq, handler); + return 0; +} + + + +void general_int_enable(unsigned long irq){ + irq_set_mask( (0x00000001L << irq)| irq_get_mask() ); + +} + + +extern char _erodata, _fdata,_edata; +void __main (void){ //initial_global_data + + char *src = &_erodata; //start of Data section in Rom + char *dst = &_fdata; + + /* ROM has data at end of rodata; copy it. */ + while (dst < &_edata) { + *dst++ = *src++; + } + + main(); //call the main function now +} + + +#endif

sw/lm32/lm32_system.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: sw/lm32/lm32_system.h =================================================================== --- sw/lm32/lm32_system.h (nonexistent) +++ sw/lm32/lm32_system.h (revision 48) @@ -0,0 +1,57 @@ + +#ifndef LM32_SYS_H + #define LM32_SYS_H + +/*************************************************************************** + * IRQ handling + */ + +/**************************************************************************** + * Types + */ +#include + +/****************************************************************************/ + + + +typedef void(*isr_ptr_t)(void); +void halt(); +void jump(uint32_t addr); + + +void isr_null(void); +void irq_handler(uint32_t pending); +void isr_init(void); +void isr_register(int irq, isr_ptr_t isr); +void isr_unregister(int irq); + + + + + +/****************** +* General inttrupt functions for all CPUs added to ProNoC +*******************/ + +extern void irq_set_mask (unsigned long); +extern unsigned long irq_get_mask(void); +extern void irq_enable (void); + +#define general_int_init isr_init + +int general_int_add(unsigned long irq, isr_ptr_t handler, void *arg); +void general_int_enable(unsigned long irq); + +#define general_cpu_int_en irq_enable + + +void __main (void); //initial_global_data + + + + + + + +#endif

sw/lm32/lm32_system.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: verilog/src/lm32_cpu.v =================================================================== --- verilog/src/lm32_cpu.v (revision 45) +++ verilog/src/lm32_cpu.v (revision 48) @@ -104,7 +104,12 @@ D_WE_O, D_CTI_O, D_LOCK_O, - D_BTE_O + D_BTE_O, + + snoop_adr_i, + d_snoop_valid + + ); ///////////////////////////////////////////////////// @@ -278,6 +283,10 @@ output [`LM32_BTYPE_RNG] D_BTE_O; // Data Wishbone interface burst type wire [`LM32_BTYPE_RNG] D_BTE_O; + +input [31:0] snoop_adr_i; +input d_snoop_valid; + ///////////////////////////////////////////////////// // Internal nets and registers ///////////////////////////////////////////////////// @@ -901,7 +910,11 @@ .d_we_o (D_WE_O), .d_cti_o (D_CTI_O), .d_lock_o (D_LOCK_O), - .d_bte_o (D_BTE_O) + .d_bte_o (D_BTE_O), + + .snoop_adr_i (snoop_adr_i), + .d_snoop_valid (d_snoop_valid) + ); // Adder

/verilog/src/lm32_load_store_unit.v