URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor/mor1kx-3.1/rtl
- from Rev 42 to Rev 48
- ↔ Reverse comparison
Rev 42 → Rev 48
/mor1k.v
6,6 → 6,9
parameter FEATURE_DATACACHE ="ENABLED",// "NONE","ENABLED" |
parameter FEATURE_IMMU ="ENABLED",// "NONE","ENABLED" |
parameter FEATURE_DMMU="ENABLED",// "NONE","ENABLED" |
parameter FEATURE_MULTIPLIER = "THREESTAGE",//"THREESTAGE", "PIPELINED", "SERIAL", "SIMULATION", "NONE" |
parameter FEATURE_DIVIDER = "SERIAL",// "SERIAL", "SIMULATION", "NONE" |
parameter OPTION_SHIFTER = "BARREL", //"BARREL", "SERIAL" |
parameter OPTION_OPERAND_WIDTH=32, |
parameter IRQ_NUM=32 |
|
118,6 → 121,9
.FEATURE_DEBUGUNIT("ENABLED"), |
.FEATURE_CMOV("ENABLED"), |
.FEATURE_INSTRUCTIONCACHE(FEATURE_INSTRUCTIONCACHE), |
.FEATURE_MULTIPLIER(FEATURE_MULTIPLIER), |
.FEATURE_DIVIDER(FEATURE_DIVIDER), |
.OPTION_SHIFTER(OPTION_SHIFTER), |
.OPTION_ICACHE_BLOCK_WIDTH(5), |
.OPTION_ICACHE_SET_WIDTH(8), |
.OPTION_ICACHE_WAYS(2), |