URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor
- from Rev 25 to Rev 29
- ↔ Reverse comparison
Rev 25 → Rev 29
/aeMB/sw/Makefile
1,4 → 1,4
all: |
cd compile; sh gccrom ../main.c; |
cd compile; cp ram.mif ../ram${CORE_ID}.mif; cp ram.bin ../ram${CORE_ID}.bin; |
cd compile; cp ram.mif ../ram0.mif; cp ram.bin ../ram0.bin; |
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/program.sh
1,9 → 1,5
#!/bin/sh |
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OFSSET="0x00000000" |
BOUNDRY="0x00003fff" |
BINFILE="ram0.bin" |
VJTAG_INDEX="0" |
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JTAG_MAIN="$PRONOC_WORK/toolchain/bin/jtag_main" |
|
25,7 → 21,7
|
|
#programe the memory |
$JTAG_MAIN -n $VJTAG_INDEX -s $OFSSET -e $BOUNDRY -i $BINFILE -c |
sh ./write_memory.sh |
|
#Enable the cpu |
$JTAG_MAIN -n 127 -d "I:1,D:2:0,I:0" |