URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/src_processor
- from Rev 42 to Rev 45
- ↔ Reverse comparison
Rev 42 → Rev 45
/aeMB/sw/Makefile
1,5 → 1,5
all: |
cd compile; sh gccrom ../main.c; |
cd compile; bash gccrom ../main.c; |
rm -Rf ./RAM |
mkdir -p ./RAM |
cd compile; cp ram.mif ../RAM/ram0.mif; cp ram.bin ../RAM/ram0.bin; cp ram.hex ../RAM/ram0.hex; |
/aeMB/sw/compile/gccrom
1,4 → 1,4
#!/bin/sh |
#!/bin/bash |
# $Id: gccrom,v 1.18 2008-05-01 08:35:04 sybreon Exp $ |
|
TOOLCHAIN="$PRONOC_WORK/toolchain" |
12,7 → 12,7
LNKFLAGS="-Wl,-defsym -Wl,_STACK_SIZE=${STACK_SIZE} -Wl,-defsym -Wl,_HEAP_SIZE=${HEAP_SIZE}" |
LIBFLAGS="" |
INCFLAGS="-Icc/" |
RAMSIZE="3FFF" #for aeMB ramwith of 12 |
#RAMSIZE="3FFF" #for aeMB ramwith of 12 |
|
$TOOLCHAIN/aemb/bin/mb-g++ $XILFLAGS $CXXFLAGS $LNKFLAGS $LIBFLAGS $INCFLAGS -specs=aemb.specs $@ -o $ELFFILE && \ |
echo "xgcc=$?" && \ |
35,7 → 35,8
#echo "copy2ihex=$?" && \ |
|
# Generate a MIF & BIN files from the IHEX file |
$TOOLCHAIN/bin/ihex2mif -f $ELFFILE.ihex -e $RAMSIZE -o ram.mif && \ |
#$TOOLCHAIN/bin/ihex2mif -f $ELFFILE.ihex -e $RAMSIZE -o ram.mif && \ |
$TOOLCHAIN/bin/ihex2mif -f $ELFFILE.ihex -o ram.mif && \ |
echo "ihex2mif=$?" |
$TOOLCHAIN/bin/ihex2bin -i $ELFFILE.ihex -o ram.bin && \ |
echo "ihex2bin=$?" |
/lm32/sw/Makefile
5,7 → 5,7
|
#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram |
|
RAMSIZE=3FFF |
#RAMSIZE=3FFF |
#CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled -msign-extend-enabled -mdivide-enabled |
CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled |
|
54,7 → 54,8
#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE) |
rm -Rf ./RAM |
mkdir -p ./RAM |
$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif |
#$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif |
$(IHEX2MIF) -f image.ihex -o RAM/ram0.mif |
$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin |
$(BIN2HEX) -f RAM/ram0.bin -h |
|
/mor1kx-3.1/sw/Makefile
23,7 → 23,7
|
LDFLAGS ?= -Tlink.ld -e 256 |
|
RAMSIZE=3FFF |
#RAMSIZE=3FFF |
|
# Sources to go into the liborpsoc.a support library |
COMPILE_SRCS=$(HDR_SOURCE_DIR)/exceptions.c $(HDR_SOURCE_DIR)/int.c $(HDR_SOURCE_DIR)/mmu.S $(HDR_SOURCE_DIR)/$(HDR_SOURCE_DIR)-utils.c $(HDR_SOURCE_DIR)/cache.S |
57,7 → 57,8
mkdir -p ./RAM |
$(OR32_OBJCOPY) -O ihex image image.ihex |
# Generate a MIF & BIN files from the IHEX file |
$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif |
# $(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif |
$(IHEX2MIF) -f image.ihex -o RAM/ram0.mif |
$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin |
$(BIN2HEX) -f RAM/ram0.bin -h |
rm *.o *.a |
/or1200/sw/Makefile
23,7 → 23,7
|
LDFLAGS ?= -Tlink.ld -e 256 |
|
RAMSIZE=3FFF |
#RAMSIZE=3FFF |
|
# Sources to go into the liborpsoc.a support library |
COMPILE_SRCS=$(HDR_SOURCE_DIR)/exceptions.c $(HDR_SOURCE_DIR)/int.c $(HDR_SOURCE_DIR)/mmu.S $(HDR_SOURCE_DIR)/$(HDR_SOURCE_DIR)-utils.c $(HDR_SOURCE_DIR)/cache.S |
57,7 → 57,8
mkdir -p ./RAM |
$(OR32_OBJCOPY) -O ihex image image.ihex |
# Generate a MIF & BIN files from the IHEX file |
$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif |
# $(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif |
$(IHEX2MIF) -f image.ihex -o RAM/ram0.mif |
$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin |
$(BIN2HEX) -f RAM/ram0.bin -h |
rm *.o |
/program_memories.sh
1,4 → 1,4
#!/bin/sh |
#!/bin/bash |
cd program |
quartus_stp -t prog.tcl |
cd .. |