OpenCores
URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /async_sdm_noc/branches/init/sdm
    from Rev 26 to Rev 27
    Reverse comparison

Rev 26 → Rev 27

/src/clos_sch.v
21,7 → 21,7
10/06/2010 Change to use PIM structure <wsong83@gmail.com>
23/08/2010 Fix the non-QDI request withdraw process <wsong83@gmail.com>
23/09/2010 Modified for Clos SDM router <wsong83@gmail.com>
25/05/2011 Clean up for opensource. <wsong83@gmail.com>
27/05/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
88,7 → 88,7
.ira ( cmra[0] ),
.oreq ( sr ),
.ora ( sra ),
.gnt ( imc[0] )
.cfg ( imc[0] )
);
 
// the C-element to force the request withdrawal sequence
113,7 → 113,7
.ira ( cmra[1] ),
.oreq ( wr ),
.ora ( wra ),
.gnt ( imc[1] )
.cfg ( imc[1] )
);
 
generate for(i=0; i<N; i++) begin: WA
137,7 → 137,7
.ira ( cmra[2] ),
.oreq ( nr ),
.ora ( nra ),
.gnt ( imc[2] )
.cfg ( imc[2] )
);
 
generate for(i=0; i<N; i++) begin: NA
161,7 → 161,7
.ira ( cmra[3] ),
.oreq ( er ),
.ora ( era ),
.gnt ( imc[3] )
.cfg ( imc[3] )
);
 
generate for(i=0; i<N; i++) begin: EA
185,7 → 185,7
.ira ( cmra[4] ),
.oreq ( lr ),
.ora ( lra ),
.gnt ( imc[4] )
.cfg ( imc[4] )
);
 
generate for(i=0; i<N; i++) begin: LA
/src/im_alloc.v
22,7 → 22,7
05/11/2009 Speed up the arbiter. <wsong83@gmail.com>
10/06/2010 [Major] change to use PIM structure. <wsong83@gmail.com>
23/08/2010 Fix the non-QDI request withdraw process. <wsong83@gmail.com>
25/05/2011 Clean up for opensource. <wsong83@gmail.com>
27/05/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
118,6 → 118,9
assign IPr[i] = |IMr[i];
end
endgenerate
assign OPrst_n[0] = rst_n;
`endif // !`ifndef ENABLE_MRMA
endmodule // im_alloc
/src/sdm_sch.v
18,7 → 18,7
History:
28/09/2009 Initial version. <wsong83@gmail.com>
25/05/2011 Clean up for opensource. <wsong83@gmail.com>
27/05/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
229,13 → 229,15
generate
for(i=0; i<VCN; i++) begin: OPC
delay DLY ( .q(OPrst_n[i+1]), .a(OPrst_n[i])); // dont touch
assign SOPrdy[i] = (~SOPblk[i])&SOPrst_n[i+1];
assign WOPrdy[i] = (~WOPblk[i])&WOPrst_n[i+1];
assign NOPrdy[i] = (~NOPblk[i])&NOPrst_n[i+1];
assign EOPrdy[i] = (~EOPblk[i])&EOPrst_n[i+1];
assign LOPrdy[i] = (~LOPblk[i])&LOPrst_n[i+1];
assign SOPrdy[i] = (~SOPblk[i])&OPrst_n[i+1];
assign WOPrdy[i] = (~WOPblk[i])&OPrst_n[i+1];
assign NOPrdy[i] = (~NOPblk[i])&OPrst_n[i+1];
assign EOPrdy[i] = (~EOPblk[i])&OPrst_n[i+1];
assign LOPrdy[i] = (~LOPblk[i])&OPrst_n[i+1];
end
endgenerate
 
assign OPrst_n[0] = rst_n;
`endif // !`ifndef ENABLE_MRMA

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.