URL
https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk
Subversion Repositories async_sdm_noc
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- This comparison shows the changes necessary to convert path
/async_sdm_noc/branches/init/vc/sim
- from Rev 24 to Rev 44
- ↔ Reverse comparison
Rev 24 → Rev 44
/compile.sh
0,0 → 1,58
#!/bin/bash |
# |
# Asynchronous SDM NoC |
# (C)2011 Wei Song |
# Advanced Processor Technologies Group |
# Computer Science, the Univ. of Manchester, UK |
# |
# Authors: |
# Wei Song wsong83@gmail.com |
# |
# License: LGPL 3.0 or later |
# |
# The script to compile the SystemC/Verilog mixed NoC simulation |
# |
# History: |
# 05/06/2011 CLean up for opensource. <wsong83@gmail.com> |
# |
|
# make sure the LDVHOME environment is ready for NC-Simulator, IUS/LDV, Cadence |
export NCSC_GCC=${LDVHOME}/tools/systemc/gcc/bin/g++ |
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CXXFLAG="-c -g -Wall -I../../common/tb -I../tb -I../" |
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# remove the files from last run |
rm -fr INCA_libs |
rm *.o |
rm *.so |
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# compile verilog files |
# cell library |
ncvlog -nowarn RECOMP ../../lib/NangateOpenCellLibrary_typical_conditional.v |
# synthesized design |
ncvlog ../syn/file/router_syn.v |
# other verilog test bench files |
ncvlog -incdir ../ ../../common/tb/anaproc.v |
ncvlog -sv -incdir ../ ../tb/rtwrapper.v |
ncvlog -incdir ../ ../tb/netnode.v |
ncvlog -sv -incdir ../ ../tb/noc_top.v |
ncvlog -sv -incdir ../ ../tb/node_top.v |
ncvlog ../tb/noctb.v |
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#compile SystemC files |
ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../../common/tb/sim_ana.cpp |
ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../../common/tb/anaproc.cpp |
ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../tb/netnode.cpp |
ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../tb/ni.cpp |
ncsc -compiler $NCSC_GCC -cflags "${CXXFLAG}" ../tb/rtdriver.cpp |
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# build the run time link library |
${NCSC_GCC} -Wl -shared -o sysc.so -L${CDS_LNX86_ROOT}/ldv_2009_sc/tools/lib \ |
sim_ana.o anaproc.o netnode.o ni.o rtdriver.o \ |
${CDS_LNX86_ROOT}/ldv_2009_sc/tools/systemc/lib/gnu/libncscCoSim_sh.so \ |
${CDS_LNX86_ROOT}/ldv_2009_sc/tools/systemc/lib/gnu/libncscCoroutines_sh.so \ |
${CDS_LNX86_ROOT}/ldv_2009_sc/tools/systemc/lib/gnu/libsystemc_sh.so |
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# elaborate the simulation |
ncelab -timescale 1ns/1ps -access +rwc -loadsc sysc.so worklib.noctb |
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compile.sh
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