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URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

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  • This comparison shows the changes necessary to convert path
    /async_sdm_noc/trunk/common/src
    from Rev 37 to Rev 47
    Reverse comparison

Rev 37 → Rev 47

/pipen.v
0,0 → 1,43
/*
Asynchronous SDM NoC
(C)2011 Wei Song
Advanced Processor Technologies Group
Computer Science, the Univ. of Manchester, UK
Authors:
Wei Song wsong83@gmail.com
License: LGPL 3.0 or later
A single 4-phase 1-of-n pipeline stage.
History:
05/05/2009 Initial version. <wsong83@gmail.com>
01/06/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
module pipen(/*AUTOARG*/
// Outputs
d_in_a, d_out,
// Inputs
d_in, d_out_a
);
 
parameter DW = 4; // the wire count, the "n" of the 1-of-n code
input [DW-1:0] d_in;
output d_in_a;
output [DW-1:0] d_out;
input d_out_a;
 
genvar i;
// the data pipe stage
generate for (i=0; i<DW; i=i+1) begin:DD
dc2 DC (.d(d_in[i]), .a(d_out_a), .q(d_out[i]));
end endgenerate
 
assign d_in_a = |d_out;
 
endmodule // pipen
/comp4.v
0,0 → 1,39
/*
Asynchronous SDM NoC
(C)2011 Wei Song
Advanced Processor Technologies Group
Computer Science, the Univ. of Manchester, UK
Authors:
Wei Song wsong83@gmail.com
License: LGPL 3.0 or later
1-of-4 data comparator
History:
11/05/2010 Initial version. <wsong83@gmail.com>
01/06/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
module comp4 (/*AUTOARG*/
// Outputs
q,
// Inputs
a, b
);
 
input [3:0] a, b; // the data inputs to be compared
output [2:0] q; // the comparison result
 
// a > b
assign q[0] = (a[3]&(|b[2:0])) | (a[2]&(|b[1:0])) | (a[1]&(|b[0:0]));
 
// a < b
assign q[1] = (a[2]&(|b[3:3])) | (a[1]&(|b[3:2])) | (a[0]&(|b[3:1]));
 
// a = b
assign q[2] = (a[3]&b[3]) | (a[2]&b[2]) | (a[1]&b[1]) | (a[0]&b[0]);
 
endmodule // comp4

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