OpenCores
URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /async_sdm_noc/trunk/sdm/src
    from Rev 22 to Rev 28
    ↔ Reverse comparison
  •

Rev 22 → Rev 28

/input_buf.v
169,12 → 169,12
);
 
// keep the routing decision until the tail flit is received by all sub-channels
c2p C_RTD0 ( .a1(raw_dec[0]), .a0((~frame_end)&rst_n), .q(dec_reg[0]));
c2p C_RTD1 ( .a1(raw_dec[1]), .a0((~frame_end)&rst_n), .q(dec_reg[1]));
c2p C_RT_XEQ (.a1(raw_dec[2]), .a0((~frame_end)&rst_n), .q(x_equal) );
c2p C_RTD2 ( .a1(raw_dec[3]), .a0(x_equal), .q(dec_reg[2]));
c2p C_RTD3 ( .a1(raw_dec[4]), .a0(x_equal), .q(dec_reg[3]));
c2p C_RTD4 ( .a1(raw_dec[5]), .a0(x_equal), .q(dec_reg[4]));
c2p C_RTD0 ( .b(raw_dec[0]), .a((~frame_end)&rst_n), .q(dec_reg[0]));
c2p C_RTD1 ( .b(raw_dec[1]), .a((~frame_end)&rst_n), .q(dec_reg[1]));
c2p C_RT_XEQ (.b(raw_dec[2]), .a((~frame_end)&rst_n), .q(x_equal) );
c2p C_RTD2 ( .b(raw_dec[3]), .a(x_equal), .q(dec_reg[2]));
c2p C_RTD3 ( .b(raw_dec[4]), .a(x_equal), .q(dec_reg[3]));
c2p C_RTD4 ( .b(raw_dec[5]), .a(x_equal), .q(dec_reg[4]));
 
// generate the arbiter request signals
assign arb_r =
/clos_sch.v
21,7 → 21,7
10/06/2010 Change to use PIM structure <wsong83@gmail.com>
23/08/2010 Fix the non-QDI request withdraw process <wsong83@gmail.com>
23/09/2010 Modified for Clos SDM router <wsong83@gmail.com>
25/05/2011 Clean up for opensource. <wsong83@gmail.com>
27/05/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
88,7 → 88,7
.ira ( cmra[0] ),
.oreq ( sr ),
.ora ( sra ),
.gnt ( imc[0] )
.cfg ( imc[0] )
);
 
// the C-element to force the request withdrawal sequence
113,7 → 113,7
.ira ( cmra[1] ),
.oreq ( wr ),
.ora ( wra ),
.gnt ( imc[1] )
.cfg ( imc[1] )
);
 
generate for(i=0; i<N; i++) begin: WA
137,7 → 137,7
.ira ( cmra[2] ),
.oreq ( nr ),
.ora ( nra ),
.gnt ( imc[2] )
.cfg ( imc[2] )
);
 
generate for(i=0; i<N; i++) begin: NA
161,7 → 161,7
.ira ( cmra[3] ),
.oreq ( er ),
.ora ( era ),
.gnt ( imc[3] )
.cfg ( imc[3] )
);
 
generate for(i=0; i<N; i++) begin: EA
185,7 → 185,7
.ira ( cmra[4] ),
.oreq ( lr ),
.ora ( lra ),
.gnt ( imc[4] )
.cfg ( imc[4] )
);
 
generate for(i=0; i<N; i++) begin: LA
/subc_ctl.v
52,12 → 52,12
wire acken; // active low ack enable
`ifdef ENABLE_LOOKAHEAD
c2n CD (.q(acko), .a0(ai2cb), .a1(ack)); // the C2N gate to avoid early withdrawal
c2n CD (.q(acko), .a(ai2cb), .b(ack)); // the C2N gate to avoid early withdrawal
`else
assign acko = ai2cb;
`endif
c2p CEN (.a1(eof), .a0(acko), .q(fend));
c2p CEN (.b(eof), .a(acko), .q(fend));
c2 C (.a0(rt_ra), .a1(fend), .q(csc));
nand U1 ( acken, rt_ra, ~csc);
nor U2 ( rt_rst, fend, ~csc);
/im_alloc.v
22,7 → 22,7
05/11/2009 Speed up the arbiter. <wsong83@gmail.com>
10/06/2010 [Major] change to use PIM structure. <wsong83@gmail.com>
23/08/2010 Fix the non-QDI request withdraw process. <wsong83@gmail.com>
25/05/2011 Clean up for opensource. <wsong83@gmail.com>
27/05/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
86,9 → 86,9
for(i=0; i<VCN; i++) begin: IPC
for(j=0; j<CMN; j++) begin: OPC
`ifdef ENABLE_CRRD
IPr[i][j] = |IMr[i];
assign IPr[i][j] = |IMr[i];
`else
IPr[i][j] = |IPrm[i][j];
assign IPr[i][j] = |IPrm[i][j];
for(k=0; k<SN; k++) begin: DIRC
c2p IPRen (.q(IPrm[i][j][k]), .a0(IMr[i][k]), .a1(~CMs[j][k]));
end
118,6 → 118,9
assign IPr[i] = |IMr[i];
end
endgenerate
assign OPrst_n[0] = rst_n;
`endif // !`ifndef ENABLE_MRMA
endmodule // im_alloc
/router.v
403,7 → 403,7
);
`else // Crossbar based SDM
 
crossbar #(.VCN(VCN), .VCW(DW))
dcb_xy #(.VCN(VCN), .VCW(DW))
CB (
.so0 ( c2s0 ),
.so1 ( c2s1 ),
/sdm_sch.v
18,7 → 18,7
History:
28/09/2009 Initial version. <wsong83@gmail.com>
25/05/2011 Clean up for opensource. <wsong83@gmail.com>
27/05/2011 Clean up for opensource. <wsong83@gmail.com>
*/
 
29,7 → 29,7
// Outputs
sack, wack, nack, eack, lack, scfg, ncfg, wcfg, ecfg, lcfg,
// Inputs
sreq, nreq, lreq, wreq, ereq
sreq, nreq, lreq, wreq, ereq, rst_n
);
parameter VCN = 2; // the number of virtual circuits per port
229,13 → 229,15
generate
for(i=0; i<VCN; i++) begin: OPC
delay DLY ( .q(OPrst_n[i+1]), .a(OPrst_n[i])); // dont touch
assign SOPrdy[i] = (~SOPblk[i])&SOPrst_n[i+1];
assign WOPrdy[i] = (~WOPblk[i])&WOPrst_n[i+1];
assign NOPrdy[i] = (~NOPblk[i])&NOPrst_n[i+1];
assign EOPrdy[i] = (~EOPblk[i])&EOPrst_n[i+1];
assign LOPrdy[i] = (~LOPblk[i])&LOPrst_n[i+1];
assign SOPrdy[i] = (~SOPblk[i])&OPrst_n[i+1];
assign WOPrdy[i] = (~WOPblk[i])&OPrst_n[i+1];
assign NOPrdy[i] = (~NOPblk[i])&OPrst_n[i+1];
assign EOPrdy[i] = (~EOPblk[i])&OPrst_n[i+1];
assign LOPrdy[i] = (~LOPblk[i])&OPrst_n[i+1];
end
endgenerate
 
assign OPrst_n[0] = rst_n;
`endif // !`ifndef ENABLE_MRMA

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.