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URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

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  • This comparison shows the changes necessary to convert path
    /async_sdm_noc/trunk/sdm/syn/script
    from Rev 28 to Rev 37
    Reverse comparison

Rev 28 → Rev 37

/constraint.tcl
41,7 → 41,7
# the delay cell in the lookahead pipeline
# It is not a problem to get errors here if ENABLE_LOOKAHEAD is not defined.
foreach_in_collection celln [get_references -hierarchical outp_buf_*] {
set_disable_timing [get_object_name $celln]/DLY/U -from A -to Z
set_disable_timing [get_object_name $celln]/*DLY/U -from A -to Z
}
 
# set some timing path ending points
61,8 → 61,8
 
# set the timing constraints for data paths and ack paths
# For better speed performance, please tune these delay and factors according different cell libraries
set DATA_dly 5
set ACK_dly 8
set DATA_dly 1.0
set ACK_dly 1.6
 
set_max_delay [expr ${DATA_dly} * 1.00] -from ${DPA} -to ${DPD} -group G_DATA
set_max_delay [expr ${ACK_dly} * 1.00] -from ${DPA} -to ${DPA} -group G_ACK
81,4 → 81,4
set_max_area 0
 
# timing path disabled by user constraints
suppress_message TIM-175
suppress_message TIM-175
/compile.tcl
12,7 → 12,7
# currently using the Nangate 45nm cell lib.
#
# History:
# 26/05/2009 Initial version. <wsong83@gmail.com>
# 31/05/2009 Initial version. <wsong83@gmail.com>
 
set rm_top router
set rm_para "VCN=>1, DW=>8, IPD=>1, OPD=>1"
36,6 → 36,7
 
# elaborate the design
elaborate ${rm_top} -parameters ${rm_para}
rename_design ${current_design} router
 
link
 
58,7 → 59,6
 
write -format verilog -hierarchy -out file/${current_design}_syn.v $current_design
write_sdf -significant_digits 5 file/${current_design}.sdf
write_sdc file/${current_design}.sdc
 
report_constraints -verbose
 

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