URL
https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk
Subversion Repositories async_sdm_noc
Compare Revisions
- This comparison shows the changes necessary to convert path
/async_sdm_noc/trunk
- from Rev 47 to Rev 48
- ↔ Reverse comparison
Rev 47 → Rev 48
/TODO
1,4 → 1,4
01/06/2011 Urgent Clean up the VC router |
TO DO List: |
01/06/2011 Urgent Provide better documents |
01/06/2011 Support other routing algorithms |
01/06/2011 Long time Support QoS ?? (necessary?) who needs it pls contact me |
6,4 → 6,7
01/06/2011 Provide network interface |
01/06/2011 Lookahead routing |
01/06/2011 Support variable number of ports |
01/06/2011 Unify local port by serialization/parallelization |
01/06/2011 Unify local port by serialization/parallelization |
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Already Done: |
08/06/2011 Urgent Clean up the VC router |
/Release_Note
0,0 → 1,11
Verison History: |
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=================================== |
0.2 08/06/2011 |
Adding features. |
VC router ready for use. |
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=================================== |
0.1 01/06/2011 |
Initial Version. |
Wormhole/SDM router ready for use. |
/README
1,7 → 1,7
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Asynchronous Spatial Division Multiplexing Router for On-Chip Networks |
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Version: 0.1 |
Version: 0.2 |
|
On-chip networks or networks-on-chip (NoCs) are the on-chip communication fabric for |
current and future multiprocessor SoCs (MPSoCs) and chip multiprocessors (CMPs). |
26,7 → 26,7
Features: |
* 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local) |
* The dimension order routing (XY routing) |
* Available flow control methods: wormhole, SDM |
* Available flow control methods: wormhole, SDM, VC |
* Reconfigurable number of virtual circuits, buffer size, data width |
* Fully synthesizable router implementation |
* SystemC testbench provided |
55,7 → 55,14
|- syn synthesis run dir |
\- script synthesis script |
\- tb test bench |
* vc VC router (ongoing) |
* vc VC router deign |
\- define.v HDL configure file |
|- define.h test bench configuration |
|- sim simulation run dir |
|- src HDL |
|- syn synthesis run dir |
\- script synthesis script |
\- tb test bench |
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How to run: |
* to synthesize a router |
95,9 → 102,12
"delay.ana": |
{simulation time in ps} TAB {avg. frame latency} TAB {avg. path setup delay} |
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* The process of synthesize and simulate the VC router is similar to the procedure of |
the wormhole/SDM router. |
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For any questions and bug reports, |
please email to Wei Song from wsong83@gmail.com |
|
Wei Song |
01/06/2011 |
08/06/2011 |
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