OpenCores
URL https://opencores.org/ocsvn/atlas_core/atlas_core/trunk

Subversion Repositories atlas_core

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    /atlas_core
    from Rev 17 to Rev 18
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Rev 17 → Rev 18

/trunk/asm/src/main.cpp
0,0 → 1,1535
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <string.h>
 
using namespace std;
 
// global definition table
char definition[512][16];
char def_alias[512][16];
int def_cnt = 0;
 
// global mem-data table
bool is_dw[65536];
 
// global branch-label table
char c_label_tab[2048][32];
int i_label_tab[2048];
 
// global error/warning indicator
int error_cnt = 0;
int warning_cnt = 0;
 
// function prototypes
void includer(char *main_file, const char *output);
void convert_strings(const char *input_file, const char *output_file);
void pre_processor(const char *input_file, const char *output_file);
int conv_shift(char *input_string, int line);
int hexc_to_int(char input_char);
int conv_cpreg(char *input_string, int line);
int conv_reg(char *input_string, int line);
int conv_indexing(char *input_string, int line);
int conv_flag_op(char *input_string, int line);
int conv_flag_op_2(char *input_string, int line);
int find_offset(char *input_label, int line);
int conv_imm(char *input, int max_val, int line);
void get_labels(const char *input_file);
int assemble(const char *input_file, const char *output_file, const char *bin_output_file);
int main(int argc, char *argv[]);
// *****************************************************************************************************************
// Copy included files to main file
// *****************************************************************************************************************
void includer(char *main_file, const char *output_file){
 
FILE *input, *inc_file, *output;
char line_input[1024];
int i = 0, j = 0;
char *cut_out;
char txt_string[256];
char buf_string[256];
char in_file_name[256];
bool found = false;
char ch;
 
// open input file
input = fopen(main_file, "r");
if(input == NULL){
printf("INCLUDER: Input file error!");
exit(1);
}
 
// open output file (main working file)
output = fopen(output_file, "w+");
if(output == NULL){
printf("INCLUDER: Main file error!");
exit(1);
}
 
// get line
while(fgets(line_input, 512, input) != NULL){
 
// clear working string
for(i=0; i<strlen(txt_string); i++)
txt_string[i] = '\0';
// clear working string
for(i=0; i<strlen(buf_string); i++)
buf_string[i] = '\0';
// clear file name string
for(i=0; i<strlen(in_file_name); i++)
in_file_name[i] = '\0';
 
// get line entry
cut_out = strtok(line_input, "\n");
if (cut_out != NULL)
sprintf(txt_string, "%s", cut_out);
strcpy(buf_string, txt_string); // make a copy
 
// erase comments
for(i=0; i<strlen(txt_string); i++){
if (txt_string[i] == ';'){
for(j=i; j<strlen(txt_string); i++)
txt_string[j] = '\0';
break;
}
}
 
// find include statement
for (i=0; i<245; i++){
if (txt_string[i] == '.'){
if (((txt_string[i+1] == 'I') or (txt_string[i+1] == 'i')) and ((txt_string[i+2] == 'N') or (txt_string[i+2] == 'n')) and
((txt_string[i+3] == 'C') or (txt_string[i+3] == 'c')) and ((txt_string[i+4] == 'L') or (txt_string[i+4] == 'l')) and
((txt_string[i+5] == 'U') or (txt_string[i+5] == 'u')) and ((txt_string[i+6] == 'D') or (txt_string[i+6] == 'd')) and
((txt_string[i+7] == 'E') or (txt_string[i+7] == 'e')) and (txt_string[i+8] == ' ') and (txt_string[i+9] == '"')){
// copy file name
for (j=i; j<strlen(txt_string); j++){
if (txt_string[j+10] == '"')
break;
in_file_name[j-i] = txt_string[j+10];
}
in_file_name[j-i] = '\0';
found = true;
}
}
}
 
if(found == true){ // include statement found!
// open to be included file
printf("Including file '%s' ...\n", in_file_name);
inc_file = fopen(in_file_name, "r");
if(inc_file == NULL){
printf("INCLUDER: Error loading file '%s'!\n", in_file_name);
exit(1);
}
// copy file
while ((ch = getc(inc_file)) != EOF)
putc(ch, output);
fclose(inc_file);
}
else{ // copy data from main input file
strcat(buf_string, "\n");
fputs(buf_string, output);
}
 
}
 
fclose(output);
fclose(input);
}
 
// *****************************************************************************************************************
// Convert strings into data intialization
// *****************************************************************************************************************
void convert_strings(const char *input_file, const char *output_file){
 
FILE *input, *output;
char line_input[1024];
int i = 0, j = 0, k = 0;
char *cut_out;
char txt_string[256];
char tmp_string[256];
char buf_string[256];
bool found = false;
int fill_data_cnt = 0;
int line = 1;
int high = 0, low = 0;
int word = 0;
 
// open string converter input file
input = fopen(input_file, "r");
if(input == NULL){
printf("STRING_CONVERTER: Input file error!\n");
exit(1);
}
 
// open string converter output file
output = fopen(output_file, "w");
if(output == NULL){
printf("STRING_CONVERTER: Output file error!");
exit(1);
}
 
// get line
rewind(input);
rewind(output);
while(fgets(line_input, 512, input) != NULL){
 
// clear working string
for(i=0; i<strlen(txt_string); i++)
txt_string[i] = '\0';
// clear working string
for(i=0; i<strlen(tmp_string); i++)
tmp_string[i] = '\0';
 
// get line entry
cut_out = strtok(line_input, "\n");
if (cut_out != NULL)
sprintf(txt_string, "%s", cut_out);
 
// erase comments
for(i=0; i<strlen(txt_string); i++){
if (txt_string[i] == ';'){
for(j=i; j<strlen(txt_string); i++)
txt_string[j] = '\0';
break;
}
}
 
// insert line breaks after labels
for(i=0; i<strlen(txt_string); i++){
if(txt_string[i] == ':'){
for(j=0; j<(strlen(txt_string)-i); j++){
tmp_string[j] = txt_string[i+j+1];
}
txt_string[i+1] = '\n';
txt_string[i+2] = '\0';
strcat(txt_string, tmp_string);
strcat(txt_string, "\n\0");
break;
}
}
 
// convert to higher case
for(i=0; i<strlen(txt_string); i++){
if((txt_string[i] == 39) or (txt_string[i] == 34)) // stop converting when ' or " has been found
break;
if((txt_string[i] > 96) and (txt_string[i] < 123))
txt_string[i] = txt_string[i] - 32;
}
strcpy(tmp_string, txt_string); // make a copy
strcpy(buf_string, txt_string); // make a copy
 
// find ".string" definiton
found = false;
for(i=0; i<strlen(tmp_string); i++){
if ((tmp_string[i+0] == '.') and (tmp_string[i+1] == 'S') and (tmp_string[i+2] == 'T') and (tmp_string[i+3] == 'R') and
(tmp_string[i+4] == 'I') and (tmp_string[i+5] == 'N') and (tmp_string[i+6] == 'G') and (tmp_string[i+7] == 'Z') and (tmp_string[i+8] == ' ')){
for(j=0; j<strlen(tmp_string); j++)
tmp_string[j] = tmp_string[j+i+8];
// isolate text part
for(k=0; k<strlen(tmp_string); k++){
if (tmp_string[k] == 34){ // beginning of string text field
for(j=0; j<strlen(tmp_string); j++){
if(tmp_string[j+k+1] == 34) // end of string text field
break;
else
tmp_string[j] = tmp_string[j+k+1];
}
tmp_string[j] = '\0'; // terminate string
break;
}
}
found = true;
break;
}
}
if (found == true){
// save label
for (k=0; k<strlen(txt_string); k++){
if (txt_string[k] == '\n'){
txt_string[k+1] = '\0';
fputs(txt_string, output);
break;
}
}
// save integer conversion
word = 0;
for(k=0; k<strlen(tmp_string); k++){
if (k%2==0){
word = (int)tmp_string[k] << 8;
}
else{
word = word | (int)tmp_string[k];
sprintf(txt_string, ".dw #%d\n", word);
fputs(txt_string, output);
}
}
if((word&255) != 0) // last byte is zero?
sprintf(txt_string, ".dw #0\n");
else
sprintf(txt_string, ".dw #%d\n", word);
fputs(txt_string, output);
}
else{
// write default to file
strcat(buf_string, "\n");
fputs(buf_string, output);
}
 
}
 
fclose(output);
fclose(input);
}
 
 
// *****************************************************************************************************************
// Formating pre-processor
// Erase comments and empty lines, convert to higher case, get definitions and insert data initializations
// *****************************************************************************************************************
void pre_processor(const char *input_file, const char *output_file){
 
FILE *input, *output;
char line_input[1024];
int i = 0, j = 0, k = 0;
char *cut_out;
char txt_string[256];
char tmp_string[256];
char buf_string[512];
bool empty_line = false;
int fill_data_cnt = 0;
int line = 1;
int high = 0, low = 0;
int word = 0;
bool insert_label = false;
bool empty_label_line = false;
bool found = false;
 
// open pre_processor input file
input = fopen(input_file, "r");
if(input == NULL){
printf("PRE_PROCESSOR: Input file error!\n");
exit(1);
}
 
// open pre_processor output file
output = fopen(output_file, "w");
if(output == NULL){
printf("PRE_PROCESSOR: Output file error!");
exit(1);
}
 
// clear dw table
for(i=0; i<65536; i++)
is_dw[i] = false;
 
// get line
rewind(input);
rewind(output);
while(fgets(line_input, 512, input) != NULL){
 
// clear working string
for(i=0; i<strlen(txt_string); i++)
txt_string[i] = '\0';
// clear working string
for(i=0; i<strlen(buf_string); i++)
buf_string[i] = '\0';
 
// get line entry
cut_out = strtok(line_input, "\n");
if (cut_out != NULL)
sprintf(txt_string, "%s", cut_out);
 
// clear pending empty spaces
for(i=strlen(txt_string); i>0; i--){
if ((txt_string[i] == 0) or (txt_string[i] == ' ') or (txt_string[i] == '\n') or (txt_string[i] == 9))
txt_string[i] = '\0';
else{
txt_string[i+1] = '\n';
txt_string[i+2] = '\0';
break;
}
}
 
// convert to higher case
for(i=0; i<strlen(txt_string); i++){
if((txt_string[i] == 39) or (txt_string[i] == 34)) // stop converting when ' or " has been found
break;
if((txt_string[i] > 96) and (txt_string[i] < 123))
txt_string[i] = txt_string[i] - 32;
}
// insert label?
if (insert_label == true){
strncat(buf_string, tmp_string, strlen(tmp_string));
strncat(buf_string, txt_string, strlen(txt_string));
strcpy(txt_string, buf_string);
}
 
// find empty lines
empty_line = true;
for(i=0; i<strlen(txt_string); i++){
if((txt_string[i] == ' ') or (txt_string[i] == 9) or (txt_string[i] == '\n') or (txt_string[i] == '\0'))
empty_line = empty_line;
else{
empty_line = false;
break;
}
}
 
// delete tabs and commas
for(i=0; i<strlen(txt_string); i++){
if ((txt_string[i] == 9) or (txt_string[i] == ',') or (txt_string[i] == '\n'))
txt_string[i] = ' ';
}
 
// delete new line after empty labels
insert_label = false;
empty_label_line = true;
for(i=0; i<strlen(txt_string); i++){
if (txt_string[i] == ':'){ // label found
for(j=i+1; j<strlen(txt_string); j++){ // check line - empty?
if ((txt_string[j] == ' ') or (txt_string[j] == 9) or (txt_string[j] == '\n') or (txt_string[j] == '\0'))
empty_label_line = empty_label_line;
else{
empty_label_line = false;
break;
}
}
if (empty_label_line == true){
txt_string[j] = ' ';
txt_string[j+1] = '\0';
strcpy(tmp_string, txt_string);
empty_line = true;
insert_label = true;
break;
}
}
}
 
// reduce spaces
j = strlen(txt_string);
while(j>0){
for(i=0; txt_string[i] != '\0'; i++){
if ((txt_string[i] == ' ') and (txt_string[i+1] == ' ')) {
for (j=i; txt_string[j] != '\0'; j++)
txt_string[j+1] = txt_string[j+2];
}
}
j--;
}
 
// line starting with space?
if (txt_string[0] == ' '){
for(i=0; txt_string[i+1] != '\0'; i++) // cut off
txt_string[i] = txt_string[i+1];
txt_string[i] ='\0';
}
 
// magic
strcpy(tmp_string, txt_string);
for (i=0; i<255; i++) {
if ((txt_string[i] == ':') and (txt_string[i+1] != ' ')) {
txt_string[i+1] = ' ';
for (j=i+2; j<254; j++)
txt_string[j] = tmp_string[j-1];
break;
}
}
 
// find definitions
if ((txt_string[0] == '.') and (txt_string[1] == 'E') and (txt_string[2] == 'Q') and (txt_string[3] == 'U')){
empty_line = true;
for(i=5; txt_string[i] != ' '; i++)
def_alias[def_cnt][i-5] = txt_string[i];
i++;
for(j=i; txt_string[j] != ' '; j++)
definition[def_cnt][j-i] = txt_string[j];
def_cnt++;
}
 
 
// find memory reserve definitions
mem_reserve_loop:
found = false;
for(i=0; i<strlen(txt_string); i++){
if(txt_string[i] == '.') {
if ((txt_string[i+1] == 'S') and (txt_string[i+2] == 'P') and (txt_string[i+3] == 'A') and (txt_string[i+4] == 'C') and (txt_string[i+5] == 'E') and (txt_string[i+6] == ' ')){
for(j=0; j<256; j++) // clear temp string
tmp_string[j] = '\0';
for(j=i+7; txt_string[j] != ' '; j++) // cut-out name/value
tmp_string[j-(i+7)] = txt_string[j];
for(j=0; j<def_cnt; j++){ // is definition?
if (strcmp(tmp_string, def_alias[j]) == 0){
strcpy(tmp_string, definition[j]);
found = true;
break;
}
}
if(tmp_string[0] == '#'){ // delete '#'
for(k=0; k<(strlen(tmp_string)-1); k++)
tmp_string[k] = tmp_string[k+1];
tmp_string[k] = '\0';
}
fill_data_cnt = atoi(tmp_string);
break;
}
}
}
// insert nops for reservation area
if (fill_data_cnt != 0){
j = 0;
for(i=0; i<strlen(txt_string); i++){
if(txt_string[i] == ':'){
txt_string[i+2] = 'N';
txt_string[i+3] = 'O';
txt_string[i+4] = 'P';
txt_string[i+5] = '\0';
j = 1;
break;
}
}
if (j == 0){
txt_string[0] = 'N';
txt_string[1] = 'O';
txt_string[2] = 'P';
txt_string[3] = '\0';
}
fill_data_cnt--;
}
 
if (empty_line == false){
strcat(txt_string, "\n");
fputs(txt_string, output);
line++; // inc line index
}
 
if(fill_data_cnt != 0){
// clear working string
for(i=0; i<strlen(txt_string); i++)
txt_string[i] = '\0';
goto mem_reserve_loop;
}
 
}
 
fclose(output);
fclose(input);
}
 
 
// *****************************************************************************************************************
// Convert shift command
// *****************************************************************************************************************
int conv_shift(char *input_string, int line){
 
int sft = 0;
 
if (strcmp(input_string, "#SWP") == 0)
sft = 0;
else if (strcmp(input_string, "#ASR") == 0)
sft = 1;
else if (strcmp(input_string, "#ROL") == 0)
sft = 2;
else if (strcmp(input_string, "#ROR") == 0)
sft = 3;
else if (strcmp(input_string, "#LSL") == 0)
sft = 4;
else if (strcmp(input_string, "#LSR") == 0)
sft = 5;
else if (strcmp(input_string, "#RLC") == 0)
sft = 6;
else if (strcmp(input_string, "#RRC") == 0)
sft = 7;
else {
printf("ERROR: Invalid shift <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
return sft;
}
 
 
// *****************************************************************************************************************
// Convert Hex char to int
// *****************************************************************************************************************
int hexc_to_int(char input_char){
 
int ret = -1;
 
switch(input_char){
case '0': ret = 0; break;
case '1': ret = 1; break;
case '2': ret = 2; break;
case '3': ret = 3; break;
case '4': ret = 4; break;
case '5': ret = 5; break;
case '6': ret = 6; break;
case '7': ret = 7; break;
case '8': ret = 8; break;
case '9': ret = 9; break;
case 'A': ret = 10; break;
case 'B': ret = 11; break;
case 'C': ret = 12; break;
case 'D': ret = 13; break;
case 'E': ret = 14; break;
case 'F': ret = 15; break;
}
return ret;
}
 
 
// *****************************************************************************************************************
// Convert coprocessor register to int address
// *****************************************************************************************************************
int conv_cpreg(char *input_string, int line){
 
int reg = 0;
int i = 0;
 
// any coprocessor register definition?
for (i=0; i<def_cnt; i++){
if (strcmp(input_string, def_alias[i]) == 0)
strcpy(input_string, definition[i]);
}
 
if (strcmp(input_string, "C0") == 0)
reg = 0;
else if (strcmp(input_string, "C1") == 0)
reg = 1;
else if (strcmp(input_string, "C2") == 0)
reg = 2;
else if (strcmp(input_string, "C3") == 0)
reg = 3;
else if (strcmp(input_string, "C4") == 0)
reg = 4;
else if (strcmp(input_string, "C5") == 0)
reg = 5;
else if (strcmp(input_string, "C6") == 0)
reg = 6;
else if (strcmp(input_string, "C7") == 0)
reg = 7;
else {
printf("ERROR: Invalid coprocessor register name <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
return reg;
}
 
 
// *****************************************************************************************************************
// Convert register to int address
// *****************************************************************************************************************
int conv_reg(char *input_string, int line){
 
int reg = 0;
int i = 0;
if ((input_string[0] == '+') or (input_string[0] == '-')) {
for(i=0; i<31; i++)
input_string[i] = input_string[i+1];
}
 
// any register definition?
for (i=0; i<def_cnt; i++){
if (strcmp(input_string, def_alias[i]) == 0)
strcpy(input_string, definition[i]);
}
 
if (strcmp(input_string, "R0") == 0)
reg = 0;
else if (strcmp(input_string, "R1") == 0)
reg = 1;
else if (strcmp(input_string, "R2") == 0)
reg = 2;
else if (strcmp(input_string, "R3") == 0)
reg = 3;
else if (strcmp(input_string, "R4") == 0)
reg = 4;
else if (strcmp(input_string, "R5") == 0)
reg = 5;
else if (strcmp(input_string, "R6") == 0)
reg = 6;
else if (strcmp(input_string, "R7") == 0)
reg = 7;
else {
printf("ERROR: Invalid register name <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
return reg;
}
 
 
// *****************************************************************************************************************
// Convert PRE / POST indexing mode
// *****************************************************************************************************************
int conv_indexing(char *input_string, int line){
 
int mode = 0;
 
if (strcmp(input_string, "PRE") == 0)
mode = 0;
else if (strcmp(input_string, "POST") == 0)
mode = 1;
else {
printf("ERROR: Invalid register name <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
return mode;
}
 
 
// *****************************************************************************************************************
// Convert flag update option
// *****************************************************************************************************************
int conv_flag_op(char *input_string, int line){
 
int opt = 0;
 
if (strcmp(input_string, "ALU_FLAGS") == 0)
opt = 1;
else if (strcmp(input_string, "SYS_FLAGS") == 0)
opt = 2;
else if (strcmp(input_string, "USR_FLAGS") == 0)
opt = 3;
else if (strcmp(input_string, "") == 0)
opt = 0;
else {
printf("ERROR: Invalid flag option <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
return opt;
}
 
 
// *****************************************************************************************************************
// Convert restricted flag update option
// *****************************************************************************************************************
int conv_flag_op_2(char *input_string, int line){
 
int opt = 0;
 
if (strcmp(input_string, "SYS_FLAGS") == 0)
opt = 0;
else if (strcmp(input_string, "USR_FLAGS") == 0)
opt = 1;
else {
printf("ERROR: Invalid flag option <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
return opt;
}
 
 
 
// *****************************************************************************************************************
// Get branch offset
// *****************************************************************************************************************
int find_offset(char *input_label, int line){
 
int offset = 0;
bool match = false;
bool pos = false;
int i = 0;
 
if(input_label[0] == '#'){
for(i=0; i<strlen(input_label); i++)
input_label[i] = input_label[i+1];
if (input_label[1]== '-')
pos = false;
else
pos = true;
offset = atoi(input_label);
match = true;
}
 
// search definition
else{
for(i=0; i<2048; i++){
if (strcmp(input_label, c_label_tab[i]) == 0){
offset = i_label_tab[i] - line;
match = true;
break;
}
}
}
 
// label definition found?
if (match == false){
printf("ERROR: Label <%s> not found! (line %d)\n", input_label, line);
error_cnt++;
}
 
// out of reach?
if (line != -1){ // marker: full 16-bit range
if ((offset > 255) or (offset < -256)){
printf("ERROR: Label <%s> out of reach (offset: %d bytes)! (line %d)\n", input_label, offset*2, line);
error_cnt++;
}
offset = offset & 511; // make it nine bit wide
}
 
return offset;
}
 
 
// *****************************************************************************************************************
// Convert immediate
// *****************************************************************************************************************
int conv_imm(char *input, int max_val, int line){
 
int imm = 65535;
int i = 0;
char temp[32];
char input_string[32];
bool extended = false;
 
strcpy(input_string, input);
 
if ((input_string[0] == '+') or (input_string[0] == '-')) {
for(i=0; i<31; i++)
input_string[i] = input_string[i+1];
}
 
// any normal immediate definition?
for (i=0; i<def_cnt; i++){
if (strcmp(input_string, def_alias[i]) == 0){
strcpy(temp, definition[i]);
for (i=0; i<strlen(temp); i++)
temp[i] = temp[i+1];
imm = atoi(temp);
goto skip_analysis;
}
}
 
if (input_string[0] == '#') {
for(i=0; i<31; i++)
input_string[i] = input_string[i+1];
}
 
// binary format?
if ((input_string[0] == '0') and (input_string[1] == 'B')){
for(i=0; i<31; i++)
input_string[i] = input_string[i+2];
imm = 0;
for(i=0; i<strlen(input_string); i++){
if(input_string[i] == '1')
imm = imm + (int)pow(2, (strlen(input_string)-1-i));
else if (input_string[i] == '0')
imm = imm;
else{
imm = -1; // invalid
break;
}
}
goto skip_analysis;
}
 
// hex format?
if ((input_string[0] == '0') and (input_string[1] == 'X')){
for(i=0; i<31; i++)
input_string[i] = input_string[i+2];
imm = 16*hexc_to_int(input_string[0]) + hexc_to_int(input_string[1]);
goto skip_analysis;
}
 
// extended immediate? (upper 16 bit of 32-bit label)
if (input_string[0] == 'X') {
extended = true;
for(i=0; i<31; i++)
input_string[i] = input_string[i+1];
}
 
// character?
if ((input_string[0] == 39)){ // -> '
temp[0] = input_string[1];
temp[1] = '\0';
imm = (int)temp[0];
goto skip_analysis;
}
 
// any label reference definition?
if ((input_string[0] == '[')){
for(i=1; i<strlen(input_string); i++){
if (input_string[i] != ']')
temp[i-1] = input_string[i];
else{
temp[i-1] = '\0';
break;
}
}
imm = ((find_offset(temp, -1)-2)*2);
goto skip_analysis;
}
 
// any low immediate definition?
if ((input_string[0] == 'L') and (input_string[1] == 'O') and (input_string[2] == 'W') and (input_string[3] == '[')){
for(i=4; i<strlen(input_string); i++){
if (input_string[i] != ']')
temp[i-4] = input_string[i];
else{
temp[i-4] = '\0';
break;
}
}
// valid definition?
for (i=0; i<def_cnt; i++){
if (strcmp(temp, def_alias[i]) == 0){
strcpy(temp, definition[i]);
for (i=0; i<strlen(temp); i++)
temp[i] = temp[i+1];
if (extended == true)
imm = (atoi(temp) >> 16) & 255; // low immediate of 32-bit immediate
else
imm = atoi(temp) & 255; // low immediate
goto skip_analysis; // valid definition found
}
}
}
 
// any high immediate definition?
if ((input_string[0] == 'H') and (input_string[1] == 'I') and (input_string[2] == 'G') and (input_string[3] == 'H') and (input_string[4] == '[')){
for(i=5; i<strlen(input_string); i++){
if (input_string[i] != ']')
temp[i-5] = input_string[i];
else{
temp[i-5] = '\0';
break;
}
}
// valid definition?
for (i=0; i<def_cnt; i++){
if (strcmp(temp, def_alias[i]) == 0){
strcpy(temp, definition[i]);
for (i=0; i<strlen(temp); i++)
temp[i] = temp[i+1];
if (extended == true)
imm = (atoi(temp) >> 24) & 255; // high immediate of 32-bit immediate
else
imm = (atoi(temp) >> 8) & 255; // high immediate
goto skip_analysis; // valid definition found
}
}
}
 
imm = atoi(input_string); // normal immediate
// immediate label-address?
if ((input_string[0] == 'L') and (input_string[1] == 'O') and (input_string[2] == 'W') and (input_string[3] == '[')){
for(i=4; i<31; i++){
if (input_string[i] != ']')
temp[i-4] = input_string[i];
else{
temp[i-4] = '\0';
break;
}
}
if (temp[0] == '#'){ // immediate
for(i=0; i<31; i++)
temp[i] = temp[i+1];
if (extended == true)
imm = (atoi(temp) >> 16) & 255; // low immediate of 32-bit immediate
else
imm = atoi(temp) & 255; // low immediate
}
else {
if (extended == true)
imm = (((find_offset(temp, -1)-2)*2) >> 16) & 255; // low immediate of 32-bit immediate
else
imm = ((find_offset(temp, -1)-2)*2) & 255; // low immediate
}
}
if ((input_string[0] == 'H') and (input_string[1] == 'I') and (input_string[2] == 'G') and (input_string[3] == 'H') and (input_string[4] == '[')){
for(i=5; i<31; i++){
if (input_string[i] != ']')
temp[i-5] = input_string[i];
else{
temp[i-5] = '\0';
break;
}
}
if (temp[0] == '#'){ // immediate
for(i=0; i<31; i++)
temp[i] = temp[i+1];
if (extended == true)
imm = (atoi(temp) >> 24) & 255; // high immediate of 32-bit immediate
else
imm = (atoi(temp) >> 8) & 255; // high immediate
}
else{
if (extended == true)
imm = (((find_offset(temp, -1)-2)*2) >> 24) & 255; // high immediate of 32-bit immediate
else
imm = (((find_offset(temp, -1)-2)*2) >> 8) & 255; // high immediate
}
}
 
skip_analysis:
 
// message
//if (extended == true){
// printf("WARNING: Loading extended 32-bit immediate. (line %d)\n", line);
// warning_cnt++;
//}
 
// out of range?
if ((imm > max_val) or (imm < 0)){
printf("ERROR: Invalid immediate <%s>! (line %d)\n", input_string, line);
error_cnt++;
}
 
return imm;
}
 
 
// *****************************************************************************************************************
// Get labels and locations
// *****************************************************************************************************************
void get_labels(const char *input_file){
 
FILE *data_in;
char line_input[512];
int index = 0;
int j = 0;
int line = 0;
int label_cnt = 0;
char *cut_out;
char line_string[256];
 
// open input/output file
data_in = fopen(input_file, "r");
if(data_in == NULL){
printf("GET_LABEL: Input file error_cnt!\n");
exit(1);
}
 
// get line
line = 1;
while(fgets(line_input, 512, data_in) != NULL){
 
// clear working string
for(j=0; j<strlen(line_string); j++)
line_string[j] = '\0';
 
// get line entry
cut_out = strtok(line_input, "\n");
if (cut_out != NULL)
sprintf(line_string, "%s", cut_out);
 
// label present?
for (index=0; index<512; index++){
if (line_string[index] == ':'){
strncpy(c_label_tab[label_cnt], line_string, index);
index++;
c_label_tab[label_cnt][index] = '\0';
i_label_tab[label_cnt] = line;
label_cnt++;
index++;
for(j=0; line_string[j+index] != '\0'; j++) // cut off
line_string[j] = line_string[j+index];
line_string[j] ='\0';
break;
}
}
 
line++;
}
 
fclose(data_in);
 
}
 
 
 
// *****************************************************************************************************************
// Assemble pre-processor file
// *****************************************************************************************************************
int assemble(const char *input_file, const char *output_file, const char *bin_output_file){
 
FILE *data_in, *data_out, *bin_data_out;
char line_input[512];
int index = 0;
int i = 0, j = 0;
int line = 0;
char *cut_out;
char line_string[256];
char tmp_string[32];
char arg[10][64];
int opcode;
int temp;
 
// open input/output file
data_in = fopen(input_file, "r");
if(data_in == NULL){
printf("ASSEMBLE: Input file error_cnt!\n");
exit(1);
}
data_out = fopen(output_file, "w");
if(data_out == NULL){
printf("ASSEMBLE: Output file error_cnt!\n");
exit(1);
}
bin_data_out = fopen(bin_output_file, "wb");
if(data_out == NULL){
printf("ASSEMBLE: Binary output file error_cnt!\n");
exit(1);
}
 
// get line
line = 1;
while(fgets(line_input, 512, data_in) != NULL){
 
// clear working string
for(i=0; i<strlen(line_string); i++)
line_string[i] = '\0';
 
// clear argument list
for(j=0; j<10; j++){
for (i=0; i<64; i++)
arg[j][i] = '\0';
}
 
// get line entry
cut_out = strtok(line_input, "\n");
if (cut_out != NULL)
sprintf(line_string, "%s", cut_out);
 
// end of block?
if(line % 65535 == 0){
printf("WARNING: End of memory block! <%s> (line %d)\n", line_string, line);
warning_cnt++;
}
 
// label present?
for (index=0; line_string[index] != '\0'; index++){
if (line_string[index] == ':'){
index+=2;
for(j=0; line_string[j+index] != '\0'; j++) // cut off
line_string[j] = line_string[j+index];
line_string[j] ='\0';
break;
}
}
 
// get command and operands (9x)
for (i=0; i<10; i++){
for (index=0; index<512; index++){
if (line_string[index] == ' '){
strncpy(arg[i], line_string, index);
index++;
arg[i][index] = '\0';
for(j=0; line_string[j+index] != '\0'; j++) // cut off
line_string[j] = line_string[j+index];
line_string[j] ='\0';
break;
}
}
}
 
// translate line by line
opcode = 0;
// ALU Operations (without flag update)
// ---------------------------------------------------------------------------------------------------------
if (strcmp(arg[0], "INC") == 0)
opcode = (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line);
else if (strcmp(arg[0], "DEC") == 0)
opcode = (1<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line);
else if (strcmp(arg[0], "ADD") == 0)
opcode = (2<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "ADC") == 0)
opcode = (3<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "SUB") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant SUB will result in NEG instruction! (line %d)\n", line); warning_cnt++;}
opcode = (4<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
}
else if (strcmp(arg[0], "NEG") == 0)
opcode = (4<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "SBC") == 0)
opcode = (5<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if ((strcmp(arg[0], "CMP") == 0) or (strcmp(arg[0], "CMPS") == 0))
opcode = (6<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if ((strcmp(arg[0], "CPX") == 0) or (strcmp(arg[0], "CPXS") == 0))
opcode = (7<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "AND") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant AND will result in STUB instruction! (line %d)\n", line); warning_cnt++;}
opcode = (8<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
}
else if (strcmp(arg[0], "STUB") == 0) // store register to user bank register
opcode = (8<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "ORR") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant ORR will result in LDUB instruction! (line %d)\n", line); warning_cnt++;}
opcode = (9<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
}
else if (strcmp(arg[0], "LDUB") == 0) // load register from user bank register
opcode = (9<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "EOR") == 0)
opcode = (10<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "NAND") == 0)
opcode = (11<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "BIC") == 0)
opcode = (12<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if ((strcmp(arg[0], "TEQ") == 0) or (strcmp(arg[0], "TEQS") == 0))
opcode = (13<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if ((strcmp(arg[0], "TST") == 0) or (strcmp(arg[0], "TSTS") == 0))
opcode = (14<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "SFT") == 0)
opcode = (15<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_shift(arg[3], line);
// ALU Operations (with flag update)
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "INCS") == 0)
opcode = (0<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line);
else if (strcmp(arg[0], "DECS") == 0)
opcode = (1<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line);
else if (strcmp(arg[0], "ADDS") == 0)
opcode = (2<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "ADCS") == 0)
opcode = (3<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "SUBS") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant SUBS will result in NEG instruction! (line %d)\n", line); warning_cnt++;}
opcode = (4<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
}
else if (strcmp(arg[0], "NEGS") == 0)
opcode = (4<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "SBCS") == 0)
opcode = (5<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "LDSR") == 0) // load register from msr
opcode = (6<<10) | (conv_reg(arg[1], line)<<7) | (conv_flag_op(arg[2], line)<<5);
else if (strcmp(arg[0], "STSR") == 0) // store register to msr
opcode = (7<<10) | (conv_flag_op(arg[2], line)<<5) | (conv_reg(arg[1], line)<<0);
else if (strcmp(arg[0], "STAF") == 0){ // store immediate to MSR's user/system ALU flags
temp = conv_imm(arg[1], 63, line);
opcode = (7<<10) | ((temp>>3)<<7) | (1<<6) | (conv_flag_op_2(arg[2], line)<<5) | (1<<4) | (temp & 7);
}
else if (strcmp(arg[0], "ANDS") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant ANDS will result in STUBS instruction! (line %d)\n", line); warning_cnt++;}
opcode = (8<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
}
else if (strcmp(arg[0], "STUBS") == 0) // store register to user bank register and set flags
opcode = (8<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "ORRS") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant ORRS will result in LDUBS instruction! (line %d)\n", line); warning_cnt++;}
opcode = (9<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
}
else if (strcmp(arg[0], "LDUBS") == 0) // load register from user bank register and set flags
opcode = (9<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "EORS") == 0)
opcode = (10<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "NANDS") == 0)
opcode = (11<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if (strcmp(arg[0], "BICS") == 0)
opcode = (12<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if ((strcmp(arg[0], "STPC") == 0) or (strcmp(arg[0], "GT") == 0) or (strcmp(arg[0], "RET") == 0)) // goto [register]
opcode = (13<<10) | (conv_reg(arg[1], line)<<4);
else if ((strcmp(arg[0], "STPCL") == 0) or (strcmp(arg[0], "GTL") == 0) or (strcmp(arg[0], "RETL") == 0)) // goto [register] and link
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2);
else if ((strcmp(arg[0], "STPCU") == 0) or (strcmp(arg[0], "GTU") == 0) or (strcmp(arg[0], "RETU") == 0)) // goto [register] and switch to user mode
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<0);
else if ((strcmp(arg[0], "STPCI") == 0) or (strcmp(arg[0], "GTI") == 0) or (strcmp(arg[0], "RETI") == 0)) // goto [register] and set global xint flag
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<1);
else if ((strcmp(arg[0], "STPCUI") == 0) or (strcmp(arg[0], "GTUI") == 0) or (strcmp(arg[0], "RETUI") == 0)) // goto [register] and set global xint flag and switch to user mode
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<1) | (1<<0);
else if ((strcmp(arg[0], "STPCUL") == 0) or (strcmp(arg[0], "GTUL") == 0) or (strcmp(arg[0], "RETUL") == 0)) // goto [register] and switch to user mode and link
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<0);
else if ((strcmp(arg[0], "STPCIL") == 0) or (strcmp(arg[0], "GTIL") == 0) or (strcmp(arg[0], "RETIL") == 0)) // goto [register] and set global xint flag and link
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<1);
else if ((strcmp(arg[0], "STPCUIL") == 0) or (strcmp(arg[0], "GTUIL") == 0) or (strcmp(arg[0], "RETUIL") == 0)) // goto [register] and set global xint flag and switch to user mode and link
opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<1) | (1<<0);
else if ((strcmp(arg[0], "STPCX") == 0) or (strcmp(arg[0], "GTX") == 0) or (strcmp(arg[0], "RETX") == 0)) // goto [register] and switch to previous mode
opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<0);
else if ((strcmp(arg[0], "STPCXI") == 0) or (strcmp(arg[0], "GTXI") == 0) or (strcmp(arg[0], "RETXI") == 0)) // goto [register] and set global xint flag and switch to previous mode
opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<1) | (1<<0);
else if ((strcmp(arg[0], "STPCXL") == 0) or (strcmp(arg[0], "GTXL") == 0) or (strcmp(arg[0], "RETXL") == 0)) // goto [register] and switch to previous mode and link
opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<0);
else if ((strcmp(arg[0], "STPCXIL") == 0) or (strcmp(arg[0], "GTXIL") == 0) or (strcmp(arg[0], "RETXIL") == 0)) // goto [register] and set global xint flag and switch to previous mode and link
opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<1) | (1<<0);
else if (strcmp(arg[0], "LDPC") == 0) // load program counter to register
opcode = (14<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4);
else if (strcmp(arg[0], "SFTS") == 0)
opcode = (15<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_shift(arg[3], line);
// Branch
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "B") == 0) // branch always
opcode = (1<<15) | (15<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BEQ") == 0) // branch if equal
opcode = (1<<15) | (0<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BNE") == 0) // branch if not equal
opcode = (1<<15) | (1<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BCS") == 0) // branch if unsigned higher or same
opcode = (1<<15) | (2<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BCC") == 0) // branch if unsigned lower
opcode = (1<<15) | (3<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BMI") == 0) // branch if negative
opcode = (1<<15) | (4<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BPL") == 0) // branch if positive or zero
opcode = (1<<15) | (5<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BOS") == 0) // branch if overflow
opcode = (1<<15) | (6<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BOC") == 0) // branch if no overflow
opcode = (1<<15) | (7<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BHI") == 0) // branch if unsigned higher
opcode = (1<<15) | (8<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLS") == 0) // branch if unsigned lower or same
opcode = (1<<15) | (9<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BGE") == 0) // branch if greater than or equal
opcode = (1<<15) | (10<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLT") == 0) // branch if less than
opcode = (1<<15) | (11<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BGT") == 0) // branch if greater than
opcode = (1<<15) | (12<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLE") == 0) // branch if less than or equal
opcode = (1<<15) | (13<<10) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BTS") == 0) // branch if transfer flag set
opcode = (1<<15) | (14<<10) | find_offset(arg[1], line);
// Branch and link
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "BL") == 0) // branch and link always
opcode = (1<<15) | (15<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLEQ") == 0) // branch and link if equal
opcode = (1<<15) | (0<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLNE") == 0) // branch and link if not equal
opcode = (1<<15) | (1<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLCS") == 0) // branch and link if unsigned higher or same
opcode = (1<<15) | (2<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLCC") == 0) // branch and link if unsigned lower
opcode = (1<<15) | (3<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLMI") == 0) // branch and link if negative
opcode = (1<<15) | (4<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLPL") == 0) // branch and link if positive or zero
opcode = (1<<15) | (5<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLOS") == 0) // branch and link if overflow
opcode = (1<<15) | (6<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLOC") == 0) // branch and link if no overflow
opcode = (1<<15) | (7<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLHI") == 0) // branch and link if unsigned higher
opcode = (1<<15) | (8<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLLS") == 0) // branch and link if unsigned lower or same
opcode = (1<<15) | (9<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLGE") == 0) // branch and link if greater than or equal
opcode = (1<<15) | (10<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLLT") == 0) // branch and link if less than
opcode = (1<<15) | (11<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLGT") == 0) // branch and link if greater than
opcode = (1<<15) | (12<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLLE") == 0) // branch and link if less than or equal
opcode = (1<<15) | (13<<10) | (1<<9) | find_offset(arg[1], line);
else if (strcmp(arg[0], "BLTS") == 0) // branch and link if transfer flag set
opcode = (1<<15) | (14<<10) | (1<<9) | find_offset(arg[1], line);
// Load immediate
// ---------------------------------------------------------------------------------------------------------
else if ((strcmp(arg[0], "LDIL") == 0) or (strcmp(arg[0], "LDIH") == 0)){
temp = conv_imm(arg[2], 255, line);
if (strcmp(arg[0], "LDIL") == 0) // load whole register with sign extended immediate
opcode = (3<<14) | (0<<11) | ((temp & 128)<<3) | (conv_reg(arg[1], line)<<7) | (temp & 127);
else if (strcmp(arg[0], "LDIH") == 0) // only load high byte of register with immediate
opcode = (3<<14) | (1<<11) | ((temp & 128)<<3) | (conv_reg(arg[1], line)<<7) | (temp & 127);
}
// Bit operations
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "SBR") == 0) // set select-bit
opcode = (13<<12) | (0<<11) | (1<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 15, line);
else if (strcmp(arg[0], "CBR") == 0) // clear select-bit
opcode = (13<<12) | (0<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 15, line);
else if (strcmp(arg[0], "STB") == 0) // store select-bit to t-flag
opcode = (13<<12) | (1<<11) | (1<<10) | (0<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line);
else if (strcmp(arg[0], "STBI") == 0) // store inverted select-bit to t-flag
opcode = (13<<12) | (1<<11) | (1<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line);
else if (strcmp(arg[0], "SPR") == 0) // store parity-bit to t-flag
opcode = (13<<12) | (1<<11) | (1<<10) | (1<<8) | (0<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line);
else if (strcmp(arg[0], "SPRI") == 0) // store inverted parity-bit to t-flag
opcode = (13<<12) | (1<<11) | (1<<10) | (1<<8) | (1<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line);
else if (strcmp(arg[0], "LDB") == 0) // laod select-bit form t-flag
opcode = (13<<12) | (1<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 15, line);
// System call
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "SYSCALL") == 0){ // trigger software interrupt trap
if (strcmp(arg[1], "") == 0)
temp = 0;
else
temp = conv_imm(arg[1], 1023, line);
opcode = (63<<10) | temp; // 10-bit system call tag
}
// Memory Access
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "LDR") == 0){ // load register
opcode = (1<<14) | (0<<10) | (conv_reg(arg[1], line)<<7); // mem_access, load, data register
opcode = opcode | (conv_reg(arg[2], line)<<4); // base register
opcode = opcode | (conv_indexing(arg[4], line)<<13); // indexing mode
if (arg[3][0] == '+') // add indexing
opcode = opcode | (1<<12);
if (arg[3][1] == '#') // immediate offset
opcode = opcode | (1<<3) | conv_imm(arg[3], 7, line);
else // register offset
opcode = opcode | conv_reg(arg[3], line);
if (arg[5][0] == '!') // write back base register
opcode = opcode | (1<<11);
else{
if ((conv_indexing(arg[4], line)==1) and (arg[5][0] != '!')){
printf("WARNING: Redundant LDR indexing instruction. (line %d)\n", line);
warning_cnt++;
}
}
}
else if (strcmp(arg[0], "STR") == 0){ // store register
opcode = (1<<14) | (1<<10) | (conv_reg(arg[1], line)<<7); // mem_access, store, data register
opcode = opcode | (conv_reg(arg[2], line)<<4); // base register
opcode = opcode | (conv_indexing(arg[4], line)<<13); // indexing mode
if (arg[3][0] == '+') // add indexing
opcode = opcode | (1<<12);
if (arg[3][1] == '#') // immediate offset
opcode = opcode | (1<<3) | conv_imm(arg[3], 7, line);
else // register offset
opcode = opcode | conv_reg(arg[3], line);
if (arg[5][0] == '!') // write back base register
opcode = opcode | (1<<11);
else{
if ((conv_indexing(arg[4], line)==1) and (arg[5][0] != '!')){
printf("WARNING: Redundant STR indexing instruction. (line %d)\n", line);
warning_cnt++;
}
}
}
else if (strcmp(arg[0], "SWP") == 0){ // data swap: Rd -> MEM[Rb] -> Rd
opcode = (1<<14) | (conv_reg(arg[1], line)<<7); // mem_access, load_data register
opcode = opcode | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); // base register, store_data register
opcode = opcode | (1<<13) | (0<<11); // indexing mode = post and NO write back = redundant to mark swap operation
}
 
// Coprocessor Access
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "CDP") == 0){ // coprocessor data processing
opcode = (14<<12) | (conv_imm(arg[1], 1, line)<<10) | (conv_cpreg(arg[2], line)<<7);
opcode = opcode | (conv_cpreg(arg[3], line)<<4) | conv_imm(arg[4], 7, line);
}
else if (strcmp(arg[0], "MRC") == 0){ // move data from coprocessor
opcode = (14<<12) | (1<<11) | (conv_imm(arg[1], 1, line)<<10) | (conv_reg(arg[2], line)<<7);
opcode = opcode | (conv_cpreg(arg[3], line)<<4) | (0<<3) | conv_imm(arg[4], 7, line);
}
else if (strcmp(arg[0], "MCR") == 0){ // move data to coprocessor
opcode = (14<<12) | (1<<11) | (conv_imm(arg[1], 1, line)<<10) | (conv_cpreg(arg[2], line)<<7);
opcode = opcode | (conv_reg(arg[3], line)<<4) | (1<<3) | conv_imm(arg[4], 7, line);
}
 
// Pseudo-Instructions
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "NOP") == 0) // dummy operation (no actual system state change)
opcode = 0; // actually this is an increment with a zero immediate and no flag update
else if (strcmp(arg[0], "MOV") == 0) // increment with #0 = move register
opcode = (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | 0;
else if (strcmp(arg[0], "MOVS") == 0) // increment with #0 = move register and flag update
opcode = (0<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | 0;
else if (strcmp(arg[0], "CLR") == 0) // set register to 0
opcode = (10<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line);
else if (strcmp(arg[0], "CLRS") == 0) // set register to 0 and set flags
opcode = (10<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line);
else if (strcmp(arg[0], "COM") == 0) // 1's complement
opcode = (11<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line);
else if (strcmp(arg[0], "COMS") == 0) // 1's complement and set flags
opcode = (11<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line);
 
// Build-in Assembler Macros
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], "PUSH+") == 0) // push on positive growing stack
opcode = (1<<14) | (1<<13) | (1<<12) | (1<<11) | (1<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0);
else if (strcmp(arg[0], "POP+") == 0) // pop from positive growing stack
opcode = (1<<14) | (0<<13) | (0<<12) | (1<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0);
else if (strcmp(arg[0], "PUSHPOP") == 0) // pushpop from/on stack
opcode = (1<<14) | (0<<13) | (1<<12) | (0<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (0<<0);
else if (strcmp(arg[0], "PUSH-") == 0) // push on negative growing stack
opcode = (1<<14) | (1<<13) | (0<<12) | (1<<11) | (1<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0);
else if (strcmp(arg[0], "POP-") == 0) // pop from negative growing stack
opcode = (1<<14) | (0<<13) | (1<<12) | (1<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0);
 
// Direct memory initialization - WORD
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], ".DW") == 0) // memory init
opcode = conv_imm(arg[1], (int)(pow(2,16)-1), line);
 
// Unknown Command
// ---------------------------------------------------------------------------------------------------------
else {
printf("ERROR: Unknown command <%s>! (line %d)\n", arg[0], line);
error_cnt++;
}
 
 
opcode = opcode & (int(pow(2, 16))-1); // only 16-bit, thanks
 
if (error_cnt == 0) {
// init file output
sprintf(tmp_string, "%06d => x\"%04x\", -- %s\n", line-1, opcode, arg[0]);
fputs(tmp_string, data_out);
// binary data file output
fputc(char((opcode>>8)&255), bin_data_out);
fputc(char(opcode&255), bin_data_out);
}
 
line++;
}
 
if (error_cnt == 0)
fputs("others => x\"0000\" -- NOP", data_out);
 
fclose(bin_data_out);
fclose(data_out);
fclose(data_in);
return line;
}
 
 
// *****************************************************************************************************************
// Main function
// *****************************************************************************************************************
int main(int argc, char *argv[]){
 
int p_size = 0;
 
printf("\nAtlas Project - Evaluation Assembler, Version 2013.05.31\n");
printf("by Stephan Nolting (stnolting@gmail.com), Hanover, Germany\n\n");
 
// pre_processor.asm - intermediate processing file
// init.vhd - vhdl memory initialization data block
// out.bin - binary program output for bootloader downloading
 
includer(argv[1], "included.xasm"); // include other files - copy them to work file
convert_strings("included.xasm", "job.xasm"); // convert strings into direct memory inits
pre_processor("job.xasm", "pre_processor.asm"); // erase comments & empty lines & get definitions
get_labels("pre_processor.asm"); // find and list labels
p_size = assemble("pre_processor.asm", "init.vhd", "out.bin"); // do the magic conversion
 
if (error_cnt == 0){
printf("\nAssembler completed without errors (%d warnings).\n", warning_cnt);
printf("Final program size: %d bytes\n", (p_size-1)*2);
if (warning_cnt != 0)
printf("Line numbers refer to the intermediate \"pre_processor.asm\" processing file.\n");
}
else{
printf("\nAssembler terminated with %d errors (%d warnings)!\n", error_cnt, warning_cnt);
printf("Line numbers refer to the intermediate \"pre_processor.asm\" processing file.\n");
}
 
return 0;
}
/trunk/asm/atlas_asm_64bit.exe Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/trunk/asm/atlas_asm_64bit.exe
trunk/asm/atlas_asm_64bit.exe Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/asm/examples/basic/string_comp.asm =================================================================== --- trunk/asm/examples/basic/string_comp.asm (nonexistent) +++ trunk/asm/examples/basic/string_comp.asm (revision 18) @@ -0,0 +1,61 @@ +; ************************************************************************************************* +; Compare two character strings +; 27th of May, 2013 +; by Stephan Nolting +; ************************************************************************************************* + +; Register defintions +; ------------------------------------------------------------------------------------------------- +.equ cnt r0 +.equ s1 r1 +.equ s2 r2 +.equ temp1 r3 +.equ temp2 r4 +.equ equal r5 + +; Constants defintions +; ------------------------------------------------------------------------------------------------- +.equ upper_border #123 +.equ lower_border #96 +.equ byte_mask #255 +.equ distance #32 +.equ string_length #23 + + +; Exception vector table +; ------------------------------------------------------------------------------------------------- +reset_vec: b main +x_int0_vec: b x_int0_vec ; not used +x_int1_vec: b x_int1_vec ; not used +cmd_err_vec: b cmd_err_vec ; not used +swi_vec: b swi_vec ; not used + + +; Main program +; ------------------------------------------------------------------------------------------------- +main: ldil s1, #low[string_1] + ldih s1, #high[string_1] + ldil s2, #low[string_2] + ldih s2, #high[string_2] + ldil cnt, string_length + + clr equal ; not equal + cdp #1, c0, c0, #2 ; direct memory access - bypass cache + +compare_loop: + ldr temp1, s1, +#2, post, ! + ldr temp2, s2, +#2, post, ! + cmp temp1, temp2 + bne not_equal + decs cnt, cnt, #1 + bne compare_loop + + ldil equal, #255 ; equal! + +not_equal: b not_equal + + +; Memory data area +; ------------------------------------------------------------------------------------------------- +string_1: .stringz "To boldly go, where no man has gone before..." +string_2: .stringz "To boldly go, where no man has gone before..." Index: trunk/asm/examples/basic/higher_case_conv.asm =================================================================== --- trunk/asm/examples/basic/higher_case_conv.asm (nonexistent) +++ trunk/asm/examples/basic/higher_case_conv.asm (revision 18) @@ -0,0 +1,105 @@ +; ************************************************************************************************* +; Convert a character string to higher-case letters +; 27th of May, 2013 +; by Stephan Nolting +; ************************************************************************************************* + +; Register defintions +; ------------------------------------------------------------------------------------------------- +.equ cnt r0 +.equ d_in r1 +.equ d_out r2 +.equ data r3 +.equ temp r4 +.equ copy r5 +.equ sp r6 + +; Constants defintions +; ------------------------------------------------------------------------------------------------- +.equ upper_border #123 +.equ lower_border #96 +.equ byte_mask #255 +.equ distance #32 +.equ string_length #23 + + +; Exception vector table +; ------------------------------------------------------------------------------------------------- +reset_vec: b main +x_int0_vec: b x_int0_vec ; not used +x_int1_vec: b x_int1_vec ; not used +cmd_err_vec: b cmd_err_vec ; not used +swi_vec: b swi_vec ; not used + + +; Main program +; ------------------------------------------------------------------------------------------------- +main: ldil d_in, #low[string_input] + ldih d_in, #high[string_input] + ldil d_out, #low[string_output] + ldih d_out, #high[string_output] + ldil sp, #low[stack_begin] + ldih sp, #high[stack_begin] + + ldil cnt, string_length + + cdp #1, c0, c0, #2 + +conversion_loop: + ldr data, d_in, +#2, post, ! + + ; low byte + ldil temp, #low[byte_mask] + ldih temp, #high[byte_mask] + sft temp, temp, #swp + bic copy, data, temp + + ldil temp, upper_border + cmp copy, temp + bge skip_low_byte + ldil temp, lower_border + cmp copy, temp + ble skip_low_byte + + ldil temp, distance + sub copy, copy, temp + +skip_low_byte: + str copy, sp, +#2, post, ! ; push + + ; high byte + ldil temp, #low[byte_mask] + ldih temp, #high[byte_mask] + bic copy, data, temp + sft copy, copy, #swp + + ldil temp, upper_border + cmp copy, temp + bge skip_high_byte + ldil temp, lower_border + cmp copy, temp + ble skip_high_byte + + ldil temp, distance + sub copy, copy, temp + +skip_high_byte: + sft copy, copy, #swp + ldr data, sp, -#2, pre, ! ; pop + orr data, data, copy + + str data, d_out, +#2, post, ! + + decs cnt, cnt, #1 + bne conversion_loop + +end: b end + + +; Memory data area +; ------------------------------------------------------------------------------------------------- +string_input: .stringz "To boldly go, where no man has gone before..." +string_output: .space #23 + +.space #32 +stack_begin: .dw #0 Index: trunk/asm/examples/basic/count_ld_zeros.asm =================================================================== --- trunk/asm/examples/basic/count_ld_zeros.asm (nonexistent) +++ trunk/asm/examples/basic/count_ld_zeros.asm (revision 18) @@ -0,0 +1,41 @@ +; ************************************************************************************************* +; Count leading zeros of a register +; 27th of May, 2013 +; by Stephan Nolting +; ************************************************************************************************* + +; Register defintions +; ------------------------------------------------------------------------------------------------- + + +; Constants defintions +; ------------------------------------------------------------------------------------------------- + + +; Exception vector table +; ------------------------------------------------------------------------------------------------- +reset_vec: b main +x_int0_vec: b x_int0_vec ; not used +x_int1_vec: b x_int1_vec ; not used +cmd_err_vec: b cmd_err_vec ; not used +swi_vec: b swi_vec ; not used + + +; Main program +; ------------------------------------------------------------------------------------------------- +main: ldil r0, #0b11000110 ; load low value using binary format + ldih r0, #0b00000101 ; load high value using binary format + + ldil r1, #16 ; if register is zero -> 16 leading zeros + + teq r0, r0 + beq end ; skip counting when register is not zero + + + clr r1 ; reset counter +loop: sfts r0, r0, #lsl ; shift msb of r0 into carry flag + bcs end ; terminate when shifted bit is one + inc r1, r1, #1 ; increment counter + b loop + +end: b end \ No newline at end of file Index: trunk/asm/examples/basic/test.asm =================================================================== --- trunk/asm/examples/basic/test.asm (nonexistent) +++ trunk/asm/examples/basic/test.asm (revision 18) @@ -0,0 +1,141 @@ +; ------------------------------------------------------------------------------------------------- +; ATLAS ASSEMBLER test/example program file, May 2013 +; ------------------------------------------------------------------------------------------------- + +; -> for all further lexical explanations see the rules given between the '>' and '<' symbol +; -> this is a comment, initiated with >;< +; -> all constant numbers must have an '#'-prefix +; -> assembler is not case-sensitive! + + +; User defintions +; ------------------------------------------------------------------------------------------------- +; user-defined definitions for registers (r0, .., r1), cp_registers (c0, .., c7), constants ('#...') +; definitions: >.equ<> <>alias_name<> <>real_name/constant< +; do not use a definition name also as label name! +; .equ definitions must be at the beginning of a program (before actual code) +.equ cnt r0 ; counter register +.equ data r3 ; data transfer register +.equ LR r7 ; r7 is always the link register +.equ dec_val #1 ; constant/immediate alias used for decrement +.equ msr_xint0_en #13 ; this is the MSR's external interrupt 0 enable flag +.equ msr_xint1_en #14 ; this is the MSR's external interrupt 1 enable flag +.equ data_area_size #4 ; space area alias +.equ bytes #4 ; number of bytes to transfer within the demo program +.equ some_data #1289 ; just some data for memory init + + +; Exception vector table +; ------------------------------------------------------------------------------------------------- +; This table MUST be the first logical instructions within +; a program ( block 0) due to fixed exception vectors! + +; labels: >lable_name: letters, numbers and '_' symbols<>:< +; only one label can point to one specific location (so no redundant labels!!!) +reset_vec: b init ; destination after reset, always starting in system mode +x_int0_vec: b x_int_handler ; external interrupt 0 interrupt handler +x_int1_vec: b x_int_handler ; external interrupt 1 interrupt handler +cmd_err_vec: b cmd_err_vec ; undefined instruction / illegal msr/reg/cp access +swi_vec: b swi_handler ; software interrupt exception handler + + +; Exception handlers (system mode) +; ------------------------------------------------------------------------------------------------- +swi_handler: ; SOFTWARE INTERRUPT HANDLER +; instructions +; >cmd mnemonic<> <>OP1<>,<> <>OP2<>,<> < ... + dec LR, LR, #2 ; restore WORD (!!!) address of calling instruction + ldr r0, LR, +#0, pre ; load the instruction, which caused the exception + clr r1 ; load tag mask + ldih r1, #252 + bic r0, r0, r1 ; isolate syscall tag in r0 + + ldil r4, #low[test_mem_data_table] + ldih r4, #high[test_mem_data_table] + ldr r4, r4, +#0, pre + +nirvana: b nirvana ; this is the end, my friend... + + +x_int_handler: ; EXTERNAL INTERRUPT HANDLER + ; do nothing in this exception handlers but return + dec LR, LR, #2 ; restore WORD (!!!) address of interrupted instruction + b skip_dummy_mem_area ; skip dummy mem area + +; reserve memory (fill with zeros) +; reserve: >.space<> <>#<>integer value = number of zero words / defintion< +dummy_mem_area: + .space #4 ; insert 4 * x"0000" = "NOP" + +skip_dummy_mem_area: + reti LR ; return from interrupt handler routine, re-enable global xint_en and resume operation in user_mode at [r7] + + +; Main program +; ------------------------------------------------------------------------------------------------- +init: ldil r0, #xlow[main_usr] ; get extended (upper 16-bit of 32-bit) low address byte of label "main_usr" - just a demo, it is 0 here + ldih r0, #xhigh[main_usr] ; get extended (upper 16-bit of 32-bit) high address byte of label "main_usr" - just a demo, it is 0 here + ldil r0, #low[main_usr] ; get low address byte of label "main_usr" + ldih r0, #high[main_usr] ; get high address byte of label "main_usr" + + ldsr r1 ; copy machine status register to r1 + sbr r1, r1, msr_xint0_en ; enable external interrupt 0 mask, no '#'-prefix when using a constant definition! + stsr r1 ; store r1 to machine status register + + gtui r0 ; enable external interrupts and resume operation in user mode at [r0] + +.space #4 ; just some space (4*x"0000") to isolate user program... + + +; Here starts the user program (of course in user mode^^) +; ------------------------------------------------------------------------------------------------- +main_usr: ldil cnt, #low[bytes] ; loading a sign extended constant definition -> number of bytes to transfer + + ldil r1, #low[test_mem_data_table] ; load address of constant table (see below + ldih r1, #high[test_mem_data_table] + + ldil r2, #low[data_area] ; get address of label 'data_area' - store data there + ldih r2, #high[data_area] + + ldil r4, #low[test_mem_data_table] ; swap with first data table entry + ldih r4, #high[test_mem_data_table] + ldil r5, #low[#2222] ; dummy data + ldih r5, #high[#2222] + swp r5, r4, r5 ; swap memory[r4] with r5 + + ldil data, #0xAB ; hex init + ldil data, #0b11001100 ; bin init + clr data ; clear data transfer register + + staf #1, usr_flags + +loop1: bl load_subroutine ; branch to 'load_subroutine' and link (save return address to link register = r7) + bl store_subroutine + decs cnt, cnt, dec_val ; decrement 'cnt' by 'dec_val' and set alu flags corresponding to the result ('s'-appendix) + bne loop1 + syscall #129 ; terminate by system call with tag '129' + +store_subroutine: ; just some subroutine testing + str data, r2, +#2, post, ! ; store 'data' at [r2] and set r2=r2+2 afterwards + ret LR ; 'ret' and 'stpc' are equal + +load_subroutine: ; and again some subroutine testing + ldr data, r1, +#2, post, ! ; load 'data' from [r1] and set r1=r1+2 afterwards + ret LR ; return to location stored in the link register LR (=r7) + + +; this is a pseudo data area +; ------------------------------------------------------------------------------------------------- +data_area: .space data_area_size ; insert 'data_area_size' * x"0000" = "NOP" + .space #32 ; just some room +; direct memory initialization +; word init: >.dw<> <>#<>integer value (max (2^16)-1)< +test_mem_data_table: +.dw #23432 +.dw #234 +.dw #14 +.dw some_data ; you can also use definitions here +.dw [test_mem_data_table] ; here, the absolute address (inside a page) of branch label "test_mem_data_table" will be placed +.stringz "This is a zero-terminated character string" + +.include "other_stuff.asm" ; include (AT THIS POINT) the file "other_stuff.asm" Index: trunk/core/asm/atlas_asm.exe =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/core/asm/atlas_asm.exe =================================================================== --- trunk/core/asm/atlas_asm.exe (revision 17) +++ trunk/core/asm/atlas_asm.exe (nonexistent)
trunk/core/asm/atlas_asm.exe Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: trunk/core/asm/src/atlas_asm.dev =================================================================== --- trunk/core/asm/src/atlas_asm.dev (revision 17) +++ trunk/core/asm/src/atlas_asm.dev (nonexistent) @@ -1,62 +0,0 @@ -[Project] -FileName=atlas_asm.dev -Name=atlas_asm -Type=1 -Ver=2 -ObjFiles= -Includes= -Libs= -PrivateResource= -ResourceIncludes= -MakeIncludes= -Compiler= -CppCompiler= -Linker= -IsCpp=1 -Icon= -ExeOutput= -ObjectOutput= -LogOutput= -LogOutputEnabled=0 -OverrideOutput=0 -OverrideOutputName=atlas_asm.exe -HostApplication= -Folders= -CommandLine= -UseCustomMakefile=0 -CustomMakefile= -IncludeVersionInfo=0 -SupportXPThemes=0 -CompilerSet=0 -CompilerSettings=0000000000000000000000000 -UnitCount=1 - -[VersionInfo] -Major=1 -Minor=0 -Release=0 -Build=0 -LanguageID=1033 -CharsetID=1252 -CompanyName= -FileVersion=1.0.0.0 -FileDescription=Developed using the Dev-C++ IDE -InternalName= -LegalCopyright= -LegalTrademarks= -OriginalFilename= -ProductName= -ProductVersion=1.0.0.0 -AutoIncBuildNr=0 -SyncProduct=1 - -[Unit1] -FileName=main.cpp -CompileCpp=1 -Folder=atlas_asm -Compile=1 -Link=1 -Priority=1000 -OverrideBuildCmd=0 -BuildCmd= - Index: trunk/core/asm/src/atlas_asm.exe =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/core/asm/src/atlas_asm.exe =================================================================== --- trunk/core/asm/src/atlas_asm.exe (revision 17) +++ trunk/core/asm/src/atlas_asm.exe (nonexistent)
trunk/core/asm/src/atlas_asm.exe Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: trunk/core/asm/src/main.cpp =================================================================== --- trunk/core/asm/src/main.cpp (revision 17) +++ trunk/core/asm/src/main.cpp (nonexistent) @@ -1,1530 +0,0 @@ -#include -#include -#include -#include - -using namespace std; - - // global definition table - char definition[512][16]; - char def_alias[512][16]; - int def_cnt = 0; - - // global mem-data table - bool is_dw[65536]; - - // global branch-label table - char c_label_tab[2048][32]; - int i_label_tab[2048]; - - // global error/warning indicator - int error_cnt = 0; - int warning_cnt = 0; - - // function prototypes - void includer(char *main_file, const char *output); - void convert_strings(const char *input_file, const char *output_file); - void pre_processor(const char *input_file, const char *output_file); - int conv_shift(char *input_string, int line); - int hexc_to_int(char input_char); - int conv_cpreg(char *input_string, int line); - int conv_reg(char *input_string, int line); - int conv_indexing(char *input_string, int line); - int conv_flag_op(char *input_string, int line); - int conv_flag_op_2(char *input_string, int line); - int find_offset(char *input_label, int line); - int conv_imm(char *input, int max_val, int line); - void get_labels(const char *input_file); - void assemble(const char *input_file, const char *output_file, const char *bin_output_file); - int main(int argc, char *argv[]); - - -// ***************************************************************************************************************** -// Copy included files to main file -// ***************************************************************************************************************** -void includer(char *main_file, const char *output_file){ - - FILE *input, *inc_file, *output; - char line_input[1024]; - int i = 0, j = 0; - char *cut_out; - char txt_string[256]; - char buf_string[256]; - char in_file_name[256]; - bool found = false; - char ch; - - // open input file - input = fopen(main_file, "r"); - if(input == NULL){ - printf("INCLUDER: Input file error!"); - exit(1); - } - - // open output file (main working file) - output = fopen(output_file, "w+"); - if(output == NULL){ - printf("INCLUDER: Main file error!"); - exit(1); - } - - // get line - while(fgets(line_input, 512, input) != NULL){ - - // clear working string - for(i=0; i 96) and (txt_string[i] < 123)) - txt_string[i] = txt_string[i] - 32; - } - strcpy(tmp_string, txt_string); // make a copy - strcpy(buf_string, txt_string); // make a copy - - // find ".string" definiton - found = false; - for(i=0; i0; i--){ - if ((txt_string[i] == 0) or (txt_string[i] == ' ') or (txt_string[i] == '\n') or (txt_string[i] == 9)) - txt_string[i] = '\0'; - else{ - txt_string[i+1] = '\n'; - txt_string[i+2] = '\0'; - break; - } - } - - // convert to higher case - for(i=0; i 96) and (txt_string[i] < 123)) - txt_string[i] = txt_string[i] - 32; - } - - // insert label? - if (insert_label == true){ - strncat(buf_string, tmp_string, strlen(tmp_string)); - strncat(buf_string, txt_string, strlen(txt_string)); - strcpy(txt_string, buf_string); - } - - // find empty lines - empty_line = true; - for(i=0; i0){ - for(i=0; txt_string[i] != '\0'; i++){ - if ((txt_string[i] == ' ') and (txt_string[i+1] == ' ')) { - for (j=i; txt_string[j] != '\0'; j++) - txt_string[j+1] = txt_string[j+2]; - } - } - j--; - } - - // line starting with space? - if (txt_string[0] == ' '){ - for(i=0; txt_string[i+1] != '\0'; i++) // cut off - txt_string[i] = txt_string[i+1]; - txt_string[i] ='\0'; - } - - // magic - strcpy(tmp_string, txt_string); - for (i=0; i<255; i++) { - if ((txt_string[i] == ':') and (txt_string[i+1] != ' ')) { - txt_string[i+1] = ' '; - for (j=i+2; j<254; j++) - txt_string[j] = tmp_string[j-1]; - break; - } - } - - // find definitions - if ((txt_string[0] == '.') and (txt_string[1] == 'E') and (txt_string[2] == 'Q') and (txt_string[3] == 'U')){ - empty_line = true; - for(i=5; txt_string[i] != ' '; i++) - def_alias[def_cnt][i-5] = txt_string[i]; - i++; - for(j=i; txt_string[j] != ' '; j++) - definition[def_cnt][j-i] = txt_string[j]; - def_cnt++; - } - - - // find memory reserve definitions -mem_reserve_loop: - found = false; - for(i=0; i! (line %d)\n", input_string, line); - error_cnt++; - } - - return sft; -} - - -// ***************************************************************************************************************** -// Convert Hex char to int -// ***************************************************************************************************************** -int hexc_to_int(char input_char){ - - int ret = -1; - - switch(input_char){ - case '0': ret = 0; break; - case '1': ret = 1; break; - case '2': ret = 2; break; - case '3': ret = 3; break; - case '4': ret = 4; break; - case '5': ret = 5; break; - case '6': ret = 6; break; - case '7': ret = 7; break; - case '8': ret = 8; break; - case '9': ret = 9; break; - case 'A': ret = 10; break; - case 'B': ret = 11; break; - case 'C': ret = 12; break; - case 'D': ret = 13; break; - case 'E': ret = 14; break; - case 'F': ret = 15; break; - } - - return ret; -} - - -// ***************************************************************************************************************** -// Convert coprocessor register to int address -// ***************************************************************************************************************** -int conv_cpreg(char *input_string, int line){ - - int reg = 0; - int i = 0; - - // any coprocessor register definition? - for (i=0; i! (line %d)\n", input_string, line); - error_cnt++; - } - - return reg; -} - - -// ***************************************************************************************************************** -// Convert register to int address -// ***************************************************************************************************************** -int conv_reg(char *input_string, int line){ - - int reg = 0; - int i = 0; - - if ((input_string[0] == '+') or (input_string[0] == '-')) { - for(i=0; i<31; i++) - input_string[i] = input_string[i+1]; - } - - // any register definition? - for (i=0; i! (line %d)\n", input_string, line); - error_cnt++; - } - - return reg; -} - - -// ***************************************************************************************************************** -// Convert PRE / POST indexing mode -// ***************************************************************************************************************** -int conv_indexing(char *input_string, int line){ - - int mode = 0; - - if (strcmp(input_string, "PRE") == 0) - mode = 0; - else if (strcmp(input_string, "POST") == 0) - mode = 1; - else { - printf("ERROR: Invalid register name <%s>! (line %d)\n", input_string, line); - error_cnt++; - } - - return mode; -} - - -// ***************************************************************************************************************** -// Convert flag update option -// ***************************************************************************************************************** -int conv_flag_op(char *input_string, int line){ - - int opt = 0; - - if (strcmp(input_string, "ALU_FLAGS") == 0) - opt = 1; - else if (strcmp(input_string, "SYS_FLAGS") == 0) - opt = 2; - else if (strcmp(input_string, "USR_FLAGS") == 0) - opt = 3; - else if (strcmp(input_string, "") == 0) - opt = 0; - else { - printf("ERROR: Invalid flag option <%s>! (line %d)\n", input_string, line); - error_cnt++; - } - - return opt; -} - - -// ***************************************************************************************************************** -// Convert restricted flag update option -// ***************************************************************************************************************** -int conv_flag_op_2(char *input_string, int line){ - - int opt = 0; - - if (strcmp(input_string, "SYS_FLAGS") == 0) - opt = 0; - else if (strcmp(input_string, "USR_FLAGS") == 0) - opt = 1; - else { - printf("ERROR: Invalid flag option <%s>! (line %d)\n", input_string, line); - error_cnt++; - } - - return opt; -} - - - -// ***************************************************************************************************************** -// Get branch offset -// ***************************************************************************************************************** -int find_offset(char *input_label, int line){ - - int offset = 0; - bool match = false; - bool pos = false; - int i = 0; - - if(input_label[0] == '#'){ - for(i=0; i not found! (line %d)\n", input_label, line); - error_cnt++; - } - - // out of reach? - if (line != -1){ // marker: full 16-bit range - if ((offset > 255) or (offset < -256)){ - printf("ERROR: Label <%s> out of reach (offset: %d bytes)! (line %d)\n", input_label, offset*2, line); - error_cnt++; - } - offset = offset & 511; // make it nine bit wide - } - - return offset; -} - - -// ***************************************************************************************************************** -// Convert immediate -// ***************************************************************************************************************** -int conv_imm(char *input, int max_val, int line){ - - int imm = 65535; - int i = 0; - char temp[32]; - char input_string[32]; - bool extended = false; - - strcpy(input_string, input); - - if ((input_string[0] == '+') or (input_string[0] == '-')) { - for(i=0; i<31; i++) - input_string[i] = input_string[i+1]; - } - - // any normal immediate definition? - for (i=0; i ' - temp[0] = input_string[1]; - temp[1] = '\0'; - imm = (int)temp[0]; - goto skip_analysis; - } - - // any label reference definition? - if ((input_string[0] == '[')){ - for(i=1; i> 16) & 255; // low immediate of 32-bit immediate - else - imm = atoi(temp) & 255; // low immediate - goto skip_analysis; // valid definition found - } - } - } - - // any high immediate definition? - if ((input_string[0] == 'H') and (input_string[1] == 'I') and (input_string[2] == 'G') and (input_string[3] == 'H') and (input_string[4] == '[')){ - for(i=5; i> 24) & 255; // high immediate of 32-bit immediate - else - imm = (atoi(temp) >> 8) & 255; // high immediate - goto skip_analysis; // valid definition found - } - } - } - - imm = atoi(input_string); // normal immediate - - // immediate label-address? - if ((input_string[0] == 'L') and (input_string[1] == 'O') and (input_string[2] == 'W') and (input_string[3] == '[')){ - for(i=4; i<31; i++){ - if (input_string[i] != ']') - temp[i-4] = input_string[i]; - else{ - temp[i-4] = '\0'; - break; - } - } - if (temp[0] == '#'){ // immediate - for(i=0; i<31; i++) - temp[i] = temp[i+1]; - if (extended == true) - imm = (atoi(temp) >> 16) & 255; // low immediate of 32-bit immediate - else - imm = atoi(temp) & 255; // low immediate - } - else { - if (extended == true) - imm = (((find_offset(temp, -1)-2)*2) >> 16) & 255; // low immediate of 32-bit immediate - else - imm = ((find_offset(temp, -1)-2)*2) & 255; // low immediate - } - } - if ((input_string[0] == 'H') and (input_string[1] == 'I') and (input_string[2] == 'G') and (input_string[3] == 'H') and (input_string[4] == '[')){ - for(i=5; i<31; i++){ - if (input_string[i] != ']') - temp[i-5] = input_string[i]; - else{ - temp[i-5] = '\0'; - break; - } - } - if (temp[0] == '#'){ // immediate - for(i=0; i<31; i++) - temp[i] = temp[i+1]; - if (extended == true) - imm = (atoi(temp) >> 24) & 255; // high immediate of 32-bit immediate - else - imm = (atoi(temp) >> 8) & 255; // high immediate - } - else{ - if (extended == true) - imm = (((find_offset(temp, -1)-2)*2) >> 24) & 255; // high immediate of 32-bit immediate - else - imm = (((find_offset(temp, -1)-2)*2) >> 8) & 255; // high immediate - } - } - -skip_analysis: - - // message - //if (extended == true){ - // printf("WARNING: Loading extended 32-bit immediate. (line %d)\n", line); - // warning_cnt++; - //} - - // out of range? - if ((imm > max_val) or (imm < 0)){ - printf("ERROR: Invalid immediate <%s>! (line %d)\n", input_string, line); - error_cnt++; - } - - return imm; -} - - -// ***************************************************************************************************************** -// Get labels and locations -// ***************************************************************************************************************** -void get_labels(const char *input_file){ - - FILE *data_in; - char line_input[512]; - int index = 0; - int j = 0; - int line = 0; - int label_cnt = 0; - char *cut_out; - char line_string[256]; - - // open input/output file - data_in = fopen(input_file, "r"); - if(data_in == NULL){ - printf("GET_LABEL: Input file error_cnt!\n"); - exit(1); - } - - // get line - line = 1; - while(fgets(line_input, 512, data_in) != NULL){ - - // clear working string - for(j=0; j (line %d)\n", line_string, line); - warning_cnt++; - } - - // label present? - for (index=0; line_string[index] != '\0'; index++){ - if (line_string[index] == ':'){ - index+=2; - for(j=0; line_string[j+index] != '\0'; j++) // cut off - line_string[j] = line_string[j+index]; - line_string[j] ='\0'; - break; - } - } - - // get command and operands (9x) - for (i=0; i<10; i++){ - for (index=0; index<512; index++){ - if (line_string[index] == ' '){ - strncpy(arg[i], line_string, index); - index++; - arg[i][index] = '\0'; - for(j=0; line_string[j+index] != '\0'; j++) // cut off - line_string[j] = line_string[j+index]; - line_string[j] ='\0'; - break; - } - } - } - - // translate line by line - opcode = 0; - - // ALU Operations (without flag update) - // --------------------------------------------------------------------------------------------------------- - if (strcmp(arg[0], "INC") == 0) - opcode = (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line); - else if (strcmp(arg[0], "DEC") == 0) - opcode = (1<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line); - else if (strcmp(arg[0], "ADD") == 0) - opcode = (2<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "ADC") == 0) - opcode = (3<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "SUB") == 0){ - if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant SUB will result in NEG instruction! (line &d)\n", line); warning_cnt++;} - opcode = (4<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - } - else if (strcmp(arg[0], "NEG") == 0) - opcode = (4<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "SBC") == 0) - opcode = (5<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if ((strcmp(arg[0], "CMP") == 0) or (strcmp(arg[0], "CMPS") == 0)) - opcode = (6<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line); - else if ((strcmp(arg[0], "CPX") == 0) or (strcmp(arg[0], "CPXS") == 0)) - opcode = (7<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "AND") == 0){ - if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant AND will result in STUB instruction! (line &d)\n", line); warning_cnt++;} - opcode = (8<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - } - else if (strcmp(arg[0], "STUB") == 0) // store register to user bank register - opcode = (8<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "ORR") == 0){ - if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant ORR will result in LDUB instruction! (line &d)\n", line); warning_cnt++;} - opcode = (9<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - } - else if (strcmp(arg[0], "LDUB") == 0) // load register from user bank register - opcode = (9<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "EOR") == 0) - opcode = (10<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "NAND") == 0) - opcode = (11<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "BIC") == 0) - opcode = (12<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if ((strcmp(arg[0], "TEQ") == 0) or (strcmp(arg[0], "TEQS") == 0)) - opcode = (13<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line); - else if ((strcmp(arg[0], "TST") == 0) or (strcmp(arg[0], "TSTS") == 0)) - opcode = (14<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "SFT") == 0) - opcode = (15<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_shift(arg[3], line); - - // ALU Operations (with flag update) - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "INCS") == 0) - opcode = (0<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line); - else if (strcmp(arg[0], "DECS") == 0) - opcode = (1<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 7, line); - else if (strcmp(arg[0], "ADDS") == 0) - opcode = (2<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "ADCS") == 0) - opcode = (3<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "SUBS") == 0){ - if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant SUBS will result in NEG instruction! (line &d)\n", line); warning_cnt++;} - opcode = (4<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - } - else if (strcmp(arg[0], "NEGS") == 0) - opcode = (4<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "SBCS") == 0) - opcode = (5<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "LDSR") == 0) // load register from msr - opcode = (6<<10) | (conv_reg(arg[1], line)<<7) | (conv_flag_op(arg[2], line)<<5); - else if (strcmp(arg[0], "STSR") == 0) // store register to msr - opcode = (7<<10) | (conv_flag_op(arg[2], line)<<5) | (conv_reg(arg[1], line)<<0); - else if (strcmp(arg[0], "STAF") == 0){ // store immediate to MSR's user/system ALU flags - temp = conv_imm(arg[1], 63, line); - opcode = (7<<10) | ((temp>>3)<<7) | (1<<6) | (conv_flag_op_2(arg[2], line)<<5) | (1<<4) | (temp & 7); - } - else if (strcmp(arg[0], "ANDS") == 0){ - if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant ANDS will result in STUBS instruction! (line &d)\n", line); warning_cnt++;} - opcode = (8<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - } - else if (strcmp(arg[0], "STUBS") == 0) // store register to user bank register and set flags - opcode = (8<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "ORRS") == 0){ - if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) { printf("WARNING: Redundant ORRS will result in LDUBS instruction! (line &d)\n", line); warning_cnt++;} - opcode = (9<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - } - else if (strcmp(arg[0], "LDUBS") == 0) // load register from user bank register and set flags - opcode = (9<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[2], line); - else if (strcmp(arg[0], "EORS") == 0) - opcode = (10<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "NANDS") == 0) - opcode = (11<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - else if (strcmp(arg[0], "BICS") == 0) - opcode = (12<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); - - else if ((strcmp(arg[0], "STPC") == 0) or (strcmp(arg[0], "GT") == 0) or (strcmp(arg[0], "RET") == 0)) // goto [register] - opcode = (13<<10) | (conv_reg(arg[1], line)<<4); - else if ((strcmp(arg[0], "STPCL") == 0) or (strcmp(arg[0], "GTL") == 0) or (strcmp(arg[0], "RETL") == 0)) // goto [register] and link - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2); - else if ((strcmp(arg[0], "STPCU") == 0) or (strcmp(arg[0], "GTU") == 0) or (strcmp(arg[0], "RETU") == 0)) // goto [register] and switch to user mode - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<0); - else if ((strcmp(arg[0], "STPCI") == 0) or (strcmp(arg[0], "GTI") == 0) or (strcmp(arg[0], "RETI") == 0)) // goto [register] and set global xint flag - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<1); - else if ((strcmp(arg[0], "STPCUI") == 0) or (strcmp(arg[0], "GTUI") == 0) or (strcmp(arg[0], "RETUI") == 0)) // goto [register] and set global xint flag and switch to user mode - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<1) | (1<<0); - else if ((strcmp(arg[0], "STPCUL") == 0) or (strcmp(arg[0], "GTUL") == 0) or (strcmp(arg[0], "RETUL") == 0)) // goto [register] and switch to user mode and link - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<0); - else if ((strcmp(arg[0], "STPCIL") == 0) or (strcmp(arg[0], "GTIL") == 0) or (strcmp(arg[0], "RETIL") == 0)) // goto [register] and set global xint flag and link - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<1); - else if ((strcmp(arg[0], "STPCUIL") == 0) or (strcmp(arg[0], "GTUIL") == 0) or (strcmp(arg[0], "RETUIL") == 0)) // goto [register] and set global xint flag and switch to user mode and link - opcode = (13<<10) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<1) | (1<<0); - else if ((strcmp(arg[0], "STPCX") == 0) or (strcmp(arg[0], "GTX") == 0) or (strcmp(arg[0], "RETX") == 0)) // goto [register] and switch to previous mode - opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<0); - else if ((strcmp(arg[0], "STPCXI") == 0) or (strcmp(arg[0], "GTXI") == 0) or (strcmp(arg[0], "RETXI") == 0)) // goto [register] and set global xint flag and switch to previous mode - opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<1) | (1<<0); - else if ((strcmp(arg[0], "STPCXL") == 0) or (strcmp(arg[0], "GTXL") == 0) or (strcmp(arg[0], "RETXL") == 0)) // goto [register] and switch to previous mode and link - opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<0); - else if ((strcmp(arg[0], "STPCXIL") == 0) or (strcmp(arg[0], "GTXIL") == 0) or (strcmp(arg[0], "RETXIL") == 0)) // goto [register] and set global xint flag and switch to previous mode and link - opcode = (13<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | (1<<2) | (1<<1) | (1<<0); - - else if (strcmp(arg[0], "LDPC") == 0) // load program counter to register - opcode = (14<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4); - else if (strcmp(arg[0], "SFTS") == 0) - opcode = (15<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_shift(arg[3], line); - - // Branch - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "B") == 0) // branch always - opcode = (1<<15) | (15<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BEQ") == 0) // branch if equal - opcode = (1<<15) | (0<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BNE") == 0) // branch if not equal - opcode = (1<<15) | (1<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BCS") == 0) // branch if unsigned higher or same - opcode = (1<<15) | (2<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BCC") == 0) // branch if unsigned lower - opcode = (1<<15) | (3<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BMI") == 0) // branch if negative - opcode = (1<<15) | (4<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BPL") == 0) // branch if positive or zero - opcode = (1<<15) | (5<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BOS") == 0) // branch if overflow - opcode = (1<<15) | (6<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BOC") == 0) // branch if no overflow - opcode = (1<<15) | (7<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BHI") == 0) // branch if unsigned higher - opcode = (1<<15) | (8<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLS") == 0) // branch if unsigned lower or same - opcode = (1<<15) | (9<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BGE") == 0) // branch if greater than or equal - opcode = (1<<15) | (10<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLT") == 0) // branch if less than - opcode = (1<<15) | (11<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BGT") == 0) // branch if greater than - opcode = (1<<15) | (12<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLE") == 0) // branch if less than or equal - opcode = (1<<15) | (13<<10) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BTS") == 0) // branch if transfer flag set - opcode = (1<<15) | (14<<10) | find_offset(arg[1], line); - - // Branch and link - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "BL") == 0) // branch and link always - opcode = (1<<15) | (15<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLEQ") == 0) // branch and link if equal - opcode = (1<<15) | (0<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLNE") == 0) // branch and link if not equal - opcode = (1<<15) | (1<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLCS") == 0) // branch and link if unsigned higher or same - opcode = (1<<15) | (2<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLCC") == 0) // branch and link if unsigned lower - opcode = (1<<15) | (3<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLMI") == 0) // branch and link if negative - opcode = (1<<15) | (4<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLPL") == 0) // branch and link if positive or zero - opcode = (1<<15) | (5<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLOS") == 0) // branch and link if overflow - opcode = (1<<15) | (6<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLOC") == 0) // branch and link if no overflow - opcode = (1<<15) | (7<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLHI") == 0) // branch and link if unsigned higher - opcode = (1<<15) | (8<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLLS") == 0) // branch and link if unsigned lower or same - opcode = (1<<15) | (9<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLGE") == 0) // branch and link if greater than or equal - opcode = (1<<15) | (10<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLLT") == 0) // branch and link if less than - opcode = (1<<15) | (11<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLGT") == 0) // branch and link if greater than - opcode = (1<<15) | (12<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLLE") == 0) // branch and link if less than or equal - opcode = (1<<15) | (13<<10) | (1<<9) | find_offset(arg[1], line); - else if (strcmp(arg[0], "BLTS") == 0) // branch and link if transfer flag set - opcode = (1<<15) | (14<<10) | (1<<9) | find_offset(arg[1], line); - - // Load immediate - // --------------------------------------------------------------------------------------------------------- - else if ((strcmp(arg[0], "LDIL") == 0) or (strcmp(arg[0], "LDIH") == 0)){ - temp = conv_imm(arg[2], 255, line); - if (strcmp(arg[0], "LDIL") == 0) // load whole register with sign extended immediate - opcode = (3<<14) | (0<<11) | ((temp & 128)<<3) | (conv_reg(arg[1], line)<<7) | (temp & 127); - else if (strcmp(arg[0], "LDIH") == 0) // only load high byte of register with immediate - opcode = (3<<14) | (1<<11) | ((temp & 128)<<3) | (conv_reg(arg[1], line)<<7) | (temp & 127); - } - - // Bit operations - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "SBR") == 0) // set select-bit - opcode = (13<<12) | (0<<11) | (1<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 15, line); - else if (strcmp(arg[0], "CBR") == 0) // clear select-bit - opcode = (13<<12) | (0<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 15, line); - else if (strcmp(arg[0], "STB") == 0) // store select-bit to t-flag - opcode = (13<<12) | (1<<11) | (1<<10) | (0<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line); - else if (strcmp(arg[0], "STBI") == 0) // store inverted select-bit to t-flag - opcode = (13<<12) | (1<<11) | (1<<10) | (1<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line); - else if (strcmp(arg[0], "SPR") == 0) // store parity-bit to t-flag - opcode = (13<<12) | (1<<11) | (1<<10) | (1<<8) | (0<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line); - else if (strcmp(arg[0], "SPRI") == 0) // store inverted parity-bit to t-flag - opcode = (13<<12) | (1<<11) | (1<<10) | (1<<8) | (1<<7) | (conv_reg(arg[1], line)<<4) | conv_imm(arg[2], 15, line); - else if (strcmp(arg[0], "LDB") == 0) // laod select-bit form t-flag - opcode = (13<<12) | (1<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_imm(arg[3], 15, line); - - // System call - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "SYSCALL") == 0){ // trigger software interrupt trap - if (strcmp(arg[1], "") == 0) - temp = 0; - else - temp = conv_imm(arg[1], 1023, line); - opcode = (63<<10) | temp; // 10-bit system call tag - } - - // Memory Access - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "LDR") == 0){ // load register - opcode = (1<<14) | (0<<10) | (conv_reg(arg[1], line)<<7); // mem_access, load, data register - opcode = opcode | (conv_reg(arg[2], line)<<4); // base register - opcode = opcode | (conv_indexing(arg[4], line)<<13); // indexing mode - if (arg[3][0] == '+') // add indexing - opcode = opcode | (1<<12); - if (arg[3][1] == '#') // immediate offset - opcode = opcode | (1<<3) | conv_imm(arg[3], 7, line); - else // register offset - opcode = opcode | conv_reg(arg[3], line); - if (arg[5][0] == '!') // write back base register - opcode = opcode | (1<<11); - else{ - if ((conv_indexing(arg[4], line)==1) and (arg[5][0] != '!')){ - printf("WARNING: Redundant LDR indexing instruction. (line %d)\n", line); - warning_cnt++; - } - } - } - else if (strcmp(arg[0], "STR") == 0){ // store register - opcode = (1<<14) | (1<<10) | (conv_reg(arg[1], line)<<7); // mem_access, store, data register - opcode = opcode | (conv_reg(arg[2], line)<<4); // base register - opcode = opcode | (conv_indexing(arg[4], line)<<13); // indexing mode - if (arg[3][0] == '+') // add indexing - opcode = opcode | (1<<12); - if (arg[3][1] == '#') // immediate offset - opcode = opcode | (1<<3) | conv_imm(arg[3], 7, line); - else // register offset - opcode = opcode | conv_reg(arg[3], line); - if (arg[5][0] == '!') // write back base register - opcode = opcode | (1<<11); - else{ - if ((conv_indexing(arg[4], line)==1) and (arg[5][0] != '!')){ - printf("WARNING: Redundant STR indexing instruction. (line %d)\n", line); - warning_cnt++; - } - } - } - else if (strcmp(arg[0], "SWP") == 0){ // data swap: Rd -> MEM[Rb] -> Rd - opcode = (1<<14) | (conv_reg(arg[1], line)<<7); // mem_access, load_data register - opcode = opcode | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line); // base register, store_data register - opcode = opcode | (1<<13) | (0<<11); // indexing mode = post and NO write back = redundant to mark swap operation - } - - // Coprocessor Access - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "CDP") == 0){ // coprocessor data processing - opcode = (14<<12) | (conv_imm(arg[1], 1, line)<<10) | (conv_cpreg(arg[2], line)<<7); - opcode = opcode | (conv_cpreg(arg[3], line)<<4) | conv_imm(arg[4], 7, line); - } - else if (strcmp(arg[0], "MRC") == 0){ // move data from coprocessor - opcode = (14<<12) | (1<<11) | (conv_imm(arg[1], 1, line)<<10) | (conv_reg(arg[2], line)<<7); - opcode = opcode | (conv_cpreg(arg[3], line)<<4) | (0<<3) | conv_imm(arg[4], 7, line); - } - else if (strcmp(arg[0], "MCR") == 0){ // move data to coprocessor - opcode = (14<<12) | (1<<11) | (conv_imm(arg[1], 1, line)<<10) | (conv_cpreg(arg[2], line)<<7); - opcode = opcode | (conv_reg(arg[3], line)<<4) | (1<<3) | conv_imm(arg[4], 7, line); - } - - // Pseudo-Instructions - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "NOP") == 0) // dummy operation (no actual system state change) - opcode = 0; // actually this is an increment with a zero immediate and no flag update - else if (strcmp(arg[0], "MOV") == 0) // increment with #0 = move register - opcode = (0<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | 0; - else if (strcmp(arg[0], "MOVS") == 0) // increment with #0 = move register and flag update - opcode = (0<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | 0; - else if (strcmp(arg[0], "CLR") == 0) // set register to 0 - opcode = (10<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line); - else if (strcmp(arg[0], "CLRS") == 0) // set register to 0 and set flags - opcode = (10<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line); - else if (strcmp(arg[0], "COM") == 0) // 1's complement - opcode = (11<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line); - else if (strcmp(arg[0], "COMS") == 0) // 1's complement and set flags - opcode = (11<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line); - - // Build-in Assembler Macros - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], "PUSH+") == 0) // push on positive growing stack - opcode = (1<<14) | (1<<13) | (1<<12) | (1<<11) | (1<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0); - else if (strcmp(arg[0], "POP+") == 0) // pop from positive growing stack - opcode = (1<<14) | (0<<13) | (0<<12) | (1<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0); - else if (strcmp(arg[0], "PUSHPOP") == 0) // pushpop from/on stack - opcode = (1<<14) | (0<<13) | (1<<12) | (0<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (0<<0); - else if (strcmp(arg[0], "PUSH-") == 0) // push on negative growing stack - opcode = (1<<14) | (1<<13) | (0<<12) | (1<<11) | (1<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0); - else if (strcmp(arg[0], "POP-") == 0) // pop from negative growing stack - opcode = (1<<14) | (0<<13) | (1<<12) | (1<<11) | (0<<10) | (conv_reg(arg[1], line)<<7) | (6<<4) | (1<<3) | (2<<0); - - // Direct memory initialization - WORD - // --------------------------------------------------------------------------------------------------------- - else if (strcmp(arg[0], ".DW") == 0) // memory init - opcode = conv_imm(arg[1], (int)(pow(2,16)-1), line); - - // Unknown Command - // --------------------------------------------------------------------------------------------------------- - else { - printf("ERROR: Unknown command <%s>! (line %d)\n", arg[0], line); - error_cnt++; - } - - - opcode = opcode & (int(pow(2, 16))-1); // only 16-bit, thanks - - if (error_cnt == 0) { - // init file output - sprintf(tmp_string, "%06d => x\"%04x\", -- %s\n", line-1, opcode, arg[0]); - fputs(tmp_string, data_out); - // data file output - fputc(char(opcode>>8), bin_data_out); - fputc(char(opcode & 255), bin_data_out); - } - - line++; - } - - if (error_cnt == 0) - fputs("others => x\"0000\" -- NOP", data_out); - - fclose(bin_data_out); - fclose(data_out); - fclose(data_in); -} - - -// ***************************************************************************************************************** -// Main function -// ***************************************************************************************************************** -int main(int argc, char *argv[]){ - - printf("\nAtlas Project - Evaluation Assembler, Version 2013.05.27\n"); - printf("by Stephan Nolting (stnolting@gmail.com), Hanover, Germany\n\n"); - - // pre_processor.asm - intermediate processing file - // init.vhd - vhdl memory initialization data block - // out.bin - binary program output for bootloader downloading - - includer(argv[1], "included.xasm"); // include other files - copy them to work file - convert_strings("included.xasm", "job.xasm"); // convert strings into direct memory inits - pre_processor("job.xasm", "pre_processor.asm"); // erase comments & empty lines & get definitions - get_labels("pre_processor.asm"); // find and list labels - assemble("pre_processor.asm", "init.vhd", "out.bin"); // do the magic conversion - - if (error_cnt == 0){ - printf("\nAssembler completed without errors (%d warnings).\n", warning_cnt); - if (warning_cnt != 0) - printf("Line numbers refer to the intermediate \"pre_processor.asm\" processing file.\n"); - } - else{ - printf("\nAssembler terminated with %d errors (%d warnings)!\n", error_cnt, warning_cnt); - printf("Line numbers refer to the intermediate \"pre_processor.asm\" processing file.\n"); - } - - return 0; -} Index: trunk/core/asm/examples/count_ld_zeros.asm =================================================================== --- trunk/core/asm/examples/count_ld_zeros.asm (revision 17) +++ trunk/core/asm/examples/count_ld_zeros.asm (nonexistent) @@ -1,41 +0,0 @@ -; ************************************************************************************************* -; Count leading zeros of a register -; 27th of May, 2013 -; by Stephan Nolting -; ************************************************************************************************* - -; Register defintions -; ------------------------------------------------------------------------------------------------- - - -; Constants defintions -; ------------------------------------------------------------------------------------------------- - - -; Exception vector table -; ------------------------------------------------------------------------------------------------- -reset_vec: b main -x_int0_vec: b x_int0_vec ; not used -x_int1_vec: b x_int1_vec ; not used -cmd_err_vec: b cmd_err_vec ; not used -swi_vec: b swi_vec ; not used - - -; Main program -; ------------------------------------------------------------------------------------------------- -main: ldil r0, #0b11000110 ; load low value using binary format - ldih r0, #0b00000101 ; load high value using binary format - - ldil r1, #16 ; if register is zero -> 16 leading zeros - - teq r0, r0 - beq end ; skip counting when register is not zero - - - clr r1 ; reset counter -loop: sfts r0, r0, #lsl ; shift msb of r0 into carry flag - bcs end ; terminate when shifted bit is one - inc r1, r1, #1 ; increment counter - b loop - -end: b end \ No newline at end of file Index: trunk/core/asm/examples/test.asm =================================================================== --- trunk/core/asm/examples/test.asm (revision 17) +++ trunk/core/asm/examples/test.asm (nonexistent) @@ -1,141 +0,0 @@ -; ------------------------------------------------------------------------------------------------- -; ATLAS ASSEMBLER test/example program file, May 2013 -; ------------------------------------------------------------------------------------------------- - -; -> for all further lexical explanations see the rules given between the '>' and '<' symbol -; -> this is a comment, initiated with >;< -; -> all constant numbers must have an '#'-prefix -; -> assembler is not case-sensitive! - - -; User defintions -; ------------------------------------------------------------------------------------------------- -; user-defined definitions for registers (r0, .., r1), cp_registers (c0, .., c7), constants ('#...') -; definitions: >.equ<> <>alias_name<> <>real_name/constant< -; do not use a definition name also as label name! -; .equ definitions must be at the beginning of a program (before actual code) -.equ cnt r0 ; counter register -.equ data r3 ; data transfer register -.equ LR r7 ; r7 is always the link register -.equ dec_val #1 ; constant/immediate alias used for decrement -.equ msr_xint0_en #13 ; this is the MSR's external interrupt 0 enable flag -.equ msr_xint1_en #14 ; this is the MSR's external interrupt 1 enable flag -.equ data_area_size #4 ; space area alias -.equ bytes #4 ; number of bytes to transfer within the demo program -.equ some_data #1289 ; just some data for memory init - - -; Exception vector table -; ------------------------------------------------------------------------------------------------- -; This table MUST be the first logical instructions within -; a program ( block 0) due to fixed exception vectors! - -; labels: >lable_name: letters, numbers and '_' symbols<>:< -; only one label can point to one specific location (so no redundant labels!!!) -reset_vec: b init ; destination after reset, always starting in system mode -x_int0_vec: b x_int_handler ; external interrupt 0 interrupt handler -x_int1_vec: b x_int_handler ; external interrupt 1 interrupt handler -cmd_err_vec: b cmd_err_vec ; undefined instruction / illegal msr/reg/cp access -swi_vec: b swi_handler ; software interrupt exception handler - - -; Exception handlers (system mode) -; ------------------------------------------------------------------------------------------------- -swi_handler: ; SOFTWARE INTERRUPT HANDLER -; instructions -; >cmd mnemonic<> <>OP1<>,<> <>OP2<>,<> < ... - dec LR, LR, #2 ; restore WORD (!!!) address of calling instruction - ldr r0, LR, +#0, pre ; load the instruction, which caused the exception - clr r1 ; load tag mask - ldih r1, #252 - bic r0, r0, r1 ; isolate syscall tag in r0 - - ldil r4, #low[test_mem_data_table] - ldih r4, #high[test_mem_data_table] - ldr r4, r4, +#0, pre - -nirvana: b nirvana ; this is the end, my friend... - - -x_int_handler: ; EXTERNAL INTERRUPT HANDLER - ; do nothing in this exception handlers but return - dec LR, LR, #2 ; restore WORD (!!!) address of interrupted instruction - b skip_dummy_mem_area ; skip dummy mem area - -; reserve memory (fill with zeros) -; reserve: >.space<> <>#<>integer value = number of zero words / defintion< -dummy_mem_area: - .space #4 ; insert 4 * x"0000" = "NOP" - -skip_dummy_mem_area: - reti LR ; return from interrupt handler routine, re-enable global xint_en and resume operation in user_mode at [r7] - - -; Main program -; ------------------------------------------------------------------------------------------------- -init: ldil r0, #xlow[main_usr] ; get extended (upper 16-bit of 32-bit) low address byte of label "main_usr" - just a demo, it is 0 here - ldih r0, #xhigh[main_usr] ; get extended (upper 16-bit of 32-bit) high address byte of label "main_usr" - just a demo, it is 0 here - ldil r0, #low[main_usr] ; get low address byte of label "main_usr" - ldih r0, #high[main_usr] ; get high address byte of label "main_usr" - - ldsr r1 ; copy machine status register to r1 - sbr r1, r1, msr_xint0_en ; enable external interrupt 0 mask, no '#'-prefix when using a constant definition! - stsr r1 ; store r1 to machine status register - - gtui r0 ; enable external interrupts and resume operation in user mode at [r0] - -.space #4 ; just some space (4*x"0000") to isolate user program... - - -; Here starts the user program (of course in user mode^^) -; ------------------------------------------------------------------------------------------------- -main_usr: ldil cnt, #low[bytes] ; loading a sign extended constant definition -> number of bytes to transfer - - ldil r1, #low[test_mem_data_table] ; load address of constant table (see below - ldih r1, #high[test_mem_data_table] - - ldil r2, #low[data_area] ; get address of label 'data_area' - store data there - ldih r2, #high[data_area] - - ldil r4, #low[test_mem_data_table] ; swap with first data table entry - ldih r4, #high[test_mem_data_table] - ldil r5, #low[#2222] ; dummy data - ldih r5, #high[#2222] - swp r5, r4, r5 ; swap memory[r4] with r5 - - ldil data, #0xAB ; hex init - ldil data, #0b11001100 ; bin init - clr data ; clear data transfer register - - staf #1, usr_flags - -loop1: bl load_subroutine ; branch to 'load_subroutine' and link (save return address to link register = r7) - bl store_subroutine - decs cnt, cnt, dec_val ; decrement 'cnt' by 'dec_val' and set alu flags corresponding to the result ('s'-appendix) - bne loop1 - syscall #129 ; terminate by system call with tag '129' - -store_subroutine: ; just some subroutine testing - str data, r2, +#2, post, ! ; store 'data' at [r2] and set r2=r2+2 afterwards - ret LR ; 'ret' and 'stpc' are equal - -load_subroutine: ; and again some subroutine testing - ldr data, r1, +#2, post, ! ; load 'data' from [r1] and set r1=r1+2 afterwards - ret LR ; return to location stored in the link register LR (=r7) - - -; this is a pseudo data area -; ------------------------------------------------------------------------------------------------- -data_area: .space data_area_size ; insert 'data_area_size' * x"0000" = "NOP" - .space #32 ; just some room -; direct memory initialization -; word init: >.dw<> <>#<>integer value (max (2^16)-1)< -test_mem_data_table: -.dw #23432 -.dw #234 -.dw #14 -.dw some_data ; you can also use definitions here -.dw [test_mem_data_table] ; here, the absolute address (inside a page) of branch label "test_mem_data_table" will be placed -.stringz "This is a zero-terminated character string" - -.include "other_stuff.asm" ; include (AT THIS POINT) the file "other_stuff.asm" Index: trunk/core/asm/examples/string_comp.asm =================================================================== --- trunk/core/asm/examples/string_comp.asm (revision 17) +++ trunk/core/asm/examples/string_comp.asm (nonexistent) @@ -1,61 +0,0 @@ -; ************************************************************************************************* -; Compare two character strings -; 27th of May, 2013 -; by Stephan Nolting -; ************************************************************************************************* - -; Register defintions -; ------------------------------------------------------------------------------------------------- -.equ cnt r0 -.equ s1 r1 -.equ s2 r2 -.equ temp1 r3 -.equ temp2 r4 -.equ equal r5 - -; Constants defintions -; ------------------------------------------------------------------------------------------------- -.equ upper_border #123 -.equ lower_border #96 -.equ byte_mask #255 -.equ distance #32 -.equ string_length #23 - - -; Exception vector table -; ------------------------------------------------------------------------------------------------- -reset_vec: b main -x_int0_vec: b x_int0_vec ; not used -x_int1_vec: b x_int1_vec ; not used -cmd_err_vec: b cmd_err_vec ; not used -swi_vec: b swi_vec ; not used - - -; Main program -; ------------------------------------------------------------------------------------------------- -main: ldil s1, #low[string_1] - ldih s1, #high[string_1] - ldil s2, #low[string_2] - ldih s2, #high[string_2] - ldil cnt, string_length - - clr equal ; not equal - cdp #1, c0, c0, #2 ; direct memory access - bypass cache - -compare_loop: - ldr temp1, s1, +#2, post, ! - ldr temp2, s2, +#2, post, ! - cmp temp1, temp2 - bne not_equal - decs cnt, cnt, #1 - bne compare_loop - - ldil equal, #255 ; equal! - -not_equal: b not_equal - - -; Memory data area -; ------------------------------------------------------------------------------------------------- -string_1: .stringz "To boldly go, where no man has gone before..." -string_2: .stringz "To boldly go, where no man has gone before..." Index: trunk/core/asm/examples/higher_case_conv.asm =================================================================== --- trunk/core/asm/examples/higher_case_conv.asm (revision 17) +++ trunk/core/asm/examples/higher_case_conv.asm (nonexistent) @@ -1,105 +0,0 @@ -; ************************************************************************************************* -; Convert a character string to higher-case letters -; 27th of May, 2013 -; by Stephan Nolting -; ************************************************************************************************* - -; Register defintions -; ------------------------------------------------------------------------------------------------- -.equ cnt r0 -.equ d_in r1 -.equ d_out r2 -.equ data r3 -.equ temp r4 -.equ copy r5 -.equ sp r6 - -; Constants defintions -; ------------------------------------------------------------------------------------------------- -.equ upper_border #123 -.equ lower_border #96 -.equ byte_mask #255 -.equ distance #32 -.equ string_length #23 - - -; Exception vector table -; ------------------------------------------------------------------------------------------------- -reset_vec: b main -x_int0_vec: b x_int0_vec ; not used -x_int1_vec: b x_int1_vec ; not used -cmd_err_vec: b cmd_err_vec ; not used -swi_vec: b swi_vec ; not used - - -; Main program -; ------------------------------------------------------------------------------------------------- -main: ldil d_in, #low[string_input] - ldih d_in, #high[string_input] - ldil d_out, #low[string_output] - ldih d_out, #high[string_output] - ldil sp, #low[stack_begin] - ldih sp, #high[stack_begin] - - ldil cnt, string_length - - cdp #1, c0, c0, #2 - -conversion_loop: - ldr data, d_in, +#2, post, ! - - ; low byte - ldil temp, #low[byte_mask] - ldih temp, #high[byte_mask] - sft temp, temp, #swp - bic copy, data, temp - - ldil temp, upper_border - cmp copy, temp - bge skip_low_byte - ldil temp, lower_border - cmp copy, temp - ble skip_low_byte - - ldil temp, distance - sub copy, copy, temp - -skip_low_byte: - str copy, sp, +#2, post, ! ; push - - ; high byte - ldil temp, #low[byte_mask] - ldih temp, #high[byte_mask] - bic copy, data, temp - sft copy, copy, #swp - - ldil temp, upper_border - cmp copy, temp - bge skip_high_byte - ldil temp, lower_border - cmp copy, temp - ble skip_high_byte - - ldil temp, distance - sub copy, copy, temp - -skip_high_byte: - sft copy, copy, #swp - ldr data, sp, -#2, pre, ! ; pop - orr data, data, copy - - str data, d_out, +#2, post, ! - - decs cnt, cnt, #1 - bne conversion_loop - -end: b end - - -; Memory data area -; ------------------------------------------------------------------------------------------------- -string_input: .stringz "To boldly go, where no man has gone before..." -string_output: .space #23 - -.space #32 -stack_begin: .dw #0 Index: trunk/core/rtl/ALU.vhd =================================================================== --- trunk/core/rtl/ALU.vhd (revision 17) +++ trunk/core/rtl/ALU.vhd (revision 18) @@ -4,7 +4,7 @@ -- # The main data processing is done here. Also the CP # -- # interface emerges from this unit. # -- # **************************************************** # --- # Last modified: 13.05.2013 # +-- # Last modified: 02.06.2013 # -- # **************************************************** # -- # by Stephan Nolting 4788, Hanover, Germany # -- ######################################################## @@ -367,7 +367,7 @@ if (RST_I = '1') then MAC_BUF <= (others => '0'); elsif (CE_I = '1') then - if (EX_CTRL_BUS_I(ctrl_load_mac_c) = '1') and (EX_CTRL_BUS_I(ctrl_en_c) = '1') then -- load mac buffer + if (EX_CTRL_BUS_I(ctrl_load_mac_c) = '1') and (EX_CTRL_BUS_I(ctrl_en_c) = '1') and (build_mac_c = true) then -- load mac buffer MAC_BUF <= OP_C_I; else MAC_BUF <= (others => '0'); @@ -417,9 +417,9 @@ CP_OP_O <= EX_CTRL_BUS_I(ctrl_cp_trans_c); -- data transfer / cp operation CP_DAT_O <= OP_A_INT; -- data output CP_RW_O <= EX_CTRL_BUS_I(ctrl_cp_wr_c); -- read/write transfer - CP_CMD_O(cp_op_a_msb_c downto cp_op_a_lsb_c) <= EX_CTRL_BUS_I(ctrl_cp_rd_2_c downto ctrl_cp_rd_0_c); -- cp destination / op A reg - CP_CMD_O(cp_op_b_msb_c downto cp_op_b_lsb_c) <= EX_CTRL_BUS_I(ctrl_cp_ra_2_c downto ctrl_cp_ra_0_c); -- cp op B reg - CP_CMD_O(cp_cmd_msb_c downto cp_cmd_lsb_c) <= EX_CTRL_BUS_I(ctrl_cp_cmd_2_c downto ctrl_cp_cmd_0_c); -- cp command + CP_CMD_O(cp_op_a_msb_c downto cp_op_a_lsb_c) <= EX_CTRL_BUS_I(ctrl_cp_rd_2_c downto ctrl_cp_rd_0_c) when (EX_CTRL_BUS_I(ctrl_cp_acc_c) = '1') else (others => '0'); -- cp destination / op A reg + CP_CMD_O(cp_op_b_msb_c downto cp_op_b_lsb_c) <= EX_CTRL_BUS_I(ctrl_cp_ra_2_c downto ctrl_cp_ra_0_c) when (EX_CTRL_BUS_I(ctrl_cp_acc_c) = '1') else (others => '0'); -- cp op B reg + CP_CMD_O(cp_cmd_msb_c downto cp_cmd_lsb_c) <= EX_CTRL_BUS_I(ctrl_cp_cmd_2_c downto ctrl_cp_cmd_0_c) when (EX_CTRL_BUS_I(ctrl_cp_acc_c) = '1') else (others => '0'); -- cp command -- Data Output -- MSR_DATA_O <= OP_B_INT; -- MSR write data
/trunk/core/rtl/ATLAS_PROCESSOR.vhd
6,7 → 6,7
-- # compatible bus unit incorporating a cache and a #
-- # memory management unit, implemented as system CP. #
-- # **************************************************** #
-- # Last modified: 09.03.2013 #
-- # Last modified: 06.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
39,6 → 39,7
-- ###############################################################################################
 
CP_EN_O : out std_logic; -- access to cp0
CP_ICE_O : out std_logic; -- cp interface enable
CP_OP_O : out std_logic; -- data transfer/processing
CP_RW_O : out std_logic; -- read/write access
CP_CMD_O : out std_logic_vector(8 downto 0); -- register addresses / cmd
152,8 → 153,14
EXT_INT_1_I => SYS_IRQ -- internal interrupt
);
 
-- Coprocessor Data Read-Back --
-- Coprocessor Interface --
CP_EN_O <= USR_CP_EN;
CP_OP_O <= CP_OP;
CP_RW_O <= CP_RW;
CP_CMD_O <= CP_CMD;
CP_DAT_O <= CP_W_DATA;
CP_DATA_RB <= SYS_CP_DRB or CP_DAT_I;
CP_ICE_O <= not HALT;
 
 
 
/trunk/core/rtl/CTRL.vhd
4,7 → 4,7
-- # Main control system, generating control signals #
-- # for each pipeline stage. #
-- # **************************************************** #
-- # Last modified: 14.03.2013 #
-- # Last modified: 06.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
111,7 → 111,7
MULTI_CYC_FF <= MULTI_CYC_REQ_I;
if (VALID_BRANCH_I = '1') then
DIS_CYCLE_FF <= '1'; -- one additional cycle for branches and system / ext interrupts
elsif (DIS_CYCLE_FF = '1') then
elsif (DIS_CYCLE_FF = '1') and (MULTI_CYC_REQ_I = '0') then -- hold when multi-cycle op required
DIS_CYCLE_FF <= '0';
end if;
end if;
/trunk/core/rtl/ATLAS_pkg.vhd
4,7 → 4,7
-- # All architecture configurations, options, signal #
-- # definitions and components are listed here. #
-- # **************************************************** #
-- # Last modified: 27.05.2013 #
-- # Last modified: 03.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
18,8 → 18,9
-- Architecture Configuration -------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant big_endian_c : boolean := false; -- use little/big endian memory system
constant cp0_present_c : boolean := false; -- coprocessor 0 (usr cp) present?
constant cp0_present_c : boolean := true; -- coprocessor 0 (usr cp) present?
constant cp1_present_c : boolean := true; -- coprocessor 1 (sys cp) present?
constant cp1_protect_c : boolean := true; -- coprocessor 1 only accessible in sys mode
constant build_mul_c : boolean := true; -- build a dedicated MUL unit
constant build_mac_c : boolean := false; -- build a dedicated MAC unit
constant ldil_sign_ext_c : boolean := true; -- use sign extension when loading low byte
/trunk/core/rtl/BUS_INTERFACE.vhd
6,7 → 6,7
-- # instruction cache. The system is capable of #
-- # generating a true 32-bit wide address for the NoC. #
-- # **************************************************** #
-- # Last modified: 03.04.2013 #
-- # Last modified: 06.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
103,6 → 103,8
signal CACHE_RW : std_logic; -- read/write (up/download, d-access)
signal MEM_REQ_FF : std_logic; -- processor requires d-mem access
signal MEM_REQ_FF_FF : std_logic; -- processor requires d-mem access, signal buffer
signal MEM_RW_FF : std_logic; -- processor requires write access
signal MEM_RW_FF_FF : std_logic; -- processor requires write, signal buffer
signal INST_EN_FF : std_logic; -- instruction reg enable ff
signal I_UPDATE : std_logic; -- instruction reg enable
signal D_ACC_DAT_BUF : std_logic_vector(data_width_c-1 downto 0); -- data write buffer
160,6 → 162,8
-- Processor --
MEM_REQ_FF <= '0';
MEM_REQ_FF_FF <= '0';
MEM_RW_FF <= '0';
MEM_RW_FF_FF <= '0';
D_ACC_DAT_BUF <= (others => '0');
INST_EN_FF <= '0';
 
200,7 → 204,9
D_ACC_BUF <= MEM_ADR_I;
D_ACC_DAT_BUF <= MEM_DAT_I;
MEM_REQ_FF <= MEM_REQ_I;
MEM_RW_FF <= MEM_RW_I;
MEM_REQ_FF_FF <= MEM_REQ_FF;
MEM_RW_FF_FF <= MEM_RW_FF;
INST_EN_FF <= INSTR_EN_I;
end if;
 
237,9 → 243,9
 
-- Control Arbiter (Async) -----------------------------------------------------------------------------
-- --------------------------------------------------------------------------------------------------------
ARBITER_ASYNC: process(ARB_STATE, RET_STATE, DATA_CNT, PAGE_PNT, WB_ACK_CNT, D_PAGE_SELECT, DA_RB_FF, I_PAGE_SELECT, TYPE_FLAG, NEW_ENTRY_PAGE, PAGE_BASE_ADR, BUS_DIR, TIMEOUT_CNT, SYNC_CNT, -- arbiter signals
SYS_MODE_I, MEM_REQ_FF, MEM_REQ_FF_FF, MEM_ADR_I, MEM_DAT_I, MEM_RW_I, INST_EN_FF, INSTR_ADR_I, D_ACC_DAT_BUF, FREEZE_FLAG, I_ACC_BUF, D_ACC_BUF, DIR_DAT_REQ, INSTR_EN_I, CLR_CACHE_I, FLUSH_CACHE_I, -- processor signals
CACHE_I_MISS, CACHE_D_MISS, CACHE_DR_DATA, CA_ADR_BUF, VALID_FLAG, DIRTY_FLAG, PAGE_BASE_ADR, D_PAGE_BUF, I_PAGE_BUF, CACHE_SYNC, -- cache signals
ARBITER_ASYNC: process(ARB_STATE, RET_STATE, DATA_CNT, PAGE_PNT, WB_ACK_CNT, D_PAGE_SELECT, DA_RB_FF, I_PAGE_SELECT, TYPE_FLAG, NEW_ENTRY_PAGE, BUS_DIR, TIMEOUT_CNT, SYNC_CNT, -- arbiter signals
SYS_MODE_I, MEM_REQ_FF, MEM_REQ_FF_FF, MEM_ADR_I, MEM_DAT_I, MEM_RW_I, MEM_RW_FF_FF, INST_EN_FF, INSTR_ADR_I, D_ACC_DAT_BUF, FREEZE_FLAG, I_ACC_BUF, D_ACC_BUF, DIR_DAT_REQ, INSTR_EN_I, CLR_CACHE_I, FLUSH_CACHE_I, -- processor signals
CACHE_I_MISS, CACHE_D_MISS, CACHE_DR_DATA, CA_ADR_BUF, VALID_FLAG, DIRTY_FLAG, PAGE_BASE_ADR, D_PAGE_BUF, I_PAGE_BUF, CACHE_SYNC, DIRTY_FLAG_NXT, VALID_FLAG_NXT, -- cache signals
WB_ADR_BUF, WB_CYC_BUF, WB_STB_BUF, WB_ACK_I, WB_ACK_BUF, WB_DI_BUF, WB_DO_BUF) -- bus signals
variable modified_page_v : std_logic; -- assigned page is valid and dirty
begin
368,9 → 374,14
CA_ADR_BUF_NXT(log2_cache_pages_c+log2_cache_page_size_c-1 downto log2_cache_page_size_c) <= PAGE_PNT;
 
-- Prepare transfer operation --
ARB_STATE_NXT <= TRANSFER_PAGE;
RET_STATE_NXT <= ANALYSE;
WB_CYC_BUF_NXT <= '1';
if (PAGE_PNT /= I_PAGE_BUF) and (PAGE_PNT /= D_PAGE_BUF) then
ARB_STATE_NXT <= TRANSFER_PAGE;
RET_STATE_NXT <= ANALYSE;
WB_CYC_BUF_NXT <= '1';
WB_STB_BUF_NXT <= '1';
else
PAGE_PNT_NXT <= NEW_ENTRY_PAGE;
end if;
 
-- Upload modified page? --
if (modified_page_v = '1') then
380,7 → 391,6
WB_ADR_BUF_NXT(bus_adr_width_c-1 downto log2_cache_page_size_c+1) <= PAGE_BASE_ADR(to_integer(unsigned(PAGE_PNT)));
else -- download new page
BUS_DIR_NXT <= DOWN; -- download new page
WB_STB_BUF_NXT <= '1';
if (TYPE_FLAG = '1') then -- new instruction page
WB_ADR_BUF_NXT <= I_ACC_BUF;
WB_ADR_BUF_NXT(log2_cache_page_size_c downto 0) <= (others => '0');
546,6 → 556,10
CACHE_EN <= '1';
CACHE_D_ADR <= D_PAGE_BUF & D_ACC_BUF(log2_cache_page_size_c downto align_lsb_c);
 
-- WB Bus --
WB_CYC_BUF_NXT <= '0';
WB_STB_BUF_NXT <= '0';
 
-- Arbiter --
ARB_STATE_NXT <= RE_SYNC_2;
 
557,7 → 571,7
CACHE_I_ADR <= I_PAGE_BUF & I_ACC_BUF(log2_cache_page_size_c downto align_lsb_c);
 
-- D-Write Access --
CACHE_RW <= '1';
CACHE_RW <= MEM_RW_FF_FF;
CACHE_EN <= MEM_REQ_FF_FF;
CACHE_D_ADR <= D_PAGE_BUF & D_ACC_BUF(log2_cache_page_size_c downto align_lsb_c);
CACHE_DW_DATA <= D_ACC_DAT_BUF;
/trunk/core/rtl/OP_DEC.vhd
3,7 → 3,7
-- # **************************************************** #
-- # OpCode decoding unit. #
-- # **************************************************** #
-- # Last modified: 27.05.2013 #
-- # Last modified: 03.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
22,16 → 22,16
-- ###############################################################################################
 
INSTR_I : in std_logic_vector(data_width_c-1 downto 0); -- instruction input
T_FLAG_I : in std_logic; -- T-Flag input
M_FLAG_I : in std_logic; -- Mode flag input
MULTI_CYC_I : in std_logic; -- multi-cycle indicator
CP_PTC_I : in std_logic; -- user coprocessor protection
T_FLAG_I : in std_logic; -- T-Flag input
M_FLAG_I : in std_logic; -- Mode flag input
MULTI_CYC_I : in std_logic; -- multi-cycle indicator
CP_PTC_I : in std_logic; -- user coprocessor protection
 
-- ###############################################################################################
-- ## Decoder Interface Output ##
-- ###############################################################################################
 
MULTI_CYC_REQ_O : out std_logic; -- multi-cycle reqest
MULTI_CYC_REQ_O : out std_logic; -- multi-cycle reqest
CTRL_O : out std_logic_vector(ctrl_width_c-1 downto 0); -- decoder ctrl lines
IMM_O : out std_logic_vector(data_width_c-1 downto 0) -- immediate
);
395,8 → 395,8
CTRL_O(ctrl_rd_wb_c) <= not INSTR_INT(3); -- allow write back
end if;
if (M_FLAG_I = user_mode_c) then -- access violation?
if (((CP_PTC_I = '1') or (cp0_present_c = false)) and (INSTR_INT(10) = '0')) or -- usr cp access
((cp1_present_c = false) and (INSTR_INT(10) = '1')) then -- sys cp access
if (((CP_PTC_I = '1') or (cp0_present_c = false)) and (INSTR_INT(10) = '0')) or -- usr cp access
(((cp1_protect_c = false) or (cp1_present_c = false)) and (INSTR_INT(10) = '1')) then -- sys cp access
CTRL_O(ctrl_cmd_err_c) <= '1'; -- access violation/undefined instruction - cmd_err trap
end if;
end if;
/trunk/core/rtl/MMU.vhd
6,7 → 6,7
-- # Base registers generate the most significant 16-bit #
-- # of a true 32-bit addressable system. #
-- # **************************************************** #
-- # Last modified: 16.03.2013 #
-- # Last modified: 05.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
75,11 → 75,12
signal MMU_D_PAGE_LINK : std_logic_vector(15 downto 0); -- r7: data link page
 
-- Control register bits --
constant mmu_ctrl_cflush_c : natural := 0; -- w: flush cache
constant mmu_ctrl_cclr_c : natural := 1; -- w: clear cache
constant mmu_ctrl_da_c : natural := 2; -- r/w: direct access
constant mmu_ctrl_csync_c : natural := 3; -- r: cache is sync
constant mmu_ctrl_bus_err_c : natural := 4; -- r/w bus error interrupt/ack
constant mmu_ctrl_cflush_c : natural := 0; -- w: flush cache
constant mmu_ctrl_cclr_c : natural := 1; -- w: clear cache
constant mmu_ctrl_da_c : natural := 2; -- r/w: direct access
constant mmu_ctrl_csync_c : natural := 3; -- r: cache is sync
constant mmu_ctrl_bus_err_c : natural := 4; -- r/w: bus error interrupt/ack
constant mmu_ctrl_ccx_en_c : natural := 5; -- r/w: enable automatic page switch on irq
 
-- Commands --
-- applied on any register
106,8 → 107,8
MMU_USR_D_PAGE <= (others => '0');
MMU_I_PAGE_LINK <= (others => '0');
MMU_D_PAGE_LINK <= (others => '0');
MEM_IP_ADR_O <= (others => '0');
MEM_DP_ADR_O <= (others => '0');
MEM_IP_ADR_O <= BOOT_PAGE_G;
MEM_DP_ADR_O <= BOOT_PAGE_G;
CP_DAT_O <= (others => '0');
elsif (HALT_I = '0') then
 
118,7 → 119,7
 
-- Exception Processing ----------------------------------------------------------
-- ----------------------------------------------------------------------------------
if (INT_EXE_I = '1') then
if (INT_EXE_I = '1') and (MMU_CTRL(mmu_ctrl_ccx_en_c) = '1') then
MMU_SYS_I_PAGE <= (others => '0'); -- i-page zero
MMU_SYS_D_PAGE <= (others => '0'); -- d-page zero
MEM_IP_ADR_O <= (others => '0'); -- i-page zero
/trunk/core/doc/Atlas Processor Datasheet.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/trunk/core/sim/isim_wave/MICRO_WAVE.wcfg File deleted
/trunk/core/sim/isim_wave/PROCESSOR_WAVE.wcfg File deleted
/trunk/core/sim/testbench_processor_system/XISIM_PROCESSOR_WAVE.wcfg
0,0 → 1,2491
<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="N:/N/Atlas Processor/core/syn/syn_xilinx/processor_tb_isim_beh.wdb" id="1" type="auto">
<top_modules>
<top_module name="atlas_core_package" />
<top_module name="numeric_std" />
<top_module name="processor_tb" />
<top_module name="std_logic_1164" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="92" />
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Global Control</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/boot_address_g" type="array" db_ref_id="1">
<obj_property name="ElementShortName">boot_address_g[31:0]</obj_property>
<obj_property name="ObjectShortName">boot_address_g[31:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/halt" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">halt</obj_property>
<obj_property name="ObjectShortName">halt</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/irq_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">irq_i</obj_property>
<obj_property name="ObjectShortName">irq_i</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">PC</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/System_Reg/int_req" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">int_req</obj_property>
<obj_property name="ObjectShortName">int_req</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/System_Reg/int_vector" type="array" db_ref_id="1">
<obj_property name="ElementShortName">int_vector[15:0]</obj_property>
<obj_property name="ObjectShortName">int_vector[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/System_Reg/sys_reg_pc" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sys_reg_pc[15:0]</obj_property>
<obj_property name="ObjectShortName">sys_reg_pc[15:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ff0000</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Opcode_Decoder/instr_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">instr_i[15:0]</obj_property>
<obj_property name="ObjectShortName">instr_i[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Control Lines</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/of_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">of_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">of_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/ex_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ex_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">ex_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/ma_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ma_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">ma_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/wb_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wb_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">wb_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/of_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">of_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/ex_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">ex_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/ma_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">ma_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/wb_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">wb_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Conflicts</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/multi_cyc_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">multi_cyc_o</obj_property>
<obj_property name="ObjectShortName">multi_cyc_o</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/valid_branch_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">valid_branch_i</obj_property>
<obj_property name="ObjectShortName">valid_branch_i</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/dis_cycle" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dis_cycle</obj_property>
<obj_property name="ObjectShortName">dis_cycle</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/exc_taken_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">exc_taken_i</obj_property>
<obj_property name="ObjectShortName">exc_taken_i</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/dis_if" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dis_if</obj_property>
<obj_property name="ObjectShortName">dis_if</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Control_Spine/mem_dependecy" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_dependecy</obj_property>
<obj_property name="ObjectShortName">mem_dependecy</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Machine Status</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/System_Reg/sys_reg_msr[15]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[15]</obj_property>
<obj_property name="ObjectShortName">sys_reg_msr[15]</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ff0000</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/System_Reg/sys_reg_msr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sys_reg_msr[15:0]</obj_property>
<obj_property name="ObjectShortName">sys_reg_msr[15:0]</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffff00</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Operand Fetch</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Operand_Fetch/wb_data_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wb_data_i[15:0]</obj_property>
<obj_property name="ObjectShortName">wb_data_i[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem" type="array" db_ref_id="1">
<obj_property name="ElementShortName">reg_file_mem[15:0]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[15]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[15]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[15]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[14]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[14]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[14]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[13]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[13]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[13]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[12]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[12]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[12]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
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<obj_property name="ObjectShortName">wb_ack_i</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[238]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[238]</obj_property>
<obj_property name="ObjectShortName">mem_file[238]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[239]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[239]</obj_property>
<obj_property name="ObjectShortName">mem_file[239]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[240]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[240]</obj_property>
<obj_property name="ObjectShortName">mem_file[240]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[241]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[241]</obj_property>
<obj_property name="ObjectShortName">mem_file[241]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[242]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[242]</obj_property>
<obj_property name="ObjectShortName">mem_file[242]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[243]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[243]</obj_property>
<obj_property name="ObjectShortName">mem_file[243]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[244]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[244]</obj_property>
<obj_property name="ObjectShortName">mem_file[244]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[245]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[245]</obj_property>
<obj_property name="ObjectShortName">mem_file[245]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[246]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[246]</obj_property>
<obj_property name="ObjectShortName">mem_file[246]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[247]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[247]</obj_property>
<obj_property name="ObjectShortName">mem_file[247]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[248]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[248]</obj_property>
<obj_property name="ObjectShortName">mem_file[248]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[249]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[249]</obj_property>
<obj_property name="ObjectShortName">mem_file[249]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[250]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[250]</obj_property>
<obj_property name="ObjectShortName">mem_file[250]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[251]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[251]</obj_property>
<obj_property name="ObjectShortName">mem_file[251]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[252]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[252]</obj_property>
<obj_property name="ObjectShortName">mem_file[252]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[253]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[253]</obj_property>
<obj_property name="ObjectShortName">mem_file[253]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[254]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[254]</obj_property>
<obj_property name="ObjectShortName">mem_file[254]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/processor_tb/test_memory/mem_file[255]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[255]</obj_property>
<obj_property name="ObjectShortName">mem_file[255]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
</wvobject>
</wave_config>
/trunk/core/sim/testbench_processor_system/processor_tb.vhd
26,6 → 26,7
 
-- Coprocesor Interface --
CP_EN_O : out std_logic; -- access to cp0
CP_ICE_O : out std_logic; -- cp interface enable
CP_OP_O : out std_logic; -- data transfer/processing
CP_RW_O : out std_logic; -- read/write access
CP_CMD_O : out std_logic_vector(8 downto 0); -- register addresses / cmd
121,7 → 122,7
-- Configuration --
UC_AREA_BEGIN_G => x"FF000000", -- begin of uncached area
UC_AREA_END_G => x"FFFFFFFF", -- end of uncached area
BOOT_ADDRESS_G => x"00000000" -- boot address
BOOT_ADDRESS_G => x"FFFF0000" -- boot address, page 0xFFFF just for testing
)
port map (
-- Global Control --
130,6 → 131,7
 
-- Coprocesor Interface --
CP_EN_O => open, -- access to cp0
CP_ICE_O => open, -- cp interface enable
CP_OP_O => open, -- data transfer/processing
CP_RW_O => open, -- read/write access
CP_CMD_O => open, -- register addresses / cmd
/trunk/core/sim/testbench_processor_system/TEST_MEM.vhd
3,7 → 3,7
-- # **************************************************** #
-- # Wishbone-compatible demo memory. #
-- # **************************************************** #
-- # Last modified: 01.04.2013 #
-- # Last modified: 02.06.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
53,7 → 53,7
------------------------------------------------------
signal MEM_FILE : MEM_FILE_TYPE :=
(
-- This is where you have to place the "init.vhd" file content --
others => x"0000" -- This is where you have to place the "init.vhd" file content --
);
------------------------------------------------------
 
66,12 → 66,11
if rising_edge(WB_CLK_I) then
 
--- Data Read/Write ---
if (WB_STB_I = '1') then
if (WB_STB_I = '1') and (WB_CYC_I = '1') then
if (WB_WE_I = '1') then
MEM_FILE(to_integer(unsigned(WB_ADR_I(LOG2_MEM_SIZE downto 1)))) <= WB_DATA_I;
else
WB_DATA_INT <= MEM_FILE(to_integer(unsigned(WB_ADR_I(LOG2_MEM_SIZE downto 1))));
end if;
WB_DATA_INT <= MEM_FILE(to_integer(unsigned(WB_ADR_I(LOG2_MEM_SIZE downto 1))));
end if;
 
--- ACK Control ---
/trunk/core/sim/testbench_atlas_micro/XISIM_MICRO_WAVE.wcfg
0,0 → 1,5548
<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="N:/N/Atlas Processor/core/syn/syn_xilinx/micro_tb_isim_beh1.wdb" id="1" type="auto">
<top_modules>
<top_module name="atlas_core_package" />
<top_module name="micro_tb" />
<top_module name="numeric_std" />
<top_module name="std_logic_1164" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="62" />
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Global Control</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/boot_address_g" type="array" db_ref_id="1">
<obj_property name="ElementShortName">boot_address_g[15:0]</obj_property>
<obj_property name="ObjectShortName">boot_address_g[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/clk_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/rst_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst_i</obj_property>
<obj_property name="ObjectShortName">rst_i</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/irq0_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">irq0_i</obj_property>
<obj_property name="ObjectShortName">irq0_i</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/irq1_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">irq1_i</obj_property>
<obj_property name="ObjectShortName">irq1_i</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">PC</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/System_Reg/int_req" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">int_req</obj_property>
<obj_property name="ObjectShortName">int_req</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/System_Reg/int_vector" type="array" db_ref_id="1">
<obj_property name="ElementShortName">int_vector[15:0]</obj_property>
<obj_property name="ObjectShortName">int_vector[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/System_Reg/sys_reg_pc" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sys_reg_pc[15:0]</obj_property>
<obj_property name="ObjectShortName">sys_reg_pc[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ff0000</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Opcode_Decoder/instr_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">instr_i[15:0]</obj_property>
<obj_property name="ObjectShortName">instr_i[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Control Lines</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/of_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">of_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">of_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/ex_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ex_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">ex_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/ma_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">ma_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">ma_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/wb_ctrl_bus_o" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wb_ctrl_bus_o[55:0]</obj_property>
<obj_property name="ObjectShortName">wb_ctrl_bus_o[55:0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/of_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">of_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/ex_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">ex_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/ma_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">ma_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/wb_ctrl_bus_o[0]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[0]</obj_property>
<obj_property name="ObjectShortName">wb_ctrl_bus_o[0]</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Conflicts</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/multi_cyc_o" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">multi_cyc_o</obj_property>
<obj_property name="ObjectShortName">multi_cyc_o</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/valid_branch_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">valid_branch_i</obj_property>
<obj_property name="ObjectShortName">valid_branch_i</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/dis_cycle" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dis_cycle</obj_property>
<obj_property name="ObjectShortName">dis_cycle</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/exc_taken_i" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">exc_taken_i</obj_property>
<obj_property name="ObjectShortName">exc_taken_i</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/dis_if" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">dis_if</obj_property>
<obj_property name="ObjectShortName">dis_if</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Control_Spine/mem_dependecy" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_dependecy</obj_property>
<obj_property name="ObjectShortName">mem_dependecy</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Machine Status</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/System_Reg/sys_reg_msr[15]" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">[15]</obj_property>
<obj_property name="ObjectShortName">sys_reg_msr[15]</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ff0000</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/System_Reg/sys_reg_msr" type="array" db_ref_id="1">
<obj_property name="ElementShortName">sys_reg_msr[15:0]</obj_property>
<obj_property name="ObjectShortName">sys_reg_msr[15:0]</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffff00</obj_property>
</wvobject>
<wvobject fp_name="divider11" type="divider">
<obj_property name="label">Operand Fetch</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">#000080</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/wb_data_i" type="array" db_ref_id="1">
<obj_property name="ElementShortName">wb_data_i[15:0]</obj_property>
<obj_property name="ObjectShortName">wb_data_i[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem" type="array" db_ref_id="1">
<obj_property name="ElementShortName">reg_file_mem[15:0]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[15:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[15]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[15]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[15]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[14]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[14]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[14]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[13]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[13]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[13]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[12]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[12]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[12]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[11]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[11]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[11]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[10]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[10]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[10]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[9]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[9]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[9]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[8]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[8]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[8]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
<obj_property name="CustomSignalColor">#ffa500</obj_property>
</wvobject>
<wvobject fp_name="/micro_tb/the_core_of_the_problem/processor_core/Operand_Fetch/reg_file_mem[7]" type="array" db_ref_id="1">
<obj_property name="ElementShortName">[7]</obj_property>
<obj_property name="ObjectShortName">reg_file_mem[7]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
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