URL
https://opencores.org/ocsvn/bustap-jtag/bustap-jtag/trunk
Subversion Repositories bustap-jtag
Compare Revisions
- This comparison shows the changes necessary to convert path
/bustap-jtag/trunk/par
- from Rev 2 to Rev 5
- ↔ Reverse comparison
Rev 2 → Rev 5
/altera/up_monitor.qsf
25,7 → 25,7
|
set_global_assignment -name DEVICE Auto |
set_global_assignment -name FAMILY "Cyclone III" |
set_global_assignment -name TOP_LEVEL_ENTITY up_monitor |
set_global_assignment -name TOP_LEVEL_ENTITY up_monitor_wrapper |
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.1 |
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:33:38 JUNE 01, 2009" |
set_global_assignment -name LAST_QUARTUS_VERSION "10.1 SP1" |
32,8 → 32,8
set_global_assignment -name ENABLE_ADVANCED_IO_TIMING OFF |
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output |
|
set_global_assignment -name VHDL_FILE ../../rtl/up_monitor.vhd |
#set_global_assignment -name VERILOG_FILE ../../rtl/up_monitor.v |
set_global_assignment -name VERILOG_FILE ../../rtl/up_monitor_wrapper.v |
set_global_assignment -name VERILOG_FILE ../../rtl/up_monitor.v |
set_global_assignment -name VERILOG_FILE ../../rtl/altera/virtual_jtag_addr_mask.v |
set_global_assignment -name VERILOG_FILE ../../rtl/altera/virtual_jtag_adda_fifo.v |
set_global_assignment -name VERILOG_FILE ../../rtl/altera/virtual_jtag_adda_trig.v |
42,4 → 42,4
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top |
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top |
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top |
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top |