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Subversion Repositories c0or1k

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  • This comparison shows the changes necessary to convert path 
    /c0or1k/trunk/conts/posix/mm0/mm/arch
    from Rev 6 to Rev 7
    ↔ Reverse comparison
  •

Rev 6 → Rev 7

/or1k/crt0.S.ARM
0,0 → 1,94
/*
* Australian Public Licence B (OZPLB)
*
* Version 1-0
*
* Copyright (c) 2004 National ICT Australia
*
* All rights reserved.
*
* Developed by: Embedded, Real-time and Operating Systems Program (ERTOS)
* National ICT Australia
* http://www.ertos.nicta.com.au
*
* Permission is granted by National ICT Australia, free of charge, to
* any person obtaining a copy of this software and any associated
* documentation files (the "Software") to deal with the Software without
* restriction, including (without limitation) the rights to use, copy,
* modify, adapt, merge, publish, distribute, communicate to the public,
* sublicense, and/or sell, lend or rent out copies of the Software, and
* to permit persons to whom the Software is furnished to do so, subject
* to the following conditions:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimers.
*
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimers in the documentation and/or other materials provided
* with the distribution.
*
* * Neither the name of National ICT Australia, nor the names of its
* contributors, may be used to endorse or promote products derived
* from this Software without specific prior written permission.
*
* EXCEPT AS EXPRESSLY STATED IN THIS LICENCE AND TO THE FULL EXTENT
* PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS-IS", AND
* NATIONAL ICT AUSTRALIA AND ITS CONTRIBUTORS MAKE NO REPRESENTATIONS,
* WARRANTIES OR CONDITIONS OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO ANY REPRESENTATIONS, WARRANTIES OR CONDITIONS
* REGARDING THE CONTENTS OR ACCURACY OF THE SOFTWARE, OR OF TITLE,
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT,
* THE ABSENCE OF LATENT OR OTHER DEFECTS, OR THE PRESENCE OR ABSENCE OF
* ERRORS, WHETHER OR NOT DISCOVERABLE.
*
* TO THE FULL EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL
* NATIONAL ICT AUSTRALIA OR ITS CONTRIBUTORS BE LIABLE ON ANY LEGAL
* THEORY (INCLUDING, WITHOUT LIMITATION, IN AN ACTION OF CONTRACT,
* NEGLIGENCE OR OTHERWISE) FOR ANY CLAIM, LOSS, DAMAGES OR OTHER
* LIABILITY, INCLUDING (WITHOUT LIMITATION) LOSS OF PRODUCTION OR
* OPERATION TIME, LOSS, DAMAGE OR CORRUPTION OF DATA OR RECORDS; OR LOSS
* OF ANTICIPATED SAVINGS, OPPORTUNITY, REVENUE, PROFIT OR GOODWILL, OR
* OTHER ECONOMIC LOSS; OR ANY SPECIAL, INCIDENTAL, INDIRECT,
* CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES, ARISING OUT OF OR IN
* CONNECTION WITH THIS LICENCE, THE SOFTWARE OR THE USE OF OR OTHER
* DEALINGS WITH THE SOFTWARE, EVEN IF NATIONAL ICT AUSTRALIA OR ITS
* CONTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH CLAIM, LOSS,
* DAMAGES OR OTHER LIABILITY.
*
* If applicable legislation implies representations, warranties, or
* conditions, or imposes obligations or liability on National ICT
* Australia or one of its contributors in respect of the Software that
* cannot be wholly or partly excluded, restricted or modified, the
* liability of National ICT Australia or the contributor is limited, to
* the full extent permitted by the applicable legislation, at its
* option, to:
* a. in the case of goods, any one or more of the following:
* i. the replacement of the goods or the supply of equivalent goods;
* ii. the repair of the goods;
* iii. the payment of the cost of replacing the goods or of acquiring
* equivalent goods;
* iv. the payment of the cost of having the goods repaired; or
* b. in the case of services:
* i. the supplying of the services again; or
* ii. the payment of the cost of having the services supplied again.
*
* The construction, validity and performance of this licence is governed
* by the laws in force in New South Wales, Australia.
*/
 
#ifdef __thumb__
#define bl blx
#endif
 
.section .text.head
.code 32
.global _start;
.align;
_start:
ldr sp, =__stack
bl platform_init
bl __container_init
1:
b 1b
 
or1k/crt0.S.ARM Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: or1k/debug.c =================================================================== --- or1k/debug.c (nonexistent) +++ or1k/debug.c (revision 7) @@ -0,0 +1,11 @@ +/* + * Perfmon globals + */ + + +#if defined(CONFIG_DEBUG_PERFMON_USER) + +u64 perfmon_total_cycles; +u64 current_cycles; + +#endif Index: or1k/v5/mm.c =================================================================== --- or1k/v5/mm.c (nonexistent) +++ or1k/v5/mm.c (revision 7) @@ -0,0 +1,65 @@ +/* + * ARMv5 specific functions + * + * Copyright (C) 2008 - 2010 B Labs Ltd. + */ +#include +#include +#include +#include __INC_ARCH(mm.h) + +/* Extracts generic protection flags from architecture-specific pte */ +unsigned int vm_prot_flags(pte_t pte) +{ + unsigned int vm_prot_flags = 0; + unsigned int rw_flags = __MAP_USR_RW & PTE_PROT_MASK; + unsigned int ro_flags = __MAP_USR_RO & PTE_PROT_MASK; + + /* Clear non-protection flags */ + pte &= PTE_PROT_MASK; + + if (pte == ro_flags) + vm_prot_flags = VM_READ | VM_EXEC; + else if (pte == rw_flags) + vm_prot_flags = VM_READ | VM_WRITE | VM_EXEC; + else + vm_prot_flags = VM_NONE; + + return vm_prot_flags; +} + +/* + * PTE STATES: + * PTE type field: 00 (Translation fault) + * PTE type field correct, AP bits: None (Read or Write access fault) + * PTE type field correct, AP bits: RO (Write access fault) + */ + +/* + * Extracts arch-specific fault parameters + * and puts them into generic format + */ +void set_generic_fault_params(struct fault_data *fault) +{ + unsigned int prot_flags = vm_prot_flags(fault->kdata->pte); + + fault->reason = 0; + fault->pte_flags = prot_flags; + + if (is_prefetch_abort(fault->kdata->fsr)) { + fault->reason |= VM_READ; + fault->address = fault->kdata->faulty_pc; + } else { + fault->address = fault->kdata->far; + + /* Always assume read fault first */ + if (prot_flags & VM_NONE) + fault->reason |= VM_READ; + else if (prot_flags & VM_READ) + fault->reason |= VM_WRITE; + else + BUG(); + } + arch_print_fault_params(fault); +} + Index: or1k/mm.c =================================================================== --- or1k/mm.c (nonexistent) +++ or1k/mm.c (revision 7) @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2007 Bahadir Balban + */ +#include +#include +#include +#include __INC_ARCH(mm.h) + +#if defined(DEBUG_FAULT_HANDLING) +void arch_print_fault_params(struct fault_data *fault) +{ + printf("%s: Handling %s fault (%s abort) from %d. fault @ 0x%x, generic pte flags: 0x%x\n", + __TASKNAME__, (fault->reason & VM_READ) ? "read" : + (fault->reason & VM_WRITE) ? "write" : "exec", + is_prefetch_abort(fault->kdata->fsr) ? "prefetch" : "data", + fault->task->tid, fault->address, fault->pte_flags); +} +#else +void arch_print_fault_params(struct fault_data *fault) { } +#endif + + +void fault_handle_error(struct fault_data *fault) +{ + struct task_ids ids; + + /* Suspend the task */ + ids.tid = fault->task->tid; + BUG_ON(l4_thread_control(THREAD_SUSPEND, &ids) < 0); + + BUG(); +} + Index: or1k/v6/mm.c =================================================================== --- or1k/v6/mm.c (nonexistent) +++ or1k/v6/mm.c (revision 7) @@ -0,0 +1,65 @@ +/* + * ARMv5 specific functions + * + * Copyright (C) 2008 - 2010 B Labs Ltd. + */ +#include +#include +#include +#include __INC_ARCH(mm.h) + +/* Extracts generic protection flags from architecture-specific pte */ +unsigned int vm_prot_flags(pte_t pte) +{ + unsigned int vm_prot_flags = 0; + unsigned int rw_flags = __MAP_USR_RW & PTE_PROT_MASK; + unsigned int ro_flags = __MAP_USR_RO & PTE_PROT_MASK; + + /* Clear non-protection flags */ + pte &= PTE_PROT_MASK; + + if (pte == ro_flags) + vm_prot_flags = VM_READ | VM_EXEC; + else if (pte == rw_flags) + vm_prot_flags = VM_READ | VM_WRITE | VM_EXEC; + else + vm_prot_flags = VM_NONE; + + return vm_prot_flags; +} + +/* + * PTE STATES: + * PTE type field: 00 (Translation fault) + * PTE type field correct, AP bits: None (Read or Write access fault) + * PTE type field correct, AP bits: RO (Write access fault) + */ + +/* + * Extracts arch-specific fault parameters + * and puts them into generic format + */ +void set_generic_fault_params(struct fault_data *fault) +{ + unsigned int prot_flags = vm_prot_flags(fault->kdata->pte); + + fault->reason = 0; + fault->pte_flags = prot_flags; + + if (is_prefetch_abort(fault->kdata->fsr)) { + fault->reason |= VM_READ; + fault->address = fault->kdata->faulty_pc; + } else { + fault->address = fault->kdata->far; + + /* Always assume read fault first */ + if (prot_flags & VM_NONE) + fault->reason |= VM_READ; + else if (prot_flags & VM_READ) + fault->reason |= VM_WRITE; + else + BUG(); + } + arch_print_fault_params(fault); +} + Index: or1k/v7/mm.c =================================================================== --- or1k/v7/mm.c (nonexistent) +++ or1k/v7/mm.c (revision 7) @@ -0,0 +1,77 @@ +/* + * ARMv7 specific functions + * + * Copyright (C) 2008 - 2010 B Labs Ltd. + */ +#include +#include +#include +#include __INC_ARCH(mm.h) +#include INC_SUBARCH(mm.h) +#include INC_SUBARCH(exception.h) + +/* Get simplified access permissions */ +int pte_get_access_simple(pte_t pte) +{ + /* Place AP[2] and AP[1] in [1:0] positions and return */ + return (((pte >> PTE_AP2_BIT) & 1) << 1) + | ((pte >> PTE_AP1_BIT) & 1); +} + +int is_translation_fault(u32 fsr) +{ + return (fsr & FSR_FS_MASK) == ABORT_TRANSLATION_PAGE; +} + +unsigned int vm_prot_flags(pte_t pte, u32 fsr) +{ + unsigned int pte_prot_flags = 0; + + /* Translation fault means no permissions */ + if (is_translation_fault(fsr)) + return VM_NONE; + + /* Check simplified permission bits */ + switch (pte_get_access_simple(pte)) { + case AP_SIMPLE_USER_RW_KERN_RW: + pte_prot_flags |= VM_WRITE; + case AP_SIMPLE_USER_RO_KERN_RO: + pte_prot_flags |= VM_READ; + + /* Also, check exec never bit */ + if (!(pte & (1 << PTE_XN_BIT))) + pte_prot_flags |= VM_EXEC; + break; + case AP_SIMPLE_USER_NONE_KERN_RW: + case AP_SIMPLE_USER_NONE_KERN_RO: + default: + pte_prot_flags = VM_NONE; + break; + } + + return pte_prot_flags; +} + +void set_generic_fault_params(struct fault_data *fault) +{ + fault->pte_flags = vm_prot_flags(fault->kdata->pte, fault->kdata->fsr); + fault->reason = 0; + + /* + * Prefetch fault denotes exec fault. + */ + if (is_prefetch_abort(fault->kdata->fsr)) { + fault->reason |= VM_EXEC; + fault->address = fault->kdata->faulty_pc; + } else { + fault->address = fault->kdata->far; + + /* Write-not-read bit determines fault */ + if (fault->kdata->fsr & (1 << DFSR_WNR_BIT)) + fault->reason |= VM_WRITE; + else + fault->reason |= VM_READ; + } + arch_print_fault_params(fault); +} + Index: or1k =================================================================== --- or1k (nonexistent) +++ or1k (revision 7)
or1k Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ##

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