URL
https://opencores.org/ocsvn/core1990_interlaken/core1990_interlaken/trunk
Subversion Repositories core1990_interlaken
Compare Revisions
- This comparison shows the changes necessary to convert path
/core1990_interlaken/trunk/gateware/scripts
- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/simulation.tcl
3,15 → 3,33
set scriptdir [pwd] |
set proj_dir $scriptdir/../ |
|
#generate_target {Synthesis Simulation} [get_files $proj_dir/sources/ip_cores/clk_40MHz.xci -of_objects [get_filesets sources_1]] |
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#generate_target {Synthesis Simulation} [get_files $proj_dir/sources/ip_cores/Transceiver_10g_64b67b.xci -of_objects [get_filesets sources_1]] |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/Core1990_Test_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/crc-32_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/decoder_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/deframing_burst_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/deframing_meta_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/descrambler_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/encoder_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/framing_burst_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/framing_meta_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/interlaken_interface_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/interlaken_receiver_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/interlaken_transmitter_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/scrambler_tb.vhd |
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if {$arg1 eq {interface}} { |
close_sim -force -quiet |
update_compile_order -fileset sources_1 |
close_sim -force -quiet |
update_compile_order -fileset sources_1 |
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if {$arg1 eq {core1990}} { |
set_property top testbench_Interface_Test [get_filesets sim_1] |
set_property top_lib work [get_filesets sim_1] |
set_property top_arch tb_interlaken_interface [get_filesets sim_1] |
launch_xsim -simset sim_1 -mode behavioral |
open_wave_config {/home/nayibb/Desktop/report/Code/Core1990/projects/core1990_interlaken/testbench_Interface_Test_behav.wcfg} |
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} elseif {$arg1 eq {interface}} { |
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set_property top testbench_interlaken_interface [get_filesets sim_1] |
set_property top_lib work [get_filesets sim_1] |
set_property top_arch tb_interlaken_interface [get_filesets sim_1] |
19,8 → 37,7
puts "$arg1 it is, you've chosen wisely" |
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} elseif {$arg1 eq {decoder}} { |
close_sim -force -quiet |
update_compile_order -fileset sources_1 |
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set_property top testbench_decoder [get_filesets sim_1] |
set_property top_lib work [get_filesets sim_1] |
set_property top_arch tb_decoder [get_filesets sim_1] |