URL
https://opencores.org/ocsvn/core1990_interlaken/core1990_interlaken/trunk
Subversion Repositories core1990_interlaken
Compare Revisions
- This comparison shows the changes necessary to convert path
/core1990_interlaken/trunk/gateware
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/scripts/simulation.tcl
0,0 → 1,37
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proc simulate { arg1 } { |
set scriptdir [pwd] |
set proj_dir $scriptdir/../ |
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#generate_target {Synthesis Simulation} [get_files $proj_dir/sources/ip_cores/clk_40MHz.xci -of_objects [get_filesets sources_1]] |
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#generate_target {Synthesis Simulation} [get_files $proj_dir/sources/ip_cores/Transceiver_10g_64b67b.xci -of_objects [get_filesets sources_1]] |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/decoder_tb.vhd |
add_files -fileset sim_1 -norecurse $proj_dir/simulation/interlaken_interface_tb.vhd |
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if {$arg1 eq {interface}} { |
close_sim -force -quiet |
update_compile_order -fileset sources_1 |
set_property top testbench_interlaken_interface [get_filesets sim_1] |
set_property top_lib work [get_filesets sim_1] |
set_property top_arch tb_interlaken_interface [get_filesets sim_1] |
launch_xsim -simset sim_1 -mode behavioral |
puts "$arg1 it is, you've chosen wisely" |
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} elseif {$arg1 eq {decoder}} { |
close_sim -force -quiet |
update_compile_order -fileset sources_1 |
set_property top testbench_decoder [get_filesets sim_1] |
set_property top_lib work [get_filesets sim_1] |
set_property top_arch tb_decoder [get_filesets sim_1] |
launch_xsim -simset sim_1 -mode behavioral |
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} elseif {$arg1 eq {-help} } { |
puts "Seems you need help\n" |
puts "Run the simulation by entering the command simulate followed by the part you would like to simulate. \n Syntax : simulate object \n Arguments : interface , decoder." |
} else { |
puts "No valid command" |
} |
} |
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puts "\nRun the simulation by entering the command simulate followed by the part you would like to simulate. \n Syntax : simulate object \n Arguments : interface , decoder." |