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URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /eco32/trunk/monitor
    from Rev 54 to Rev 55
    ↔ Reverse comparison
  •

Rev 54 → Rev 55

/monitor-xess/start.h
42,6 → 42,11
int dskcap(int dskno);
int dskio(int dskno, char cmd, int sct, Word addr, int nscts);
 
void setISR(Word ptr);
void setUMSR(Word ptr);
extern Word isrPtr;
extern Word umsrPtr;
 
Word getTLB_HI(int index);
Word getTLB_LO(int index);
void setTLB(int index, Word entryHi, Word entryLo);
/monitor-xess/start.s
3,9 → 3,12
;
 
.set dmapaddr,0xC0000000 ; base of directly mapped addresses
.set stacktop,0xC0400000 ; monitor stack is at top of memory
.set stacktop,0xC0010000 ; monitor stack is at top of 64K
 
.set PSW,0 ; reg # of PSW
.set V_SHIFT,27 ; interrupt vector ctrl bit
.set V,1 << V_SHIFT
 
.set TLB_INDEX,1 ; reg # of TLB Index
.set TLB_ENTRY_HI,2 ; reg # of TLB EntryHi
.set TLB_ENTRY_LO,3 ; reg # of TLB EntryLo
13,6 → 16,9
 
.set USER_CONTEXT_SIZE,36*4 ; size of user context
 
.set BIO_OUT,0xF1000000 ; board I/O output port
.set SPI_EN,0x80000000 ; SPI bus enable ctrl bit
 
;***************************************************************
 
.import _ecode
55,6 → 61,11
.export dskcap
.export dskio
 
.export setISR
.export setUMSR
.export isrPtr
.export umsrPtr
 
.export getTLB_HI
.export getTLB_LO
.export setTLB
96,20 → 107,20
.align 4
 
cinchk:
; j kbdinchk
j ser0inchk
j kbdinchk
; j ser0inchk
 
cin:
; j kbdin
j ser0in
j kbdin
; j ser0in
 
coutchk:
; j dspoutchk
j ser0outchk
j dspoutchk
; j ser0outchk
 
cout:
; j dspout
j ser0out
j dspout
; j ser0out
 
sinchk:
j ser0inchk
129,6 → 140,21
dskio:
j dio
 
reserved1:
j reserved1
 
reserved2:
j reserved2
 
reserved3:
j reserved3
 
setISR:
j setISR1
 
setUMSR:
j setUMSR1
 
;***************************************************************
 
.code
135,9 → 161,15
.align 4
 
start:
; force CPU into a defined state
mvts $0,PSW ; disable interrupts and user mode
; let irq/exc vectors point to RAM
add $8,$0,V
mvts $8,PSW
 
; disable flash ROM, enable SPI bus
; add $8,$0,BIO_OUT
; add $9,$0,SPI_EN
; stw $9,$8,0
 
; initialize TLB
mvts $0,TLB_ENTRY_LO ; invalidate all TLB entries
add $8,$0,dmapaddr ; by impossible virtual page number
177,8 → 209,8
 
; now do some useful work
add $29,$0,stacktop ; setup monitor stack
; jal dspinit ; init display
; jal kbdinit ; init keyboard
jal dspinit ; init display
jal kbdinit ; init keyboard
jal serinit ; init serial interface
jal main ; enter command loop
 
187,6 → 219,9
 
;***************************************************************
 
.code
.align 4
 
; Word getTLB_HI(int index)
getTLB_HI:
mvts $4,TLB_INDEX
211,6 → 246,9
 
;***************************************************************
 
.code
.align 4
 
; int dskcap(int dskno)
dcap:
bne $4,$0,dcapser
238,6 → 276,30
.code
.align 4
 
; void setISR(Word ptr)
setISR1:
stw $4,$0,isrPtr
jr $31
 
; void setUMSR(Word ptr)
setUMSR1:
stw $4,$0,umsrPtr
jr $31
 
.data
.align 4
 
isrPtr:
.word 0
 
umsrPtr:
.word 0
 
;***************************************************************
 
.code
.align 4
 
; Bool saveState(MonitorState *msp)
; always return 'true' here
saveState:
297,7 → 359,7
.nosyn
ldw $8,$28,33*4 ; tlbIndex
mvts $8,TLB_INDEX
ldw $8,$28,34*4 ; tlbWntryHi
ldw $8,$28,34*4 ; tlbEntryHi
mvts $8,TLB_ENTRY_HI
ldw $8,$28,35*4 ; tlbEntryLo
mvts $8,TLB_ENTRY_LO
/monitor-xess/keyboard.s
37,7 → 37,7
stw $17,$29,0
kbdin0:
jal kbdinp
add $16,$2,$0 ; key1 in $16
add $16,$2,$0 ; key 1 in $16
add $8,$0,0xF0
bne $16,$8,kbdin2
kbdin1:
45,7 → 45,7
j kbdin0
kbdin2:
jal kbdinp
add $17,$2,$0 ; key2 in $17
add $17,$2,$0 ; key 2 in $17
beq $17,$16,kbdin2
add $8,$0,0xF0
beq $17,$8,kbdin3
54,8 → 54,8
jal kbdinp
bne $2,$16,kbdin2
kbdin4:
add $4,$16,$0
add $5,$0,xltbl1
add $4,$16,$0 ; use key 1
add $5,$0,xltbl1 ; with translation table 1
jal xlat
j kbdx
kbdin5:
87,17 → 87,26
add $8,$0,0x12 ; left shift key
beq $16,$8,kbdin12
add $8,$0,0x59 ; right shift key
bne $16,$8,kbdin13
beq $16,$8,kbdin12
add $8,$0,0x14 ; ctrl key
beq $16,$8,kbdin14
j kbdin13
kbdin12:
add $4,$17,$0
add $5,$0,xltbl2
add $4,$17,$0 ; use key 2
add $5,$0,xltbl2 ; with translation table 2
jal xlat
j kbdx
kbdin13:
add $4,$16,$0
add $5,$0,xltbl1
add $4,$16,$0 ; use key 1
add $5,$0,xltbl1 ; with translation table 1
jal xlat
j kbdx
kbdin14:
add $4,$17,$0 ; use key 2
add $5,$0,xltbl1 ; with translation table 1
jal xlat
and $2,$2,0xFF-0x60 ; then reset bits 0x60
j kbdx
kbdx:
ldw $17,$29,0
ldw $16,$29,4
110,12 → 119,12
kbdinp1:
ldw $9,$8,0
and $9,$9,1
beq $9,$0,kbdinp1
ldw $2,$8,4
beq $9,$0,kbdinp1 ; wait until character ready
ldw $2,$8,4 ; get character
add $9,$0,0xE0
beq $2,$9,kbdinp1
beq $2,$9,kbdinp1 ; ignore E0 prefix
add $9,$0,0xE1
beq $2,$9,kbdinp1
beq $2,$9,kbdinp1 ; as well as E1 prefix
jr $31
 
xlat:
/monitor-xess/cpu.c
87,10 → 87,10
 
 
static char *cause[32] = {
/* 0 */ "terminal 0 transmitter interrupt",
/* 1 */ "terminal 0 receiver interrupt",
/* 2 */ "terminal 1 transmitter interrupt",
/* 3 */ "terminal 1 receiver interrupt",
/* 0 */ "serial line 0 xmt interrupt",
/* 1 */ "serial line 0 rcv interrupt",
/* 2 */ "serial line 1 xmt interrupt",
/* 3 */ "serial line 1 rcv interrupt",
/* 4 */ "keyboard interrupt",
/* 5 */ "unknown interrupt",
/* 6 */ "unknown interrupt",
101,8 → 101,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
206,6 → 206,7
}
break;
default:
/* this should never happen */
printf("cannot compute condition code %d\n", cc);
break;
}
233,7 → 234,7
offset = instr & 0x03FFFFFF;
switch (stepType[opcode]) {
case 1:
/* next instruction follows current one */
/* next instruction follows current one immediately */
nextAddr = pc + 4;
break;
case 2:
249,7 → 250,7
break;
case 4:
/* next instruction reached by jump to register contents */
nextAddr = RR(reg1);
nextAddr = RR(reg1) & 0xFFFFFFFC;
break;
default:
printf("cannot single-step instruction with opcode 0x%02X\n",
262,7 → 263,7
userContext.reg[i] = RR(i);
}
userContext.reg[30] = pc;
userContext.psw = psw & ~PSW_V;
userContext.psw = psw;
userContext.tlbIndex = mmuGetIndex();
userContext.tlbHi = mmuGetEntryHi();
userContext.tlbLo = mmuGetEntryLo();
276,7 → 277,7
WR(i, userContext.reg[i]);
}
pc = userContext.reg[30];
psw = userContext.psw | (psw & PSW_V);
psw = userContext.psw;
mmuSetIndex(userContext.tlbIndex);
mmuSetEntryHi(userContext.tlbHi);
mmuSetEntryLo(userContext.tlbLo);
284,16 → 285,22
if (nextAddr == pc) {
return;
}
if ((psw & PSW_V) == 0) {
printf("unexpected %s occurred\n",
exceptionToString((psw & PSW_PRIO_MASK) >> 16));
return;
}
if ((psw & PSW_PRIO_MASK) >> 16 == 21 &&
(mmuGetEntryHi() & 0x80000000) == 0) {
pc = 0xC0000008;
/* TLB user miss */
if (umsrPtr == 0x00000000) {
printf("unexpected TLB user miss exception occurred\n");
return;
}
pc = umsrPtr;
} else {
pc = 0xC0000004;
/* any other exception */
if (isrPtr == 0x00000000) {
printf("unexpected %s occurred\n",
exceptionToString((psw & PSW_PRIO_MASK) >> 16));
return;
}
pc = isrPtr;
}
}
 
317,7 → 324,7
userContext.reg[i] = RR(i);
}
userContext.reg[30] = pc;
userContext.psw = psw & ~PSW_V;
userContext.psw = psw;
userContext.tlbIndex = mmuGetIndex();
userContext.tlbHi = mmuGetEntryHi();
userContext.tlbLo = mmuGetEntryLo();
331,7 → 338,7
WR(i, userContext.reg[i]);
}
pc = userContext.reg[30];
psw = userContext.psw | (psw & PSW_V);
psw = userContext.psw;
mmuSetIndex(userContext.tlbIndex);
mmuSetEntryHi(userContext.tlbHi);
mmuSetEntryLo(userContext.tlbLo);
341,16 → 348,22
if (breakSet && breakAddr == pc) {
return;
}
if ((psw & PSW_V) == 0) {
printf("unexpected %s occurred\n",
exceptionToString((psw & PSW_PRIO_MASK) >> 16));
return;
}
if ((psw & PSW_PRIO_MASK) >> 16 == 21 &&
(mmuGetEntryHi() & 0x80000000) == 0) {
pc = 0xC0000008;
/* TLB user miss */
if (umsrPtr == 0x00000000) {
printf("unexpected TLB user miss exception occurred\n");
return;
}
pc = umsrPtr;
} else {
pc = 0xC0000004;
/* any other exception */
if (isrPtr == 0x00000000) {
printf("unexpected %s occurred\n",
exceptionToString((psw & PSW_PRIO_MASK) >> 16));
return;
}
pc = isrPtr;
}
}
}
/monitor-xess/Makefile
21,11 → 21,19
monitor.exo: monitor.bin
$(BUILD)/bin/bin2exo -S2 0 monitor.bin monitor.exo
 
monitor.bin: $(SRC)
$(BUILD)/bin/lcc -A -Wo-rom -Wl-rd -Wl0xC03F0000 \
-Wl-m -Wlmonitor.map -o monitor.bin $(SRC)
monitor.bin: copy/copy.bin $(SRC)
$(BUILD)/bin/lcc -A -Wo-rom -Wl-rc -Wl0xC0000000 \
-Wl-rd -Wl0xC000C000 \
-Wl-m -Wlmonitor.map \
-o prelim.bin $(SRC)
cat copy/copy.bin prelim.bin >monitor.bin
rm prelim.bin
 
copy/copy.bin:
$(MAKE) -C copy all
 
clean:
rm -f *~
rm -f monitor.map monitor.bin
rm -f monitor.exo
$(MAKE) -C copy clean
/monitor-xess/serial.s
5,7 → 5,7
;***************************************************************
 
.set ser0base,0xF0300000 ; serial line 0 base address
.set ser1base,0xF0300010 ; serial line 1 base address
.set ser1base,0xF0301000 ; serial line 1 base address
 
.export serinit ; initialize serial interface
 
/monitor-xess/main.c
15,9 → 15,10
int main(void) {
char *line;
 
printf("\n\nECO32 Machine Monitor 1.0\n\n");
printf("\n\nECO32 Machine Monitor 1.3\n\n");
initInstrTable();
cpuSetPC(0xC0000000);
cpuSetPC(0xC0010000);
cpuSetPSW(0x08000000);
while (1) {
line = getLine("ECO32 > ");
addHist(line);

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