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URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /eco32/trunk/sim
    from Rev 72 to Rev 78
    ↔ Reverse comparison
  •

Rev 72 → Rev 78

/mmu.c
25,7 → 25,7
static Word tlbIndex;
static Word tlbEntryHi;
static Word tlbEntryLo;
static Word tlbBadAddr;
static Word mmuBadAddr;
 
 
static int assoc(Word page) {
65,7 → 65,7
}
if ((vAddr & 0x80000000) != 0 && userMode) {
/* trying to access a privileged address from user mode */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
throwException(EXC_PRV_ADDRESS);
}
if ((vAddr & 0xC0000000) == 0xC0000000) {
79,19 → 79,19
index = assoc(page);
if (index == -1) {
/* TLB miss exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
tlbEntryHi = page;
throwException(EXC_TLB_MISS);
}
if (!tlb[index].valid) {
/* TLB invalid exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
tlbEntryHi = page;
throwException(EXC_TLB_INVALID);
}
if (!tlb[index].write && writing) {
/* TLB write exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
tlbEntryHi = page;
throwException(EXC_TLB_WRITE);
}
107,7 → 107,7
Word mmuReadWord(Word vAddr, Bool userMode) {
if ((vAddr & 3) != 0) {
/* throw illegal address exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
throwException(EXC_ILL_ADDRESS);
}
return memoryReadWord(v2p(vAddr, userMode, false));
117,7 → 117,7
Half mmuReadHalf(Word vAddr, Bool userMode) {
if ((vAddr & 1) != 0) {
/* throw illegal address exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
throwException(EXC_ILL_ADDRESS);
}
return memoryReadHalf(v2p(vAddr, userMode, false));
132,7 → 132,7
void mmuWriteWord(Word vAddr, Word data, Bool userMode) {
if ((vAddr & 3) != 0) {
/* throw illegal address exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
throwException(EXC_ILL_ADDRESS);
}
memoryWriteWord(v2p(vAddr, userMode, true), data);
142,7 → 142,7
void mmuWriteHalf(Word vAddr, Half data, Bool userMode) {
if ((vAddr & 1) != 0) {
/* throw illegal address exception */
tlbBadAddr = vAddr;
mmuBadAddr = vAddr;
throwException(EXC_ILL_ADDRESS);
}
memoryWriteHalf(v2p(vAddr, userMode, true), data);
185,12 → 185,12
 
 
Word mmuGetBadAddr(void) {
return tlbBadAddr;
return mmuBadAddr;
}
 
 
void mmuSetBadAddr(Word value) {
tlbBadAddr = value;
mmuBadAddr = value;
}
 
 
294,7 → 294,7
tlbIndex = rand() & TLB_MASK;
tlbEntryHi = rand() & PAGE_MASK;
tlbEntryLo = rand() & (PAGE_MASK | TLB_WRITE | TLB_VALID);
tlbBadAddr = rand();
mmuBadAddr = rand();
}
 
 

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