OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /eco32/trunk/stdalone
    from Rev 18 to Rev 38
    Reverse comparison

Rev 18 → Rev 38

/shpart/main.c
81,8 → 81,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
/shpart/start.s
198,8 → 198,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/onetask/os/main.c
118,8 → 118,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
/onetask/os/start.s
237,8 → 237,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/dskchk/main.c
138,8 → 138,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
193,7 → 193,7
 
void initClock(void) {
setISR(14, clockISR);
*TIMER_DIV = 10;
*TIMER_DIV = 500000;
*TIMER_CTRL = 2;
setMask(1 << 14);
enable();
/dskchk/start.s
198,8 → 198,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/memsize/main.c
110,8 → 110,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
/memsize/start.s
183,8 → 183,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/twotasks-1/os/main.c
140,8 → 140,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
271,7 → 271,7
unsigned int *timerBase;
 
timerBase = (unsigned int *) 0xF0000000;
*(timerBase + 1) = 1000;
*(timerBase + 1) = 50000000;
*timerBase = 2;
orMask(1 << 14);
}
/twotasks-1/os/start.s
258,8 → 258,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/wrtmbr/main.c
130,8 → 130,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
/wrtmbr/start.s
183,8 → 183,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/mkpart/main.c
77,8 → 77,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
/mkpart/start.s
198,8 → 198,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception
/twotasks-2/os/main.c
164,8 → 164,8
/* 11 */ "unknown interrupt",
/* 12 */ "unknown interrupt",
/* 13 */ "unknown interrupt",
/* 14 */ "timer interrupt",
/* 15 */ "unknown interrupt",
/* 14 */ "timer 0 interrupt",
/* 15 */ "timer 1 interrupt",
/* 16 */ "bus timeout exception",
/* 17 */ "illegal instruction exception",
/* 18 */ "privileged instruction exception",
292,7 → 292,7
unsigned int *timerBase;
 
timerBase = (unsigned int *) 0xF0000000;
*(timerBase + 1) = 1000;
*(timerBase + 1) = 50000000;
*timerBase = 2;
orMask(1 << 14);
}
/twotasks-2/os/start.s
274,8 → 274,8
.word 0 ; 11: unused
.word 0 ; 12: unused
.word 0 ; 13: unused
.word 0 ; 14: timer interrupt
.word 0 ; 15: unused
.word 0 ; 14: timer 0 interrupt
.word 0 ; 15: timer 1 interrupt
.word 0 ; 16: bus timeout exception
.word 0 ; 17: illegal instruction exception
.word 0 ; 18: privileged instruction exception

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.