URL
https://opencores.org/ocsvn/eco32/eco32/trunk
Subversion Repositories eco32
Compare Revisions
- This comparison shows the changes necessary to convert path
/eco32
- from Rev 83 to Rev 84
- ↔ Reverse comparison
Rev 83 → Rev 84
/trunk/monitor/monitor/common/mmu.c
13,6 → 13,7
static Word tlbIndex; |
static Word tlbEntryHi; |
static Word tlbEntryLo; |
static Word badAddress; |
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Word mmuReadWord(Word vAddr) { |
75,6 → 76,16
} |
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Word mmuGetBadAddr(void) { |
return badAddress; |
} |
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void mmuSetBadAddr(Word value) { |
badAddress = value; |
} |
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TLB_Entry mmuGetTLB(int index) { |
Word hi; |
Word lo; |
/trunk/monitor/monitor/common/start.h
13,6 → 13,7
Word tlbIndex; /* TLB index register */ |
Word tlbHi; /* TLB EntryHi register */ |
Word tlbLo; /* TLB EntryLo register */ |
Word badAddr; /* bad address register */ |
} UserContext; |
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typedef struct { |
/trunk/monitor/monitor/common/mmu.h
36,7 → 36,9
Word mmuGetEntryHi(void); |
void mmuSetEntryHi(Word value); |
Word mmuGetEntryLo(void); |
void mmuSetEntryLo(Word Value); |
void mmuSetEntryLo(Word value); |
Word mmuGetBadAddr(void); |
void mmuSetBadAddr(Word value); |
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TLB_Entry mmuGetTLB(int index); |
void mmuSetTLB(int index, TLB_Entry tlbEntry); |
/trunk/monitor/monitor/common/command.c
721,6 → 721,7
printf("Index(1) %08X\n", mmuGetIndex()); |
printf("EntryHi(2) %08X\n", mmuGetEntryHi()); |
printf("EntryLo(3) %08X\n", mmuGetEntryLo()); |
printf("BadAddr(4) %08X\n", mmuGetBadAddr()); |
} else if (n == 2) { |
if (!getDecNumber(tokens[1], &index) || index < 0 || index >= TLB_SIZE) { |
printf("illegal TLB index\n"); |
/trunk/monitor/monitor/common/cpu.c
267,6 → 267,7
userContext.tlbIndex = mmuGetIndex(); |
userContext.tlbHi = mmuGetEntryHi(); |
userContext.tlbLo = mmuGetEntryLo(); |
userContext.badAddr = mmuGetBadAddr(); |
if (saveState(&stepState)) { |
origReturn = monitorReturn; |
monitorReturn = &stepState; |
281,6 → 282,7
mmuSetIndex(userContext.tlbIndex); |
mmuSetEntryHi(userContext.tlbHi); |
mmuSetEntryLo(userContext.tlbLo); |
mmuSetBadAddr(userContext.badAddr); |
mmuWriteWord(nextAddr, nextInstr); |
if (nextAddr == pc) { |
return; |
328,6 → 330,7
userContext.tlbIndex = mmuGetIndex(); |
userContext.tlbHi = mmuGetEntryHi(); |
userContext.tlbLo = mmuGetEntryLo(); |
userContext.badAddr = mmuGetBadAddr(); |
if (saveState(&runState)) { |
origReturn = monitorReturn; |
monitorReturn = &runState; |
342,6 → 345,7
mmuSetIndex(userContext.tlbIndex); |
mmuSetEntryHi(userContext.tlbHi); |
mmuSetEntryLo(userContext.tlbLo); |
mmuSetBadAddr(userContext.badAddr); |
if (breakSet) { |
mmuWriteWord(breakAddr, instr); |
} |
/trunk/monitor/monitor/boards/xsa-xst-3/start.s
13,8 → 13,9
.set TLB_ENTRY_HI,2 ; reg # of TLB EntryHi |
.set TLB_ENTRY_LO,3 ; reg # of TLB EntryLo |
.set TLB_ENTRIES,32 ; number of TLB entries |
.set BAD_ADDRESS,4 ; reg # of bad address reg |
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.set USER_CONTEXT_SIZE,36*4 ; size of user context |
.set USER_CONTEXT_SIZE,37*4 ; size of user context |
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;*************************************************************** |
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355,6 → 356,8
mvts $8,TLB_ENTRY_HI |
ldw $8,$28,35*4 ; tlbEntryLo |
mvts $8,TLB_ENTRY_LO |
ldw $8,$28,36*4 ; badAddress |
mvts $8,BAD_ADDRESS |
;ldw $0,$28,0*4 ; registers |
ldw $1,$28,1*4 |
ldw $2,$28,2*4 |
439,5 → 442,7
stw $8,$28,34*4 ; tlbEntryHi |
mvfs $8,TLB_ENTRY_LO |
stw $8,$28,35*4 ; tlbEntryLo |
mvfs $8,BAD_ADDRESS |
stw $8,$28,36*4 ; badAddress |
.syn |
j loadState |
/trunk/monitor/monitor/boards/s3e-500/start.s
13,8 → 13,9
.set TLB_ENTRY_HI,2 ; reg # of TLB EntryHi |
.set TLB_ENTRY_LO,3 ; reg # of TLB EntryLo |
.set TLB_ENTRIES,32 ; number of TLB entries |
.set BAD_ADDRESS,4 ; reg # of bad address reg |
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.set USER_CONTEXT_SIZE,36*4 ; size of user context |
.set USER_CONTEXT_SIZE,37*4 ; size of user context |
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.set BIO_OUT,0xF1000000 ; board I/O output port |
.set SPI_EN,0x80000000 ; SPI bus enable ctrl bit |
363,6 → 364,8
mvts $8,TLB_ENTRY_HI |
ldw $8,$28,35*4 ; tlbEntryLo |
mvts $8,TLB_ENTRY_LO |
ldw $8,$28,36*4 ; badAddress |
mvts $8,BAD_ADDRESS |
;ldw $0,$28,0*4 ; registers |
ldw $1,$28,1*4 |
ldw $2,$28,2*4 |
447,5 → 450,7
stw $8,$28,34*4 ; tlbEntryHi |
mvfs $8,TLB_ENTRY_LO |
stw $8,$28,35*4 ; tlbEntryLo |
mvfs $8,BAD_ADDRESS |
stw $8,$28,36*4 ; badAddress |
.syn |
j loadState |