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URL https://opencores.org/ocsvn/fade_ether_protocol/fade_ether_protocol/trunk

Subversion Repositories fade_ether_protocol

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  • This comparison shows the changes necessary to convert path
    /fade_ether_protocol/trunk
    from Rev 19 to Rev 20
    Reverse comparison

Rev 19 → Rev 20

/experimental_jumbo_frames_version/linux/fpga_l3_fade.c
789,6 → 789,7
sd->last_pkt_len = (uint32_t) * (uint64_t *) &(sd->buffer[pkt_pos+USER_LEN-sizeof(uint64_t)]);
//We have received the "flushed" buffer, mark that transmission is stopped
sd->stopped_flag = 1;
//printk(KERN_INFO "set stopped flag");
}
/* We modify the number of the copied packet in the pkts array, to avoid
* unnecessary copying if we receive a duplicate
824,6 → 825,7
sd->head = ((sd->last_nack_pkt-1)*USER_LEN+sd->last_pkt_len) & MY_BUF_LEN_MASK;
//We have consumed the last, "flushed" buffer, so now we can set the eof flag
sd-> eof_flag = 1;
//printk(KERN_ALERT "set eof flag!");
//And we wake up the reading process
wake_up_interruptible(&read_queue);
} //if - stopped_flag
/experimental_jumbo_frames_version/fpga/desc_manager_simple.vhd
7,7 → 7,7
-- License : BSD License
-- Company :
-- Created : 2012-03-30
-- Last update: 2014-10-12
-- Last update: 2014-10-20
-- Platform :
-- Standard : VHDL'93
-------------------------------------------------------------------------------
251,8 → 251,9
attribute keep : string;
attribute keep of dmgr_state : signal is "true";
 
signal dta_buf_full : std_logic := '0';
signal dta_buf_flush : std_logic := '0';
signal dta_buf_full : std_logic := '0';
signal dta_buf_flush : std_logic := '0';
signal stored_dta_eod : std_logic := '0';
 
signal ack_pkt_in : pkt_ack;
 
315,15 → 316,20
dta_rcv : process (clk, rst_n)
begin -- process dta_rcv
if rst_n = '0' then -- asynchronous reset (active low)
wrd_addr <= 0;
dta_buf_flush <= '0';
dta_buf_full <= '0';
dmem_we <= '0';
wrd_addr <= 0;
dta_buf_flush <= '0';
dta_buf_full <= '0';
dmem_we <= '0';
stored_dta_eod <= '0';
elsif clk'event and clk = '1' then -- rising clock edge
dmem_we <= '0';
-- if we signalled "data full", we are only waiting for
-- dta_buf_free;
-- However even in this state we must receive the "dta_eod" signal
if dta_buf_full = '1' then
if dta_eod = '1' then
stored_dta_eod <= '1';
end if;
if c.dta_buf_free = '1' then
dta_buf_full <= '0';
dta_buf_flush <= '0';
331,10 → 337,12
end if;
else
-- end of data is signalled, mark the last buffer as full
if dta_eod = '1' then
if (dta_eod = '1') or (stored_dta_eod = '1') then
-- Clear the stored eod
stored_dta_eod <= '0';
-- In the last word of the packet, write the number of written words
dmem_addr <= std_logic_vector(r.head_ptr) &
std_logic_vector(to_unsigned(NWRDS_IN_PKT-1, LOG2_NWRDS_IN_PKT));
dmem_addr <= std_logic_vector(r.head_ptr) &
std_logic_vector(to_unsigned(NWRDS_IN_PKT-1, LOG2_NWRDS_IN_PKT));
dmem_dta <= std_logic_vector(to_unsigned(wrd_addr, 64));
dmem_we <= '1';
dta_buf_flush <= '1';

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