OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /funbase_ip_library/trunk/TUT/ip.hwp.communication/hibi/3.0/vhd
    from Rev 162 to Rev 163
    ↔ Reverse comparison
  •

Rev 162 → Rev 163

/hibi_segment_6p.vhd
1,7 → 1,7
-- ***************************************************
-- File: hibi_segment_6p.vhd
-- Creation date: 28.02.2013
-- Creation time: 13:35:47
-- Creation time: 13:54:32
-- Description:
-- Created by: matilail
-- This file was generated with Kactus2 vhdl generator.
192,7 → 192,7
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV : std_logic;
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV : std_logic;
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV : std_logic;
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV : std_logic;
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV : std_logic;
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
199,7 → 199,7
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM : std_logic_vector(4 downto 0);
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA : std_logic_vector(31 downto 0);
206,7 → 206,7
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA : std_logic_vector(31 downto 0);
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL : std_logic;
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL : std_logic;
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL : std_logic;
213,7 → 213,7
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL : std_logic;
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL : std_logic;
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL : std_logic;
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL : std_logic;
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL : std_logic;
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK : std_logic;
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK : std_logic;
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK : std_logic;
220,7 → 220,7
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK : std_logic;
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK : std_logic;
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK : std_logic;
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK : std_logic;
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK : std_logic;
 
component hibi_orbus_6p
generic (
396,7 → 396,7
bus_av_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV,
bus_av_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV,
bus_av_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV,
bus_av_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_comm_0_in(4 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM(4 downto 0),
bus_comm_1_in(4 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM(4 downto 0),
bus_comm_2_in(4 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM(4 downto 0),
403,7 → 403,7
bus_comm_3_in(4 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM(4 downto 0),
bus_comm_4_in(4 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM(4 downto 0),
bus_comm_5_in(4 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_data_0_in(31 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA(31 downto 0),
bus_data_1_in(31 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA(31 downto 0),
bus_data_2_in(31 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA(31 downto 0),
410,7 → 410,7
bus_data_3_in(31 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA(31 downto 0),
bus_data_4_in(31 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA(31 downto 0),
bus_data_5_in(31 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_full_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL,
bus_full_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL,
bus_full_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL,
417,7 → 417,7
bus_full_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL,
bus_full_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL,
bus_full_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL,
bus_full_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_lock_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK,
bus_lock_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK,
bus_lock_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK,
424,13 → 424,14
bus_lock_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK,
bus_lock_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK,
bus_lock_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK,
bus_lock_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK
bus_lock_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK
);
 
hibi_wrapper_r4_0 : hibi_wrapper_r4
generic map (
addr_g => ip_mSlave_0_addr_start,
addr_limit_g => ip_mSlave_0_addr_end
addr_limit_g => ip_mSlave_0_addr_end,
n_agents_g => 6
)
port map (
agent_av_in => agent_av_in,
447,16 → 448,16
agent_re_in => agent_re_in,
agent_sync_clk => agent_sync_clk,
agent_we_in => agent_we_in,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV,
bus_clk => bus_clk,
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM(4 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA(31 downto 0),
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK,
bus_lock_out => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK,
bus_sync_clk => bus_sync_clk,
rst_n => rst_n
465,7 → 466,8
hibi_wrapper_r4_1 : hibi_wrapper_r4
generic map (
addr_g => ip_mSlave_1_addr_start,
addr_limit_g => ip_mSlave_1_addr_end
addr_limit_g => ip_mSlave_1_addr_end,
n_agents_g => 6
)
port map (
agent_av_in => agent_av_in_1,
482,16 → 484,16
agent_re_in => agent_re_in_1,
agent_sync_clk => agent_sync_clk_1,
agent_we_in => agent_we_in_1,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV,
bus_clk => bus_clk_1,
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM(4 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA(31 downto 0),
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK,
bus_lock_out => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK,
bus_sync_clk => bus_sync_clk_1,
rst_n => rst_n
500,7 → 502,8
hibi_wrapper_r4_2 : hibi_wrapper_r4
generic map (
addr_g => ip_mSlave_2_addr_start,
addr_limit_g => ip_mSlave_2_addr_end
addr_limit_g => ip_mSlave_2_addr_end,
n_agents_g => 6
)
port map (
agent_av_in => agent_av_in_2,
517,16 → 520,16
agent_re_in => agent_re_in_2,
agent_sync_clk => agent_sync_clk_2,
agent_we_in => agent_we_in_2,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV,
bus_clk => bus_clk_2,
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM(4 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA(31 downto 0),
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK,
bus_lock_out => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK,
bus_sync_clk => bus_sync_clk_2,
rst_n => rst_n
535,7 → 538,8
hibi_wrapper_r4_3 : hibi_wrapper_r4
generic map (
addr_g => ip_mSlave_3_addr_start,
addr_limit_g => ip_mSlave_3_addr_end
addr_limit_g => ip_mSlave_3_addr_end,
n_agents_g => 6
)
port map (
agent_av_in => agent_av_in_3,
552,16 → 556,16
agent_re_in => agent_re_in_3,
agent_sync_clk => agent_sync_clk_3,
agent_we_in => agent_we_in_3,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV,
bus_clk => bus_clk_3,
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM(4 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA(31 downto 0),
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK,
bus_lock_out => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK,
bus_sync_clk => bus_sync_clk_3,
rst_n => rst_n
587,16 → 591,16
agent_re_in => agent_re_in_4,
agent_sync_clk => agent_sync_clk_4,
agent_we_in => agent_we_in_4,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV,
bus_clk => bus_clk_4,
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM(4 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA(31 downto 0),
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK,
bus_lock_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK,
bus_sync_clk => bus_sync_clk_4,
rst_n => rst_n
605,7 → 609,8
hibi_wrapper_r4_5 : hibi_wrapper_r4
generic map (
addr_g => ip_mSlave_5_addr_start,
addr_limit_g => ip_mSlave_5_addr_end
addr_limit_g => ip_mSlave_5_addr_end,
n_agents_g => 6
)
port map (
agent_av_in => agent_av_in_5,
622,16 → 627,16
agent_re_in => agent_re_in_5,
agent_sync_clk => agent_sync_clk_5,
agent_we_in => agent_we_in_5,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterAV,
bus_av_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV,
bus_clk => bus_clk_5,
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterCOMM(4 downto 0),
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM(4 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterDATA(31 downto 0),
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA(31 downto 0),
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterFULL,
bus_full_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_0_bus_mMasterLOCK,
bus_lock_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK,
bus_sync_clk => bus_sync_clk_5,
rst_n => rst_n

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.