URL
https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk
Subversion Repositories funbase_ip_library
Compare Revisions
- This comparison shows the changes necessary to convert path
/funbase_ip_library/trunk/TUT/soc/altera_de_II_demo
- from Rev 147 to Rev 148
- ↔ Reverse comparison
Rev 147 → Rev 148
/1.0/ip_xact/altera_de_II_demo.1.0.xml
1,8 → 1,8
<?xml version="1.0" encoding="UTF-8"?> |
<!-- Created by Kactus2 - Open source IP-Xact toolset --> |
<!-- http://sourceforge.net/projects/kactus2/ --> |
<!-- Date: 29.08.2012 --> |
<!-- Time: 11:24:27 --> |
<!-- Date: 03.09.2012 --> |
<!-- Time: 15:11:16 --> |
<spirit:component xmlns:kactus2="http://funbase.cs.tut.fi/" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd"> |
<spirit:vendor>TUT</spirit:vendor> |
<spirit:library>soc</spirit:library> |
149,11 → 149,6
<spirit:localName>vhdlSource</spirit:localName> |
</spirit:fileSetRef> |
</spirit:view> |
<spirit:view> |
<spirit:name>foobar</spirit:name> |
<spirit:envIdentifier>::</spirit:envIdentifier> |
<spirit:hierarchyRef spirit:vendor="foobar" spirit:library="soc" spirit:name="altera_de_II_demo.foobar.designcfg" spirit:version="1.0"/> |
</spirit:view> |
</spirit:views> |
<spirit:ports> |
<spirit:port> |
170,9 → 165,9
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition> |
<spirit:viewNameRef>kactusHierarchical_rtl</spirit:viewNameRef> |
<spirit:viewNameRef>rtl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
<spirit:viewNameRef>kactusHierarchical</spirit:viewNameRef> |
<spirit:viewNameRef>structural_vhdl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
</spirit:wireTypeDef> |
</spirit:wireTypeDefs> |
</spirit:wire> |
192,9 → 187,9
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition> |
<spirit:viewNameRef>kactusHierarchical_rtl</spirit:viewNameRef> |
<spirit:viewNameRef>rtl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
<spirit:viewNameRef>kactusHierarchical</spirit:viewNameRef> |
<spirit:viewNameRef>structural_vhdl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
</spirit:wireTypeDef> |
</spirit:wireTypeDefs> |
</spirit:wire> |
214,9 → 209,9
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition> |
<spirit:viewNameRef>kactusHierarchical_rtl</spirit:viewNameRef> |
<spirit:viewNameRef>rtl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
<spirit:viewNameRef>kactusHierarchical</spirit:viewNameRef> |
<spirit:viewNameRef>structural_vhdl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
</spirit:wireTypeDef> |
</spirit:wireTypeDefs> |
</spirit:wire> |
236,9 → 231,9
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition> |
<spirit:viewNameRef>kactusHierarchical_rtl</spirit:viewNameRef> |
<spirit:viewNameRef>rtl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
<spirit:viewNameRef>kactusHierarchical</spirit:viewNameRef> |
<spirit:viewNameRef>structural_vhdl</spirit:viewNameRef> |
<spirit:viewNameRef>foobar</spirit:viewNameRef> |
</spirit:wireTypeDef> |
</spirit:wireTypeDefs> |
</spirit:wire> |